./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 48c9605d Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-1.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 43c551c05c986c34609f999e25a13e0dbb4f692e7b1d3b7f2939ec615c71d0d0 --- Real Ultimate output --- This is Ultimate 0.3.0-?-48c9605-m [2025-02-08 14:59:28,397 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-08 14:59:28,455 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-02-08 14:59:28,460 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-08 14:59:28,462 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-08 14:59:28,462 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-08 14:59:28,492 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-08 14:59:28,493 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-08 14:59:28,493 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-08 14:59:28,493 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-08 14:59:28,493 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-08 14:59:28,494 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-08 14:59:28,494 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-08 14:59:28,494 INFO L153 SettingsManager]: * Use SBE=true [2025-02-08 14:59:28,494 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-08 14:59:28,494 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-08 14:59:28,494 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-08 14:59:28,494 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-08 14:59:28,495 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-08 14:59:28,495 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-08 14:59:28,495 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-08 14:59:28,495 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-08 14:59:28,495 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-08 14:59:28,495 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-08 14:59:28,495 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-08 14:59:28,495 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-08 14:59:28,495 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-08 14:59:28,495 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-08 14:59:28,495 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-08 14:59:28,495 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-08 14:59:28,496 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-08 14:59:28,496 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-08 14:59:28,496 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-08 14:59:28,496 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-08 14:59:28,496 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-08 14:59:28,496 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-08 14:59:28,496 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-08 14:59:28,496 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-08 14:59:28,496 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-08 14:59:28,497 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-08 14:59:28,497 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 43c551c05c986c34609f999e25a13e0dbb4f692e7b1d3b7f2939ec615c71d0d0 [2025-02-08 14:59:28,803 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-08 14:59:28,812 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-08 14:59:28,815 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-08 14:59:28,816 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-08 14:59:28,816 INFO L274 PluginConnector]: CDTParser initialized [2025-02-08 14:59:28,818 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-1.i [2025-02-08 14:59:30,115 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/5ad81a60a/9a4242677f2940589031f685ac391df9/FLAGb6c5c935e [2025-02-08 14:59:30,484 INFO L384 CDTParser]: Found 1 translation units. [2025-02-08 14:59:30,485 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test10-1.i [2025-02-08 14:59:30,501 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/5ad81a60a/9a4242677f2940589031f685ac391df9/FLAGb6c5c935e [2025-02-08 14:59:30,512 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/5ad81a60a/9a4242677f2940589031f685ac391df9 [2025-02-08 14:59:30,514 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-08 14:59:30,515 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-08 14:59:30,516 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-08 14:59:30,516 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-08 14:59:30,520 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-08 14:59:30,521 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:59:30" (1/1) ... [2025-02-08 14:59:30,524 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@19cd0970 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:30, skipping insertion in model container [2025-02-08 14:59:30,524 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:59:30" (1/1) ... [2025-02-08 14:59:30,574 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-08 14:59:31,049 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 14:59:31,067 INFO L200 MainTranslator]: Completed pre-run [2025-02-08 14:59:31,204 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 14:59:31,240 INFO L204 MainTranslator]: Completed translation [2025-02-08 14:59:31,241 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31 WrapperNode [2025-02-08 14:59:31,241 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-08 14:59:31,242 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-08 14:59:31,242 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-08 14:59:31,242 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-08 14:59:31,246 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,280 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,384 INFO L138 Inliner]: procedures = 177, calls = 507, calls flagged for inlining = 11, calls inlined = 38, statements flattened = 3503 [2025-02-08 14:59:31,384 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-08 14:59:31,385 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-08 14:59:31,385 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-08 14:59:31,385 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-08 14:59:31,392 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,393 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,447 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,567 INFO L175 MemorySlicer]: Split 480 memory accesses to 3 slices as follows [2, 372, 106]. 78 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 86 writes are split as follows [0, 82, 4]. [2025-02-08 14:59:31,568 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,568 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,619 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,624 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,633 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,641 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,660 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-08 14:59:31,662 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-08 14:59:31,662 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-08 14:59:31,662 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-08 14:59:31,663 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (1/1) ... [2025-02-08 14:59:31,667 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:59:31,679 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:59:31,698 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:59:31,705 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-08 14:59:31,725 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-02-08 14:59:31,726 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-02-08 14:59:31,726 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2025-02-08 14:59:31,726 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-02-08 14:59:31,726 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-02-08 14:59:31,726 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2025-02-08 14:59:31,726 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2025-02-08 14:59:31,726 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2025-02-08 14:59:31,726 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2025-02-08 14:59:31,726 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2025-02-08 14:59:31,726 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2025-02-08 14:59:31,726 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2025-02-08 14:59:31,726 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2025-02-08 14:59:31,727 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-08 14:59:31,727 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2025-02-08 14:59:31,727 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2025-02-08 14:59:31,727 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2025-02-08 14:59:31,727 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-02-08 14:59:31,727 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2025-02-08 14:59:31,728 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2025-02-08 14:59:31,728 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2025-02-08 14:59:31,728 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-02-08 14:59:31,728 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-08 14:59:31,728 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-02-08 14:59:31,728 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2025-02-08 14:59:31,728 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-08 14:59:31,729 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-08 14:59:32,010 INFO L257 CfgBuilder]: Building ICFG [2025-02-08 14:59:32,012 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-08 14:59:34,988 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L731: call ULTIMATE.dealloc(main_~#i~0#1.base, main_~#i~0#1.offset);havoc main_~#i~0#1.base, main_~#i~0#1.offset; [2025-02-08 14:59:35,231 INFO L? ?]: Removed 888 outVars from TransFormulas that were not future-live. [2025-02-08 14:59:35,232 INFO L308 CfgBuilder]: Performing block encoding [2025-02-08 14:59:35,340 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-08 14:59:35,342 INFO L337 CfgBuilder]: Removed 2 assume(true) statements. [2025-02-08 14:59:35,342 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:59:35 BoogieIcfgContainer [2025-02-08 14:59:35,343 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-08 14:59:35,343 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-08 14:59:35,344 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-08 14:59:35,349 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-08 14:59:35,350 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:59:35,350 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.02 02:59:30" (1/3) ... [2025-02-08 14:59:35,352 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5aaf22d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:59:35, skipping insertion in model container [2025-02-08 14:59:35,352 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:59:35,352 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:59:31" (2/3) ... [2025-02-08 14:59:35,352 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5aaf22d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:59:35, skipping insertion in model container [2025-02-08 14:59:35,353 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:59:35,353 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:59:35" (3/3) ... [2025-02-08 14:59:35,354 INFO L363 chiAutomizerObserver]: Analyzing ICFG uthash_FNV_test10-1.i [2025-02-08 14:59:35,412 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-08 14:59:35,412 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-08 14:59:35,412 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-08 14:59:35,412 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-08 14:59:35,412 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-08 14:59:35,412 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-08 14:59:35,413 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-08 14:59:35,413 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-08 14:59:35,421 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1080 states, 1068 states have (on average 1.6226591760299625) internal successors, (1733), 1072 states have internal predecessors, (1733), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:35,497 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 983 [2025-02-08 14:59:35,497 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:35,497 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:35,502 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:35,502 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:35,503 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-08 14:59:35,505 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1080 states, 1068 states have (on average 1.6226591760299625) internal successors, (1733), 1072 states have internal predecessors, (1733), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:35,517 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 983 [2025-02-08 14:59:35,518 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:35,518 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:35,518 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:35,518 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:35,523 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:35,523 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false;" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume !true;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:35,527 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:35,527 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 1 times [2025-02-08 14:59:35,533 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:35,533 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [308618308] [2025-02-08 14:59:35,534 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:35,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:35,614 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:35,639 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:35,640 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:35,641 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:35,641 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:35,655 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:35,662 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:35,665 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:35,665 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:35,722 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:35,726 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:35,726 INFO L85 PathProgramCache]: Analyzing trace with hash -1798755724, now seen corresponding path program 1 times [2025-02-08 14:59:35,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:35,727 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110964530] [2025-02-08 14:59:35,727 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:35,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:35,743 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-08 14:59:35,751 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-08 14:59:35,751 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:35,751 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:35,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:35,800 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:35,800 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2110964530] [2025-02-08 14:59:35,801 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2110964530] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:35,801 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:35,802 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:59:35,802 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1578673840] [2025-02-08 14:59:35,802 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:35,805 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:35,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:35,829 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-02-08 14:59:35,830 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-08 14:59:35,834 INFO L87 Difference]: Start difference. First operand has 1080 states, 1068 states have (on average 1.6226591760299625) internal successors, (1733), 1072 states have internal predecessors, (1733), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:36,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:36,076 INFO L93 Difference]: Finished difference Result 1064 states and 1551 transitions. [2025-02-08 14:59:36,077 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1064 states and 1551 transitions. [2025-02-08 14:59:36,090 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 611 [2025-02-08 14:59:36,109 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1064 states to 999 states and 1472 transitions. [2025-02-08 14:59:36,110 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 999 [2025-02-08 14:59:36,113 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 999 [2025-02-08 14:59:36,114 INFO L73 IsDeterministic]: Start isDeterministic. Operand 999 states and 1472 transitions. [2025-02-08 14:59:36,120 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:36,120 INFO L218 hiAutomatonCegarLoop]: Abstraction has 999 states and 1472 transitions. [2025-02-08 14:59:36,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 999 states and 1472 transitions. [2025-02-08 14:59:36,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 999 to 999. [2025-02-08 14:59:36,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 999 states, 992 states have (on average 1.471774193548387) internal successors, (1460), 991 states have internal predecessors, (1460), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:36,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 999 states to 999 states and 1472 transitions. [2025-02-08 14:59:36,197 INFO L240 hiAutomatonCegarLoop]: Abstraction has 999 states and 1472 transitions. [2025-02-08 14:59:36,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-02-08 14:59:36,200 INFO L432 stractBuchiCegarLoop]: Abstraction has 999 states and 1472 transitions. [2025-02-08 14:59:36,200 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-08 14:59:36,200 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 999 states and 1472 transitions. [2025-02-08 14:59:36,205 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 611 [2025-02-08 14:59:36,205 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:36,205 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:36,206 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:36,206 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:36,206 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:36,208 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem182#1 := read~int#1(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem182#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem187#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem188#1 := read~int#1(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + (if main_#t~mem188#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem188#1 % 256 % 4294967296 else main_#t~mem188#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:36,208 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:36,208 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 2 times [2025-02-08 14:59:36,209 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:36,209 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912781616] [2025-02-08 14:59:36,209 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:59:36,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:36,221 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:36,227 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:36,227 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:59:36,227 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:36,228 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:36,242 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:36,251 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:36,251 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:36,251 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:36,262 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:36,263 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:36,263 INFO L85 PathProgramCache]: Analyzing trace with hash -1373366913, now seen corresponding path program 1 times [2025-02-08 14:59:36,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:36,264 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572327684] [2025-02-08 14:59:36,264 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:36,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:36,317 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-02-08 14:59:36,341 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-02-08 14:59:36,345 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:36,345 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:36,720 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:36,721 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:36,721 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572327684] [2025-02-08 14:59:36,721 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1572327684] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:36,721 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:36,722 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 14:59:36,722 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728055337] [2025-02-08 14:59:36,722 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:36,722 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:36,723 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:36,723 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 14:59:36,723 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 14:59:36,724 INFO L87 Difference]: Start difference. First operand 999 states and 1472 transitions. cyclomatic complexity: 483 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:37,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:37,178 INFO L93 Difference]: Finished difference Result 1002 states and 1468 transitions. [2025-02-08 14:59:37,178 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1002 states and 1468 transitions. [2025-02-08 14:59:37,185 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 614 [2025-02-08 14:59:37,193 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1002 states to 1002 states and 1468 transitions. [2025-02-08 14:59:37,195 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1002 [2025-02-08 14:59:37,196 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1002 [2025-02-08 14:59:37,196 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1002 states and 1468 transitions. [2025-02-08 14:59:37,198 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:37,198 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1002 states and 1468 transitions. [2025-02-08 14:59:37,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1002 states and 1468 transitions. [2025-02-08 14:59:37,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1002 to 999. [2025-02-08 14:59:37,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 999 states, 992 states have (on average 1.4647177419354838) internal successors, (1453), 991 states have internal predecessors, (1453), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:37,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 999 states to 999 states and 1465 transitions. [2025-02-08 14:59:37,218 INFO L240 hiAutomatonCegarLoop]: Abstraction has 999 states and 1465 transitions. [2025-02-08 14:59:37,219 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 14:59:37,220 INFO L432 stractBuchiCegarLoop]: Abstraction has 999 states and 1465 transitions. [2025-02-08 14:59:37,220 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-08 14:59:37,220 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 999 states and 1465 transitions. [2025-02-08 14:59:37,225 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 611 [2025-02-08 14:59:37,225 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:37,225 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:37,227 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:37,228 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:37,228 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, 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main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:37,228 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:37,229 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:37,229 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 3 times [2025-02-08 14:59:37,229 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:37,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1262418972] [2025-02-08 14:59:37,230 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:59:37,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:37,268 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:37,274 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:37,277 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 14:59:37,277 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:37,277 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:37,286 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:37,289 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:37,293 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:37,293 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:37,305 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:37,309 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:37,309 INFO L85 PathProgramCache]: Analyzing trace with hash -1752637179, now seen corresponding path program 1 times [2025-02-08 14:59:37,309 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:37,309 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1157561738] [2025-02-08 14:59:37,309 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:37,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:37,356 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-02-08 14:59:37,725 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-02-08 14:59:37,725 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:37,725 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:38,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:38,340 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:38,340 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1157561738] [2025-02-08 14:59:38,340 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1157561738] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:38,340 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:38,340 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 14:59:38,340 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [909996663] [2025-02-08 14:59:38,340 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:38,341 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:38,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:38,341 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 14:59:38,341 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-08 14:59:38,341 INFO L87 Difference]: Start difference. First operand 999 states and 1465 transitions. cyclomatic complexity: 476 Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:39,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:39,581 INFO L93 Difference]: Finished difference Result 1033 states and 1507 transitions. [2025-02-08 14:59:39,581 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1033 states and 1507 transitions. [2025-02-08 14:59:39,588 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 645 [2025-02-08 14:59:39,594 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1033 states to 1033 states and 1507 transitions. [2025-02-08 14:59:39,594 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1033 [2025-02-08 14:59:39,595 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1033 [2025-02-08 14:59:39,596 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1033 states and 1507 transitions. [2025-02-08 14:59:39,598 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:39,598 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1033 states and 1507 transitions. [2025-02-08 14:59:39,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1033 states and 1507 transitions. [2025-02-08 14:59:39,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1033 to 1029. [2025-02-08 14:59:39,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1029 states, 1022 states have (on average 1.4579256360078279) internal successors, (1490), 1021 states have internal predecessors, (1490), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:39,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1029 states to 1029 states and 1502 transitions. [2025-02-08 14:59:39,618 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1029 states and 1502 transitions. [2025-02-08 14:59:39,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 14:59:39,620 INFO L432 stractBuchiCegarLoop]: Abstraction has 1029 states and 1502 transitions. [2025-02-08 14:59:39,621 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-08 14:59:39,621 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1029 states and 1502 transitions. [2025-02-08 14:59:39,626 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 641 [2025-02-08 14:59:39,626 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:39,626 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:39,627 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:39,628 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:39,628 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:39,628 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:39,629 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:39,629 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 4 times [2025-02-08 14:59:39,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:39,629 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1735528277] [2025-02-08 14:59:39,629 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:59:39,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:39,645 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-02-08 14:59:39,648 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:39,648 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 14:59:39,648 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:39,648 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:39,656 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:39,658 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:39,659 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:39,660 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:39,671 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:39,671 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:39,671 INFO L85 PathProgramCache]: Analyzing trace with hash -514293335, now seen corresponding path program 1 times [2025-02-08 14:59:39,672 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:39,672 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351378672] [2025-02-08 14:59:39,672 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:39,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:39,726 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 77 statements into 1 equivalence classes. [2025-02-08 14:59:39,756 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 77 of 77 statements. [2025-02-08 14:59:39,756 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:39,757 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:40,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:40,100 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:40,100 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [351378672] [2025-02-08 14:59:40,100 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [351378672] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:40,100 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:40,100 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-08 14:59:40,100 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1897820255] [2025-02-08 14:59:40,100 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:40,100 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:40,100 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:40,101 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 14:59:40,101 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-08 14:59:40,101 INFO L87 Difference]: Start difference. First operand 1029 states and 1502 transitions. cyclomatic complexity: 483 Second operand has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:41,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:41,216 INFO L93 Difference]: Finished difference Result 1041 states and 1519 transitions. [2025-02-08 14:59:41,216 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1041 states and 1519 transitions. [2025-02-08 14:59:41,223 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 653 [2025-02-08 14:59:41,229 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1041 states to 1041 states and 1519 transitions. [2025-02-08 14:59:41,230 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1041 [2025-02-08 14:59:41,231 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1041 [2025-02-08 14:59:41,231 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1041 states and 1519 transitions. [2025-02-08 14:59:41,233 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:41,233 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1041 states and 1519 transitions. [2025-02-08 14:59:41,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1041 states and 1519 transitions. [2025-02-08 14:59:41,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1041 to 1038. [2025-02-08 14:59:41,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1038 states, 1031 states have (on average 1.4578079534432589) internal successors, (1503), 1030 states have internal predecessors, (1503), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:41,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1038 states to 1038 states and 1515 transitions. [2025-02-08 14:59:41,255 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1038 states and 1515 transitions. [2025-02-08 14:59:41,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-08 14:59:41,257 INFO L432 stractBuchiCegarLoop]: Abstraction has 1038 states and 1515 transitions. [2025-02-08 14:59:41,257 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-08 14:59:41,257 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1038 states and 1515 transitions. [2025-02-08 14:59:41,262 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 650 [2025-02-08 14:59:41,263 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:41,263 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:41,263 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:41,264 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:41,264 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:41,264 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:41,265 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:41,265 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 5 times [2025-02-08 14:59:41,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:41,265 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773353947] [2025-02-08 14:59:41,265 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 14:59:41,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:41,279 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:41,283 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:41,283 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:59:41,283 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:41,283 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:41,289 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:41,291 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:41,292 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:41,292 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:41,303 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:41,303 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:41,304 INFO L85 PathProgramCache]: Analyzing trace with hash 1214663134, now seen corresponding path program 1 times [2025-02-08 14:59:41,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:41,304 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2001402561] [2025-02-08 14:59:41,304 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:41,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:41,344 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-02-08 14:59:41,384 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-02-08 14:59:41,384 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:41,384 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:41,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:41,852 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:41,852 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2001402561] [2025-02-08 14:59:41,852 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2001402561] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:41,852 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:41,852 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-08 14:59:41,852 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1761048188] [2025-02-08 14:59:41,852 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:41,853 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:41,853 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:41,853 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-08 14:59:41,853 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-02-08 14:59:41,853 INFO L87 Difference]: Start difference. First operand 1038 states and 1515 transitions. cyclomatic complexity: 487 Second operand has 9 states, 9 states have (on average 8.666666666666666) internal successors, (78), 9 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:43,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:43,346 INFO L93 Difference]: Finished difference Result 1052 states and 1533 transitions. [2025-02-08 14:59:43,346 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1052 states and 1533 transitions. [2025-02-08 14:59:43,352 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 664 [2025-02-08 14:59:43,358 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1052 states to 1052 states and 1533 transitions. [2025-02-08 14:59:43,358 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1052 [2025-02-08 14:59:43,359 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1052 [2025-02-08 14:59:43,360 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1052 states and 1533 transitions. [2025-02-08 14:59:43,361 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:43,361 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1052 states and 1533 transitions. [2025-02-08 14:59:43,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1052 states and 1533 transitions. [2025-02-08 14:59:43,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1052 to 1046. [2025-02-08 14:59:43,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1046 states, 1039 states have (on average 1.4562078922040425) internal successors, (1513), 1038 states have internal predecessors, (1513), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:43,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1046 states to 1046 states and 1525 transitions. [2025-02-08 14:59:43,380 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1046 states and 1525 transitions. [2025-02-08 14:59:43,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-08 14:59:43,382 INFO L432 stractBuchiCegarLoop]: Abstraction has 1046 states and 1525 transitions. [2025-02-08 14:59:43,382 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-08 14:59:43,382 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1046 states and 1525 transitions. [2025-02-08 14:59:43,386 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 658 [2025-02-08 14:59:43,386 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:43,386 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:43,387 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:43,387 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:43,387 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:43,388 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:43,389 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:43,389 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 6 times [2025-02-08 14:59:43,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:43,389 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [110877756] [2025-02-08 14:59:43,389 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 14:59:43,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:43,400 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:43,403 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:43,403 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-08 14:59:43,403 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:43,404 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:43,409 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:43,412 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:43,412 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:43,413 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:43,421 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:43,422 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:43,422 INFO L85 PathProgramCache]: Analyzing trace with hash 578000578, now seen corresponding path program 1 times [2025-02-08 14:59:43,422 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:43,422 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1298964990] [2025-02-08 14:59:43,422 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:43,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:43,458 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-02-08 14:59:43,485 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-02-08 14:59:43,485 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:43,485 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:43,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:43,734 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:43,734 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1298964990] [2025-02-08 14:59:43,734 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1298964990] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:43,734 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:43,734 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 14:59:43,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2017812577] [2025-02-08 14:59:43,734 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:43,734 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:43,734 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:43,735 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 14:59:43,735 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-02-08 14:59:43,735 INFO L87 Difference]: Start difference. First operand 1046 states and 1525 transitions. cyclomatic complexity: 489 Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:44,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:44,412 INFO L93 Difference]: Finished difference Result 1049 states and 1528 transitions. [2025-02-08 14:59:44,412 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1049 states and 1528 transitions. [2025-02-08 14:59:44,416 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 661 [2025-02-08 14:59:44,421 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1049 states to 1049 states and 1528 transitions. [2025-02-08 14:59:44,422 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1049 [2025-02-08 14:59:44,423 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1049 [2025-02-08 14:59:44,423 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1049 states and 1528 transitions. [2025-02-08 14:59:44,424 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:44,424 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1049 states and 1528 transitions. [2025-02-08 14:59:44,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1049 states and 1528 transitions. [2025-02-08 14:59:44,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1049 to 1049. [2025-02-08 14:59:44,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1049 states, 1042 states have (on average 1.45489443378119) internal successors, (1516), 1041 states have internal predecessors, (1516), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:44,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1049 states to 1049 states and 1528 transitions. [2025-02-08 14:59:44,444 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1049 states and 1528 transitions. [2025-02-08 14:59:44,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 14:59:44,446 INFO L432 stractBuchiCegarLoop]: Abstraction has 1049 states and 1528 transitions. [2025-02-08 14:59:44,447 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-08 14:59:44,447 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1049 states and 1528 transitions. [2025-02-08 14:59:44,450 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 661 [2025-02-08 14:59:44,450 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:44,451 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:44,452 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:44,453 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:44,453 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:44,454 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:44,454 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:44,454 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 7 times [2025-02-08 14:59:44,454 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:44,455 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910335096] [2025-02-08 14:59:44,455 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-08 14:59:44,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:44,464 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:44,466 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:44,467 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:44,467 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:44,467 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:44,472 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:44,474 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:44,474 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:44,474 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:44,482 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:44,483 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:44,483 INFO L85 PathProgramCache]: Analyzing trace with hash -623391045, now seen corresponding path program 1 times [2025-02-08 14:59:44,483 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:44,483 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [43505278] [2025-02-08 14:59:44,483 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:44,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:44,516 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-02-08 14:59:44,698 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-02-08 14:59:44,698 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:44,698 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:45,418 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:45,418 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:45,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [43505278] [2025-02-08 14:59:45,419 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [43505278] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:45,419 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:45,419 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-02-08 14:59:45,419 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430457739] [2025-02-08 14:59:45,419 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:45,419 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:45,419 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:45,420 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-08 14:59:45,420 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-02-08 14:59:45,420 INFO L87 Difference]: Start difference. First operand 1049 states and 1528 transitions. cyclomatic complexity: 489 Second operand has 13 states, 13 states have (on average 6.076923076923077) internal successors, (79), 13 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:48,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:48,626 INFO L93 Difference]: Finished difference Result 1147 states and 1668 transitions. [2025-02-08 14:59:48,626 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1147 states and 1668 transitions. [2025-02-08 14:59:48,633 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 759 [2025-02-08 14:59:48,641 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1147 states to 1147 states and 1668 transitions. [2025-02-08 14:59:48,642 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1147 [2025-02-08 14:59:48,643 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1147 [2025-02-08 14:59:48,643 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1147 states and 1668 transitions. [2025-02-08 14:59:48,645 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:48,645 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1147 states and 1668 transitions. [2025-02-08 14:59:48,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1147 states and 1668 transitions. [2025-02-08 14:59:48,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1147 to 1055. [2025-02-08 14:59:48,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1055 states, 1048 states have (on average 1.4541984732824427) internal successors, (1524), 1047 states have internal predecessors, (1524), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:48,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1055 states to 1055 states and 1536 transitions. [2025-02-08 14:59:48,664 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1055 states and 1536 transitions. [2025-02-08 14:59:48,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-02-08 14:59:48,665 INFO L432 stractBuchiCegarLoop]: Abstraction has 1055 states and 1536 transitions. [2025-02-08 14:59:48,665 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-08 14:59:48,665 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1055 states and 1536 transitions. [2025-02-08 14:59:48,668 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 667 [2025-02-08 14:59:48,668 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:48,668 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:48,668 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:48,668 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:48,669 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, 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main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:48,669 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:48,669 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:48,669 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 8 times [2025-02-08 14:59:48,670 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:48,670 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84401534] [2025-02-08 14:59:48,670 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:59:48,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:48,679 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:48,681 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:48,681 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:59:48,681 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:48,681 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:48,685 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:48,686 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:48,686 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:48,686 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:48,693 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:48,694 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:48,694 INFO L85 PathProgramCache]: Analyzing trace with hash 1371082153, now seen corresponding path program 1 times [2025-02-08 14:59:48,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:48,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818967385] [2025-02-08 14:59:48,694 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:48,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:48,726 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-02-08 14:59:48,778 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-02-08 14:59:48,778 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:48,778 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:49,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:49,011 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:49,011 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1818967385] [2025-02-08 14:59:49,011 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1818967385] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:49,012 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:49,012 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-08 14:59:49,012 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852356435] [2025-02-08 14:59:49,012 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:49,012 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:49,012 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:49,013 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 14:59:49,013 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-08 14:59:49,013 INFO L87 Difference]: Start difference. First operand 1055 states and 1536 transitions. cyclomatic complexity: 491 Second operand has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 7 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:50,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:50,109 INFO L93 Difference]: Finished difference Result 1062 states and 1545 transitions. [2025-02-08 14:59:50,109 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1062 states and 1545 transitions. [2025-02-08 14:59:50,112 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 674 [2025-02-08 14:59:50,115 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1062 states to 1062 states and 1545 transitions. [2025-02-08 14:59:50,116 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1062 [2025-02-08 14:59:50,116 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1062 [2025-02-08 14:59:50,117 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1062 states and 1545 transitions. [2025-02-08 14:59:50,118 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:50,118 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1062 states and 1545 transitions. [2025-02-08 14:59:50,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1062 states and 1545 transitions. [2025-02-08 14:59:50,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1062 to 1055. [2025-02-08 14:59:50,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1055 states, 1048 states have (on average 1.4541984732824427) internal successors, (1524), 1047 states have internal predecessors, (1524), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:50,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1055 states to 1055 states and 1536 transitions. [2025-02-08 14:59:50,135 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1055 states and 1536 transitions. [2025-02-08 14:59:50,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-08 14:59:50,139 INFO L432 stractBuchiCegarLoop]: Abstraction has 1055 states and 1536 transitions. [2025-02-08 14:59:50,139 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-08 14:59:50,139 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1055 states and 1536 transitions. [2025-02-08 14:59:50,142 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 667 [2025-02-08 14:59:50,142 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:50,142 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:50,143 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:50,143 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:50,143 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:50,143 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:50,144 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:50,144 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 9 times [2025-02-08 14:59:50,144 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:50,145 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [983678306] [2025-02-08 14:59:50,146 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:59:50,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:50,157 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:50,159 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:50,159 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 14:59:50,159 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:50,159 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:50,163 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:50,164 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:50,164 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:50,164 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:50,173 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:50,174 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:50,174 INFO L85 PathProgramCache]: Analyzing trace with hash -1870318171, now seen corresponding path program 1 times [2025-02-08 14:59:50,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:50,174 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [289868363] [2025-02-08 14:59:50,174 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:50,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:50,202 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-02-08 14:59:50,302 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-02-08 14:59:50,303 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:50,303 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:50,757 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:50,757 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:50,757 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [289868363] [2025-02-08 14:59:50,757 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [289868363] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:50,757 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:50,757 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-02-08 14:59:50,758 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653433115] [2025-02-08 14:59:50,758 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:50,758 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:50,758 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:50,758 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-02-08 14:59:50,758 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2025-02-08 14:59:50,758 INFO L87 Difference]: Start difference. First operand 1055 states and 1536 transitions. cyclomatic complexity: 491 Second operand has 11 states, 11 states have (on average 7.2727272727272725) internal successors, (80), 11 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:52,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:52,349 INFO L93 Difference]: Finished difference Result 1127 states and 1634 transitions. [2025-02-08 14:59:52,349 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1127 states and 1634 transitions. [2025-02-08 14:59:52,352 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 739 [2025-02-08 14:59:52,358 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1127 states to 1127 states and 1634 transitions. [2025-02-08 14:59:52,358 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1127 [2025-02-08 14:59:52,360 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1127 [2025-02-08 14:59:52,360 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1127 states and 1634 transitions. [2025-02-08 14:59:52,362 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:52,362 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1127 states and 1634 transitions. [2025-02-08 14:59:52,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1127 states and 1634 transitions. [2025-02-08 14:59:52,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1127 to 1058. [2025-02-08 14:59:52,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1058 states, 1051 states have (on average 1.4538534728829686) internal successors, (1528), 1050 states have internal predecessors, (1528), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:52,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1058 states to 1058 states and 1540 transitions. [2025-02-08 14:59:52,377 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1058 states and 1540 transitions. [2025-02-08 14:59:52,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-02-08 14:59:52,378 INFO L432 stractBuchiCegarLoop]: Abstraction has 1058 states and 1540 transitions. [2025-02-08 14:59:52,379 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-08 14:59:52,379 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1058 states and 1540 transitions. [2025-02-08 14:59:52,382 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 670 [2025-02-08 14:59:52,382 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:52,382 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:52,382 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:52,382 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:52,383 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:52,383 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise198#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:52,384 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:52,384 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 10 times [2025-02-08 14:59:52,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:52,384 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084226298] [2025-02-08 14:59:52,384 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:59:52,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:52,396 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-02-08 14:59:52,398 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:52,399 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 14:59:52,399 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:52,399 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:52,403 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:52,404 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:52,404 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:52,405 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:52,412 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:52,413 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:52,413 INFO L85 PathProgramCache]: Analyzing trace with hash 329410967, now seen corresponding path program 1 times [2025-02-08 14:59:52,413 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:52,413 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [92684086] [2025-02-08 14:59:52,413 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:52,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:52,446 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-02-08 14:59:52,548 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-02-08 14:59:52,548 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:52,548 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:53,327 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:53,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:53,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [92684086] [2025-02-08 14:59:53,328 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [92684086] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:53,328 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:53,328 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-08 14:59:53,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1951815173] [2025-02-08 14:59:53,328 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:53,328 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:53,328 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:53,329 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-08 14:59:53,329 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2025-02-08 14:59:53,329 INFO L87 Difference]: Start difference. First operand 1058 states and 1540 transitions. cyclomatic complexity: 492 Second operand has 9 states, 9 states have (on average 8.88888888888889) internal successors, (80), 9 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:54,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:54,311 INFO L93 Difference]: Finished difference Result 1051 states and 1530 transitions. [2025-02-08 14:59:54,311 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1051 states and 1530 transitions. [2025-02-08 14:59:54,315 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 663 [2025-02-08 14:59:54,319 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1051 states to 1051 states and 1530 transitions. [2025-02-08 14:59:54,319 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1051 [2025-02-08 14:59:54,320 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1051 [2025-02-08 14:59:54,320 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1051 states and 1530 transitions. [2025-02-08 14:59:54,321 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:54,321 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1051 states and 1530 transitions. [2025-02-08 14:59:54,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1051 states and 1530 transitions. [2025-02-08 14:59:54,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1051 to 1049. [2025-02-08 14:59:54,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1049 states, 1042 states have (on average 1.4539347408829175) internal successors, (1515), 1041 states have internal predecessors, (1515), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:54,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1049 states to 1049 states and 1527 transitions. [2025-02-08 14:59:54,336 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1049 states and 1527 transitions. [2025-02-08 14:59:54,337 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-08 14:59:54,337 INFO L432 stractBuchiCegarLoop]: Abstraction has 1049 states and 1527 transitions. [2025-02-08 14:59:54,337 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-08 14:59:54,337 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1049 states and 1527 transitions. [2025-02-08 14:59:54,340 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 661 [2025-02-08 14:59:54,340 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:54,340 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:54,341 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:54,341 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:54,341 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:54,341 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:54,342 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:54,342 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 11 times [2025-02-08 14:59:54,342 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:54,342 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [953085889] [2025-02-08 14:59:54,342 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 14:59:54,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:54,353 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:54,355 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:54,355 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:59:54,355 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:54,356 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:54,360 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:54,361 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:54,362 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:54,362 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:54,369 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:54,370 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:54,370 INFO L85 PathProgramCache]: Analyzing trace with hash -468238882, now seen corresponding path program 1 times [2025-02-08 14:59:54,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:54,370 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1684405214] [2025-02-08 14:59:54,370 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:54,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:54,405 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-02-08 14:59:54,461 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-02-08 14:59:54,461 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:54,461 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:54,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:54,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:54,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1684405214] [2025-02-08 14:59:54,729 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1684405214] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:54,729 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:54,729 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-08 14:59:54,729 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [373921104] [2025-02-08 14:59:54,729 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:54,729 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:54,729 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:54,729 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-08 14:59:54,729 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-02-08 14:59:54,730 INFO L87 Difference]: Start difference. First operand 1049 states and 1527 transitions. cyclomatic complexity: 488 Second operand has 9 states, 9 states have (on average 8.88888888888889) internal successors, (80), 9 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:55,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:55,976 INFO L93 Difference]: Finished difference Result 1069 states and 1553 transitions. [2025-02-08 14:59:55,976 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1069 states and 1553 transitions. [2025-02-08 14:59:55,979 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 681 [2025-02-08 14:59:55,982 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1069 states to 1069 states and 1553 transitions. [2025-02-08 14:59:55,982 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1069 [2025-02-08 14:59:55,983 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1069 [2025-02-08 14:59:55,983 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1069 states and 1553 transitions. [2025-02-08 14:59:55,984 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:55,984 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1069 states and 1553 transitions. [2025-02-08 14:59:55,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1069 states and 1553 transitions. [2025-02-08 14:59:55,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1069 to 1052. [2025-02-08 14:59:56,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1052 states, 1045 states have (on average 1.4535885167464115) internal successors, (1519), 1044 states have internal predecessors, (1519), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:56,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1052 states to 1052 states and 1531 transitions. [2025-02-08 14:59:56,009 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1052 states and 1531 transitions. [2025-02-08 14:59:56,012 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 14:59:56,012 INFO L432 stractBuchiCegarLoop]: Abstraction has 1052 states and 1531 transitions. [2025-02-08 14:59:56,012 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-02-08 14:59:56,012 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1052 states and 1531 transitions. [2025-02-08 14:59:56,015 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 664 [2025-02-08 14:59:56,015 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:56,015 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:56,019 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:56,019 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:56,019 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:56,022 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:56,023 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:56,023 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 12 times [2025-02-08 14:59:56,023 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:56,023 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1485609122] [2025-02-08 14:59:56,023 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 14:59:56,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:56,042 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:56,044 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:56,044 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-08 14:59:56,044 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:56,044 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:56,060 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:56,061 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:56,061 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:56,061 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:56,070 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:56,070 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:56,071 INFO L85 PathProgramCache]: Analyzing trace with hash -1015380901, now seen corresponding path program 1 times [2025-02-08 14:59:56,071 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:56,071 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303540209] [2025-02-08 14:59:56,071 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:56,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:56,106 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-02-08 14:59:56,144 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-02-08 14:59:56,144 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:56,144 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:56,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:56,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:56,414 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [303540209] [2025-02-08 14:59:56,414 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [303540209] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:56,414 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:56,414 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-08 14:59:56,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [970348917] [2025-02-08 14:59:56,415 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:56,415 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:56,415 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:56,415 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-08 14:59:56,415 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-02-08 14:59:56,416 INFO L87 Difference]: Start difference. First operand 1052 states and 1531 transitions. cyclomatic complexity: 489 Second operand has 9 states, 9 states have (on average 8.88888888888889) internal successors, (80), 9 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:57,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:57,374 INFO L93 Difference]: Finished difference Result 1065 states and 1547 transitions. [2025-02-08 14:59:57,374 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1065 states and 1547 transitions. [2025-02-08 14:59:57,377 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 677 [2025-02-08 14:59:57,381 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1065 states to 1065 states and 1547 transitions. [2025-02-08 14:59:57,381 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1065 [2025-02-08 14:59:57,382 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1065 [2025-02-08 14:59:57,382 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1065 states and 1547 transitions. [2025-02-08 14:59:57,383 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:57,383 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1065 states and 1547 transitions. [2025-02-08 14:59:57,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1065 states and 1547 transitions. [2025-02-08 14:59:57,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1065 to 1052. [2025-02-08 14:59:57,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1052 states, 1045 states have (on average 1.4535885167464115) internal successors, (1519), 1044 states have internal predecessors, (1519), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:57,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1052 states to 1052 states and 1531 transitions. [2025-02-08 14:59:57,396 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1052 states and 1531 transitions. [2025-02-08 14:59:57,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-08 14:59:57,398 INFO L432 stractBuchiCegarLoop]: Abstraction has 1052 states and 1531 transitions. [2025-02-08 14:59:57,398 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-02-08 14:59:57,398 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1052 states and 1531 transitions. [2025-02-08 14:59:57,400 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 664 [2025-02-08 14:59:57,400 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:57,400 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:57,401 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:57,401 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:57,401 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, 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main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:57,402 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := 0;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:57,402 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:57,402 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 13 times [2025-02-08 14:59:57,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:57,402 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [363152907] [2025-02-08 14:59:57,402 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-08 14:59:57,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:57,414 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:57,416 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:57,416 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:57,416 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:57,416 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:57,421 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:57,423 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:57,423 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:57,423 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:57,431 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:57,432 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:57,433 INFO L85 PathProgramCache]: Analyzing trace with hash -46735162, now seen corresponding path program 1 times [2025-02-08 14:59:57,433 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:57,433 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985582602] [2025-02-08 14:59:57,433 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:57,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:57,462 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-08 14:59:57,509 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-08 14:59:57,509 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:57,509 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:57,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:57,743 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:57,743 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1985582602] [2025-02-08 14:59:57,743 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1985582602] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:57,743 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:57,743 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-08 14:59:57,743 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396789030] [2025-02-08 14:59:57,743 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:57,744 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:57,744 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:57,744 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 14:59:57,744 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-08 14:59:57,744 INFO L87 Difference]: Start difference. First operand 1052 states and 1531 transitions. cyclomatic complexity: 489 Second operand has 7 states, 7 states have (on average 11.571428571428571) internal successors, (81), 7 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:59:58,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:59:58,620 INFO L93 Difference]: Finished difference Result 1057 states and 1537 transitions. [2025-02-08 14:59:58,620 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1057 states and 1537 transitions. [2025-02-08 14:59:58,626 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 669 [2025-02-08 14:59:58,631 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1057 states to 1057 states and 1537 transitions. [2025-02-08 14:59:58,631 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1057 [2025-02-08 14:59:58,631 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1057 [2025-02-08 14:59:58,632 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1057 states and 1537 transitions. [2025-02-08 14:59:58,633 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:59:58,633 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1057 states and 1537 transitions. [2025-02-08 14:59:58,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1057 states and 1537 transitions. [2025-02-08 14:59:58,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1057 to 1056. [2025-02-08 14:59:58,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1056 states, 1049 states have (on average 1.4528122020972354) internal successors, (1524), 1048 states have internal predecessors, (1524), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 14:59:58,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1056 states to 1056 states and 1536 transitions. [2025-02-08 14:59:58,646 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1056 states and 1536 transitions. [2025-02-08 14:59:58,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-08 14:59:58,647 INFO L432 stractBuchiCegarLoop]: Abstraction has 1056 states and 1536 transitions. [2025-02-08 14:59:58,647 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-02-08 14:59:58,647 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1056 states and 1536 transitions. [2025-02-08 14:59:58,650 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 668 [2025-02-08 14:59:58,650 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:59:58,650 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:59:58,651 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:59:58,651 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:59:58,651 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 14:59:58,651 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 14:59:58,652 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:58,652 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 14 times [2025-02-08 14:59:58,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:58,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [543735413] [2025-02-08 14:59:58,652 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:59:58,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:58,662 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:58,663 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:58,663 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:59:58,664 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:58,664 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:59:58,668 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:59:58,669 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:59:58,669 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:58,669 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:59:58,677 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:59:58,678 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:59:58,678 INFO L85 PathProgramCache]: Analyzing trace with hash -1137101819, now seen corresponding path program 1 times [2025-02-08 14:59:58,678 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:59:58,678 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1162379999] [2025-02-08 14:59:58,678 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:59:58,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:59:58,709 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-08 14:59:58,733 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-08 14:59:58,733 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:59:58,733 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:59:59,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:59:59,081 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:59:59,081 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1162379999] [2025-02-08 14:59:59,081 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1162379999] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:59:59,081 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:59:59,082 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-08 14:59:59,082 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1757767433] [2025-02-08 14:59:59,082 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:59:59,082 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:59:59,082 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:59:59,083 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-08 14:59:59,083 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-02-08 14:59:59,083 INFO L87 Difference]: Start difference. First operand 1056 states and 1536 transitions. cyclomatic complexity: 490 Second operand has 10 states, 10 states have (on average 8.1) internal successors, (81), 10 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 15:00:00,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 15:00:00,317 INFO L93 Difference]: Finished difference Result 1072 states and 1557 transitions. [2025-02-08 15:00:00,317 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1072 states and 1557 transitions. [2025-02-08 15:00:00,320 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 684 [2025-02-08 15:00:00,322 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1072 states to 1072 states and 1557 transitions. [2025-02-08 15:00:00,322 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1072 [2025-02-08 15:00:00,323 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1072 [2025-02-08 15:00:00,323 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1072 states and 1557 transitions. [2025-02-08 15:00:00,324 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 15:00:00,324 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1072 states and 1557 transitions. [2025-02-08 15:00:00,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1072 states and 1557 transitions. [2025-02-08 15:00:00,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1072 to 1066. [2025-02-08 15:00:00,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1066 states, 1059 states have (on average 1.4504249291784703) internal successors, (1536), 1058 states have internal predecessors, (1536), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 15:00:00,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1066 states to 1066 states and 1548 transitions. [2025-02-08 15:00:00,336 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1066 states and 1548 transitions. [2025-02-08 15:00:00,337 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 15:00:00,337 INFO L432 stractBuchiCegarLoop]: Abstraction has 1066 states and 1548 transitions. [2025-02-08 15:00:00,337 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-02-08 15:00:00,337 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1066 states and 1548 transitions. [2025-02-08 15:00:00,340 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 678 [2025-02-08 15:00:00,340 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 15:00:00,340 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 15:00:00,340 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 15:00:00,340 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 15:00:00,341 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 15:00:00,342 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 15:00:00,342 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:00,342 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 15 times [2025-02-08 15:00:00,342 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:00,342 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1489310276] [2025-02-08 15:00:00,342 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 15:00:00,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:00,351 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:00,353 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:00,353 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 15:00:00,353 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:00,354 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 15:00:00,357 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:00,358 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:00,358 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:00,359 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:00,368 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 15:00:00,368 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:00,369 INFO L85 PathProgramCache]: Analyzing trace with hash 926801282, now seen corresponding path program 1 times [2025-02-08 15:00:00,369 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:00,369 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708240974] [2025-02-08 15:00:00,369 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 15:00:00,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:00,399 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-08 15:00:00,459 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-08 15:00:00,459 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:00,460 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 15:00:00,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 15:00:00,765 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 15:00:00,765 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1708240974] [2025-02-08 15:00:00,765 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1708240974] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 15:00:00,765 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 15:00:00,765 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-08 15:00:00,766 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [703324864] [2025-02-08 15:00:00,766 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 15:00:00,766 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 15:00:00,766 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 15:00:00,766 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 15:00:00,766 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-08 15:00:00,766 INFO L87 Difference]: Start difference. First operand 1066 states and 1548 transitions. cyclomatic complexity: 492 Second operand has 7 states, 7 states have (on average 11.571428571428571) internal successors, (81), 7 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 15:00:01,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 15:00:01,661 INFO L93 Difference]: Finished difference Result 1070 states and 1551 transitions. [2025-02-08 15:00:01,661 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1070 states and 1551 transitions. [2025-02-08 15:00:01,664 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 682 [2025-02-08 15:00:01,666 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1070 states to 1070 states and 1551 transitions. [2025-02-08 15:00:01,667 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1070 [2025-02-08 15:00:01,667 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1070 [2025-02-08 15:00:01,667 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1070 states and 1551 transitions. [2025-02-08 15:00:01,668 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 15:00:01,668 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1070 states and 1551 transitions. [2025-02-08 15:00:01,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1070 states and 1551 transitions. [2025-02-08 15:00:01,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1070 to 1066. [2025-02-08 15:00:01,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1066 states, 1059 states have (on average 1.449480642115203) internal successors, (1535), 1058 states have internal predecessors, (1535), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 15:00:01,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1066 states to 1066 states and 1547 transitions. [2025-02-08 15:00:01,681 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1066 states and 1547 transitions. [2025-02-08 15:00:01,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-08 15:00:01,683 INFO L432 stractBuchiCegarLoop]: Abstraction has 1066 states and 1547 transitions. [2025-02-08 15:00:01,683 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-02-08 15:00:01,684 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1066 states and 1547 transitions. [2025-02-08 15:00:01,686 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 678 [2025-02-08 15:00:01,686 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 15:00:01,686 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 15:00:01,687 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 15:00:01,687 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 15:00:01,687 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 15:00:01,687 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 15:00:01,688 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:01,688 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 16 times [2025-02-08 15:00:01,688 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:01,688 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [749897884] [2025-02-08 15:00:01,688 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 15:00:01,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:01,699 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-02-08 15:00:01,705 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:01,705 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 15:00:01,705 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:01,705 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 15:00:01,709 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:01,710 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:01,710 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:01,710 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:01,722 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 15:00:01,723 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:01,723 INFO L85 PathProgramCache]: Analyzing trace with hash -1748012104, now seen corresponding path program 1 times [2025-02-08 15:00:01,723 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:01,724 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030796426] [2025-02-08 15:00:01,724 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 15:00:01,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:01,754 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-08 15:00:01,924 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-08 15:00:01,924 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:01,924 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 15:00:02,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 15:00:02,473 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 15:00:02,473 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1030796426] [2025-02-08 15:00:02,473 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1030796426] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 15:00:02,474 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 15:00:02,474 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-02-08 15:00:02,474 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [598227659] [2025-02-08 15:00:02,474 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 15:00:02,474 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 15:00:02,474 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 15:00:02,474 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-08 15:00:02,475 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2025-02-08 15:00:02,475 INFO L87 Difference]: Start difference. First operand 1066 states and 1547 transitions. cyclomatic complexity: 491 Second operand has 13 states, 13 states have (on average 6.230769230769231) internal successors, (81), 13 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 15:00:03,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 15:00:03,947 INFO L93 Difference]: Finished difference Result 1121 states and 1627 transitions. [2025-02-08 15:00:03,947 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1121 states and 1627 transitions. [2025-02-08 15:00:03,950 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 733 [2025-02-08 15:00:03,953 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1121 states to 1121 states and 1627 transitions. [2025-02-08 15:00:03,953 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1121 [2025-02-08 15:00:03,954 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1121 [2025-02-08 15:00:03,954 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1121 states and 1627 transitions. [2025-02-08 15:00:03,955 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 15:00:03,955 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1121 states and 1627 transitions. [2025-02-08 15:00:03,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1121 states and 1627 transitions. [2025-02-08 15:00:03,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1121 to 1074. [2025-02-08 15:00:03,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1074 states, 1067 states have (on average 1.4489222118088096) internal successors, (1546), 1066 states have internal predecessors, (1546), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 15:00:03,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1074 states to 1074 states and 1558 transitions. [2025-02-08 15:00:03,967 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1074 states and 1558 transitions. [2025-02-08 15:00:03,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-02-08 15:00:03,969 INFO L432 stractBuchiCegarLoop]: Abstraction has 1074 states and 1558 transitions. [2025-02-08 15:00:03,969 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-02-08 15:00:03,969 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1074 states and 1558 transitions. [2025-02-08 15:00:03,971 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 686 [2025-02-08 15:00:03,971 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 15:00:03,971 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 15:00:03,972 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 15:00:03,972 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 15:00:03,972 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 15:00:03,973 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 15:00:03,974 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:03,974 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 17 times [2025-02-08 15:00:03,974 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:03,974 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1879245196] [2025-02-08 15:00:03,974 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 15:00:03,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:03,985 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:03,987 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:03,987 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 15:00:03,987 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:03,987 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 15:00:03,991 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:03,992 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:03,992 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:03,992 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:04,006 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 15:00:04,007 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:04,007 INFO L85 PathProgramCache]: Analyzing trace with hash 1806069620, now seen corresponding path program 1 times [2025-02-08 15:00:04,007 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:04,007 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248266866] [2025-02-08 15:00:04,007 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 15:00:04,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:04,040 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-08 15:00:04,131 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-08 15:00:04,131 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:04,131 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 15:00:04,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 15:00:04,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 15:00:04,579 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248266866] [2025-02-08 15:00:04,579 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1248266866] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 15:00:04,579 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 15:00:04,580 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-08 15:00:04,580 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1843489552] [2025-02-08 15:00:04,580 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 15:00:04,580 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 15:00:04,581 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 15:00:04,581 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-08 15:00:04,581 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-02-08 15:00:04,581 INFO L87 Difference]: Start difference. First operand 1074 states and 1558 transitions. cyclomatic complexity: 494 Second operand has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 15:00:06,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 15:00:06,101 INFO L93 Difference]: Finished difference Result 1083 states and 1567 transitions. [2025-02-08 15:00:06,101 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1083 states and 1567 transitions. [2025-02-08 15:00:06,105 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 695 [2025-02-08 15:00:06,109 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1083 states to 1083 states and 1567 transitions. [2025-02-08 15:00:06,109 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1083 [2025-02-08 15:00:06,109 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1083 [2025-02-08 15:00:06,109 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1083 states and 1567 transitions. [2025-02-08 15:00:06,110 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 15:00:06,110 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1083 states and 1567 transitions. [2025-02-08 15:00:06,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1083 states and 1567 transitions. [2025-02-08 15:00:06,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1083 to 1077. [2025-02-08 15:00:06,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1077 states, 1070 states have (on average 1.4476635514018692) internal successors, (1549), 1069 states have internal predecessors, (1549), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 15:00:06,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1077 states to 1077 states and 1561 transitions. [2025-02-08 15:00:06,119 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1077 states and 1561 transitions. [2025-02-08 15:00:06,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 15:00:06,120 INFO L432 stractBuchiCegarLoop]: Abstraction has 1077 states and 1561 transitions. [2025-02-08 15:00:06,120 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-02-08 15:00:06,120 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1077 states and 1561 transitions. [2025-02-08 15:00:06,122 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 689 [2025-02-08 15:00:06,122 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 15:00:06,123 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 15:00:06,123 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 15:00:06,123 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 15:00:06,123 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, 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main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 15:00:06,124 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 15:00:06,124 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:06,124 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 18 times [2025-02-08 15:00:06,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:06,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [835306731] [2025-02-08 15:00:06,125 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 15:00:06,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:06,133 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:06,135 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:06,135 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-08 15:00:06,135 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:06,135 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 15:00:06,139 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:06,140 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:06,140 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:06,140 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:06,147 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 15:00:06,148 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:06,148 INFO L85 PathProgramCache]: Analyzing trace with hash -1355568414, now seen corresponding path program 1 times [2025-02-08 15:00:06,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:06,148 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [611508007] [2025-02-08 15:00:06,148 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 15:00:06,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:06,179 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-08 15:00:06,249 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-08 15:00:06,250 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:06,250 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 15:00:06,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 15:00:06,538 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 15:00:06,538 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [611508007] [2025-02-08 15:00:06,538 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [611508007] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 15:00:06,538 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 15:00:06,538 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-08 15:00:06,539 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1617251510] [2025-02-08 15:00:06,539 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 15:00:06,539 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 15:00:06,540 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 15:00:06,540 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-08 15:00:06,540 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2025-02-08 15:00:06,540 INFO L87 Difference]: Start difference. First operand 1077 states and 1561 transitions. cyclomatic complexity: 494 Second operand has 10 states, 10 states have (on average 8.1) internal successors, (81), 10 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 15:00:07,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 15:00:07,938 INFO L93 Difference]: Finished difference Result 1091 states and 1580 transitions. [2025-02-08 15:00:07,938 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1091 states and 1580 transitions. [2025-02-08 15:00:07,941 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 703 [2025-02-08 15:00:07,943 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1091 states to 1091 states and 1580 transitions. [2025-02-08 15:00:07,943 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1091 [2025-02-08 15:00:07,944 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1091 [2025-02-08 15:00:07,944 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1091 states and 1580 transitions. [2025-02-08 15:00:07,945 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 15:00:07,945 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1091 states and 1580 transitions. [2025-02-08 15:00:07,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1091 states and 1580 transitions. [2025-02-08 15:00:07,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1091 to 1077. [2025-02-08 15:00:07,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1077 states, 1070 states have (on average 1.4476635514018692) internal successors, (1549), 1069 states have internal predecessors, (1549), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 15:00:07,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1077 states to 1077 states and 1561 transitions. [2025-02-08 15:00:07,954 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1077 states and 1561 transitions. [2025-02-08 15:00:07,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 15:00:07,954 INFO L432 stractBuchiCegarLoop]: Abstraction has 1077 states and 1561 transitions. [2025-02-08 15:00:07,954 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-02-08 15:00:07,954 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1077 states and 1561 transitions. [2025-02-08 15:00:07,956 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 689 [2025-02-08 15:00:07,956 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 15:00:07,956 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 15:00:07,957 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 15:00:07,957 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 15:00:07,957 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 15:00:07,958 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 15:00:07,958 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:07,958 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 19 times [2025-02-08 15:00:07,958 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:07,958 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319632116] [2025-02-08 15:00:07,958 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-08 15:00:07,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:07,969 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:07,973 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:07,973 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:07,973 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:07,973 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 15:00:07,978 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:07,979 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:07,979 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:07,979 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:07,986 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 15:00:07,987 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:07,987 INFO L85 PathProgramCache]: Analyzing trace with hash 1921134664, now seen corresponding path program 1 times [2025-02-08 15:00:07,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:07,988 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1864259671] [2025-02-08 15:00:07,988 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 15:00:07,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:08,018 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-08 15:00:08,093 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-08 15:00:08,093 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:08,093 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 15:00:08,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 15:00:08,346 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 15:00:08,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1864259671] [2025-02-08 15:00:08,346 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1864259671] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 15:00:08,346 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 15:00:08,346 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-08 15:00:08,346 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1276836763] [2025-02-08 15:00:08,347 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 15:00:08,347 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 15:00:08,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 15:00:08,348 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-08 15:00:08,348 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2025-02-08 15:00:08,348 INFO L87 Difference]: Start difference. First operand 1077 states and 1561 transitions. cyclomatic complexity: 494 Second operand has 8 states, 8 states have (on average 10.25) internal successors, (82), 8 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 15:00:20,936 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-02-08 15:00:21,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 15:00:21,308 INFO L93 Difference]: Finished difference Result 1173 states and 1697 transitions. [2025-02-08 15:00:21,308 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1173 states and 1697 transitions. [2025-02-08 15:00:21,312 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 785 [2025-02-08 15:00:21,316 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1173 states to 1173 states and 1697 transitions. [2025-02-08 15:00:21,317 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1173 [2025-02-08 15:00:21,317 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1173 [2025-02-08 15:00:21,317 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1173 states and 1697 transitions. [2025-02-08 15:00:21,318 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 15:00:21,319 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1173 states and 1697 transitions. [2025-02-08 15:00:21,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1173 states and 1697 transitions. [2025-02-08 15:00:21,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1173 to 1079. [2025-02-08 15:00:21,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1079 states, 1072 states have (on average 1.4477611940298507) internal successors, (1552), 1071 states have internal predecessors, (1552), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 15:00:21,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1079 states to 1079 states and 1564 transitions. [2025-02-08 15:00:21,332 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1079 states and 1564 transitions. [2025-02-08 15:00:21,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-08 15:00:21,333 INFO L432 stractBuchiCegarLoop]: Abstraction has 1079 states and 1564 transitions. [2025-02-08 15:00:21,333 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-02-08 15:00:21,333 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1079 states and 1564 transitions. [2025-02-08 15:00:21,335 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 691 [2025-02-08 15:00:21,335 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 15:00:21,336 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 15:00:21,336 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 15:00:21,336 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 15:00:21,336 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 15:00:21,337 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise195#1;assume main_#t~bitwise195#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 15:00:21,337 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:21,337 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 20 times [2025-02-08 15:00:21,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:21,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [393152084] [2025-02-08 15:00:21,338 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 15:00:21,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:21,347 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:21,348 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:21,349 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 15:00:21,349 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:21,349 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 15:00:21,353 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:21,354 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:21,354 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:21,354 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:21,361 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 15:00:21,361 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:21,362 INFO L85 PathProgramCache]: Analyzing trace with hash -513307592, now seen corresponding path program 1 times [2025-02-08 15:00:21,362 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:21,362 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [567344426] [2025-02-08 15:00:21,362 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 15:00:21,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:21,392 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-08 15:00:21,632 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-08 15:00:21,632 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:21,632 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 15:00:22,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 15:00:22,367 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 15:00:22,367 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [567344426] [2025-02-08 15:00:22,367 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [567344426] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 15:00:22,367 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 15:00:22,367 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2025-02-08 15:00:22,367 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613471960] [2025-02-08 15:00:22,367 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 15:00:22,368 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 15:00:22,368 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 15:00:22,368 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2025-02-08 15:00:22,368 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2025-02-08 15:00:22,369 INFO L87 Difference]: Start difference. First operand 1079 states and 1564 transitions. cyclomatic complexity: 495 Second operand has 18 states, 18 states have (on average 4.555555555555555) internal successors, (82), 18 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 15:00:25,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 15:00:25,441 INFO L93 Difference]: Finished difference Result 1196 states and 1731 transitions. [2025-02-08 15:00:25,441 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1196 states and 1731 transitions. [2025-02-08 15:00:25,445 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 808 [2025-02-08 15:00:25,450 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1196 states to 1196 states and 1731 transitions. [2025-02-08 15:00:25,450 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1196 [2025-02-08 15:00:25,451 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1196 [2025-02-08 15:00:25,451 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1196 states and 1731 transitions. [2025-02-08 15:00:25,452 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 15:00:25,452 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1196 states and 1731 transitions. [2025-02-08 15:00:25,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1196 states and 1731 transitions. [2025-02-08 15:00:25,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1196 to 1092. [2025-02-08 15:00:25,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1092 states, 1085 states have (on average 1.4470046082949308) internal successors, (1570), 1084 states have internal predecessors, (1570), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 15:00:25,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1092 states to 1092 states and 1582 transitions. [2025-02-08 15:00:25,464 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1092 states and 1582 transitions. [2025-02-08 15:00:25,464 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2025-02-08 15:00:25,465 INFO L432 stractBuchiCegarLoop]: Abstraction has 1092 states and 1582 transitions. [2025-02-08 15:00:25,465 INFO L338 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2025-02-08 15:00:25,465 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1092 states and 1582 transitions. [2025-02-08 15:00:25,468 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 704 [2025-02-08 15:00:25,468 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 15:00:25,468 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 15:00:25,469 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 15:00:25,469 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 15:00:25,470 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 15:00:25,470 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise198#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 15:00:25,471 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:25,471 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 21 times [2025-02-08 15:00:25,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:25,471 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969312940] [2025-02-08 15:00:25,471 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 15:00:25,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:25,483 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:25,485 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:25,485 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 15:00:25,485 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:25,485 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 15:00:25,489 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:25,491 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:25,491 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:25,491 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:25,499 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 15:00:25,500 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:25,500 INFO L85 PathProgramCache]: Analyzing trace with hash -174103494, now seen corresponding path program 1 times [2025-02-08 15:00:25,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:25,501 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1530506706] [2025-02-08 15:00:25,501 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 15:00:25,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:25,540 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-08 15:00:25,663 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-08 15:00:25,663 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:25,663 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 15:00:26,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 15:00:26,382 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 15:00:26,382 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1530506706] [2025-02-08 15:00:26,382 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1530506706] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 15:00:26,382 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 15:00:26,382 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2025-02-08 15:00:26,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1756889123] [2025-02-08 15:00:26,382 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 15:00:26,382 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 15:00:26,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 15:00:26,383 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-02-08 15:00:26,383 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2025-02-08 15:00:26,383 INFO L87 Difference]: Start difference. First operand 1092 states and 1582 transitions. cyclomatic complexity: 500 Second operand has 17 states, 17 states have (on average 4.823529411764706) internal successors, (82), 17 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 15:00:28,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 15:00:28,414 INFO L93 Difference]: Finished difference Result 1115 states and 1615 transitions. [2025-02-08 15:00:28,414 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1115 states and 1615 transitions. [2025-02-08 15:00:28,418 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 727 [2025-02-08 15:00:28,426 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1115 states to 1115 states and 1615 transitions. [2025-02-08 15:00:28,427 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1115 [2025-02-08 15:00:28,427 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1115 [2025-02-08 15:00:28,428 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1115 states and 1615 transitions. [2025-02-08 15:00:28,429 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 15:00:28,429 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1115 states and 1615 transitions. [2025-02-08 15:00:28,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1115 states and 1615 transitions. [2025-02-08 15:00:28,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1115 to 1101. [2025-02-08 15:00:28,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1101 states, 1094 states have (on average 1.4460694698354661) internal successors, (1582), 1093 states have internal predecessors, (1582), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 15:00:28,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1101 states to 1101 states and 1594 transitions. [2025-02-08 15:00:28,465 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1101 states and 1594 transitions. [2025-02-08 15:00:28,466 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-02-08 15:00:28,466 INFO L432 stractBuchiCegarLoop]: Abstraction has 1101 states and 1594 transitions. [2025-02-08 15:00:28,466 INFO L338 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2025-02-08 15:00:28,466 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1101 states and 1594 transitions. [2025-02-08 15:00:28,468 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 713 [2025-02-08 15:00:28,468 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 15:00:28,468 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 15:00:28,468 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 15:00:28,469 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 15:00:28,469 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 15:00:28,469 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise197#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 15:00:28,469 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:28,469 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 22 times [2025-02-08 15:00:28,470 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:28,470 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676617562] [2025-02-08 15:00:28,470 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 15:00:28,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:28,481 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-02-08 15:00:28,483 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:28,483 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 15:00:28,483 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:28,483 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 15:00:28,487 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:28,488 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:28,488 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:28,488 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:28,495 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 15:00:28,496 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:28,496 INFO L85 PathProgramCache]: Analyzing trace with hash -1855088351, now seen corresponding path program 1 times [2025-02-08 15:00:28,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:28,497 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [343556382] [2025-02-08 15:00:28,498 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 15:00:28,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:28,528 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-08 15:00:28,587 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-08 15:00:28,588 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:28,588 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 15:00:29,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 15:00:29,007 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 15:00:29,007 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [343556382] [2025-02-08 15:00:29,007 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [343556382] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 15:00:29,007 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 15:00:29,007 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-02-08 15:00:29,007 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [141735510] [2025-02-08 15:00:29,007 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 15:00:29,008 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 15:00:29,008 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 15:00:29,008 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-08 15:00:29,008 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-02-08 15:00:29,008 INFO L87 Difference]: Start difference. First operand 1101 states and 1594 transitions. cyclomatic complexity: 503 Second operand has 13 states, 13 states have (on average 6.3076923076923075) internal successors, (82), 13 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 15:00:30,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 15:00:30,481 INFO L93 Difference]: Finished difference Result 1112 states and 1608 transitions. [2025-02-08 15:00:30,481 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1112 states and 1608 transitions. [2025-02-08 15:00:30,484 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 724 [2025-02-08 15:00:30,486 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1112 states to 1112 states and 1608 transitions. [2025-02-08 15:00:30,486 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1112 [2025-02-08 15:00:30,487 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1112 [2025-02-08 15:00:30,487 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1112 states and 1608 transitions. [2025-02-08 15:00:30,487 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 15:00:30,487 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1112 states and 1608 transitions. [2025-02-08 15:00:30,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1112 states and 1608 transitions. [2025-02-08 15:00:30,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1112 to 1106. [2025-02-08 15:00:30,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1106 states, 1099 states have (on average 1.4458598726114649) internal successors, (1589), 1098 states have internal predecessors, (1589), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 15:00:30,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1106 states to 1106 states and 1601 transitions. [2025-02-08 15:00:30,496 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1106 states and 1601 transitions. [2025-02-08 15:00:30,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-02-08 15:00:30,497 INFO L432 stractBuchiCegarLoop]: Abstraction has 1106 states and 1601 transitions. [2025-02-08 15:00:30,497 INFO L338 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2025-02-08 15:00:30,497 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1106 states and 1601 transitions. [2025-02-08 15:00:30,499 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 718 [2025-02-08 15:00:30,500 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 15:00:30,500 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 15:00:30,500 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 15:00:30,500 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 15:00:30,500 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, 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main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 15:00:30,501 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := 0;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 15:00:30,501 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:30,501 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 23 times [2025-02-08 15:00:30,501 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:30,501 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [586716899] [2025-02-08 15:00:30,501 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 15:00:30,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:30,510 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:30,512 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:30,512 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 15:00:30,512 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:30,512 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 15:00:30,516 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:30,517 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:30,517 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:30,517 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:30,524 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 15:00:30,524 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:30,524 INFO L85 PathProgramCache]: Analyzing trace with hash -1470902687, now seen corresponding path program 1 times [2025-02-08 15:00:30,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:30,525 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1586649855] [2025-02-08 15:00:30,525 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 15:00:30,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:30,554 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-08 15:00:30,594 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-08 15:00:30,594 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:30,594 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 15:00:30,786 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 15:00:30,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 15:00:30,787 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1586649855] [2025-02-08 15:00:30,787 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1586649855] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 15:00:30,787 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 15:00:30,787 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-08 15:00:30,787 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1562120192] [2025-02-08 15:00:30,787 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 15:00:30,787 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 15:00:30,787 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 15:00:30,788 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-08 15:00:30,788 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-02-08 15:00:30,788 INFO L87 Difference]: Start difference. First operand 1106 states and 1601 transitions. cyclomatic complexity: 505 Second operand has 9 states, 9 states have (on average 9.11111111111111) internal successors, (82), 9 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 15:00:32,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 15:00:32,043 INFO L93 Difference]: Finished difference Result 1120 states and 1619 transitions. [2025-02-08 15:00:32,043 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1120 states and 1619 transitions. [2025-02-08 15:00:32,045 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 732 [2025-02-08 15:00:32,048 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1120 states to 1120 states and 1619 transitions. [2025-02-08 15:00:32,048 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1120 [2025-02-08 15:00:32,049 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1120 [2025-02-08 15:00:32,049 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1120 states and 1619 transitions. [2025-02-08 15:00:32,050 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 15:00:32,050 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1120 states and 1619 transitions. [2025-02-08 15:00:32,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1120 states and 1619 transitions. [2025-02-08 15:00:32,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1120 to 1109. [2025-02-08 15:00:32,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1109 states, 1102 states have (on average 1.4455535390199636) internal successors, (1593), 1101 states have internal predecessors, (1593), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 15:00:32,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1109 states to 1109 states and 1605 transitions. [2025-02-08 15:00:32,061 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1109 states and 1605 transitions. [2025-02-08 15:00:32,061 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 15:00:32,061 INFO L432 stractBuchiCegarLoop]: Abstraction has 1109 states and 1605 transitions. [2025-02-08 15:00:32,061 INFO L338 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2025-02-08 15:00:32,061 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1109 states and 1605 transitions. [2025-02-08 15:00:32,063 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 721 [2025-02-08 15:00:32,063 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 15:00:32,063 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 15:00:32,064 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 15:00:32,064 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 15:00:32,064 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-08 15:00:32,064 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-08 15:00:32,064 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:32,064 INFO L85 PathProgramCache]: Analyzing trace with hash 1954, now seen corresponding path program 24 times [2025-02-08 15:00:32,064 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:32,064 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598352961] [2025-02-08 15:00:32,065 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 15:00:32,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:32,073 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:32,074 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:32,074 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-08 15:00:32,074 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:32,074 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 15:00:32,078 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 15:00:32,079 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 15:00:32,080 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:32,080 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 15:00:32,085 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 15:00:32,085 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 15:00:32,085 INFO L85 PathProgramCache]: Analyzing trace with hash -957173865, now seen corresponding path program 1 times [2025-02-08 15:00:32,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 15:00:32,085 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1423923471] [2025-02-08 15:00:32,085 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 15:00:32,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 15:00:32,108 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-08 15:00:32,170 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-08 15:00:32,170 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 15:00:32,170 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 15:00:46,145 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 32 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)