./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 48c9605d Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 37235873cdbfb4a92a6d9a366e7d975c617138dc8eee2f80d6fd06796710e280 --- Real Ultimate output --- This is Ultimate 0.3.0-?-48c9605-m [2025-02-08 00:07:38,484 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-08 00:07:38,545 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2025-02-08 00:07:38,553 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-08 00:07:38,553 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-08 00:07:38,566 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-08 00:07:38,567 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-08 00:07:38,567 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-08 00:07:38,568 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-08 00:07:38,568 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-08 00:07:38,568 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-02-08 00:07:38,568 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-02-08 00:07:38,568 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-08 00:07:38,568 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-08 00:07:38,568 INFO L153 SettingsManager]: * Use SBE=true [2025-02-08 00:07:38,568 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-08 00:07:38,568 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-02-08 00:07:38,568 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-08 00:07:38,568 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-08 00:07:38,568 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-02-08 00:07:38,568 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-02-08 00:07:38,568 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-08 00:07:38,569 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-08 00:07:38,569 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-02-08 00:07:38,569 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 37235873cdbfb4a92a6d9a366e7d975c617138dc8eee2f80d6fd06796710e280 [2025-02-08 00:07:38,818 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-08 00:07:38,825 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-08 00:07:38,827 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-08 00:07:38,828 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-08 00:07:38,828 INFO L274 PluginConnector]: CDTParser initialized [2025-02-08 00:07:38,830 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2025-02-08 00:07:39,958 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/9d03a50fd/198c687954b0484aa8d69bf2c0f98543/FLAGc53929e53 [2025-02-08 00:07:40,248 INFO L384 CDTParser]: Found 1 translation units. [2025-02-08 00:07:40,252 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2025-02-08 00:07:40,263 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/9d03a50fd/198c687954b0484aa8d69bf2c0f98543/FLAGc53929e53 [2025-02-08 00:07:40,539 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/9d03a50fd/198c687954b0484aa8d69bf2c0f98543 [2025-02-08 00:07:40,541 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-08 00:07:40,542 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-08 00:07:40,543 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-08 00:07:40,543 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-08 00:07:40,546 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-08 00:07:40,547 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:40,547 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1b2823c4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40, skipping insertion in model container [2025-02-08 00:07:40,547 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:40,567 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-08 00:07:40,689 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c[1289,1302] [2025-02-08 00:07:40,818 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 00:07:40,830 INFO L200 MainTranslator]: Completed pre-run [2025-02-08 00:07:40,842 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c[1289,1302] [2025-02-08 00:07:40,923 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 00:07:40,934 INFO L204 MainTranslator]: Completed translation [2025-02-08 00:07:40,935 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40 WrapperNode [2025-02-08 00:07:40,935 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-08 00:07:40,936 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-08 00:07:40,937 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-08 00:07:40,937 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-08 00:07:40,941 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:40,958 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:41,043 INFO L138 Inliner]: procedures = 17, calls = 10, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 898 [2025-02-08 00:07:41,043 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-08 00:07:41,044 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-08 00:07:41,044 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-08 00:07:41,044 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-08 00:07:41,050 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:41,051 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:41,067 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:41,108 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-08 00:07:41,109 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:41,109 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:41,131 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:41,138 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:41,144 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:41,153 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:41,165 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-08 00:07:41,165 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-08 00:07:41,166 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-08 00:07:41,166 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-08 00:07:41,166 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (1/1) ... [2025-02-08 00:07:41,171 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-08 00:07:41,184 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:07:41,198 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-02-08 00:07:41,202 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-02-08 00:07:41,225 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-08 00:07:41,225 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2025-02-08 00:07:41,225 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2025-02-08 00:07:41,226 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-08 00:07:41,226 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-08 00:07:41,226 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-08 00:07:41,402 INFO L257 CfgBuilder]: Building ICFG [2025-02-08 00:07:41,404 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-08 00:07:42,566 INFO L? ?]: Removed 478 outVars from TransFormulas that were not future-live. [2025-02-08 00:07:42,566 INFO L308 CfgBuilder]: Performing block encoding [2025-02-08 00:07:42,625 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-08 00:07:42,625 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-08 00:07:42,625 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 12:07:42 BoogieIcfgContainer [2025-02-08 00:07:42,625 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-08 00:07:42,627 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-02-08 00:07:42,627 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-02-08 00:07:42,632 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-02-08 00:07:42,632 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.02 12:07:40" (1/3) ... [2025-02-08 00:07:42,633 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14dc5f69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.02 12:07:42, skipping insertion in model container [2025-02-08 00:07:42,633 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:07:40" (2/3) ... [2025-02-08 00:07:42,634 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14dc5f69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.02 12:07:42, skipping insertion in model container [2025-02-08 00:07:42,634 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 12:07:42" (3/3) ... [2025-02-08 00:07:42,635 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2025-02-08 00:07:42,648 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-02-08 00:07:42,649 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.unsafe_analog_estimation_convergence.c that has 2 procedures, 278 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-02-08 00:07:42,707 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-02-08 00:07:42,716 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2b20ce3e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-02-08 00:07:42,718 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-02-08 00:07:42,722 INFO L276 IsEmpty]: Start isEmpty. Operand has 278 states, 273 states have (on average 1.4981684981684982) internal successors, (409), 274 states have internal predecessors, (409), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:42,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2025-02-08 00:07:42,733 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:42,735 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:42,735 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:42,739 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:42,740 INFO L85 PathProgramCache]: Analyzing trace with hash -256005475, now seen corresponding path program 1 times [2025-02-08 00:07:42,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:42,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894989373] [2025-02-08 00:07:42,746 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:42,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:42,858 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 122 statements into 1 equivalence classes. [2025-02-08 00:07:42,912 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 122 of 122 statements. [2025-02-08 00:07:42,913 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:42,913 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:43,093 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-08 00:07:43,094 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:43,094 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [894989373] [2025-02-08 00:07:43,095 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [894989373] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:07:43,095 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1070747066] [2025-02-08 00:07:43,095 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:43,095 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:07:43,095 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:07:43,102 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 00:07:43,110 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-02-08 00:07:43,257 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 122 statements into 1 equivalence classes. [2025-02-08 00:07:43,349 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 122 of 122 statements. [2025-02-08 00:07:43,349 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:43,349 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:43,354 INFO L256 TraceCheckSpWp]: Trace formula consists of 678 conjuncts, 1 conjuncts are in the unsatisfiable core [2025-02-08 00:07:43,359 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:07:43,376 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-08 00:07:43,379 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-08 00:07:43,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1070747066] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:43,379 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-08 00:07:43,380 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2025-02-08 00:07:43,381 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [423024775] [2025-02-08 00:07:43,382 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:43,385 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-02-08 00:07:43,385 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:43,399 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-02-08 00:07:43,399 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-08 00:07:43,401 INFO L87 Difference]: Start difference. First operand has 278 states, 273 states have (on average 1.4981684981684982) internal successors, (409), 274 states have internal predecessors, (409), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 2 states, 2 states have (on average 58.5) internal successors, (117), 2 states have internal predecessors, (117), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:43,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:43,531 INFO L93 Difference]: Finished difference Result 533 states and 796 transitions. [2025-02-08 00:07:43,532 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-02-08 00:07:43,534 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 58.5) internal successors, (117), 2 states have internal predecessors, (117), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 122 [2025-02-08 00:07:43,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:43,542 INFO L225 Difference]: With dead ends: 533 [2025-02-08 00:07:43,544 INFO L226 Difference]: Without dead ends: 276 [2025-02-08 00:07:43,547 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-08 00:07:43,552 INFO L435 NwaCegarLoop]: 344 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 344 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:43,553 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 344 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-08 00:07:43,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2025-02-08 00:07:43,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 276. [2025-02-08 00:07:43,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 276 states, 272 states have (on average 1.4889705882352942) internal successors, (405), 272 states have internal predecessors, (405), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:43,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276 states to 276 states and 409 transitions. [2025-02-08 00:07:43,606 INFO L78 Accepts]: Start accepts. Automaton has 276 states and 409 transitions. Word has length 122 [2025-02-08 00:07:43,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:43,611 INFO L471 AbstractCegarLoop]: Abstraction has 276 states and 409 transitions. [2025-02-08 00:07:43,611 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 58.5) internal successors, (117), 2 states have internal predecessors, (117), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:43,611 INFO L276 IsEmpty]: Start isEmpty. Operand 276 states and 409 transitions. [2025-02-08 00:07:43,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2025-02-08 00:07:43,615 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:43,616 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:43,633 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2025-02-08 00:07:43,816 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2025-02-08 00:07:43,817 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:43,817 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:43,817 INFO L85 PathProgramCache]: Analyzing trace with hash -286544485, now seen corresponding path program 1 times [2025-02-08 00:07:43,817 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:43,817 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [216742062] [2025-02-08 00:07:43,818 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:43,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:43,856 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 122 statements into 1 equivalence classes. [2025-02-08 00:07:43,978 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 122 of 122 statements. [2025-02-08 00:07:43,978 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:43,978 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:44,655 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:44,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:44,657 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [216742062] [2025-02-08 00:07:44,657 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [216742062] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:44,658 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:44,658 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 00:07:44,658 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1106305605] [2025-02-08 00:07:44,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:44,659 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-08 00:07:44,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:44,660 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 00:07:44,660 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:07:44,660 INFO L87 Difference]: Start difference. First operand 276 states and 409 transitions. Second operand has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:44,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:44,831 INFO L93 Difference]: Finished difference Result 280 states and 413 transitions. [2025-02-08 00:07:44,831 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:07:44,831 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 122 [2025-02-08 00:07:44,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:44,833 INFO L225 Difference]: With dead ends: 280 [2025-02-08 00:07:44,833 INFO L226 Difference]: Without dead ends: 278 [2025-02-08 00:07:44,833 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:07:44,834 INFO L435 NwaCegarLoop]: 342 mSDtfsCounter, 0 mSDsluCounter, 679 mSDsCounter, 0 mSdLazyCounter, 205 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1021 SdHoareTripleChecker+Invalid, 205 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 205 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:44,834 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1021 Invalid, 205 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 205 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-02-08 00:07:44,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2025-02-08 00:07:44,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 278. [2025-02-08 00:07:44,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 278 states, 274 states have (on average 1.4854014598540146) internal successors, (407), 274 states have internal predecessors, (407), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:44,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 411 transitions. [2025-02-08 00:07:44,853 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 411 transitions. Word has length 122 [2025-02-08 00:07:44,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:44,854 INFO L471 AbstractCegarLoop]: Abstraction has 278 states and 411 transitions. [2025-02-08 00:07:44,855 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:44,855 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 411 transitions. [2025-02-08 00:07:44,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2025-02-08 00:07:44,856 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:44,856 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:44,857 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-02-08 00:07:44,857 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:44,857 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:44,857 INFO L85 PathProgramCache]: Analyzing trace with hash -288265216, now seen corresponding path program 1 times [2025-02-08 00:07:44,858 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:44,858 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1874743899] [2025-02-08 00:07:44,858 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:44,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:44,892 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 123 statements into 1 equivalence classes. [2025-02-08 00:07:44,953 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 123 of 123 statements. [2025-02-08 00:07:44,953 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:44,953 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:45,331 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:45,332 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:45,332 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1874743899] [2025-02-08 00:07:45,333 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1874743899] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:45,333 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:45,333 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:07:45,333 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1072653369] [2025-02-08 00:07:45,333 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:45,333 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:07:45,333 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:45,334 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:07:45,334 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:07:45,334 INFO L87 Difference]: Start difference. First operand 278 states and 411 transitions. Second operand has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:45,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:45,684 INFO L93 Difference]: Finished difference Result 760 states and 1128 transitions. [2025-02-08 00:07:45,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:07:45,684 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 123 [2025-02-08 00:07:45,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:45,686 INFO L225 Difference]: With dead ends: 760 [2025-02-08 00:07:45,686 INFO L226 Difference]: Without dead ends: 278 [2025-02-08 00:07:45,688 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:07:45,689 INFO L435 NwaCegarLoop]: 336 mSDtfsCounter, 924 mSDsluCounter, 625 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 925 SdHoareTripleChecker+Valid, 961 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:45,689 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [925 Valid, 961 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-08 00:07:45,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2025-02-08 00:07:45,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 278. [2025-02-08 00:07:45,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 278 states, 274 states have (on average 1.4817518248175183) internal successors, (406), 274 states have internal predecessors, (406), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:45,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 410 transitions. [2025-02-08 00:07:45,699 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 410 transitions. Word has length 123 [2025-02-08 00:07:45,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:45,699 INFO L471 AbstractCegarLoop]: Abstraction has 278 states and 410 transitions. [2025-02-08 00:07:45,699 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:45,699 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 410 transitions. [2025-02-08 00:07:45,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2025-02-08 00:07:45,701 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:45,701 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:45,701 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-02-08 00:07:45,701 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:45,702 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:45,702 INFO L85 PathProgramCache]: Analyzing trace with hash -572276144, now seen corresponding path program 1 times [2025-02-08 00:07:45,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:45,702 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854454199] [2025-02-08 00:07:45,702 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:45,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:45,733 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 124 statements into 1 equivalence classes. [2025-02-08 00:07:45,784 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 124 of 124 statements. [2025-02-08 00:07:45,784 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:45,784 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:46,040 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:46,041 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:46,041 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854454199] [2025-02-08 00:07:46,041 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [854454199] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:46,041 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:46,041 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 00:07:46,041 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522800871] [2025-02-08 00:07:46,041 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:46,041 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-08 00:07:46,041 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:46,042 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 00:07:46,042 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:07:46,042 INFO L87 Difference]: Start difference. First operand 278 states and 410 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:46,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:46,173 INFO L93 Difference]: Finished difference Result 537 states and 792 transitions. [2025-02-08 00:07:46,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:07:46,174 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 124 [2025-02-08 00:07:46,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:46,175 INFO L225 Difference]: With dead ends: 537 [2025-02-08 00:07:46,175 INFO L226 Difference]: Without dead ends: 280 [2025-02-08 00:07:46,176 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:07:46,176 INFO L435 NwaCegarLoop]: 341 mSDtfsCounter, 0 mSDsluCounter, 674 mSDsCounter, 0 mSdLazyCounter, 208 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1015 SdHoareTripleChecker+Invalid, 208 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 208 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:46,176 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1015 Invalid, 208 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 208 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-08 00:07:46,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2025-02-08 00:07:46,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 280. [2025-02-08 00:07:46,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 280 states, 276 states have (on average 1.4782608695652173) internal successors, (408), 276 states have internal predecessors, (408), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:46,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280 states to 280 states and 412 transitions. [2025-02-08 00:07:46,194 INFO L78 Accepts]: Start accepts. Automaton has 280 states and 412 transitions. Word has length 124 [2025-02-08 00:07:46,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:46,194 INFO L471 AbstractCegarLoop]: Abstraction has 280 states and 412 transitions. [2025-02-08 00:07:46,194 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:46,194 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 412 transitions. [2025-02-08 00:07:46,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2025-02-08 00:07:46,195 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:46,195 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:46,195 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-02-08 00:07:46,196 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:46,196 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:46,196 INFO L85 PathProgramCache]: Analyzing trace with hash 1370818022, now seen corresponding path program 1 times [2025-02-08 00:07:46,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:46,196 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356724248] [2025-02-08 00:07:46,196 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:46,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:46,225 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 125 statements into 1 equivalence classes. [2025-02-08 00:07:46,298 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 125 of 125 statements. [2025-02-08 00:07:46,299 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:46,299 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:46,642 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:46,643 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:46,643 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356724248] [2025-02-08 00:07:46,643 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [356724248] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:46,643 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:46,643 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 00:07:46,643 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446273853] [2025-02-08 00:07:46,643 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:46,644 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-08 00:07:46,644 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:46,645 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 00:07:46,645 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:07:46,645 INFO L87 Difference]: Start difference. First operand 280 states and 412 transitions. Second operand has 4 states, 4 states have (on average 29.5) internal successors, (118), 4 states have internal predecessors, (118), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:46,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:46,784 INFO L93 Difference]: Finished difference Result 539 states and 793 transitions. [2025-02-08 00:07:46,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:07:46,785 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.5) internal successors, (118), 4 states have internal predecessors, (118), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 125 [2025-02-08 00:07:46,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:46,786 INFO L225 Difference]: With dead ends: 539 [2025-02-08 00:07:46,787 INFO L226 Difference]: Without dead ends: 280 [2025-02-08 00:07:46,787 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:07:46,788 INFO L435 NwaCegarLoop]: 330 mSDtfsCounter, 372 mSDsluCounter, 331 mSDsCounter, 0 mSdLazyCounter, 155 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 372 SdHoareTripleChecker+Valid, 661 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 155 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:46,788 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [372 Valid, 661 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 155 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-08 00:07:46,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2025-02-08 00:07:46,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 280. [2025-02-08 00:07:46,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 280 states, 276 states have (on average 1.4746376811594204) internal successors, (407), 276 states have internal predecessors, (407), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:46,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280 states to 280 states and 411 transitions. [2025-02-08 00:07:46,804 INFO L78 Accepts]: Start accepts. Automaton has 280 states and 411 transitions. Word has length 125 [2025-02-08 00:07:46,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:46,804 INFO L471 AbstractCegarLoop]: Abstraction has 280 states and 411 transitions. [2025-02-08 00:07:46,804 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.5) internal successors, (118), 4 states have internal predecessors, (118), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:46,804 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 411 transitions. [2025-02-08 00:07:46,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2025-02-08 00:07:46,805 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:46,806 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:46,807 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-02-08 00:07:46,808 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:46,808 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:46,808 INFO L85 PathProgramCache]: Analyzing trace with hash 1534685520, now seen corresponding path program 1 times [2025-02-08 00:07:46,808 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:46,808 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [777133085] [2025-02-08 00:07:46,808 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:46,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:46,832 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 126 statements into 1 equivalence classes. [2025-02-08 00:07:46,981 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 126 of 126 statements. [2025-02-08 00:07:46,982 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:46,982 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:47,183 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:47,183 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:47,183 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [777133085] [2025-02-08 00:07:47,183 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [777133085] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:47,184 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:47,184 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 00:07:47,184 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1366263192] [2025-02-08 00:07:47,184 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:47,184 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-08 00:07:47,185 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:47,185 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 00:07:47,185 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:07:47,186 INFO L87 Difference]: Start difference. First operand 280 states and 411 transitions. Second operand has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:47,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:47,374 INFO L93 Difference]: Finished difference Result 539 states and 791 transitions. [2025-02-08 00:07:47,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:07:47,374 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 126 [2025-02-08 00:07:47,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:47,376 INFO L225 Difference]: With dead ends: 539 [2025-02-08 00:07:47,376 INFO L226 Difference]: Without dead ends: 280 [2025-02-08 00:07:47,376 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:07:47,377 INFO L435 NwaCegarLoop]: 330 mSDtfsCounter, 370 mSDsluCounter, 331 mSDsCounter, 0 mSdLazyCounter, 153 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 370 SdHoareTripleChecker+Valid, 661 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 153 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:47,377 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [370 Valid, 661 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 153 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-02-08 00:07:47,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2025-02-08 00:07:47,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 280. [2025-02-08 00:07:47,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 280 states, 276 states have (on average 1.4710144927536233) internal successors, (406), 276 states have internal predecessors, (406), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:47,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280 states to 280 states and 410 transitions. [2025-02-08 00:07:47,395 INFO L78 Accepts]: Start accepts. Automaton has 280 states and 410 transitions. Word has length 126 [2025-02-08 00:07:47,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:47,395 INFO L471 AbstractCegarLoop]: Abstraction has 280 states and 410 transitions. [2025-02-08 00:07:47,396 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:47,396 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 410 transitions. [2025-02-08 00:07:47,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2025-02-08 00:07:47,396 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:47,396 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:47,397 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-02-08 00:07:47,397 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:47,397 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:47,397 INFO L85 PathProgramCache]: Analyzing trace with hash -904593954, now seen corresponding path program 1 times [2025-02-08 00:07:47,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:47,397 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1840832184] [2025-02-08 00:07:47,397 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:47,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:47,432 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 127 statements into 1 equivalence classes. [2025-02-08 00:07:47,550 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 127 of 127 statements. [2025-02-08 00:07:47,551 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:47,551 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:48,485 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:48,485 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:48,485 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1840832184] [2025-02-08 00:07:48,486 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1840832184] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:48,486 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:48,486 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-08 00:07:48,486 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [838687671] [2025-02-08 00:07:48,486 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:48,486 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-08 00:07:48,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:48,487 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-08 00:07:48,487 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:07:48,487 INFO L87 Difference]: Start difference. First operand 280 states and 410 transitions. Second operand has 8 states, 8 states have (on average 15.0) internal successors, (120), 8 states have internal predecessors, (120), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:48,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:48,902 INFO L93 Difference]: Finished difference Result 662 states and 973 transitions. [2025-02-08 00:07:48,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-08 00:07:48,903 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 15.0) internal successors, (120), 8 states have internal predecessors, (120), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 127 [2025-02-08 00:07:48,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:48,906 INFO L225 Difference]: With dead ends: 662 [2025-02-08 00:07:48,907 INFO L226 Difference]: Without dead ends: 403 [2025-02-08 00:07:48,907 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2025-02-08 00:07:48,908 INFO L435 NwaCegarLoop]: 282 mSDtfsCounter, 856 mSDsluCounter, 979 mSDsCounter, 0 mSdLazyCounter, 544 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 857 SdHoareTripleChecker+Valid, 1261 SdHoareTripleChecker+Invalid, 547 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 544 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:48,908 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [857 Valid, 1261 Invalid, 547 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 544 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-08 00:07:48,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 403 states. [2025-02-08 00:07:48,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 403 to 402. [2025-02-08 00:07:48,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 402 states, 398 states have (on average 1.4773869346733668) internal successors, (588), 398 states have internal predecessors, (588), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:48,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 402 states to 402 states and 592 transitions. [2025-02-08 00:07:48,923 INFO L78 Accepts]: Start accepts. Automaton has 402 states and 592 transitions. Word has length 127 [2025-02-08 00:07:48,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:48,924 INFO L471 AbstractCegarLoop]: Abstraction has 402 states and 592 transitions. [2025-02-08 00:07:48,925 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 15.0) internal successors, (120), 8 states have internal predecessors, (120), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:48,925 INFO L276 IsEmpty]: Start isEmpty. Operand 402 states and 592 transitions. [2025-02-08 00:07:48,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2025-02-08 00:07:48,926 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:48,926 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:48,926 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-02-08 00:07:48,926 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:48,926 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:48,927 INFO L85 PathProgramCache]: Analyzing trace with hash -420105121, now seen corresponding path program 1 times [2025-02-08 00:07:48,927 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:48,927 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [392510567] [2025-02-08 00:07:48,927 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:48,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:48,957 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 128 statements into 1 equivalence classes. [2025-02-08 00:07:49,091 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 128 of 128 statements. [2025-02-08 00:07:49,092 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:49,092 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:49,853 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:49,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:49,853 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [392510567] [2025-02-08 00:07:49,853 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [392510567] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:49,853 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:49,853 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-08 00:07:49,853 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1499526961] [2025-02-08 00:07:49,854 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:49,854 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-08 00:07:49,854 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:49,854 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-08 00:07:49,854 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:07:49,855 INFO L87 Difference]: Start difference. First operand 402 states and 592 transitions. Second operand has 8 states, 8 states have (on average 15.125) internal successors, (121), 8 states have internal predecessors, (121), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:50,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:50,287 INFO L93 Difference]: Finished difference Result 791 states and 1165 transitions. [2025-02-08 00:07:50,288 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-08 00:07:50,288 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 15.125) internal successors, (121), 8 states have internal predecessors, (121), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 128 [2025-02-08 00:07:50,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:50,290 INFO L225 Difference]: With dead ends: 791 [2025-02-08 00:07:50,290 INFO L226 Difference]: Without dead ends: 410 [2025-02-08 00:07:50,291 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:07:50,291 INFO L435 NwaCegarLoop]: 280 mSDtfsCounter, 400 mSDsluCounter, 1385 mSDsCounter, 0 mSdLazyCounter, 770 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 402 SdHoareTripleChecker+Valid, 1665 SdHoareTripleChecker+Invalid, 773 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 770 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:50,292 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [402 Valid, 1665 Invalid, 773 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 770 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-08 00:07:50,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 410 states. [2025-02-08 00:07:50,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 410 to 407. [2025-02-08 00:07:50,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 407 states, 403 states have (on average 1.4764267990074442) internal successors, (595), 403 states have internal predecessors, (595), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:50,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 407 states to 407 states and 599 transitions. [2025-02-08 00:07:50,311 INFO L78 Accepts]: Start accepts. Automaton has 407 states and 599 transitions. Word has length 128 [2025-02-08 00:07:50,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:50,311 INFO L471 AbstractCegarLoop]: Abstraction has 407 states and 599 transitions. [2025-02-08 00:07:50,311 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 15.125) internal successors, (121), 8 states have internal predecessors, (121), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:50,311 INFO L276 IsEmpty]: Start isEmpty. Operand 407 states and 599 transitions. [2025-02-08 00:07:50,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2025-02-08 00:07:50,312 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:50,312 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:50,312 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-02-08 00:07:50,312 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:50,313 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:50,313 INFO L85 PathProgramCache]: Analyzing trace with hash -900676896, now seen corresponding path program 1 times [2025-02-08 00:07:50,313 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:50,313 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1550457848] [2025-02-08 00:07:50,313 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:50,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:50,337 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 129 statements into 1 equivalence classes. [2025-02-08 00:07:50,477 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 129 of 129 statements. [2025-02-08 00:07:50,477 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:50,478 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:51,182 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:51,182 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:51,182 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1550457848] [2025-02-08 00:07:51,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1550457848] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:51,182 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:51,182 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-08 00:07:51,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [497815590] [2025-02-08 00:07:51,183 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:51,183 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2025-02-08 00:07:51,183 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:51,183 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-08 00:07:51,183 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2025-02-08 00:07:51,184 INFO L87 Difference]: Start difference. First operand 407 states and 599 transitions. Second operand has 9 states, 9 states have (on average 13.555555555555555) internal successors, (122), 9 states have internal predecessors, (122), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:51,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:51,729 INFO L93 Difference]: Finished difference Result 804 states and 1184 transitions. [2025-02-08 00:07:51,729 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-08 00:07:51,729 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 13.555555555555555) internal successors, (122), 9 states have internal predecessors, (122), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 129 [2025-02-08 00:07:51,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:51,731 INFO L225 Difference]: With dead ends: 804 [2025-02-08 00:07:51,731 INFO L226 Difference]: Without dead ends: 418 [2025-02-08 00:07:51,732 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2025-02-08 00:07:51,732 INFO L435 NwaCegarLoop]: 275 mSDtfsCounter, 306 mSDsluCounter, 1625 mSDsCounter, 0 mSdLazyCounter, 939 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 306 SdHoareTripleChecker+Valid, 1900 SdHoareTripleChecker+Invalid, 943 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 939 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:51,732 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [306 Valid, 1900 Invalid, 943 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 939 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:07:51,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 418 states. [2025-02-08 00:07:51,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 418 to 416. [2025-02-08 00:07:51,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 416 states, 412 states have (on average 1.4757281553398058) internal successors, (608), 412 states have internal predecessors, (608), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:51,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 416 states to 416 states and 612 transitions. [2025-02-08 00:07:51,756 INFO L78 Accepts]: Start accepts. Automaton has 416 states and 612 transitions. Word has length 129 [2025-02-08 00:07:51,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:51,756 INFO L471 AbstractCegarLoop]: Abstraction has 416 states and 612 transitions. [2025-02-08 00:07:51,757 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 13.555555555555555) internal successors, (122), 9 states have internal predecessors, (122), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:51,757 INFO L276 IsEmpty]: Start isEmpty. Operand 416 states and 612 transitions. [2025-02-08 00:07:51,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2025-02-08 00:07:51,758 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:51,758 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:51,758 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-02-08 00:07:51,758 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:51,759 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:51,759 INFO L85 PathProgramCache]: Analyzing trace with hash 1321926437, now seen corresponding path program 1 times [2025-02-08 00:07:51,759 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:51,759 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [572268424] [2025-02-08 00:07:51,759 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:51,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:51,783 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 129 statements into 1 equivalence classes. [2025-02-08 00:07:51,873 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 129 of 129 statements. [2025-02-08 00:07:51,873 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:51,873 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:52,277 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:52,277 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:52,277 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [572268424] [2025-02-08 00:07:52,277 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [572268424] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:52,277 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:52,277 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-08 00:07:52,277 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [222863910] [2025-02-08 00:07:52,277 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:52,277 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-08 00:07:52,277 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:52,278 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-08 00:07:52,278 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:07:52,278 INFO L87 Difference]: Start difference. First operand 416 states and 612 transitions. Second operand has 8 states, 8 states have (on average 15.25) internal successors, (122), 8 states have internal predecessors, (122), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:52,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:52,671 INFO L93 Difference]: Finished difference Result 814 states and 1197 transitions. [2025-02-08 00:07:52,672 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-08 00:07:52,672 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 15.25) internal successors, (122), 8 states have internal predecessors, (122), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 129 [2025-02-08 00:07:52,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:52,673 INFO L225 Difference]: With dead ends: 814 [2025-02-08 00:07:52,673 INFO L226 Difference]: Without dead ends: 419 [2025-02-08 00:07:52,674 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:07:52,674 INFO L435 NwaCegarLoop]: 280 mSDtfsCounter, 378 mSDsluCounter, 1383 mSDsCounter, 0 mSdLazyCounter, 772 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 379 SdHoareTripleChecker+Valid, 1663 SdHoareTripleChecker+Invalid, 774 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 772 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:52,675 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [379 Valid, 1663 Invalid, 774 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 772 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-08 00:07:52,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 419 states. [2025-02-08 00:07:52,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 419 to 417. [2025-02-08 00:07:52,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 417 states, 413 states have (on average 1.4721549636803875) internal successors, (608), 413 states have internal predecessors, (608), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:52,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 612 transitions. [2025-02-08 00:07:52,686 INFO L78 Accepts]: Start accepts. Automaton has 417 states and 612 transitions. Word has length 129 [2025-02-08 00:07:52,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:52,686 INFO L471 AbstractCegarLoop]: Abstraction has 417 states and 612 transitions. [2025-02-08 00:07:52,686 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 15.25) internal successors, (122), 8 states have internal predecessors, (122), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:52,686 INFO L276 IsEmpty]: Start isEmpty. Operand 417 states and 612 transitions. [2025-02-08 00:07:52,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2025-02-08 00:07:52,687 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:52,688 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:52,688 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-02-08 00:07:52,688 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:52,688 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:52,689 INFO L85 PathProgramCache]: Analyzing trace with hash 723989913, now seen corresponding path program 1 times [2025-02-08 00:07:52,689 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:52,689 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [72380606] [2025-02-08 00:07:52,689 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:52,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:52,713 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 129 statements into 1 equivalence classes. [2025-02-08 00:07:52,731 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 129 of 129 statements. [2025-02-08 00:07:52,732 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:52,732 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:52,887 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:52,888 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:52,888 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [72380606] [2025-02-08 00:07:52,888 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [72380606] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:52,888 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:52,888 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:07:52,888 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906551429] [2025-02-08 00:07:52,888 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:52,888 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:07:52,888 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:52,889 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:07:52,889 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:07:52,889 INFO L87 Difference]: Start difference. First operand 417 states and 612 transitions. Second operand has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:53,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:53,125 INFO L93 Difference]: Finished difference Result 1187 states and 1743 transitions. [2025-02-08 00:07:53,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:07:53,126 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 129 [2025-02-08 00:07:53,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:53,130 INFO L225 Difference]: With dead ends: 1187 [2025-02-08 00:07:53,131 INFO L226 Difference]: Without dead ends: 791 [2025-02-08 00:07:53,132 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:07:53,132 INFO L435 NwaCegarLoop]: 334 mSDtfsCounter, 334 mSDsluCounter, 988 mSDsCounter, 0 mSdLazyCounter, 301 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 335 SdHoareTripleChecker+Valid, 1322 SdHoareTripleChecker+Invalid, 301 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 301 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:53,133 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [335 Valid, 1322 Invalid, 301 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 301 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-02-08 00:07:53,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 791 states. [2025-02-08 00:07:53,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 791 to 433. [2025-02-08 00:07:53,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 433 states, 428 states have (on average 1.4672897196261683) internal successors, (628), 428 states have internal predecessors, (628), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-08 00:07:53,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 433 states to 433 states and 634 transitions. [2025-02-08 00:07:53,149 INFO L78 Accepts]: Start accepts. Automaton has 433 states and 634 transitions. Word has length 129 [2025-02-08 00:07:53,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:53,150 INFO L471 AbstractCegarLoop]: Abstraction has 433 states and 634 transitions. [2025-02-08 00:07:53,150 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:53,150 INFO L276 IsEmpty]: Start isEmpty. Operand 433 states and 634 transitions. [2025-02-08 00:07:53,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2025-02-08 00:07:53,151 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:53,151 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:53,156 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-02-08 00:07:53,157 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:53,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:53,157 INFO L85 PathProgramCache]: Analyzing trace with hash 790219849, now seen corresponding path program 1 times [2025-02-08 00:07:53,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:53,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [189949635] [2025-02-08 00:07:53,157 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:53,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:53,181 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 130 statements into 1 equivalence classes. [2025-02-08 00:07:53,263 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 130 of 130 statements. [2025-02-08 00:07:53,263 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:53,263 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:54,296 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:54,296 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:54,296 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [189949635] [2025-02-08 00:07:54,296 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [189949635] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:54,296 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:54,296 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-08 00:07:54,296 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1579340472] [2025-02-08 00:07:54,297 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:54,297 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-02-08 00:07:54,297 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:54,298 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-08 00:07:54,298 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-02-08 00:07:54,298 INFO L87 Difference]: Start difference. First operand 433 states and 634 transitions. Second operand has 10 states, 10 states have (on average 12.3) internal successors, (123), 10 states have internal predecessors, (123), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:55,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:55,109 INFO L93 Difference]: Finished difference Result 1581 states and 2319 transitions. [2025-02-08 00:07:55,110 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 00:07:55,110 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 12.3) internal successors, (123), 10 states have internal predecessors, (123), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 130 [2025-02-08 00:07:55,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:55,114 INFO L225 Difference]: With dead ends: 1581 [2025-02-08 00:07:55,115 INFO L226 Difference]: Without dead ends: 1169 [2025-02-08 00:07:55,116 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=205, Unknown=0, NotChecked=0, Total=272 [2025-02-08 00:07:55,116 INFO L435 NwaCegarLoop]: 528 mSDtfsCounter, 1515 mSDsluCounter, 2816 mSDsCounter, 0 mSdLazyCounter, 1311 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1517 SdHoareTripleChecker+Valid, 3344 SdHoareTripleChecker+Invalid, 1314 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1311 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:55,116 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1517 Valid, 3344 Invalid, 1314 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1311 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-02-08 00:07:55,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1169 states. [2025-02-08 00:07:55,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1169 to 768. [2025-02-08 00:07:55,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 768 states, 760 states have (on average 1.4710526315789474) internal successors, (1118), 760 states have internal predecessors, (1118), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 00:07:55,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 768 states to 768 states and 1130 transitions. [2025-02-08 00:07:55,139 INFO L78 Accepts]: Start accepts. Automaton has 768 states and 1130 transitions. Word has length 130 [2025-02-08 00:07:55,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:55,139 INFO L471 AbstractCegarLoop]: Abstraction has 768 states and 1130 transitions. [2025-02-08 00:07:55,139 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 12.3) internal successors, (123), 10 states have internal predecessors, (123), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:55,140 INFO L276 IsEmpty]: Start isEmpty. Operand 768 states and 1130 transitions. [2025-02-08 00:07:55,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2025-02-08 00:07:55,141 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:55,141 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:55,141 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-02-08 00:07:55,141 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:55,142 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:55,142 INFO L85 PathProgramCache]: Analyzing trace with hash 1171478102, now seen corresponding path program 1 times [2025-02-08 00:07:55,142 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:55,142 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [198246852] [2025-02-08 00:07:55,142 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:55,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:55,164 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 131 statements into 1 equivalence classes. [2025-02-08 00:07:55,249 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 131 of 131 statements. [2025-02-08 00:07:55,249 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:55,249 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:56,049 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:56,050 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:56,050 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [198246852] [2025-02-08 00:07:56,050 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [198246852] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:56,050 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:56,050 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-08 00:07:56,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [595020292] [2025-02-08 00:07:56,050 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:56,051 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-08 00:07:56,051 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:56,051 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-08 00:07:56,051 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:07:56,051 INFO L87 Difference]: Start difference. First operand 768 states and 1130 transitions. Second operand has 8 states, 8 states have (on average 15.5) internal successors, (124), 8 states have internal predecessors, (124), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:56,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:56,618 INFO L93 Difference]: Finished difference Result 1534 states and 2253 transitions. [2025-02-08 00:07:56,618 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-08 00:07:56,619 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 15.5) internal successors, (124), 8 states have internal predecessors, (124), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 131 [2025-02-08 00:07:56,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:56,623 INFO L225 Difference]: With dead ends: 1534 [2025-02-08 00:07:56,623 INFO L226 Difference]: Without dead ends: 1122 [2025-02-08 00:07:56,625 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2025-02-08 00:07:56,626 INFO L435 NwaCegarLoop]: 275 mSDtfsCounter, 1183 mSDsluCounter, 1363 mSDsCounter, 0 mSdLazyCounter, 806 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1185 SdHoareTripleChecker+Valid, 1638 SdHoareTripleChecker+Invalid, 809 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 806 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:56,626 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1185 Valid, 1638 Invalid, 809 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 806 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:07:56,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1122 states. [2025-02-08 00:07:56,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1122 to 775. [2025-02-08 00:07:56,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 775 states, 767 states have (on average 1.469361147327249) internal successors, (1127), 767 states have internal predecessors, (1127), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 00:07:56,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 775 states to 775 states and 1139 transitions. [2025-02-08 00:07:56,652 INFO L78 Accepts]: Start accepts. Automaton has 775 states and 1139 transitions. Word has length 131 [2025-02-08 00:07:56,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:56,653 INFO L471 AbstractCegarLoop]: Abstraction has 775 states and 1139 transitions. [2025-02-08 00:07:56,653 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 15.5) internal successors, (124), 8 states have internal predecessors, (124), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:56,654 INFO L276 IsEmpty]: Start isEmpty. Operand 775 states and 1139 transitions. [2025-02-08 00:07:56,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2025-02-08 00:07:56,655 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:56,655 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:56,655 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-02-08 00:07:56,655 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:56,655 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:56,656 INFO L85 PathProgramCache]: Analyzing trace with hash -1438245028, now seen corresponding path program 1 times [2025-02-08 00:07:56,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:56,656 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047315497] [2025-02-08 00:07:56,656 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:56,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:56,700 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 131 statements into 1 equivalence classes. [2025-02-08 00:07:56,764 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 131 of 131 statements. [2025-02-08 00:07:56,764 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:56,764 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:56,937 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:56,937 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:56,937 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2047315497] [2025-02-08 00:07:56,937 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2047315497] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:56,937 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:56,937 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:07:56,937 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [753487238] [2025-02-08 00:07:56,937 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:56,938 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:07:56,938 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:56,938 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:07:56,938 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:07:56,938 INFO L87 Difference]: Start difference. First operand 775 states and 1139 transitions. Second operand has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:57,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:57,124 INFO L93 Difference]: Finished difference Result 1453 states and 2140 transitions. [2025-02-08 00:07:57,124 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:07:57,124 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 131 [2025-02-08 00:07:57,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:57,128 INFO L225 Difference]: With dead ends: 1453 [2025-02-08 00:07:57,128 INFO L226 Difference]: Without dead ends: 777 [2025-02-08 00:07:57,129 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2025-02-08 00:07:57,129 INFO L435 NwaCegarLoop]: 334 mSDtfsCounter, 358 mSDsluCounter, 997 mSDsCounter, 0 mSdLazyCounter, 287 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 358 SdHoareTripleChecker+Valid, 1331 SdHoareTripleChecker+Invalid, 288 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 287 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:57,130 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [358 Valid, 1331 Invalid, 288 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 287 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-08 00:07:57,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 777 states. [2025-02-08 00:07:57,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 777 to 777. [2025-02-08 00:07:57,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 777 states, 769 states have (on average 1.4655396618985697) internal successors, (1127), 769 states have internal predecessors, (1127), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 00:07:57,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 777 states to 777 states and 1139 transitions. [2025-02-08 00:07:57,150 INFO L78 Accepts]: Start accepts. Automaton has 777 states and 1139 transitions. Word has length 131 [2025-02-08 00:07:57,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:57,150 INFO L471 AbstractCegarLoop]: Abstraction has 777 states and 1139 transitions. [2025-02-08 00:07:57,150 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:57,150 INFO L276 IsEmpty]: Start isEmpty. Operand 777 states and 1139 transitions. [2025-02-08 00:07:57,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2025-02-08 00:07:57,152 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:57,152 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:57,152 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-02-08 00:07:57,152 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:57,153 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:57,153 INFO L85 PathProgramCache]: Analyzing trace with hash -1257018441, now seen corresponding path program 1 times [2025-02-08 00:07:57,153 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:57,153 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [424582989] [2025-02-08 00:07:57,153 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:57,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:57,182 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 131 statements into 1 equivalence classes. [2025-02-08 00:07:57,315 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 131 of 131 statements. [2025-02-08 00:07:57,315 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:57,315 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:57,560 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-02-08 00:07:57,560 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:57,561 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [424582989] [2025-02-08 00:07:57,561 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [424582989] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:07:57,561 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1340130305] [2025-02-08 00:07:57,561 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:57,561 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:07:57,561 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:07:57,563 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 00:07:57,580 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-02-08 00:07:57,795 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 131 statements into 1 equivalence classes. [2025-02-08 00:07:57,923 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 131 of 131 statements. [2025-02-08 00:07:57,924 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:57,924 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:57,930 INFO L256 TraceCheckSpWp]: Trace formula consists of 699 conjuncts, 11 conjuncts are in the unsatisfiable core [2025-02-08 00:07:57,935 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:07:57,972 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:07:57,972 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-08 00:07:57,972 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1340130305] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:57,973 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-08 00:07:57,973 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 7 [2025-02-08 00:07:57,973 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059746967] [2025-02-08 00:07:57,973 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:57,973 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:07:57,974 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:57,974 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:07:57,976 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:07:57,977 INFO L87 Difference]: Start difference. First operand 777 states and 1139 transitions. Second operand has 6 states, 5 states have (on average 25.4) internal successors, (127), 6 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:58,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:58,210 INFO L93 Difference]: Finished difference Result 1513 states and 2217 transitions. [2025-02-08 00:07:58,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:07:58,210 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 25.4) internal successors, (127), 6 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 131 [2025-02-08 00:07:58,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:58,213 INFO L225 Difference]: With dead ends: 1513 [2025-02-08 00:07:58,214 INFO L226 Difference]: Without dead ends: 777 [2025-02-08 00:07:58,216 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 131 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:07:58,216 INFO L435 NwaCegarLoop]: 336 mSDtfsCounter, 0 mSDsluCounter, 1332 mSDsCounter, 0 mSdLazyCounter, 348 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1668 SdHoareTripleChecker+Invalid, 348 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 348 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:58,217 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1668 Invalid, 348 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 348 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-02-08 00:07:58,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 777 states. [2025-02-08 00:07:58,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 777 to 777. [2025-02-08 00:07:58,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 777 states, 769 states have (on average 1.460338101430429) internal successors, (1123), 769 states have internal predecessors, (1123), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 00:07:58,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 777 states to 777 states and 1135 transitions. [2025-02-08 00:07:58,239 INFO L78 Accepts]: Start accepts. Automaton has 777 states and 1135 transitions. Word has length 131 [2025-02-08 00:07:58,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:58,239 INFO L471 AbstractCegarLoop]: Abstraction has 777 states and 1135 transitions. [2025-02-08 00:07:58,239 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 25.4) internal successors, (127), 6 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:07:58,239 INFO L276 IsEmpty]: Start isEmpty. Operand 777 states and 1135 transitions. [2025-02-08 00:07:58,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2025-02-08 00:07:58,240 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:58,240 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:58,249 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2025-02-08 00:07:58,441 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2025-02-08 00:07:58,442 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:58,446 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:58,446 INFO L85 PathProgramCache]: Analyzing trace with hash -1101611334, now seen corresponding path program 1 times [2025-02-08 00:07:58,446 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:58,446 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1156188460] [2025-02-08 00:07:58,447 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:58,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:58,484 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 132 statements into 1 equivalence classes. [2025-02-08 00:07:58,568 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 132 of 132 statements. [2025-02-08 00:07:58,569 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:58,569 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:58,979 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:58,981 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:58,981 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1156188460] [2025-02-08 00:07:58,982 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1156188460] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:58,982 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:58,982 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-08 00:07:58,982 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [401484172] [2025-02-08 00:07:58,982 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:58,982 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-08 00:07:58,982 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:58,983 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-08 00:07:58,983 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:07:58,983 INFO L87 Difference]: Start difference. First operand 777 states and 1135 transitions. Second operand has 8 states, 8 states have (on average 15.625) internal successors, (125), 8 states have internal predecessors, (125), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:59,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:59,389 INFO L93 Difference]: Finished difference Result 1554 states and 2268 transitions. [2025-02-08 00:07:59,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-08 00:07:59,389 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 15.625) internal successors, (125), 8 states have internal predecessors, (125), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 132 [2025-02-08 00:07:59,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:59,392 INFO L225 Difference]: With dead ends: 1554 [2025-02-08 00:07:59,392 INFO L226 Difference]: Without dead ends: 808 [2025-02-08 00:07:59,394 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:07:59,395 INFO L435 NwaCegarLoop]: 283 mSDtfsCounter, 445 mSDsluCounter, 1381 mSDsCounter, 0 mSdLazyCounter, 738 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 447 SdHoareTripleChecker+Valid, 1664 SdHoareTripleChecker+Invalid, 740 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 738 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:59,395 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [447 Valid, 1664 Invalid, 740 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 738 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-08 00:07:59,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 808 states. [2025-02-08 00:07:59,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 808 to 808. [2025-02-08 00:07:59,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 808 states, 800 states have (on average 1.4575) internal successors, (1166), 800 states have internal predecessors, (1166), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 00:07:59,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 808 states to 808 states and 1178 transitions. [2025-02-08 00:07:59,419 INFO L78 Accepts]: Start accepts. Automaton has 808 states and 1178 transitions. Word has length 132 [2025-02-08 00:07:59,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:59,419 INFO L471 AbstractCegarLoop]: Abstraction has 808 states and 1178 transitions. [2025-02-08 00:07:59,419 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 15.625) internal successors, (125), 8 states have internal predecessors, (125), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:59,419 INFO L276 IsEmpty]: Start isEmpty. Operand 808 states and 1178 transitions. [2025-02-08 00:07:59,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2025-02-08 00:07:59,421 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:59,421 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:59,421 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-02-08 00:07:59,422 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:59,422 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:59,422 INFO L85 PathProgramCache]: Analyzing trace with hash 1189365756, now seen corresponding path program 1 times [2025-02-08 00:07:59,422 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:59,422 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [584164138] [2025-02-08 00:07:59,422 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:59,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:59,450 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 133 statements into 1 equivalence classes. [2025-02-08 00:07:59,470 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 133 of 133 statements. [2025-02-08 00:07:59,471 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:59,471 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:07:59,617 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:07:59,617 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:07:59,617 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [584164138] [2025-02-08 00:07:59,617 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [584164138] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:07:59,617 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:07:59,617 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:07:59,618 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222067686] [2025-02-08 00:07:59,618 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:07:59,618 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:07:59,619 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:07:59,619 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:07:59,620 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:07:59,620 INFO L87 Difference]: Start difference. First operand 808 states and 1178 transitions. Second operand has 5 states, 5 states have (on average 25.2) internal successors, (126), 5 states have internal predecessors, (126), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:59,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:07:59,771 INFO L93 Difference]: Finished difference Result 1548 states and 2258 transitions. [2025-02-08 00:07:59,771 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:07:59,772 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 25.2) internal successors, (126), 5 states have internal predecessors, (126), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 133 [2025-02-08 00:07:59,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:07:59,774 INFO L225 Difference]: With dead ends: 1548 [2025-02-08 00:07:59,774 INFO L226 Difference]: Without dead ends: 777 [2025-02-08 00:07:59,775 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:07:59,776 INFO L435 NwaCegarLoop]: 337 mSDtfsCounter, 24 mSDsluCounter, 1001 mSDsCounter, 0 mSdLazyCounter, 273 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 1338 SdHoareTripleChecker+Invalid, 273 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 273 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-08 00:07:59,776 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 1338 Invalid, 273 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 273 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-08 00:07:59,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 777 states. [2025-02-08 00:07:59,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 777 to 777. [2025-02-08 00:07:59,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 777 states, 769 states have (on average 1.459037711313394) internal successors, (1122), 769 states have internal predecessors, (1122), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 00:07:59,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 777 states to 777 states and 1134 transitions. [2025-02-08 00:07:59,798 INFO L78 Accepts]: Start accepts. Automaton has 777 states and 1134 transitions. Word has length 133 [2025-02-08 00:07:59,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:07:59,798 INFO L471 AbstractCegarLoop]: Abstraction has 777 states and 1134 transitions. [2025-02-08 00:07:59,798 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 25.2) internal successors, (126), 5 states have internal predecessors, (126), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:07:59,798 INFO L276 IsEmpty]: Start isEmpty. Operand 777 states and 1134 transitions. [2025-02-08 00:07:59,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2025-02-08 00:07:59,799 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:07:59,799 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:07:59,800 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-02-08 00:07:59,800 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:07:59,800 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:07:59,800 INFO L85 PathProgramCache]: Analyzing trace with hash -846146032, now seen corresponding path program 1 times [2025-02-08 00:07:59,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:07:59,800 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062050561] [2025-02-08 00:07:59,800 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:07:59,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:07:59,827 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 133 statements into 1 equivalence classes. [2025-02-08 00:07:59,947 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 133 of 133 statements. [2025-02-08 00:07:59,947 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:07:59,947 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:00,121 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-02-08 00:08:00,121 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:08:00,121 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1062050561] [2025-02-08 00:08:00,121 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1062050561] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:08:00,122 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:08:00,122 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:08:00,122 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1687588049] [2025-02-08 00:08:00,122 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:08:00,122 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:08:00,122 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:08:00,123 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:08:00,123 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:08:00,123 INFO L87 Difference]: Start difference. First operand 777 states and 1134 transitions. Second operand has 6 states, 5 states have (on average 25.8) internal successors, (129), 6 states have internal predecessors, (129), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:08:00,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:08:00,319 INFO L93 Difference]: Finished difference Result 1478 states and 2162 transitions. [2025-02-08 00:08:00,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:08:00,320 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 25.8) internal successors, (129), 6 states have internal predecessors, (129), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 133 [2025-02-08 00:08:00,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:08:00,323 INFO L225 Difference]: With dead ends: 1478 [2025-02-08 00:08:00,323 INFO L226 Difference]: Without dead ends: 777 [2025-02-08 00:08:00,324 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:08:00,324 INFO L435 NwaCegarLoop]: 334 mSDtfsCounter, 0 mSDsluCounter, 1324 mSDsCounter, 0 mSdLazyCounter, 348 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1658 SdHoareTripleChecker+Invalid, 348 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 348 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-02-08 00:08:00,325 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1658 Invalid, 348 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 348 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-02-08 00:08:00,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 777 states. [2025-02-08 00:08:00,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 777 to 777. [2025-02-08 00:08:00,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 777 states, 769 states have (on average 1.4564369310793237) internal successors, (1120), 769 states have internal predecessors, (1120), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 00:08:00,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 777 states to 777 states and 1132 transitions. [2025-02-08 00:08:00,343 INFO L78 Accepts]: Start accepts. Automaton has 777 states and 1132 transitions. Word has length 133 [2025-02-08 00:08:00,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:08:00,343 INFO L471 AbstractCegarLoop]: Abstraction has 777 states and 1132 transitions. [2025-02-08 00:08:00,343 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 25.8) internal successors, (129), 6 states have internal predecessors, (129), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:08:00,343 INFO L276 IsEmpty]: Start isEmpty. Operand 777 states and 1132 transitions. [2025-02-08 00:08:00,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2025-02-08 00:08:00,344 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:08:00,345 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:08:00,345 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-02-08 00:08:00,345 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:08:00,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:08:00,346 INFO L85 PathProgramCache]: Analyzing trace with hash 1948867335, now seen corresponding path program 1 times [2025-02-08 00:08:00,346 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:08:00,346 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1292202582] [2025-02-08 00:08:00,346 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:08:00,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:08:00,371 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 133 statements into 1 equivalence classes. [2025-02-08 00:08:00,535 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 133 of 133 statements. [2025-02-08 00:08:00,537 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:08:00,537 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 00:08:00,537 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 00:08:00,547 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 133 statements into 1 equivalence classes. [2025-02-08 00:08:00,704 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 133 of 133 statements. [2025-02-08 00:08:00,705 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:08:00,705 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 00:08:00,782 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 00:08:00,782 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-02-08 00:08:00,783 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-02-08 00:08:00,786 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-02-08 00:08:00,790 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:08:00,877 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:00,906 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-02-08 00:08:00,909 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.02 12:08:00 BoogieIcfgContainer [2025-02-08 00:08:00,911 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-02-08 00:08:00,912 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-08 00:08:00,912 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-08 00:08:00,912 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-08 00:08:00,913 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 12:07:42" (3/4) ... [2025-02-08 00:08:00,915 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-02-08 00:08:00,915 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-08 00:08:00,916 INFO L158 Benchmark]: Toolchain (without parser) took 20374.05ms. Allocated memory was 142.6MB in the beginning and 570.4MB in the end (delta: 427.8MB). Free memory was 110.4MB in the beginning and 214.1MB in the end (delta: -103.7MB). Peak memory consumption was 330.0MB. Max. memory is 16.1GB. [2025-02-08 00:08:00,916 INFO L158 Benchmark]: CDTParser took 1.29ms. Allocated memory is still 201.3MB. Free memory is still 123.8MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 00:08:00,916 INFO L158 Benchmark]: CACSL2BoogieTranslator took 392.56ms. Allocated memory is still 142.6MB. Free memory was 109.9MB in the beginning and 87.9MB in the end (delta: 22.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2025-02-08 00:08:00,917 INFO L158 Benchmark]: Boogie Procedure Inliner took 107.22ms. Allocated memory is still 142.6MB. Free memory was 87.4MB in the beginning and 73.0MB in the end (delta: 14.4MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-08 00:08:00,917 INFO L158 Benchmark]: Boogie Preprocessor took 121.22ms. Allocated memory is still 142.6MB. Free memory was 73.0MB in the beginning and 64.6MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-08 00:08:00,917 INFO L158 Benchmark]: IcfgBuilder took 1459.97ms. Allocated memory is still 142.6MB. Free memory was 64.6MB in the beginning and 55.2MB in the end (delta: 9.5MB). Peak memory consumption was 46.6MB. Max. memory is 16.1GB. [2025-02-08 00:08:00,918 INFO L158 Benchmark]: TraceAbstraction took 18284.32ms. Allocated memory was 142.6MB in the beginning and 570.4MB in the end (delta: 427.8MB). Free memory was 55.2MB in the beginning and 214.2MB in the end (delta: -159.1MB). Peak memory consumption was 268.4MB. Max. memory is 16.1GB. [2025-02-08 00:08:00,918 INFO L158 Benchmark]: Witness Printer took 3.66ms. Allocated memory is still 570.4MB. Free memory was 214.2MB in the beginning and 214.1MB in the end (delta: 76.2kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-08 00:08:00,920 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 1.29ms. Allocated memory is still 201.3MB. Free memory is still 123.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 392.56ms. Allocated memory is still 142.6MB. Free memory was 109.9MB in the beginning and 87.9MB in the end (delta: 22.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 107.22ms. Allocated memory is still 142.6MB. Free memory was 87.4MB in the beginning and 73.0MB in the end (delta: 14.4MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 121.22ms. Allocated memory is still 142.6MB. Free memory was 73.0MB in the beginning and 64.6MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * IcfgBuilder took 1459.97ms. Allocated memory is still 142.6MB. Free memory was 64.6MB in the beginning and 55.2MB in the end (delta: 9.5MB). Peak memory consumption was 46.6MB. Max. memory is 16.1GB. * TraceAbstraction took 18284.32ms. Allocated memory was 142.6MB in the beginning and 570.4MB in the end (delta: 427.8MB). Free memory was 55.2MB in the beginning and 214.2MB in the end (delta: -159.1MB). Peak memory consumption was 268.4MB. Max. memory is 16.1GB. * Witness Printer took 3.66ms. Allocated memory is still 570.4MB. Free memory was 214.2MB in the beginning and 214.1MB in the end (delta: 76.2kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseAnd at line 296, overapproximation of bitwiseAnd at line 157, overapproximation of bitwiseAnd at line 152. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 31); [L30] const SORT_9 msb_SORT_9 = (SORT_9)1 << (31 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 16); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (16 - 1); [L35] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 8); [L36] const SORT_12 msb_SORT_12 = (SORT_12)1 << (8 - 1); [L38] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 32); [L39] const SORT_20 msb_SORT_20 = (SORT_20)1 << (32 - 1); [L41] const SORT_23 mask_SORT_23 = (SORT_23)-1 >> (sizeof(SORT_23) * 8 - 17); [L42] const SORT_23 msb_SORT_23 = (SORT_23)1 << (17 - 1); [L44] const SORT_26 mask_SORT_26 = (SORT_26)-1 >> (sizeof(SORT_26) * 8 - 18); [L45] const SORT_26 msb_SORT_26 = (SORT_26)1 << (18 - 1); [L47] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 19); [L48] const SORT_29 msb_SORT_29 = (SORT_29)1 << (19 - 1); [L50] const SORT_32 mask_SORT_32 = (SORT_32)-1 >> (sizeof(SORT_32) * 8 - 20); [L51] const SORT_32 msb_SORT_32 = (SORT_32)1 << (20 - 1); [L53] const SORT_35 mask_SORT_35 = (SORT_35)-1 >> (sizeof(SORT_35) * 8 - 21); [L54] const SORT_35 msb_SORT_35 = (SORT_35)1 << (21 - 1); [L56] const SORT_38 mask_SORT_38 = (SORT_38)-1 >> (sizeof(SORT_38) * 8 - 22); [L57] const SORT_38 msb_SORT_38 = (SORT_38)1 << (22 - 1); [L59] const SORT_41 mask_SORT_41 = (SORT_41)-1 >> (sizeof(SORT_41) * 8 - 23); [L60] const SORT_41 msb_SORT_41 = (SORT_41)1 << (23 - 1); [L62] const SORT_44 mask_SORT_44 = (SORT_44)-1 >> (sizeof(SORT_44) * 8 - 24); [L63] const SORT_44 msb_SORT_44 = (SORT_44)1 << (24 - 1); [L65] const SORT_47 mask_SORT_47 = (SORT_47)-1 >> (sizeof(SORT_47) * 8 - 25); [L66] const SORT_47 msb_SORT_47 = (SORT_47)1 << (25 - 1); [L68] const SORT_50 mask_SORT_50 = (SORT_50)-1 >> (sizeof(SORT_50) * 8 - 26); [L69] const SORT_50 msb_SORT_50 = (SORT_50)1 << (26 - 1); [L71] const SORT_53 mask_SORT_53 = (SORT_53)-1 >> (sizeof(SORT_53) * 8 - 27); [L72] const SORT_53 msb_SORT_53 = (SORT_53)1 << (27 - 1); [L74] const SORT_56 mask_SORT_56 = (SORT_56)-1 >> (sizeof(SORT_56) * 8 - 28); [L75] const SORT_56 msb_SORT_56 = (SORT_56)1 << (28 - 1); [L77] const SORT_59 mask_SORT_59 = (SORT_59)-1 >> (sizeof(SORT_59) * 8 - 29); [L78] const SORT_59 msb_SORT_59 = (SORT_59)1 << (29 - 1); [L80] const SORT_62 mask_SORT_62 = (SORT_62)-1 >> (sizeof(SORT_62) * 8 - 30); [L81] const SORT_62 msb_SORT_62 = (SORT_62)1 << (30 - 1); [L83] const SORT_72 mask_SORT_72 = (SORT_72)-1 >> (sizeof(SORT_72) * 8 - 3); [L84] const SORT_72 msb_SORT_72 = (SORT_72)1 << (3 - 1); [L86] const SORT_96 mask_SORT_96 = (SORT_96)-1 >> (sizeof(SORT_96) * 8 - 4); [L87] const SORT_96 msb_SORT_96 = (SORT_96)1 << (4 - 1); [L89] const SORT_101 mask_SORT_101 = (SORT_101)-1 >> (sizeof(SORT_101) * 8 - 6); [L90] const SORT_101 msb_SORT_101 = (SORT_101)1 << (6 - 1); [L92] const SORT_1 var_7 = 0; [L93] const SORT_1 var_8 = 1; [L94] const SORT_9 var_10 = 0; [L95] const SORT_12 var_13 = 0; [L96] const SORT_12 var_14 = 200; [L97] const SORT_72 var_73 = 5; [L98] const SORT_11 var_75 = 0; [L99] const SORT_11 var_108 = 200; [L100] const SORT_72 var_113 = 4; [L101] const SORT_72 var_116 = 6; [L102] const SORT_96 var_120 = 9; [L103] const SORT_72 var_137 = 0; [L104] const SORT_96 var_140 = 0; [L106] SORT_1 input_2; [L107] SORT_1 input_3; [L108] SORT_1 input_4; [L110] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L110] SORT_1 state_5 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L111] EXPR __VERIFIER_nondet_ushort() & mask_SORT_11 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_5=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L111] SORT_11 state_17 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L112] EXPR __VERIFIER_nondet_ushort() & mask_SORT_11 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_17=0, state_5=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L112] SORT_11 state_76 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L113] EXPR __VERIFIER_nondet_uchar() & mask_SORT_96 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_17=0, state_5=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L113] SORT_96 state_97 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L114] EXPR __VERIFIER_nondet_uchar() & mask_SORT_96 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_17=0, state_5=1, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L114] SORT_96 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L116] SORT_11 init_77_arg_1 = var_75; [L117] state_76 = init_77_arg_1 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_5=1, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] EXPR input_3 & mask_SORT_1 VAL [mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_5=1, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] EXPR input_4 & mask_SORT_1 VAL [input_3=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_5=1, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; VAL [input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_86_arg_0=1, var_86_arg_1=-255, var_8=1] [L132] EXPR var_86_arg_0 | var_86_arg_1 VAL [input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] EXPR var_86 & mask_SORT_1 VAL [input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_88_arg_0=1, var_8=1] [L137] EXPR var_88_arg_0 & mask_SORT_1 VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1, var_90_arg_0=0, var_90_arg_1=1] [L144] EXPR var_90_arg_0 ^ var_90_arg_1 VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1, var_93_arg_0=-2, var_93_arg_1=-2] [L151] EXPR var_93_arg_0 | var_93_arg_1 VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] EXPR var_93 & mask_SORT_1 VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_74_arg_0=5, var_75=0, var_7=0, var_8=1] [L157] EXPR var_74_arg_0 & mask_SORT_72 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_7=0, var_8=1] [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_15=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L166] EXPR var_15 & mask_SORT_12 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_16_arg_0=0, var_16_arg_1=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L169] EXPR ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_18=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L173] EXPR var_18 & mask_SORT_11 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_18=0, var_21_arg_0=0, var_21_arg_1=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L178] EXPR ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_18=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] EXPR var_21 & mask_SORT_20 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_18=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_24_arg_0=0, var_24_arg_1=0, var_25=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L212] EXPR ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_25=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] EXPR var_24 & mask_SORT_23 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_25=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_27_arg_0=0, var_27_arg_1=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L216] EXPR ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] EXPR var_27 & mask_SORT_26 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_28=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_30_arg_0=0, var_30_arg_1=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L220] EXPR ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] EXPR var_30 & mask_SORT_29 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_31=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_33_arg_0=0, var_33_arg_1=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L224] EXPR ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] EXPR var_33 & mask_SORT_32 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_34=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_36_arg_0=0, var_36_arg_1=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L228] EXPR ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] EXPR var_36 & mask_SORT_35 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_37=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_39_arg_0=0, var_39_arg_1=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L232] EXPR ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] EXPR var_39 & mask_SORT_38 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_40=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_42_arg_0=0, var_42_arg_1=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L236] EXPR ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] EXPR var_42 & mask_SORT_41 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_43=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_45_arg_0=0, var_45_arg_1=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L240] EXPR ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] EXPR var_45 & mask_SORT_44 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_46=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L244] EXPR ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] EXPR var_48 & mask_SORT_47 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_49=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L248] EXPR ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] EXPR var_51 & mask_SORT_50 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_52=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_54_arg_0=0, var_54_arg_1=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L252] EXPR ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] EXPR var_54 & mask_SORT_53 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_55=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_57_arg_0=0, var_57_arg_1=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L256] EXPR ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] EXPR var_57 & mask_SORT_56 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_58=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_60_arg_0=0, var_60_arg_1=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L260] EXPR ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] EXPR var_60 & mask_SORT_59 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_61=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_63_arg_0=0, var_63_arg_1=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L264] EXPR ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] EXPR var_63 & mask_SORT_62 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_64=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_65_arg_0=0, var_65_arg_1=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L268] EXPR ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_66_arg_0=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L270] EXPR var_66_arg_0 & mask_SORT_9 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_21=0, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L279] EXPR var_68 & mask_SORT_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_69_arg_0=0, var_69_arg_1=1, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L282] EXPR var_69_arg_0 ^ var_69_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_73=5, var_75=0, var_78=0, var_7=0, var_8=1] [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_73=5, var_75=0, var_7=0, var_82_arg_0=-2, var_82_arg_1=-2, var_8=1] [L295] EXPR var_82_arg_0 & var_82_arg_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_73=5, var_75=0, var_7=0, var_8=1] [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] EXPR var_82 & mask_SORT_1 VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=65535, mask_SORT_12=255, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=0, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=200, var_68=1, var_73=5, var_75=0, var_7=0, var_8=1] [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 278 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 18.1s, OverallIterations: 19, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 5.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 7477 SdHoareTripleChecker+Valid, 4.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 7465 mSDsluCounter, 25115 SdHoareTripleChecker+Invalid, 4.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 19214 mSDsCounter, 34 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 8525 IncrementalHoareTripleChecker+Invalid, 8559 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 34 mSolverCounterUnsat, 5901 mSDtfsCounter, 8525 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 396 GetRequests, 296 SyntacticMatches, 0 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=808occurred in iteration=16, InterpolantAutomatonStates: 110, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 18 MinimizatonAttempts, 1114 StatesRemovedByMinimization, 7 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 2.0s SatisfiabilityAnalysisTime, 8.0s InterpolantComputationTime, 2691 NumberOfCodeBlocks, 2691 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 2538 ConstructedInterpolants, 0 QuantifiedInterpolants, 8035 SizeOfPredicates, 0 NumberOfNonLiveVariables, 1377 ConjunctsInSsa, 12 ConjunctsInUnsatCore, 20 InterpolantComputations, 18 PerfectInterpolantSequences, 75/80 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2025-02-08 00:08:00,939 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 37235873cdbfb4a92a6d9a366e7d975c617138dc8eee2f80d6fd06796710e280 --- Real Ultimate output --- This is Ultimate 0.3.0-?-48c9605-m [2025-02-08 00:08:03,302 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-08 00:08:03,422 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2025-02-08 00:08:03,430 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-08 00:08:03,430 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-08 00:08:03,466 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-08 00:08:03,467 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-08 00:08:03,467 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-08 00:08:03,468 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-08 00:08:03,468 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-08 00:08:03,468 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-02-08 00:08:03,468 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-02-08 00:08:03,469 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-08 00:08:03,469 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-08 00:08:03,469 INFO L153 SettingsManager]: * Use SBE=true [2025-02-08 00:08:03,469 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-08 00:08:03,469 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-02-08 00:08:03,469 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-08 00:08:03,471 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-02-08 00:08:03,471 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-08 00:08:03,472 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-08 00:08:03,472 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-02-08 00:08:03,472 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-02-08 00:08:03,473 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-02-08 00:08:03,473 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2025-02-08 00:08:03,473 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2025-02-08 00:08:03,473 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-02-08 00:08:03,474 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-02-08 00:08:03,474 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-02-08 00:08:03,474 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-02-08 00:08:03,474 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 37235873cdbfb4a92a6d9a366e7d975c617138dc8eee2f80d6fd06796710e280 [2025-02-08 00:08:03,772 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-08 00:08:03,779 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-08 00:08:03,781 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-08 00:08:03,782 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-08 00:08:03,782 INFO L274 PluginConnector]: CDTParser initialized [2025-02-08 00:08:03,783 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2025-02-08 00:08:05,087 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/0c8f04e94/c4220944626a44ef8a9a47d385d4bab5/FLAG9dc4d5538 [2025-02-08 00:08:05,311 INFO L384 CDTParser]: Found 1 translation units. [2025-02-08 00:08:05,312 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2025-02-08 00:08:05,323 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/0c8f04e94/c4220944626a44ef8a9a47d385d4bab5/FLAG9dc4d5538 [2025-02-08 00:08:05,344 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/0c8f04e94/c4220944626a44ef8a9a47d385d4bab5 [2025-02-08 00:08:05,347 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-08 00:08:05,349 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-08 00:08:05,350 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-08 00:08:05,351 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-08 00:08:05,354 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-08 00:08:05,355 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,355 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@76a0d723 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05, skipping insertion in model container [2025-02-08 00:08:05,356 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,379 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-08 00:08:05,504 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c[1289,1302] [2025-02-08 00:08:05,645 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 00:08:05,660 INFO L200 MainTranslator]: Completed pre-run [2025-02-08 00:08:05,670 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.unsafe_analog_estimation_convergence.c[1289,1302] [2025-02-08 00:08:05,755 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 00:08:05,777 INFO L204 MainTranslator]: Completed translation [2025-02-08 00:08:05,778 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05 WrapperNode [2025-02-08 00:08:05,778 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-08 00:08:05,779 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-08 00:08:05,779 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-08 00:08:05,779 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-08 00:08:05,788 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,803 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,853 INFO L138 Inliner]: procedures = 17, calls = 10, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 374 [2025-02-08 00:08:05,857 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-08 00:08:05,857 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-08 00:08:05,857 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-08 00:08:05,857 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-08 00:08:05,867 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,868 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,878 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,903 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-08 00:08:05,907 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,907 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,922 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,927 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,929 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,934 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,937 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-08 00:08:05,941 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-08 00:08:05,942 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-08 00:08:05,942 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-08 00:08:05,943 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (1/1) ... [2025-02-08 00:08:05,952 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-08 00:08:05,968 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:08:05,982 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-02-08 00:08:05,989 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-02-08 00:08:06,008 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-08 00:08:06,008 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2025-02-08 00:08:06,009 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2025-02-08 00:08:06,009 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2025-02-08 00:08:06,009 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-08 00:08:06,009 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-08 00:08:06,120 INFO L257 CfgBuilder]: Building ICFG [2025-02-08 00:08:06,122 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-08 00:08:06,522 INFO L? ?]: Removed 174 outVars from TransFormulas that were not future-live. [2025-02-08 00:08:06,523 INFO L308 CfgBuilder]: Performing block encoding [2025-02-08 00:08:06,529 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-08 00:08:06,530 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-08 00:08:06,530 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 12:08:06 BoogieIcfgContainer [2025-02-08 00:08:06,530 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-08 00:08:06,532 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-02-08 00:08:06,532 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-02-08 00:08:06,536 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-02-08 00:08:06,537 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.02 12:08:05" (1/3) ... [2025-02-08 00:08:06,537 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@13746eac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.02 12:08:06, skipping insertion in model container [2025-02-08 00:08:06,537 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:08:05" (2/3) ... [2025-02-08 00:08:06,537 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@13746eac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.02 12:08:06, skipping insertion in model container [2025-02-08 00:08:06,538 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 12:08:06" (3/3) ... [2025-02-08 00:08:06,538 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.unsafe_analog_estimation_convergence.c [2025-02-08 00:08:06,549 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-02-08 00:08:06,551 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.unsafe_analog_estimation_convergence.c that has 2 procedures, 16 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-02-08 00:08:06,595 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-02-08 00:08:06,607 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7d8f3dc1, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-02-08 00:08:06,607 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-02-08 00:08:06,612 INFO L276 IsEmpty]: Start isEmpty. Operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 12 states have internal predecessors, (15), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:08:06,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2025-02-08 00:08:06,619 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:08:06,620 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:08:06,620 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:08:06,624 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:08:06,625 INFO L85 PathProgramCache]: Analyzing trace with hash -1033963705, now seen corresponding path program 1 times [2025-02-08 00:08:06,634 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-02-08 00:08:06,634 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1117358142] [2025-02-08 00:08:06,634 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:08:06,635 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:06,635 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:08:06,639 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 00:08:06,640 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-02-08 00:08:06,828 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 16 statements into 1 equivalence classes. [2025-02-08 00:08:06,878 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 16 of 16 statements. [2025-02-08 00:08:06,879 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:08:06,879 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:06,885 INFO L256 TraceCheckSpWp]: Trace formula consists of 240 conjuncts, 1 conjuncts are in the unsatisfiable core [2025-02-08 00:08:06,890 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:06,910 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-08 00:08:06,910 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-08 00:08:06,911 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2025-02-08 00:08:06,911 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1117358142] [2025-02-08 00:08:06,911 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1117358142] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:08:06,911 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:08:06,913 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 00:08:06,914 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [138826141] [2025-02-08 00:08:06,915 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:08:06,917 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-02-08 00:08:06,918 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2025-02-08 00:08:06,931 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-02-08 00:08:06,933 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-08 00:08:06,935 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 12 states have internal predecessors, (15), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 2 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:08:06,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:08:06,946 INFO L93 Difference]: Finished difference Result 29 states and 38 transitions. [2025-02-08 00:08:06,947 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-02-08 00:08:06,948 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 16 [2025-02-08 00:08:06,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:08:06,952 INFO L225 Difference]: With dead ends: 29 [2025-02-08 00:08:06,952 INFO L226 Difference]: Without dead ends: 14 [2025-02-08 00:08:06,955 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-08 00:08:06,957 INFO L435 NwaCegarLoop]: 15 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 15 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-08 00:08:06,960 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-08 00:08:06,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2025-02-08 00:08:06,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2025-02-08 00:08:06,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:08:06,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2025-02-08 00:08:06,987 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 15 transitions. Word has length 16 [2025-02-08 00:08:06,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:08:06,987 INFO L471 AbstractCegarLoop]: Abstraction has 14 states and 15 transitions. [2025-02-08 00:08:06,988 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-08 00:08:06,988 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2025-02-08 00:08:06,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2025-02-08 00:08:06,990 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:08:06,990 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:08:07,000 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2025-02-08 00:08:07,191 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:07,192 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:08:07,192 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:08:07,192 INFO L85 PathProgramCache]: Analyzing trace with hash -876251835, now seen corresponding path program 1 times [2025-02-08 00:08:07,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-02-08 00:08:07,193 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1181937813] [2025-02-08 00:08:07,193 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:08:07,193 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:07,193 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:08:07,196 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 00:08:07,197 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-02-08 00:08:07,360 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 16 statements into 1 equivalence classes. [2025-02-08 00:08:07,416 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 16 of 16 statements. [2025-02-08 00:08:07,416 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:08:07,416 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:07,425 INFO L256 TraceCheckSpWp]: Trace formula consists of 240 conjuncts, 23 conjuncts are in the unsatisfiable core [2025-02-08 00:08:07,430 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:07,745 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-02-08 00:08:07,746 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 00:08:07,988 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2025-02-08 00:08:07,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1181937813] [2025-02-08 00:08:07,989 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1181937813] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:08:07,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [873105844] [2025-02-08 00:08:07,989 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:08:07,989 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2025-02-08 00:08:07,989 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 [2025-02-08 00:08:07,991 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2025-02-08 00:08:07,993 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (4)] Waiting until timeout for monitored process [2025-02-08 00:08:08,154 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 16 statements into 1 equivalence classes. [2025-02-08 00:08:08,272 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 16 of 16 statements. [2025-02-08 00:08:08,273 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:08:08,273 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:08,279 INFO L256 TraceCheckSpWp]: Trace formula consists of 240 conjuncts, 23 conjuncts are in the unsatisfiable core [2025-02-08 00:08:08,284 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:08,484 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-08 00:08:08,484 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-08 00:08:08,484 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [873105844] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:08:08,484 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-08 00:08:08,484 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 8 [2025-02-08 00:08:08,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [972858489] [2025-02-08 00:08:08,485 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:08:08,485 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-08 00:08:08,485 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2025-02-08 00:08:08,486 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 00:08:08,486 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2025-02-08 00:08:08,486 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. Second operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:08:08,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:08:08,571 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2025-02-08 00:08:08,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:08:08,572 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 16 [2025-02-08 00:08:08,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:08:08,573 INFO L225 Difference]: With dead ends: 23 [2025-02-08 00:08:08,573 INFO L226 Difference]: Without dead ends: 21 [2025-02-08 00:08:08,574 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2025-02-08 00:08:08,575 INFO L435 NwaCegarLoop]: 10 mSDtfsCounter, 2 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-08 00:08:08,575 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 29 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-08 00:08:08,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2025-02-08 00:08:08,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 20. [2025-02-08 00:08:08,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 14 states have (on average 1.0714285714285714) internal successors, (15), 14 states have internal predecessors, (15), 4 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2025-02-08 00:08:08,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 23 transitions. [2025-02-08 00:08:08,583 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 23 transitions. Word has length 16 [2025-02-08 00:08:08,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:08:08,584 INFO L471 AbstractCegarLoop]: Abstraction has 20 states and 23 transitions. [2025-02-08 00:08:08,585 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-08 00:08:08,585 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 23 transitions. [2025-02-08 00:08:08,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2025-02-08 00:08:08,586 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:08:08,587 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2025-02-08 00:08:08,595 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2025-02-08 00:08:08,792 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (4)] Ended with exit code 0 [2025-02-08 00:08:08,987 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,4 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt [2025-02-08 00:08:08,988 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:08:08,988 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:08:08,988 INFO L85 PathProgramCache]: Analyzing trace with hash 1605363981, now seen corresponding path program 1 times [2025-02-08 00:08:08,989 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-02-08 00:08:08,989 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [286106074] [2025-02-08 00:08:08,989 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:08:08,989 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:08,989 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:08:08,994 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 00:08:08,995 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-02-08 00:08:09,151 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 31 statements into 1 equivalence classes. [2025-02-08 00:08:09,209 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 31 of 31 statements. [2025-02-08 00:08:09,209 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:08:09,209 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:09,219 INFO L256 TraceCheckSpWp]: Trace formula consists of 409 conjuncts, 27 conjuncts are in the unsatisfiable core [2025-02-08 00:08:09,225 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:09,494 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2025-02-08 00:08:09,495 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 00:08:09,618 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2025-02-08 00:08:09,618 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [286106074] [2025-02-08 00:08:09,619 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [286106074] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:08:09,619 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [353399102] [2025-02-08 00:08:09,619 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:08:09,619 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2025-02-08 00:08:09,619 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 [2025-02-08 00:08:09,624 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2025-02-08 00:08:09,637 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (6)] Waiting until timeout for monitored process [2025-02-08 00:08:09,917 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 31 statements into 1 equivalence classes. [2025-02-08 00:08:10,102 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 31 of 31 statements. [2025-02-08 00:08:10,102 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:08:10,102 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:10,132 INFO L256 TraceCheckSpWp]: Trace formula consists of 409 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-02-08 00:08:10,144 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:10,422 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2025-02-08 00:08:10,422 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 00:08:10,533 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [353399102] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:08:10,533 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-02-08 00:08:10,533 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 6 [2025-02-08 00:08:10,534 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2038380240] [2025-02-08 00:08:10,534 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2025-02-08 00:08:10,534 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:08:10,534 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2025-02-08 00:08:10,535 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:08:10,535 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:08:10,535 INFO L87 Difference]: Start difference. First operand 20 states and 23 transitions. Second operand has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2025-02-08 00:08:10,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:08:10,721 INFO L93 Difference]: Finished difference Result 30 states and 35 transitions. [2025-02-08 00:08:10,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:08:10,722 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 31 [2025-02-08 00:08:10,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:08:10,723 INFO L225 Difference]: With dead ends: 30 [2025-02-08 00:08:10,723 INFO L226 Difference]: Without dead ends: 28 [2025-02-08 00:08:10,723 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 61 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90 [2025-02-08 00:08:10,724 INFO L435 NwaCegarLoop]: 10 mSDtfsCounter, 2 mSDsluCounter, 26 mSDsCounter, 0 mSdLazyCounter, 28 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 28 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-08 00:08:10,724 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 36 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 28 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-08 00:08:10,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2025-02-08 00:08:10,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 27. [2025-02-08 00:08:10,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 19 states have (on average 1.0526315789473684) internal successors, (20), 19 states have internal predecessors, (20), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-08 00:08:10,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 32 transitions. [2025-02-08 00:08:10,730 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 32 transitions. Word has length 31 [2025-02-08 00:08:10,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:08:10,730 INFO L471 AbstractCegarLoop]: Abstraction has 27 states and 32 transitions. [2025-02-08 00:08:10,730 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.6666666666666665) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2025-02-08 00:08:10,730 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 32 transitions. [2025-02-08 00:08:10,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2025-02-08 00:08:10,731 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:08:10,731 INFO L218 NwaCegarLoop]: trace histogram [6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1] [2025-02-08 00:08:10,743 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (6)] Ended with exit code 0 [2025-02-08 00:08:10,942 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2025-02-08 00:08:11,134 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt,5 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:11,134 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:08:11,135 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:08:11,135 INFO L85 PathProgramCache]: Analyzing trace with hash -81367995, now seen corresponding path program 2 times [2025-02-08 00:08:11,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-02-08 00:08:11,140 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2083471893] [2025-02-08 00:08:11,140 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 00:08:11,140 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:11,140 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:08:11,145 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 00:08:11,158 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-02-08 00:08:11,407 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 46 statements into 2 equivalence classes. [2025-02-08 00:08:11,541 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 46 of 46 statements. [2025-02-08 00:08:11,542 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-08 00:08:11,542 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:11,554 INFO L256 TraceCheckSpWp]: Trace formula consists of 578 conjuncts, 25 conjuncts are in the unsatisfiable core [2025-02-08 00:08:11,562 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:11,995 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2025-02-08 00:08:11,995 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 00:08:12,115 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2025-02-08 00:08:12,117 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2083471893] [2025-02-08 00:08:12,117 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2083471893] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:08:12,117 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [688305475] [2025-02-08 00:08:12,117 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 00:08:12,117 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2025-02-08 00:08:12,117 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 [2025-02-08 00:08:12,119 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2025-02-08 00:08:12,121 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process [2025-02-08 00:08:12,434 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 46 statements into 2 equivalence classes. [2025-02-08 00:08:12,836 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 46 of 46 statements. [2025-02-08 00:08:12,836 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-08 00:08:12,836 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:12,854 INFO L256 TraceCheckSpWp]: Trace formula consists of 578 conjuncts, 28 conjuncts are in the unsatisfiable core [2025-02-08 00:08:12,860 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:13,212 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2025-02-08 00:08:13,213 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 00:08:13,332 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [688305475] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:08:13,333 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-02-08 00:08:13,333 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2025-02-08 00:08:13,333 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [837260490] [2025-02-08 00:08:13,333 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2025-02-08 00:08:13,334 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:08:13,334 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2025-02-08 00:08:13,335 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:08:13,335 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:08:13,336 INFO L87 Difference]: Start difference. First operand 27 states and 32 transitions. Second operand has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2025-02-08 00:08:13,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:08:13,615 INFO L93 Difference]: Finished difference Result 37 states and 44 transitions. [2025-02-08 00:08:13,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-08 00:08:13,617 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 46 [2025-02-08 00:08:13,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:08:13,618 INFO L225 Difference]: With dead ends: 37 [2025-02-08 00:08:13,618 INFO L226 Difference]: Without dead ends: 35 [2025-02-08 00:08:13,618 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 91 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2025-02-08 00:08:13,619 INFO L435 NwaCegarLoop]: 14 mSDtfsCounter, 2 mSDsluCounter, 31 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 45 SdHoareTripleChecker+Invalid, 44 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-02-08 00:08:13,619 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 45 Invalid, 44 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-02-08 00:08:13,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2025-02-08 00:08:13,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2025-02-08 00:08:13,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 24 states have (on average 1.0416666666666667) internal successors, (25), 24 states have internal predecessors, (25), 8 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2025-02-08 00:08:13,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 41 transitions. [2025-02-08 00:08:13,633 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 41 transitions. Word has length 46 [2025-02-08 00:08:13,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:08:13,635 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 41 transitions. [2025-02-08 00:08:13,635 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.1666666666666665) internal successors, (19), 6 states have internal predecessors, (19), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2025-02-08 00:08:13,635 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 41 transitions. [2025-02-08 00:08:13,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2025-02-08 00:08:13,636 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:08:13,638 INFO L218 NwaCegarLoop]: trace histogram [8, 8, 8, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1] [2025-02-08 00:08:13,650 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2025-02-08 00:08:13,850 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (8)] Ended with exit code 0 [2025-02-08 00:08:14,042 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,8 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt [2025-02-08 00:08:14,042 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:08:14,042 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:08:14,043 INFO L85 PathProgramCache]: Analyzing trace with hash 1096946189, now seen corresponding path program 3 times [2025-02-08 00:08:14,043 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-02-08 00:08:14,043 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [546382275] [2025-02-08 00:08:14,043 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 00:08:14,043 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:14,043 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:08:14,046 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 00:08:14,047 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-02-08 00:08:14,304 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 61 statements into 6 equivalence classes. [2025-02-08 00:08:14,464 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) and asserted 55 of 61 statements. [2025-02-08 00:08:14,464 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2025-02-08 00:08:14,464 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:14,481 INFO L256 TraceCheckSpWp]: Trace formula consists of 724 conjuncts, 27 conjuncts are in the unsatisfiable core [2025-02-08 00:08:14,489 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:14,943 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2025-02-08 00:08:14,944 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 00:08:15,049 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2025-02-08 00:08:15,049 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [546382275] [2025-02-08 00:08:15,049 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [546382275] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:08:15,049 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1166127293] [2025-02-08 00:08:15,049 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 00:08:15,049 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2025-02-08 00:08:15,049 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 [2025-02-08 00:08:15,051 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2025-02-08 00:08:15,053 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (10)] Waiting until timeout for monitored process [2025-02-08 00:08:15,435 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 61 statements into 6 equivalence classes. [2025-02-08 00:08:15,886 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) and asserted 55 of 61 statements. [2025-02-08 00:08:15,886 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2025-02-08 00:08:15,886 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:15,920 INFO L256 TraceCheckSpWp]: Trace formula consists of 724 conjuncts, 34 conjuncts are in the unsatisfiable core [2025-02-08 00:08:15,925 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:16,281 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2025-02-08 00:08:16,281 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 00:08:16,373 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1166127293] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:08:16,373 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-02-08 00:08:16,373 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2025-02-08 00:08:16,374 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1501757323] [2025-02-08 00:08:16,374 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2025-02-08 00:08:16,374 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-08 00:08:16,374 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2025-02-08 00:08:16,375 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 00:08:16,375 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2025-02-08 00:08:16,375 INFO L87 Difference]: Start difference. First operand 34 states and 41 transitions. Second operand has 7 states, 7 states have (on average 3.4285714285714284) internal successors, (24), 7 states have internal predecessors, (24), 4 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2025-02-08 00:08:16,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:08:16,670 INFO L93 Difference]: Finished difference Result 44 states and 53 transitions. [2025-02-08 00:08:16,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 00:08:16,670 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.4285714285714284) internal successors, (24), 7 states have internal predecessors, (24), 4 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) Word has length 61 [2025-02-08 00:08:16,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:08:16,671 INFO L225 Difference]: With dead ends: 44 [2025-02-08 00:08:16,671 INFO L226 Difference]: Without dead ends: 42 [2025-02-08 00:08:16,672 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2025-02-08 00:08:16,672 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 2 mSDsluCounter, 73 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-02-08 00:08:16,673 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 95 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-02-08 00:08:16,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2025-02-08 00:08:16,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2025-02-08 00:08:16,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2025-02-08 00:08:16,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 50 transitions. [2025-02-08 00:08:16,683 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 50 transitions. Word has length 61 [2025-02-08 00:08:16,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:08:16,683 INFO L471 AbstractCegarLoop]: Abstraction has 41 states and 50 transitions. [2025-02-08 00:08:16,684 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.4285714285714284) internal successors, (24), 7 states have internal predecessors, (24), 4 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2025-02-08 00:08:16,684 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 50 transitions. [2025-02-08 00:08:16,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2025-02-08 00:08:16,685 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:08:16,686 INFO L218 NwaCegarLoop]: trace histogram [10, 10, 10, 5, 5, 5, 5, 5, 5, 5, 4, 4, 1, 1, 1] [2025-02-08 00:08:16,697 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (10)] Forceful destruction successful, exit code 0 [2025-02-08 00:08:16,897 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2025-02-08 00:08:17,086 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt,9 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:17,087 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:08:17,087 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:08:17,087 INFO L85 PathProgramCache]: Analyzing trace with hash -1682103483, now seen corresponding path program 4 times [2025-02-08 00:08:17,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-02-08 00:08:17,088 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1428016679] [2025-02-08 00:08:17,088 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 00:08:17,088 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:17,088 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:08:17,093 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 00:08:17,095 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-02-08 00:08:17,407 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 76 statements into 2 equivalence classes. [2025-02-08 00:08:17,550 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 76 of 76 statements. [2025-02-08 00:08:17,550 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 00:08:17,550 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:17,565 INFO L256 TraceCheckSpWp]: Trace formula consists of 916 conjuncts, 31 conjuncts are in the unsatisfiable core [2025-02-08 00:08:17,570 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:18,138 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2025-02-08 00:08:18,138 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 00:08:18,249 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2025-02-08 00:08:18,249 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1428016679] [2025-02-08 00:08:18,249 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1428016679] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:08:18,249 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [2044804095] [2025-02-08 00:08:18,249 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 00:08:18,249 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2025-02-08 00:08:18,250 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 [2025-02-08 00:08:18,253 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2025-02-08 00:08:18,254 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (12)] Waiting until timeout for monitored process [2025-02-08 00:08:18,751 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 76 statements into 2 equivalence classes. [2025-02-08 00:08:19,267 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 76 of 76 statements. [2025-02-08 00:08:19,267 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 00:08:19,267 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:19,307 INFO L256 TraceCheckSpWp]: Trace formula consists of 916 conjuncts, 33 conjuncts are in the unsatisfiable core [2025-02-08 00:08:19,312 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:19,700 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2025-02-08 00:08:19,700 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 00:08:19,791 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [2044804095] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:08:19,792 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-02-08 00:08:19,792 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 9 [2025-02-08 00:08:19,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396583726] [2025-02-08 00:08:19,792 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2025-02-08 00:08:19,792 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2025-02-08 00:08:19,792 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2025-02-08 00:08:19,793 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-08 00:08:19,793 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-02-08 00:08:19,793 INFO L87 Difference]: Start difference. First operand 41 states and 50 transitions. Second operand has 9 states, 9 states have (on average 3.4444444444444446) internal successors, (31), 9 states have internal predecessors, (31), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) [2025-02-08 00:08:20,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:08:20,236 INFO L93 Difference]: Finished difference Result 51 states and 62 transitions. [2025-02-08 00:08:20,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-02-08 00:08:20,237 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 3.4444444444444446) internal successors, (31), 9 states have internal predecessors, (31), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) Word has length 76 [2025-02-08 00:08:20,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:08:20,238 INFO L225 Difference]: With dead ends: 51 [2025-02-08 00:08:20,238 INFO L226 Difference]: Without dead ends: 49 [2025-02-08 00:08:20,238 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 148 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=58, Invalid=182, Unknown=0, NotChecked=0, Total=240 [2025-02-08 00:08:20,239 INFO L435 NwaCegarLoop]: 26 mSDtfsCounter, 2 mSDsluCounter, 114 mSDsCounter, 0 mSdLazyCounter, 228 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 140 SdHoareTripleChecker+Invalid, 232 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 228 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-08 00:08:20,239 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 140 Invalid, 232 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 228 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-08 00:08:20,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2025-02-08 00:08:20,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 48. [2025-02-08 00:08:20,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 34 states have (on average 1.0294117647058822) internal successors, (35), 34 states have internal predecessors, (35), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2025-02-08 00:08:20,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 59 transitions. [2025-02-08 00:08:20,247 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 59 transitions. Word has length 76 [2025-02-08 00:08:20,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:08:20,247 INFO L471 AbstractCegarLoop]: Abstraction has 48 states and 59 transitions. [2025-02-08 00:08:20,248 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.4444444444444446) internal successors, (31), 9 states have internal predecessors, (31), 5 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 5 states have call predecessors, (10), 5 states have call successors, (10) [2025-02-08 00:08:20,248 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 59 transitions. [2025-02-08 00:08:20,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2025-02-08 00:08:20,249 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:08:20,249 INFO L218 NwaCegarLoop]: trace histogram [12, 12, 12, 6, 6, 6, 6, 6, 6, 6, 5, 5, 1, 1, 1] [2025-02-08 00:08:20,264 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (12)] Ended with exit code 0 [2025-02-08 00:08:20,461 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2025-02-08 00:08:20,649 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt,11 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:20,650 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:08:20,650 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:08:20,650 INFO L85 PathProgramCache]: Analyzing trace with hash -408519923, now seen corresponding path program 5 times [2025-02-08 00:08:20,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-02-08 00:08:20,651 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1024370399] [2025-02-08 00:08:20,651 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 00:08:20,651 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:20,651 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:08:20,653 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 00:08:20,654 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-02-08 00:08:21,025 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 91 statements into 9 equivalence classes. [2025-02-08 00:08:21,408 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) and asserted 91 of 91 statements. [2025-02-08 00:08:21,408 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2025-02-08 00:08:21,408 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:21,423 INFO L256 TraceCheckSpWp]: Trace formula consists of 1085 conjuncts, 32 conjuncts are in the unsatisfiable core [2025-02-08 00:08:21,428 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:21,991 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2025-02-08 00:08:21,991 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 00:08:22,081 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2025-02-08 00:08:22,081 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1024370399] [2025-02-08 00:08:22,081 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1024370399] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:08:22,081 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1399618784] [2025-02-08 00:08:22,081 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 00:08:22,081 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2025-02-08 00:08:22,081 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 [2025-02-08 00:08:22,083 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2025-02-08 00:08:22,084 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (14)] Waiting until timeout for monitored process [2025-02-08 00:08:22,686 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 91 statements into 9 equivalence classes. [2025-02-08 00:08:23,438 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) and asserted 91 of 91 statements. [2025-02-08 00:08:23,438 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2025-02-08 00:08:23,438 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:08:23,480 INFO L256 TraceCheckSpWp]: Trace formula consists of 1085 conjuncts, 34 conjuncts are in the unsatisfiable core [2025-02-08 00:08:23,486 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 00:08:24,065 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2025-02-08 00:08:24,065 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 00:08:24,133 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1399618784] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 00:08:24,133 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-02-08 00:08:24,133 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2025-02-08 00:08:24,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [412402167] [2025-02-08 00:08:24,133 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2025-02-08 00:08:24,134 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-02-08 00:08:24,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2025-02-08 00:08:24,134 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-08 00:08:24,134 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2025-02-08 00:08:24,134 INFO L87 Difference]: Start difference. First operand 48 states and 59 transitions. Second operand has 10 states, 10 states have (on average 3.6) internal successors, (36), 10 states have internal predecessors, (36), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) [2025-02-08 00:08:24,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:08:24,543 INFO L93 Difference]: Finished difference Result 58 states and 71 transitions. [2025-02-08 00:08:24,543 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-02-08 00:08:24,543 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.6) internal successors, (36), 10 states have internal predecessors, (36), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) Word has length 91 [2025-02-08 00:08:24,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:08:24,544 INFO L225 Difference]: With dead ends: 58 [2025-02-08 00:08:24,544 INFO L226 Difference]: Without dead ends: 56 [2025-02-08 00:08:24,544 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 177 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=67, Invalid=239, Unknown=0, NotChecked=0, Total=306 [2025-02-08 00:08:24,545 INFO L435 NwaCegarLoop]: 30 mSDtfsCounter, 2 mSDsluCounter, 131 mSDsCounter, 0 mSdLazyCounter, 278 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 161 SdHoareTripleChecker+Invalid, 283 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 278 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-08 00:08:24,545 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 161 Invalid, 283 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 278 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-08 00:08:24,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2025-02-08 00:08:24,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 55. [2025-02-08 00:08:24,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 39 states have (on average 1.0256410256410255) internal successors, (40), 39 states have internal predecessors, (40), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2025-02-08 00:08:24,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 68 transitions. [2025-02-08 00:08:24,552 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 68 transitions. Word has length 91 [2025-02-08 00:08:24,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:08:24,552 INFO L471 AbstractCegarLoop]: Abstraction has 55 states and 68 transitions. [2025-02-08 00:08:24,552 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.6) internal successors, (36), 10 states have internal predecessors, (36), 6 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 6 states have call predecessors, (12), 6 states have call successors, (12) [2025-02-08 00:08:24,552 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 68 transitions. [2025-02-08 00:08:24,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2025-02-08 00:08:24,553 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:08:24,553 INFO L218 NwaCegarLoop]: trace histogram [14, 14, 14, 7, 7, 7, 7, 7, 7, 7, 6, 6, 1, 1, 1] [2025-02-08 00:08:24,570 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt (14)] Ended with exit code 0 [2025-02-08 00:08:24,765 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2025-02-08 00:08:24,954 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/cvc4 --incremental --print-success --lang smt,13 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:24,954 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:08:24,955 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:08:24,955 INFO L85 PathProgramCache]: Analyzing trace with hash -117859771, now seen corresponding path program 6 times [2025-02-08 00:08:24,955 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-02-08 00:08:24,955 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [652019734] [2025-02-08 00:08:24,955 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 00:08:24,956 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:24,956 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:08:24,957 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 00:08:24,959 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-02-08 00:08:25,419 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 106 statements into 10 equivalence classes. [2025-02-08 00:08:26,009 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) and asserted 106 of 106 statements. [2025-02-08 00:08:26,009 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2025-02-08 00:08:26,009 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 00:08:26,009 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 00:08:26,150 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 106 statements into 1 equivalence classes. [2025-02-08 00:08:26,385 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 106 of 106 statements. [2025-02-08 00:08:26,385 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:08:26,385 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 00:08:26,556 INFO L130 FreeRefinementEngine]: Strategy FOX found a feasible trace [2025-02-08 00:08:26,557 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-02-08 00:08:26,557 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-02-08 00:08:26,581 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2025-02-08 00:08:26,761 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 00:08:26,764 INFO L422 BasicCegarLoop]: Path program histogram: [6, 1, 1] [2025-02-08 00:08:26,833 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,833 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,833 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,833 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,833 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,833 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,833 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,872 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-02-08 00:08:26,877 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.02 12:08:26 BoogieIcfgContainer [2025-02-08 00:08:26,877 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-02-08 00:08:26,878 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-08 00:08:26,878 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-08 00:08:26,878 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-08 00:08:26,878 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 12:08:06" (3/4) ... [2025-02-08 00:08:26,879 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-02-08 00:08:26,899 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,899 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,900 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,900 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,900 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,900 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:26,900 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:08:27,021 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 63. [2025-02-08 00:08:27,078 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-08 00:08:27,078 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.yml [2025-02-08 00:08:27,078 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-08 00:08:27,079 INFO L158 Benchmark]: Toolchain (without parser) took 21730.35ms. Allocated memory was 117.4MB in the beginning and 419.4MB in the end (delta: 302.0MB). Free memory was 91.8MB in the beginning and 297.2MB in the end (delta: -205.4MB). Peak memory consumption was 96.4MB. Max. memory is 16.1GB. [2025-02-08 00:08:27,079 INFO L158 Benchmark]: CDTParser took 0.37ms. Allocated memory is still 83.9MB. Free memory was 62.2MB in the beginning and 62.1MB in the end (delta: 34.9kB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 00:08:27,079 INFO L158 Benchmark]: CACSL2BoogieTranslator took 428.22ms. Allocated memory is still 117.4MB. Free memory was 91.6MB in the beginning and 70.3MB in the end (delta: 21.3MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2025-02-08 00:08:27,079 INFO L158 Benchmark]: Boogie Procedure Inliner took 77.87ms. Allocated memory is still 117.4MB. Free memory was 70.3MB in the beginning and 67.1MB in the end (delta: 3.2MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 00:08:27,080 INFO L158 Benchmark]: Boogie Preprocessor took 83.15ms. Allocated memory is still 117.4MB. Free memory was 66.9MB in the beginning and 63.3MB in the end (delta: 3.6MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 00:08:27,080 INFO L158 Benchmark]: IcfgBuilder took 588.95ms. Allocated memory is still 117.4MB. Free memory was 63.3MB in the beginning and 76.2MB in the end (delta: -12.9MB). Peak memory consumption was 39.1MB. Max. memory is 16.1GB. [2025-02-08 00:08:27,080 INFO L158 Benchmark]: TraceAbstraction took 20344.93ms. Allocated memory was 117.4MB in the beginning and 419.4MB in the end (delta: 302.0MB). Free memory was 76.2MB in the beginning and 334.9MB in the end (delta: -258.7MB). Peak memory consumption was 241.8MB. Max. memory is 16.1GB. [2025-02-08 00:08:27,080 INFO L158 Benchmark]: Witness Printer took 200.59ms. Allocated memory is still 419.4MB. Free memory was 334.9MB in the beginning and 297.2MB in the end (delta: 37.7MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2025-02-08 00:08:27,081 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.37ms. Allocated memory is still 83.9MB. Free memory was 62.2MB in the beginning and 62.1MB in the end (delta: 34.9kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 428.22ms. Allocated memory is still 117.4MB. Free memory was 91.6MB in the beginning and 70.3MB in the end (delta: 21.3MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 77.87ms. Allocated memory is still 117.4MB. Free memory was 70.3MB in the beginning and 67.1MB in the end (delta: 3.2MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 83.15ms. Allocated memory is still 117.4MB. Free memory was 66.9MB in the beginning and 63.3MB in the end (delta: 3.6MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 588.95ms. Allocated memory is still 117.4MB. Free memory was 63.3MB in the beginning and 76.2MB in the end (delta: -12.9MB). Peak memory consumption was 39.1MB. Max. memory is 16.1GB. * TraceAbstraction took 20344.93ms. Allocated memory was 117.4MB in the beginning and 419.4MB in the end (delta: 302.0MB). Free memory was 76.2MB in the beginning and 334.9MB in the end (delta: -258.7MB). Peak memory consumption was 241.8MB. Max. memory is 16.1GB. * Witness Printer took 200.59ms. Allocated memory is still 419.4MB. Free memory was 334.9MB in the beginning and 297.2MB in the end (delta: 37.7MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 21]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_9 mask_SORT_9 = (SORT_9)-1 >> (sizeof(SORT_9) * 8 - 31); [L30] const SORT_9 msb_SORT_9 = (SORT_9)1 << (31 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 16); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (16 - 1); [L35] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 8); [L36] const SORT_12 msb_SORT_12 = (SORT_12)1 << (8 - 1); [L38] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 32); [L39] const SORT_20 msb_SORT_20 = (SORT_20)1 << (32 - 1); [L41] const SORT_23 mask_SORT_23 = (SORT_23)-1 >> (sizeof(SORT_23) * 8 - 17); [L42] const SORT_23 msb_SORT_23 = (SORT_23)1 << (17 - 1); [L44] const SORT_26 mask_SORT_26 = (SORT_26)-1 >> (sizeof(SORT_26) * 8 - 18); [L45] const SORT_26 msb_SORT_26 = (SORT_26)1 << (18 - 1); [L47] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 19); [L48] const SORT_29 msb_SORT_29 = (SORT_29)1 << (19 - 1); [L50] const SORT_32 mask_SORT_32 = (SORT_32)-1 >> (sizeof(SORT_32) * 8 - 20); [L51] const SORT_32 msb_SORT_32 = (SORT_32)1 << (20 - 1); [L53] const SORT_35 mask_SORT_35 = (SORT_35)-1 >> (sizeof(SORT_35) * 8 - 21); [L54] const SORT_35 msb_SORT_35 = (SORT_35)1 << (21 - 1); [L56] const SORT_38 mask_SORT_38 = (SORT_38)-1 >> (sizeof(SORT_38) * 8 - 22); [L57] const SORT_38 msb_SORT_38 = (SORT_38)1 << (22 - 1); [L59] const SORT_41 mask_SORT_41 = (SORT_41)-1 >> (sizeof(SORT_41) * 8 - 23); [L60] const SORT_41 msb_SORT_41 = (SORT_41)1 << (23 - 1); [L62] const SORT_44 mask_SORT_44 = (SORT_44)-1 >> (sizeof(SORT_44) * 8 - 24); [L63] const SORT_44 msb_SORT_44 = (SORT_44)1 << (24 - 1); [L65] const SORT_47 mask_SORT_47 = (SORT_47)-1 >> (sizeof(SORT_47) * 8 - 25); [L66] const SORT_47 msb_SORT_47 = (SORT_47)1 << (25 - 1); [L68] const SORT_50 mask_SORT_50 = (SORT_50)-1 >> (sizeof(SORT_50) * 8 - 26); [L69] const SORT_50 msb_SORT_50 = (SORT_50)1 << (26 - 1); [L71] const SORT_53 mask_SORT_53 = (SORT_53)-1 >> (sizeof(SORT_53) * 8 - 27); [L72] const SORT_53 msb_SORT_53 = (SORT_53)1 << (27 - 1); [L74] const SORT_56 mask_SORT_56 = (SORT_56)-1 >> (sizeof(SORT_56) * 8 - 28); [L75] const SORT_56 msb_SORT_56 = (SORT_56)1 << (28 - 1); [L77] const SORT_59 mask_SORT_59 = (SORT_59)-1 >> (sizeof(SORT_59) * 8 - 29); [L78] const SORT_59 msb_SORT_59 = (SORT_59)1 << (29 - 1); [L80] const SORT_62 mask_SORT_62 = (SORT_62)-1 >> (sizeof(SORT_62) * 8 - 30); [L81] const SORT_62 msb_SORT_62 = (SORT_62)1 << (30 - 1); [L83] const SORT_72 mask_SORT_72 = (SORT_72)-1 >> (sizeof(SORT_72) * 8 - 3); [L84] const SORT_72 msb_SORT_72 = (SORT_72)1 << (3 - 1); [L86] const SORT_96 mask_SORT_96 = (SORT_96)-1 >> (sizeof(SORT_96) * 8 - 4); [L87] const SORT_96 msb_SORT_96 = (SORT_96)1 << (4 - 1); [L89] const SORT_101 mask_SORT_101 = (SORT_101)-1 >> (sizeof(SORT_101) * 8 - 6); [L90] const SORT_101 msb_SORT_101 = (SORT_101)1 << (6 - 1); [L92] const SORT_1 var_7 = 0; [L93] const SORT_1 var_8 = 1; [L94] const SORT_9 var_10 = 0; [L95] const SORT_12 var_13 = 0; [L96] const SORT_12 var_14 = 200; [L97] const SORT_72 var_73 = 5; [L98] const SORT_11 var_75 = 0; [L99] const SORT_11 var_108 = 200; [L100] const SORT_72 var_113 = 4; [L101] const SORT_72 var_116 = 6; [L102] const SORT_96 var_120 = 9; [L103] const SORT_72 var_137 = 0; [L104] const SORT_96 var_140 = 0; [L106] SORT_1 input_2; [L107] SORT_1 input_3; [L108] SORT_1 input_4; [L110] SORT_1 state_5 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L111] SORT_11 state_17 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L112] SORT_11 state_76 = __VERIFIER_nondet_ushort() & mask_SORT_11; [L113] SORT_96 state_97 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L114] SORT_96 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_96; [L116] SORT_11 init_77_arg_1 = var_75; [L117] state_76 = init_77_arg_1 VAL [mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=5, state_17=32, state_5=1, state_76=0, state_97=5, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=1, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=5, state_17=32, state_76=0, state_97=5, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=1, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=5, state_17=32, state_76=0, state_97=5, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=1, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=5, state_17=32, state_76=0, state_97=5, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=1, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=5, state_17=32, state_76=0, state_97=5, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=1, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=1, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=1, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=1, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=1, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=1, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=2, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=1, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=2, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=1, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=2, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=1, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=0, state_17=0, state_76=2, state_97=0, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=1, state_17=1, state_76=3, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=1, state_17=1, state_76=3, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=1, state_17=1, state_76=3, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=1, state_17=1, state_76=3, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=2, state_17=0, state_76=4, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=2, state_17=0, state_76=4, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=2, state_17=0, state_76=4, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=2, state_17=0, state_76=4, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=3, state_17=1, state_76=5, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=3, state_17=1, state_76=5, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=3, state_17=1, state_76=5, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=3, state_17=1, state_76=5, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND FALSE !(!(cond)) [L298] RET __VERIFIER_assert(!(bad_83_arg_0)) [L300] SORT_96 var_121_arg_0 = state_100; [L301] SORT_96 var_121_arg_1 = var_120; [L302] SORT_1 var_121 = var_121_arg_0 == var_121_arg_1; [L303] SORT_72 var_114_arg_0 = var_113; [L304] var_114_arg_0 = var_114_arg_0 & mask_SORT_72 [L305] SORT_96 var_114 = var_114_arg_0; [L306] SORT_96 var_115_arg_0 = var_114; [L307] SORT_96 var_115_arg_1 = state_97; [L308] SORT_1 var_115 = var_115_arg_0 <= var_115_arg_1; [L309] SORT_72 var_117_arg_0 = var_116; [L310] var_117_arg_0 = var_117_arg_0 & mask_SORT_72 [L311] SORT_96 var_117 = var_117_arg_0; [L312] SORT_96 var_118_arg_0 = state_97; [L313] SORT_96 var_118_arg_1 = var_117; [L314] SORT_1 var_118 = var_118_arg_0 <= var_118_arg_1; [L315] SORT_1 var_119_arg_0 = var_115; [L316] SORT_1 var_119_arg_1 = var_118; [L317] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L318] SORT_1 var_122_arg_0 = var_121; [L319] SORT_1 var_122_arg_1 = var_119; [L320] SORT_1 var_122_arg_2 = var_8; [L321] SORT_1 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L322] SORT_1 var_123_arg_0 = input_4; [L323] SORT_1 var_123_arg_1 = var_8; [L324] SORT_1 var_123_arg_2 = var_122; [L325] SORT_1 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L326] SORT_1 next_124_arg_1 = var_123; [L327] SORT_1 var_127_arg_0 = var_8; [L328] var_127_arg_0 = var_127_arg_0 & mask_SORT_1 [L329] SORT_11 var_127 = var_127_arg_0; [L330] SORT_11 var_128_arg_0 = state_17; [L331] SORT_11 var_128_arg_1 = var_127; [L332] SORT_11 var_128 = var_128_arg_0 + var_128_arg_1; [L333] SORT_1 var_125_arg_0 = var_8; [L334] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L335] SORT_11 var_125 = var_125_arg_0; [L336] SORT_11 var_126_arg_0 = state_17; [L337] SORT_11 var_126_arg_1 = var_125; [L338] SORT_11 var_126 = var_126_arg_0 - var_126_arg_1; [L339] SORT_1 var_129_arg_0 = var_68; [L340] SORT_11 var_129_arg_1 = var_128; [L341] SORT_11 var_129_arg_2 = var_126; [L342] SORT_11 var_129 = var_129_arg_0 ? var_129_arg_1 : var_129_arg_2; [L343] SORT_1 var_130_arg_0 = input_4; [L344] SORT_11 var_130_arg_1 = var_75; [L345] SORT_11 var_130_arg_2 = var_129; [L346] SORT_11 var_130 = var_130_arg_0 ? var_130_arg_1 : var_130_arg_2; [L347] SORT_11 next_131_arg_1 = var_130; [L348] SORT_1 var_132_arg_0 = var_8; [L349] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L350] SORT_11 var_132 = var_132_arg_0; [L351] SORT_11 var_133_arg_0 = state_76; [L352] SORT_11 var_133_arg_1 = var_132; [L353] SORT_11 var_133 = var_133_arg_0 + var_133_arg_1; [L354] var_133 = var_133 & mask_SORT_11 [L355] SORT_11 next_134_arg_1 = var_133; [L356] SORT_72 var_138_arg_0 = var_137; [L357] SORT_1 var_138_arg_1 = input_3; [L358] SORT_96 var_138 = ((SORT_96)var_138_arg_0 << 1) | var_138_arg_1; [L359] SORT_1 var_135_arg_0 = input_3; [L360] var_135_arg_0 = var_135_arg_0 & mask_SORT_1 [L361] SORT_96 var_135 = var_135_arg_0; [L362] SORT_96 var_136_arg_0 = state_97; [L363] SORT_96 var_136_arg_1 = var_135; [L364] SORT_96 var_136 = var_136_arg_0 + var_136_arg_1; [L365] SORT_1 var_139_arg_0 = var_121; [L366] SORT_96 var_139_arg_1 = var_138; [L367] SORT_96 var_139_arg_2 = var_136; [L368] SORT_96 var_139 = var_139_arg_0 ? var_139_arg_1 : var_139_arg_2; [L369] SORT_1 var_141_arg_0 = input_4; [L370] SORT_96 var_141_arg_1 = var_140; [L371] SORT_96 var_141_arg_2 = var_139; [L372] SORT_96 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L373] var_141 = var_141 & mask_SORT_96 [L374] SORT_96 next_142_arg_1 = var_141; [L375] SORT_1 var_143_arg_0 = var_8; [L376] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L377] SORT_96 var_143 = var_143_arg_0; [L378] SORT_96 var_144_arg_0 = state_100; [L379] SORT_96 var_144_arg_1 = var_143; [L380] SORT_96 var_144 = var_144_arg_0 + var_144_arg_1; [L381] SORT_1 var_145_arg_0 = var_121; [L382] SORT_96 var_145_arg_1 = var_140; [L383] SORT_96 var_145_arg_2 = var_144; [L384] SORT_96 var_145 = var_145_arg_0 ? var_145_arg_1 : var_145_arg_2; [L385] SORT_1 var_146_arg_0 = input_4; [L386] SORT_96 var_146_arg_1 = var_140; [L387] SORT_96 var_146_arg_2 = var_145; [L388] SORT_96 var_146 = var_146_arg_0 ? var_146_arg_1 : var_146_arg_2; [L389] var_146 = var_146 & mask_SORT_96 [L390] SORT_96 next_147_arg_1 = var_146; [L392] state_5 = next_124_arg_1 [L393] state_17 = next_131_arg_1 [L394] state_76 = next_134_arg_1 [L395] state_97 = next_142_arg_1 [L396] state_100 = next_147_arg_1 [L120] input_2 = __VERIFIER_nondet_uchar() [L121] input_3 = __VERIFIER_nondet_uchar() [L122] input_3 = input_3 & mask_SORT_1 [L123] input_4 = __VERIFIER_nondet_uchar() [L124] input_4 = input_4 & mask_SORT_1 [L126] SORT_1 var_84_arg_0 = state_5; [L127] SORT_1 var_84 = ~var_84_arg_0; [L128] SORT_1 var_85_arg_0 = var_84; [L129] SORT_1 var_85 = ~var_85_arg_0; [L130] SORT_1 var_86_arg_0 = state_5; [L131] SORT_1 var_86_arg_1 = var_85; [L132] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L133] var_86 = var_86 & mask_SORT_1 [L134] SORT_1 constr_87_arg_0 = var_86; VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=4, state_17=0, state_76=6, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L135] CALL assume_abort_if_not(constr_87_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L135] RET assume_abort_if_not(constr_87_arg_0) VAL [constr_87_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=4, state_17=0, state_76=6, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L136] SORT_1 var_88_arg_0 = var_8; [L137] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L138] SORT_11 var_88 = var_88_arg_0; [L139] SORT_11 var_89_arg_0 = state_76; [L140] SORT_11 var_89_arg_1 = var_88; [L141] SORT_1 var_89 = var_89_arg_0 <= var_89_arg_1; [L142] SORT_1 var_90_arg_0 = input_4; [L143] SORT_1 var_90_arg_1 = var_89; [L144] SORT_1 var_90 = var_90_arg_0 ^ var_90_arg_1; [L145] SORT_1 var_91_arg_0 = var_90; [L146] SORT_1 var_91 = ~var_91_arg_0; [L147] SORT_1 var_92_arg_0 = var_90; [L148] SORT_1 var_92 = ~var_92_arg_0; [L149] SORT_1 var_93_arg_0 = var_91; [L150] SORT_1 var_93_arg_1 = var_92; [L151] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L152] var_93 = var_93 & mask_SORT_1 [L153] SORT_1 constr_94_arg_0 = var_93; VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=4, state_17=0, state_76=6, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L154] CALL assume_abort_if_not(constr_94_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L154] RET assume_abort_if_not(constr_94_arg_0) VAL [constr_87_arg_0=1, constr_94_arg_0=1, input_3=0, input_4=0, mask_SORT_11=-1, mask_SORT_12=-1, mask_SORT_1=1, mask_SORT_20=-1, mask_SORT_23=131071, mask_SORT_26=262143, mask_SORT_29=524287, mask_SORT_32=1048575, mask_SORT_35=2097151, mask_SORT_38=4194303, mask_SORT_41=8388607, mask_SORT_44=16777215, mask_SORT_47=33554431, mask_SORT_50=67108863, mask_SORT_53=134217727, mask_SORT_56=268435455, mask_SORT_59=536870911, mask_SORT_62=1073741823, mask_SORT_72=7, mask_SORT_96=15, mask_SORT_9=2147483647, state_100=4, state_17=0, state_76=6, state_97=1, var_10=0, var_113=4, var_116=6, var_120=9, var_137=0, var_13=0, var_140=0, var_14=-56, var_73=5, var_75=0, var_7=0, var_8=1] [L156] SORT_72 var_74_arg_0 = var_73; [L157] var_74_arg_0 = var_74_arg_0 & mask_SORT_72 [L158] SORT_11 var_74 = var_74_arg_0; [L159] SORT_11 var_78_arg_0 = var_74; [L160] SORT_11 var_78_arg_1 = state_76; [L161] SORT_1 var_78 = var_78_arg_0 < var_78_arg_1; [L162] SORT_1 var_15_arg_0 = input_3; [L163] SORT_12 var_15_arg_1 = var_14; [L164] SORT_12 var_15_arg_2 = var_13; [L165] SORT_12 var_15 = var_15_arg_0 ? var_15_arg_1 : var_15_arg_2; [L166] var_15 = var_15 & mask_SORT_12 [L167] SORT_12 var_16_arg_0 = var_13; [L168] SORT_12 var_16_arg_1 = var_15; [L169] SORT_11 var_16 = ((SORT_11)var_16_arg_0 << 8) | var_16_arg_1; [L170] SORT_11 var_18_arg_0 = var_16; [L171] SORT_11 var_18_arg_1 = state_17; [L172] SORT_11 var_18 = var_18_arg_0 - var_18_arg_1; [L173] var_18 = var_18 & mask_SORT_11 [L174] SORT_11 var_19_arg_0 = var_18; [L175] SORT_1 var_19 = var_19_arg_0 >> 15; [L176] SORT_1 var_21_arg_0 = var_19; [L177] SORT_9 var_21_arg_1 = var_10; [L178] SORT_20 var_21 = ((SORT_20)var_21_arg_0 << 31) | var_21_arg_1; [L179] var_21 = var_21 & mask_SORT_20 [L180] SORT_11 var_64_arg_0 = var_18; [L181] SORT_1 var_64 = var_64_arg_0 >> 15; [L182] SORT_11 var_61_arg_0 = var_18; [L183] SORT_1 var_61 = var_61_arg_0 >> 15; [L184] SORT_11 var_58_arg_0 = var_18; [L185] SORT_1 var_58 = var_58_arg_0 >> 15; [L186] SORT_11 var_55_arg_0 = var_18; [L187] SORT_1 var_55 = var_55_arg_0 >> 15; [L188] SORT_11 var_52_arg_0 = var_18; [L189] SORT_1 var_52 = var_52_arg_0 >> 15; [L190] SORT_11 var_49_arg_0 = var_18; [L191] SORT_1 var_49 = var_49_arg_0 >> 15; [L192] SORT_11 var_46_arg_0 = var_18; [L193] SORT_1 var_46 = var_46_arg_0 >> 15; [L194] SORT_11 var_43_arg_0 = var_18; [L195] SORT_1 var_43 = var_43_arg_0 >> 15; [L196] SORT_11 var_40_arg_0 = var_18; [L197] SORT_1 var_40 = var_40_arg_0 >> 15; [L198] SORT_11 var_37_arg_0 = var_18; [L199] SORT_1 var_37 = var_37_arg_0 >> 15; [L200] SORT_11 var_34_arg_0 = var_18; [L201] SORT_1 var_34 = var_34_arg_0 >> 15; [L202] SORT_11 var_31_arg_0 = var_18; [L203] SORT_1 var_31 = var_31_arg_0 >> 15; [L204] SORT_11 var_28_arg_0 = var_18; [L205] SORT_1 var_28 = var_28_arg_0 >> 15; [L206] SORT_11 var_25_arg_0 = var_18; [L207] SORT_1 var_25 = var_25_arg_0 >> 15; [L208] SORT_11 var_22_arg_0 = var_18; [L209] SORT_1 var_22 = var_22_arg_0 >> 15; [L210] SORT_1 var_24_arg_0 = var_22; [L211] SORT_11 var_24_arg_1 = var_18; [L212] SORT_23 var_24 = ((SORT_23)var_24_arg_0 << 16) | var_24_arg_1; [L213] var_24 = var_24 & mask_SORT_23 [L214] SORT_1 var_27_arg_0 = var_25; [L215] SORT_23 var_27_arg_1 = var_24; [L216] SORT_26 var_27 = ((SORT_26)var_27_arg_0 << 17) | var_27_arg_1; [L217] var_27 = var_27 & mask_SORT_26 [L218] SORT_1 var_30_arg_0 = var_28; [L219] SORT_26 var_30_arg_1 = var_27; [L220] SORT_29 var_30 = ((SORT_29)var_30_arg_0 << 18) | var_30_arg_1; [L221] var_30 = var_30 & mask_SORT_29 [L222] SORT_1 var_33_arg_0 = var_31; [L223] SORT_29 var_33_arg_1 = var_30; [L224] SORT_32 var_33 = ((SORT_32)var_33_arg_0 << 19) | var_33_arg_1; [L225] var_33 = var_33 & mask_SORT_32 [L226] SORT_1 var_36_arg_0 = var_34; [L227] SORT_32 var_36_arg_1 = var_33; [L228] SORT_35 var_36 = ((SORT_35)var_36_arg_0 << 20) | var_36_arg_1; [L229] var_36 = var_36 & mask_SORT_35 [L230] SORT_1 var_39_arg_0 = var_37; [L231] SORT_35 var_39_arg_1 = var_36; [L232] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 21) | var_39_arg_1; [L233] var_39 = var_39 & mask_SORT_38 [L234] SORT_1 var_42_arg_0 = var_40; [L235] SORT_38 var_42_arg_1 = var_39; [L236] SORT_41 var_42 = ((SORT_41)var_42_arg_0 << 22) | var_42_arg_1; [L237] var_42 = var_42 & mask_SORT_41 [L238] SORT_1 var_45_arg_0 = var_43; [L239] SORT_41 var_45_arg_1 = var_42; [L240] SORT_44 var_45 = ((SORT_44)var_45_arg_0 << 23) | var_45_arg_1; [L241] var_45 = var_45 & mask_SORT_44 [L242] SORT_1 var_48_arg_0 = var_46; [L243] SORT_44 var_48_arg_1 = var_45; [L244] SORT_47 var_48 = ((SORT_47)var_48_arg_0 << 24) | var_48_arg_1; [L245] var_48 = var_48 & mask_SORT_47 [L246] SORT_1 var_51_arg_0 = var_49; [L247] SORT_47 var_51_arg_1 = var_48; [L248] SORT_50 var_51 = ((SORT_50)var_51_arg_0 << 25) | var_51_arg_1; [L249] var_51 = var_51 & mask_SORT_50 [L250] SORT_1 var_54_arg_0 = var_52; [L251] SORT_50 var_54_arg_1 = var_51; [L252] SORT_53 var_54 = ((SORT_53)var_54_arg_0 << 26) | var_54_arg_1; [L253] var_54 = var_54 & mask_SORT_53 [L254] SORT_1 var_57_arg_0 = var_55; [L255] SORT_53 var_57_arg_1 = var_54; [L256] SORT_56 var_57 = ((SORT_56)var_57_arg_0 << 27) | var_57_arg_1; [L257] var_57 = var_57 & mask_SORT_56 [L258] SORT_1 var_60_arg_0 = var_58; [L259] SORT_56 var_60_arg_1 = var_57; [L260] SORT_59 var_60 = ((SORT_59)var_60_arg_0 << 28) | var_60_arg_1; [L261] var_60 = var_60 & mask_SORT_59 [L262] SORT_1 var_63_arg_0 = var_61; [L263] SORT_59 var_63_arg_1 = var_60; [L264] SORT_62 var_63 = ((SORT_62)var_63_arg_0 << 29) | var_63_arg_1; [L265] var_63 = var_63 & mask_SORT_62 [L266] SORT_1 var_65_arg_0 = var_64; [L267] SORT_62 var_65_arg_1 = var_63; [L268] SORT_9 var_65 = ((SORT_9)var_65_arg_0 << 30) | var_65_arg_1; [L269] SORT_9 var_66_arg_0 = var_65; [L270] var_66_arg_0 = var_66_arg_0 & mask_SORT_9 [L271] SORT_20 var_66 = var_66_arg_0; [L272] SORT_20 var_67_arg_0 = var_21; [L273] SORT_20 var_67_arg_1 = var_66; [L274] SORT_1 var_67 = var_67_arg_0 <= var_67_arg_1; [L275] SORT_1 var_68_arg_0 = var_67; [L276] SORT_1 var_68_arg_1 = var_8; [L277] SORT_1 var_68_arg_2 = var_7; [L278] SORT_1 var_68 = var_68_arg_0 ? var_68_arg_1 : var_68_arg_2; [L279] var_68 = var_68 & mask_SORT_1 [L280] SORT_1 var_69_arg_0 = input_3; [L281] SORT_1 var_69_arg_1 = var_68; [L282] SORT_1 var_69 = var_69_arg_0 ^ var_69_arg_1; [L283] SORT_1 var_70_arg_0 = var_69; [L284] SORT_1 var_70 = ~var_70_arg_0; [L285] SORT_1 var_79_arg_0 = var_78; [L286] SORT_1 var_79_arg_1 = var_70; [L287] SORT_1 var_79_arg_2 = var_8; [L288] SORT_1 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L289] SORT_1 var_80_arg_0 = var_79; [L290] SORT_1 var_80 = ~var_80_arg_0; [L291] SORT_1 var_81_arg_0 = var_79; [L292] SORT_1 var_81 = ~var_81_arg_0; [L293] SORT_1 var_82_arg_0 = var_80; [L294] SORT_1 var_82_arg_1 = var_81; [L295] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L296] var_82 = var_82 & mask_SORT_1 [L297] SORT_1 bad_83_arg_0 = var_82; [L298] CALL __VERIFIER_assert(!(bad_83_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 16 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 20.2s, OverallIterations: 8, TraceHistogramMax: 14, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.0s, AutomataDifference: 1.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 12 SdHoareTripleChecker+Valid, 1.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 12 mSDsluCounter, 521 SdHoareTripleChecker+Invalid, 1.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 394 mSDsCounter, 13 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 718 IncrementalHoareTripleChecker+Invalid, 731 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 13 mSolverCounterUnsat, 127 mSDtfsCounter, 718 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 710 GetRequests, 638 SyntacticMatches, 5 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=55occurred in iteration=7, InterpolantAutomatonStates: 56, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 7 MinimizatonAttempts, 6 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 1.3s SsaConstructionTime, 4.0s SatisfiabilityAnalysisTime, 6.4s InterpolantComputationTime, 764 NumberOfCodeBlocks, 752 NumberOfCodeBlocksAsserted, 51 NumberOfCheckSat, 645 ConstructedInterpolants, 21 QuantifiedInterpolants, 5817 SizeOfPredicates, 83 NumberOfNonLiveVariables, 8144 ConjunctsInSsa, 344 ConjunctsInUnsatCore, 13 InterpolantComputations, 2 PerfectInterpolantSequences, 1289/1752 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-02-08 00:08:27,118 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE