./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 48c9605d Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 404ac2bd3423bef5ce605181ef24be34b1a7af016e0b24dd5c9fcdb327055474 --- Real Ultimate output --- This is Ultimate 0.3.0-?-48c9605-m [2025-02-08 00:12:54,180 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-08 00:12:54,229 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2025-02-08 00:12:54,236 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-08 00:12:54,236 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-08 00:12:54,249 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-08 00:12:54,249 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-08 00:12:54,249 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-08 00:12:54,249 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-08 00:12:54,249 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-08 00:12:54,249 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-02-08 00:12:54,250 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-02-08 00:12:54,250 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-08 00:12:54,250 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-08 00:12:54,250 INFO L153 SettingsManager]: * Use SBE=true [2025-02-08 00:12:54,250 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-08 00:12:54,250 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-02-08 00:12:54,250 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-08 00:12:54,250 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-08 00:12:54,250 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-02-08 00:12:54,251 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-02-08 00:12:54,251 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-02-08 00:12:54,251 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-08 00:12:54,251 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-08 00:12:54,251 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-08 00:12:54,251 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-08 00:12:54,251 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-08 00:12:54,251 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-02-08 00:12:54,251 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-02-08 00:12:54,251 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-08 00:12:54,252 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-08 00:12:54,252 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-02-08 00:12:54,252 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-02-08 00:12:54,252 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-02-08 00:12:54,252 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-08 00:12:54,252 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-02-08 00:12:54,252 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-02-08 00:12:54,252 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-02-08 00:12:54,252 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-02-08 00:12:54,252 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-02-08 00:12:54,252 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 404ac2bd3423bef5ce605181ef24be34b1a7af016e0b24dd5c9fcdb327055474 [2025-02-08 00:12:54,407 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-08 00:12:54,412 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-08 00:12:54,413 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-08 00:12:54,414 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-08 00:12:54,414 INFO L274 PluginConnector]: CDTParser initialized [2025-02-08 00:12:54,414 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c [2025-02-08 00:12:55,554 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/08f67082c/ea85bd694ff74721a19409dfed99afbb/FLAG78b4934e4 [2025-02-08 00:12:55,874 INFO L384 CDTParser]: Found 1 translation units. [2025-02-08 00:12:55,874 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c [2025-02-08 00:12:55,884 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/08f67082c/ea85bd694ff74721a19409dfed99afbb/FLAG78b4934e4 [2025-02-08 00:12:56,111 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/08f67082c/ea85bd694ff74721a19409dfed99afbb [2025-02-08 00:12:56,113 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-08 00:12:56,114 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-08 00:12:56,116 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-08 00:12:56,116 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-08 00:12:56,118 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-08 00:12:56,119 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:56,119 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2a3c5e5a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56, skipping insertion in model container [2025-02-08 00:12:56,120 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:56,163 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-08 00:12:56,299 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c[1258,1271] [2025-02-08 00:12:56,547 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 00:12:56,558 INFO L200 MainTranslator]: Completed pre-run [2025-02-08 00:12:56,566 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c[1258,1271] [2025-02-08 00:12:56,670 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 00:12:56,679 INFO L204 MainTranslator]: Completed translation [2025-02-08 00:12:56,680 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56 WrapperNode [2025-02-08 00:12:56,680 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-08 00:12:56,680 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-08 00:12:56,681 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-08 00:12:56,681 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-08 00:12:56,686 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:56,732 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:57,056 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 4446 [2025-02-08 00:12:57,056 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-08 00:12:57,057 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-08 00:12:57,057 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-08 00:12:57,057 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-08 00:12:57,063 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:57,063 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:57,104 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:57,302 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-08 00:12:57,303 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:57,303 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:57,421 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:57,446 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:57,476 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:57,502 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:57,568 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-08 00:12:57,569 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-08 00:12:57,569 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-08 00:12:57,569 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-08 00:12:57,570 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (1/1) ... [2025-02-08 00:12:57,574 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-08 00:12:57,582 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 00:12:57,601 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-02-08 00:12:57,616 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-02-08 00:12:57,657 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-08 00:12:57,660 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-08 00:12:57,660 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-08 00:12:57,660 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-08 00:12:58,018 INFO L257 CfgBuilder]: Building ICFG [2025-02-08 00:12:58,019 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-08 00:13:00,521 INFO L? ?]: Removed 2793 outVars from TransFormulas that were not future-live. [2025-02-08 00:13:00,521 INFO L308 CfgBuilder]: Performing block encoding [2025-02-08 00:13:00,622 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-08 00:13:00,626 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-08 00:13:00,627 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 12:13:00 BoogieIcfgContainer [2025-02-08 00:13:00,627 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-08 00:13:00,629 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-02-08 00:13:00,629 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-02-08 00:13:00,636 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-02-08 00:13:00,637 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.02 12:12:56" (1/3) ... [2025-02-08 00:13:00,637 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@781b9a68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.02 12:13:00, skipping insertion in model container [2025-02-08 00:13:00,637 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 12:12:56" (2/3) ... [2025-02-08 00:13:00,637 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@781b9a68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.02 12:13:00, skipping insertion in model container [2025-02-08 00:13:00,637 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 12:13:00" (3/3) ... [2025-02-08 00:13:00,638 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.vis_arrays_bpbs_p3.c [2025-02-08 00:13:00,664 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-02-08 00:13:00,668 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.vis_arrays_bpbs_p3.c that has 1 procedures, 1092 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-02-08 00:13:00,756 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-02-08 00:13:00,771 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@574e10f8, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-02-08 00:13:00,774 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-02-08 00:13:00,779 INFO L276 IsEmpty]: Start isEmpty. Operand has 1092 states, 1090 states have (on average 1.5) internal successors, (1635), 1091 states have internal predecessors, (1635), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:00,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2025-02-08 00:13:00,798 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:00,799 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:00,803 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:00,807 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:00,808 INFO L85 PathProgramCache]: Analyzing trace with hash -1400865277, now seen corresponding path program 1 times [2025-02-08 00:13:00,817 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:00,819 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [626211907] [2025-02-08 00:13:00,819 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:00,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:00,988 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-02-08 00:13:01,186 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-02-08 00:13:01,188 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:01,188 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:02,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:02,031 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:02,031 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [626211907] [2025-02-08 00:13:02,032 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [626211907] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:02,032 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:02,033 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 00:13:02,034 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [350559985] [2025-02-08 00:13:02,034 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:02,037 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-08 00:13:02,038 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:02,055 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 00:13:02,055 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:13:02,059 INFO L87 Difference]: Start difference. First operand has 1092 states, 1090 states have (on average 1.5) internal successors, (1635), 1091 states have internal predecessors, (1635), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 42.0) internal successors, (168), 4 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:02,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:02,630 INFO L93 Difference]: Finished difference Result 2047 states and 3067 transitions. [2025-02-08 00:13:02,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:13:02,632 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 42.0) internal successors, (168), 4 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 168 [2025-02-08 00:13:02,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:02,645 INFO L225 Difference]: With dead ends: 2047 [2025-02-08 00:13:02,645 INFO L226 Difference]: Without dead ends: 1092 [2025-02-08 00:13:02,649 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:13:02,651 INFO L435 NwaCegarLoop]: 1359 mSDtfsCounter, 0 mSDsluCounter, 2713 mSDsCounter, 0 mSdLazyCounter, 823 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4072 SdHoareTripleChecker+Invalid, 823 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 823 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:02,651 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4072 Invalid, 823 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 823 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:02,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1092 states. [2025-02-08 00:13:02,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1092 to 1092. [2025-02-08 00:13:02,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1092 states, 1091 states have (on average 1.4977085242896426) internal successors, (1634), 1091 states have internal predecessors, (1634), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:02,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1092 states to 1092 states and 1634 transitions. [2025-02-08 00:13:02,711 INFO L78 Accepts]: Start accepts. Automaton has 1092 states and 1634 transitions. Word has length 168 [2025-02-08 00:13:02,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:02,712 INFO L471 AbstractCegarLoop]: Abstraction has 1092 states and 1634 transitions. [2025-02-08 00:13:02,712 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 42.0) internal successors, (168), 4 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:02,712 INFO L276 IsEmpty]: Start isEmpty. Operand 1092 states and 1634 transitions. [2025-02-08 00:13:02,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2025-02-08 00:13:02,714 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:02,714 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:02,715 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-02-08 00:13:02,715 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:02,715 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:02,716 INFO L85 PathProgramCache]: Analyzing trace with hash -472470161, now seen corresponding path program 1 times [2025-02-08 00:13:02,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:02,716 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1348518884] [2025-02-08 00:13:02,716 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:02,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:02,805 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 169 statements into 1 equivalence classes. [2025-02-08 00:13:02,883 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 169 of 169 statements. [2025-02-08 00:13:02,887 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:02,888 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:03,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:03,290 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:03,290 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1348518884] [2025-02-08 00:13:03,290 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1348518884] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:03,291 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:03,291 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 00:13:03,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [442510990] [2025-02-08 00:13:03,291 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:03,292 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-08 00:13:03,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:03,292 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 00:13:03,292 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:13:03,293 INFO L87 Difference]: Start difference. First operand 1092 states and 1634 transitions. Second operand has 4 states, 4 states have (on average 42.25) internal successors, (169), 4 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:03,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:03,756 INFO L93 Difference]: Finished difference Result 2049 states and 3066 transitions. [2025-02-08 00:13:03,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:13:03,756 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 42.25) internal successors, (169), 4 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 169 [2025-02-08 00:13:03,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:03,760 INFO L225 Difference]: With dead ends: 2049 [2025-02-08 00:13:03,760 INFO L226 Difference]: Without dead ends: 1094 [2025-02-08 00:13:03,762 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:13:03,763 INFO L435 NwaCegarLoop]: 1359 mSDtfsCounter, 0 mSDsluCounter, 2710 mSDsCounter, 0 mSdLazyCounter, 826 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4069 SdHoareTripleChecker+Invalid, 826 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 826 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:03,763 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4069 Invalid, 826 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 826 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-08 00:13:03,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1094 states. [2025-02-08 00:13:03,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1094 to 1094. [2025-02-08 00:13:03,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1094 states, 1093 states have (on average 1.4967978042086) internal successors, (1636), 1093 states have internal predecessors, (1636), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:03,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1094 states to 1094 states and 1636 transitions. [2025-02-08 00:13:03,790 INFO L78 Accepts]: Start accepts. Automaton has 1094 states and 1636 transitions. Word has length 169 [2025-02-08 00:13:03,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:03,791 INFO L471 AbstractCegarLoop]: Abstraction has 1094 states and 1636 transitions. [2025-02-08 00:13:03,791 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 42.25) internal successors, (169), 4 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:03,791 INFO L276 IsEmpty]: Start isEmpty. Operand 1094 states and 1636 transitions. [2025-02-08 00:13:03,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2025-02-08 00:13:03,795 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:03,795 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:03,796 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-02-08 00:13:03,796 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:03,796 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:03,796 INFO L85 PathProgramCache]: Analyzing trace with hash 169837438, now seen corresponding path program 1 times [2025-02-08 00:13:03,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:03,797 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696847783] [2025-02-08 00:13:03,797 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:03,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:03,846 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 170 statements into 1 equivalence classes. [2025-02-08 00:13:04,011 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 170 of 170 statements. [2025-02-08 00:13:04,011 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:04,011 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:04,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:04,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:04,787 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1696847783] [2025-02-08 00:13:04,787 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1696847783] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:04,787 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:04,787 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:13:04,787 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [185260595] [2025-02-08 00:13:04,787 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:04,787 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-08 00:13:04,787 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:04,788 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 00:13:04,788 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:04,788 INFO L87 Difference]: Start difference. First operand 1094 states and 1636 transitions. Second operand has 7 states, 7 states have (on average 24.285714285714285) internal successors, (170), 6 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:05,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:05,443 INFO L93 Difference]: Finished difference Result 2059 states and 3079 transitions. [2025-02-08 00:13:05,443 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-08 00:13:05,443 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.285714285714285) internal successors, (170), 6 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 170 [2025-02-08 00:13:05,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:05,449 INFO L225 Difference]: With dead ends: 2059 [2025-02-08 00:13:05,449 INFO L226 Difference]: Without dead ends: 1102 [2025-02-08 00:13:05,450 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:13:05,452 INFO L435 NwaCegarLoop]: 1334 mSDtfsCounter, 1565 mSDsluCounter, 3995 mSDsCounter, 0 mSdLazyCounter, 1204 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1565 SdHoareTripleChecker+Valid, 5329 SdHoareTripleChecker+Invalid, 1205 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1204 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:05,453 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1565 Valid, 5329 Invalid, 1205 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1204 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-08 00:13:05,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1102 states. [2025-02-08 00:13:05,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1102 to 1099. [2025-02-08 00:13:05,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1099 states, 1098 states have (on average 1.4954462659380692) internal successors, (1642), 1098 states have internal predecessors, (1642), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:05,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1099 states to 1099 states and 1642 transitions. [2025-02-08 00:13:05,485 INFO L78 Accepts]: Start accepts. Automaton has 1099 states and 1642 transitions. Word has length 170 [2025-02-08 00:13:05,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:05,485 INFO L471 AbstractCegarLoop]: Abstraction has 1099 states and 1642 transitions. [2025-02-08 00:13:05,485 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.285714285714285) internal successors, (170), 6 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:05,486 INFO L276 IsEmpty]: Start isEmpty. Operand 1099 states and 1642 transitions. [2025-02-08 00:13:05,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2025-02-08 00:13:05,487 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:05,487 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:05,487 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-02-08 00:13:05,487 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:05,488 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:05,488 INFO L85 PathProgramCache]: Analyzing trace with hash 57520417, now seen corresponding path program 1 times [2025-02-08 00:13:05,488 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:05,488 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [914944346] [2025-02-08 00:13:05,488 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:05,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:05,529 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 171 statements into 1 equivalence classes. [2025-02-08 00:13:05,570 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 171 of 171 statements. [2025-02-08 00:13:05,570 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:05,570 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:05,918 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:05,921 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:05,921 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [914944346] [2025-02-08 00:13:05,922 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [914944346] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:05,922 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:05,922 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 00:13:05,922 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080620376] [2025-02-08 00:13:05,922 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:05,922 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-08 00:13:05,922 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:05,923 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 00:13:05,923 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:13:05,923 INFO L87 Difference]: Start difference. First operand 1099 states and 1642 transitions. Second operand has 4 states, 4 states have (on average 42.75) internal successors, (171), 4 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:06,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:06,438 INFO L93 Difference]: Finished difference Result 2063 states and 3082 transitions. [2025-02-08 00:13:06,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:13:06,439 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 42.75) internal successors, (171), 4 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 171 [2025-02-08 00:13:06,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:06,442 INFO L225 Difference]: With dead ends: 2063 [2025-02-08 00:13:06,442 INFO L226 Difference]: Without dead ends: 1101 [2025-02-08 00:13:06,443 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:13:06,444 INFO L435 NwaCegarLoop]: 1359 mSDtfsCounter, 0 mSDsluCounter, 2710 mSDsCounter, 0 mSdLazyCounter, 826 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4069 SdHoareTripleChecker+Invalid, 826 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 826 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:06,444 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4069 Invalid, 826 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 826 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:06,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1101 states. [2025-02-08 00:13:06,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1101 to 1101. [2025-02-08 00:13:06,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1101 states, 1100 states have (on average 1.4945454545454546) internal successors, (1644), 1100 states have internal predecessors, (1644), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:06,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1101 states to 1101 states and 1644 transitions. [2025-02-08 00:13:06,458 INFO L78 Accepts]: Start accepts. Automaton has 1101 states and 1644 transitions. Word has length 171 [2025-02-08 00:13:06,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:06,458 INFO L471 AbstractCegarLoop]: Abstraction has 1101 states and 1644 transitions. [2025-02-08 00:13:06,458 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 42.75) internal successors, (171), 4 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:06,459 INFO L276 IsEmpty]: Start isEmpty. Operand 1101 states and 1644 transitions. [2025-02-08 00:13:06,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2025-02-08 00:13:06,460 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:06,460 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:06,460 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-02-08 00:13:06,460 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:06,460 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:06,460 INFO L85 PathProgramCache]: Analyzing trace with hash 623576599, now seen corresponding path program 1 times [2025-02-08 00:13:06,461 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:06,461 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96810999] [2025-02-08 00:13:06,461 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:06,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:06,497 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 171 statements into 1 equivalence classes. [2025-02-08 00:13:06,607 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 171 of 171 statements. [2025-02-08 00:13:06,608 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:06,608 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:07,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:07,220 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:07,220 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96810999] [2025-02-08 00:13:07,220 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [96810999] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:07,220 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:07,220 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-08 00:13:07,220 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1356316268] [2025-02-08 00:13:07,220 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:07,220 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-02-08 00:13:07,221 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:07,221 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-08 00:13:07,221 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-02-08 00:13:07,222 INFO L87 Difference]: Start difference. First operand 1101 states and 1644 transitions. Second operand has 10 states, 10 states have (on average 17.1) internal successors, (171), 10 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:08,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:08,399 INFO L93 Difference]: Finished difference Result 2098 states and 3132 transitions. [2025-02-08 00:13:08,400 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 00:13:08,400 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 17.1) internal successors, (171), 10 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 171 [2025-02-08 00:13:08,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:08,403 INFO L225 Difference]: With dead ends: 2098 [2025-02-08 00:13:08,403 INFO L226 Difference]: Without dead ends: 1134 [2025-02-08 00:13:08,404 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-02-08 00:13:08,405 INFO L435 NwaCegarLoop]: 1350 mSDtfsCounter, 34 mSDsluCounter, 10787 mSDsCounter, 0 mSdLazyCounter, 2560 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 12137 SdHoareTripleChecker+Invalid, 2561 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2560 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:08,405 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [34 Valid, 12137 Invalid, 2561 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2560 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2025-02-08 00:13:08,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1134 states. [2025-02-08 00:13:08,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1134 to 1120. [2025-02-08 00:13:08,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1120 states, 1119 states have (on average 1.4941912421805184) internal successors, (1672), 1119 states have internal predecessors, (1672), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:08,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1120 states to 1120 states and 1672 transitions. [2025-02-08 00:13:08,419 INFO L78 Accepts]: Start accepts. Automaton has 1120 states and 1672 transitions. Word has length 171 [2025-02-08 00:13:08,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:08,419 INFO L471 AbstractCegarLoop]: Abstraction has 1120 states and 1672 transitions. [2025-02-08 00:13:08,419 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 17.1) internal successors, (171), 10 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:08,419 INFO L276 IsEmpty]: Start isEmpty. Operand 1120 states and 1672 transitions. [2025-02-08 00:13:08,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2025-02-08 00:13:08,421 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:08,421 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:08,421 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-02-08 00:13:08,421 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:08,421 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:08,422 INFO L85 PathProgramCache]: Analyzing trace with hash -91351492, now seen corresponding path program 1 times [2025-02-08 00:13:08,422 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:08,422 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1426251958] [2025-02-08 00:13:08,422 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:08,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:08,467 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 171 statements into 1 equivalence classes. [2025-02-08 00:13:08,568 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 171 of 171 statements. [2025-02-08 00:13:08,568 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:08,568 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:08,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:08,923 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:08,923 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1426251958] [2025-02-08 00:13:08,923 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1426251958] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:08,923 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:08,923 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:08,923 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1926150922] [2025-02-08 00:13:08,923 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:08,923 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:08,923 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:08,924 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:08,924 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:08,924 INFO L87 Difference]: Start difference. First operand 1120 states and 1672 transitions. Second operand has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:09,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:09,450 INFO L93 Difference]: Finished difference Result 2109 states and 3148 transitions. [2025-02-08 00:13:09,450 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:13:09,451 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 171 [2025-02-08 00:13:09,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:09,454 INFO L225 Difference]: With dead ends: 2109 [2025-02-08 00:13:09,454 INFO L226 Difference]: Without dead ends: 1126 [2025-02-08 00:13:09,454 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:09,455 INFO L435 NwaCegarLoop]: 1356 mSDtfsCounter, 5 mSDsluCounter, 4060 mSDsCounter, 0 mSdLazyCounter, 1111 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 5416 SdHoareTripleChecker+Invalid, 1111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:09,455 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 5416 Invalid, 1111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1111 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:09,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1126 states. [2025-02-08 00:13:09,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1126 to 1124. [2025-02-08 00:13:09,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1124 states, 1123 states have (on average 1.4933214603739982) internal successors, (1677), 1123 states have internal predecessors, (1677), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:09,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1124 states to 1124 states and 1677 transitions. [2025-02-08 00:13:09,468 INFO L78 Accepts]: Start accepts. Automaton has 1124 states and 1677 transitions. Word has length 171 [2025-02-08 00:13:09,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:09,468 INFO L471 AbstractCegarLoop]: Abstraction has 1124 states and 1677 transitions. [2025-02-08 00:13:09,468 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:09,468 INFO L276 IsEmpty]: Start isEmpty. Operand 1124 states and 1677 transitions. [2025-02-08 00:13:09,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2025-02-08 00:13:09,469 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:09,469 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:09,469 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-02-08 00:13:09,469 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:09,469 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:09,469 INFO L85 PathProgramCache]: Analyzing trace with hash 747816623, now seen corresponding path program 1 times [2025-02-08 00:13:09,469 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:09,470 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690134012] [2025-02-08 00:13:09,470 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:09,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:09,506 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 172 statements into 1 equivalence classes. [2025-02-08 00:13:09,525 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 172 of 172 statements. [2025-02-08 00:13:09,525 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:09,525 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:09,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:09,697 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:09,697 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1690134012] [2025-02-08 00:13:09,697 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1690134012] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:09,697 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:09,697 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:09,698 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962132102] [2025-02-08 00:13:09,698 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:09,698 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:09,698 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:09,699 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:09,699 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:09,699 INFO L87 Difference]: Start difference. First operand 1124 states and 1677 transitions. Second operand has 5 states, 5 states have (on average 34.4) internal successors, (172), 5 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:10,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:10,200 INFO L93 Difference]: Finished difference Result 2115 states and 3155 transitions. [2025-02-08 00:13:10,200 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:13:10,200 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.4) internal successors, (172), 5 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 172 [2025-02-08 00:13:10,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:10,203 INFO L225 Difference]: With dead ends: 2115 [2025-02-08 00:13:10,203 INFO L226 Difference]: Without dead ends: 1128 [2025-02-08 00:13:10,204 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:10,205 INFO L435 NwaCegarLoop]: 1359 mSDtfsCounter, 0 mSDsluCounter, 4064 mSDsCounter, 0 mSdLazyCounter, 1104 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5423 SdHoareTripleChecker+Invalid, 1105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:10,205 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5423 Invalid, 1105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1104 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:10,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1128 states. [2025-02-08 00:13:10,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1128 to 1128. [2025-02-08 00:13:10,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1128 states, 1127 states have (on average 1.4915705412599822) internal successors, (1681), 1127 states have internal predecessors, (1681), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:10,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1128 states to 1128 states and 1681 transitions. [2025-02-08 00:13:10,218 INFO L78 Accepts]: Start accepts. Automaton has 1128 states and 1681 transitions. Word has length 172 [2025-02-08 00:13:10,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:10,218 INFO L471 AbstractCegarLoop]: Abstraction has 1128 states and 1681 transitions. [2025-02-08 00:13:10,218 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.4) internal successors, (172), 5 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:10,218 INFO L276 IsEmpty]: Start isEmpty. Operand 1128 states and 1681 transitions. [2025-02-08 00:13:10,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2025-02-08 00:13:10,220 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:10,220 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:10,220 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-02-08 00:13:10,220 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:10,220 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:10,220 INFO L85 PathProgramCache]: Analyzing trace with hash 1716213632, now seen corresponding path program 1 times [2025-02-08 00:13:10,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:10,221 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [80971537] [2025-02-08 00:13:10,221 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:10,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:10,253 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 172 statements into 1 equivalence classes. [2025-02-08 00:13:10,320 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 172 of 172 statements. [2025-02-08 00:13:10,320 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:10,320 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:11,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:11,021 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:11,021 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [80971537] [2025-02-08 00:13:11,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [80971537] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:11,021 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:11,021 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-08 00:13:11,022 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1365253760] [2025-02-08 00:13:11,022 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:11,022 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-08 00:13:11,022 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:11,022 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-08 00:13:11,023 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:13:11,023 INFO L87 Difference]: Start difference. First operand 1128 states and 1681 transitions. Second operand has 8 states, 8 states have (on average 21.5) internal successors, (172), 7 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:11,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:11,962 INFO L93 Difference]: Finished difference Result 2129 states and 3172 transitions. [2025-02-08 00:13:11,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-08 00:13:11,963 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 21.5) internal successors, (172), 7 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 172 [2025-02-08 00:13:11,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:11,966 INFO L225 Difference]: With dead ends: 2129 [2025-02-08 00:13:11,966 INFO L226 Difference]: Without dead ends: 1136 [2025-02-08 00:13:11,967 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2025-02-08 00:13:11,968 INFO L435 NwaCegarLoop]: 1332 mSDtfsCounter, 1547 mSDsluCounter, 6643 mSDsCounter, 0 mSdLazyCounter, 1816 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1547 SdHoareTripleChecker+Valid, 7975 SdHoareTripleChecker+Invalid, 1818 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1816 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:11,968 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1547 Valid, 7975 Invalid, 1818 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1816 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-02-08 00:13:11,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1136 states. [2025-02-08 00:13:11,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1136 to 1136. [2025-02-08 00:13:11,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1136 states, 1135 states have (on average 1.4889867841409692) internal successors, (1690), 1135 states have internal predecessors, (1690), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:11,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1136 states to 1136 states and 1690 transitions. [2025-02-08 00:13:11,981 INFO L78 Accepts]: Start accepts. Automaton has 1136 states and 1690 transitions. Word has length 172 [2025-02-08 00:13:11,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:11,981 INFO L471 AbstractCegarLoop]: Abstraction has 1136 states and 1690 transitions. [2025-02-08 00:13:11,981 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 21.5) internal successors, (172), 7 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:11,981 INFO L276 IsEmpty]: Start isEmpty. Operand 1136 states and 1690 transitions. [2025-02-08 00:13:11,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2025-02-08 00:13:11,982 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:11,982 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:11,982 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-02-08 00:13:11,984 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:11,984 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:11,984 INFO L85 PathProgramCache]: Analyzing trace with hash -787515687, now seen corresponding path program 1 times [2025-02-08 00:13:11,984 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:11,985 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1029869655] [2025-02-08 00:13:11,985 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:11,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:12,021 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 172 statements into 1 equivalence classes. [2025-02-08 00:13:12,042 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 172 of 172 statements. [2025-02-08 00:13:12,045 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:12,045 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:12,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:12,287 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:12,287 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1029869655] [2025-02-08 00:13:12,287 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1029869655] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:12,287 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:12,287 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:12,287 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1165533433] [2025-02-08 00:13:12,287 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:12,287 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:12,287 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:12,288 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:12,288 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:12,288 INFO L87 Difference]: Start difference. First operand 1136 states and 1690 transitions. Second operand has 5 states, 5 states have (on average 34.4) internal successors, (172), 5 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:12,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:12,695 INFO L93 Difference]: Finished difference Result 2137 states and 3178 transitions. [2025-02-08 00:13:12,695 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:13:12,696 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.4) internal successors, (172), 5 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 172 [2025-02-08 00:13:12,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:12,699 INFO L225 Difference]: With dead ends: 2137 [2025-02-08 00:13:12,699 INFO L226 Difference]: Without dead ends: 1138 [2025-02-08 00:13:12,700 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:12,700 INFO L435 NwaCegarLoop]: 1359 mSDtfsCounter, 0 mSDsluCounter, 2710 mSDsCounter, 0 mSdLazyCounter, 827 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4069 SdHoareTripleChecker+Invalid, 828 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 827 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:12,700 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4069 Invalid, 828 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 827 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-08 00:13:12,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1138 states. [2025-02-08 00:13:12,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1138 to 1138. [2025-02-08 00:13:12,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1138 states, 1137 states have (on average 1.4881266490765173) internal successors, (1692), 1137 states have internal predecessors, (1692), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:12,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1138 states to 1138 states and 1692 transitions. [2025-02-08 00:13:12,718 INFO L78 Accepts]: Start accepts. Automaton has 1138 states and 1692 transitions. Word has length 172 [2025-02-08 00:13:12,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:12,718 INFO L471 AbstractCegarLoop]: Abstraction has 1138 states and 1692 transitions. [2025-02-08 00:13:12,718 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.4) internal successors, (172), 5 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:12,719 INFO L276 IsEmpty]: Start isEmpty. Operand 1138 states and 1692 transitions. [2025-02-08 00:13:12,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-08 00:13:12,720 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:12,720 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:12,720 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-02-08 00:13:12,720 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:12,720 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:12,721 INFO L85 PathProgramCache]: Analyzing trace with hash 786268998, now seen corresponding path program 1 times [2025-02-08 00:13:12,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:12,721 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1717875735] [2025-02-08 00:13:12,721 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:12,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:12,768 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-08 00:13:12,851 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-08 00:13:12,851 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:12,851 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:13,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:13,411 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:13,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1717875735] [2025-02-08 00:13:13,411 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1717875735] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:13,412 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:13,412 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:13:13,412 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1209079430] [2025-02-08 00:13:13,412 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:13,412 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-08 00:13:13,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:13,413 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 00:13:13,413 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:13,413 INFO L87 Difference]: Start difference. First operand 1138 states and 1692 transitions. Second operand has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 6 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:14,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:14,139 INFO L93 Difference]: Finished difference Result 2397 states and 3555 transitions. [2025-02-08 00:13:14,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:13:14,140 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 6 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-02-08 00:13:14,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:14,144 INFO L225 Difference]: With dead ends: 2397 [2025-02-08 00:13:14,144 INFO L226 Difference]: Without dead ends: 1396 [2025-02-08 00:13:14,145 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:13:14,145 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 2151 mSDsluCounter, 5326 mSDsCounter, 0 mSdLazyCounter, 1498 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2151 SdHoareTripleChecker+Valid, 6661 SdHoareTripleChecker+Invalid, 1499 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1498 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:14,146 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2151 Valid, 6661 Invalid, 1499 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1498 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-02-08 00:13:14,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1396 states. [2025-02-08 00:13:14,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1396 to 1277. [2025-02-08 00:13:14,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1277 states, 1276 states have (on average 1.488244514106583) internal successors, (1899), 1276 states have internal predecessors, (1899), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:14,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1277 states to 1277 states and 1899 transitions. [2025-02-08 00:13:14,165 INFO L78 Accepts]: Start accepts. Automaton has 1277 states and 1899 transitions. Word has length 173 [2025-02-08 00:13:14,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:14,165 INFO L471 AbstractCegarLoop]: Abstraction has 1277 states and 1899 transitions. [2025-02-08 00:13:14,165 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 6 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:14,165 INFO L276 IsEmpty]: Start isEmpty. Operand 1277 states and 1899 transitions. [2025-02-08 00:13:14,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-08 00:13:14,167 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:14,167 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:14,167 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-02-08 00:13:14,167 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:14,167 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:14,168 INFO L85 PathProgramCache]: Analyzing trace with hash -981809102, now seen corresponding path program 1 times [2025-02-08 00:13:14,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:14,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89769491] [2025-02-08 00:13:14,168 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:14,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:14,216 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-08 00:13:14,265 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-08 00:13:14,265 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:14,265 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:14,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:14,729 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:14,729 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [89769491] [2025-02-08 00:13:14,730 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [89769491] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:14,730 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:14,730 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-08 00:13:14,730 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [578506248] [2025-02-08 00:13:14,730 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:14,730 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-02-08 00:13:14,730 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:14,731 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-08 00:13:14,731 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-02-08 00:13:14,731 INFO L87 Difference]: Start difference. First operand 1277 states and 1899 transitions. Second operand has 10 states, 10 states have (on average 17.3) internal successors, (173), 10 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:15,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:15,530 INFO L93 Difference]: Finished difference Result 2311 states and 3435 transitions. [2025-02-08 00:13:15,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 00:13:15,531 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 17.3) internal successors, (173), 10 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-02-08 00:13:15,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:15,534 INFO L225 Difference]: With dead ends: 2311 [2025-02-08 00:13:15,534 INFO L226 Difference]: Without dead ends: 1310 [2025-02-08 00:13:15,535 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-02-08 00:13:15,536 INFO L435 NwaCegarLoop]: 1349 mSDtfsCounter, 37 mSDsluCounter, 8123 mSDsCounter, 0 mSdLazyCounter, 2016 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 9472 SdHoareTripleChecker+Invalid, 2017 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2016 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:15,536 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [37 Valid, 9472 Invalid, 2017 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2016 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-02-08 00:13:15,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1310 states. [2025-02-08 00:13:15,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1310 to 1296. [2025-02-08 00:13:15,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1296 states, 1295 states have (on average 1.4880308880308881) internal successors, (1927), 1295 states have internal predecessors, (1927), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:15,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1296 states to 1296 states and 1927 transitions. [2025-02-08 00:13:15,550 INFO L78 Accepts]: Start accepts. Automaton has 1296 states and 1927 transitions. Word has length 173 [2025-02-08 00:13:15,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:15,550 INFO L471 AbstractCegarLoop]: Abstraction has 1296 states and 1927 transitions. [2025-02-08 00:13:15,550 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 17.3) internal successors, (173), 10 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:15,551 INFO L276 IsEmpty]: Start isEmpty. Operand 1296 states and 1927 transitions. [2025-02-08 00:13:15,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-08 00:13:15,552 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:15,552 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:15,552 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-02-08 00:13:15,552 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:15,552 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:15,552 INFO L85 PathProgramCache]: Analyzing trace with hash 2124793298, now seen corresponding path program 1 times [2025-02-08 00:13:15,553 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:15,553 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [90263523] [2025-02-08 00:13:15,553 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:15,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:15,610 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-08 00:13:15,633 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-08 00:13:15,634 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:15,634 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:15,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:15,791 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:15,791 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [90263523] [2025-02-08 00:13:15,791 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [90263523] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:15,791 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:15,791 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:15,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058156193] [2025-02-08 00:13:15,792 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:15,792 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:15,792 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:15,793 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:15,793 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:15,793 INFO L87 Difference]: Start difference. First operand 1296 states and 1927 transitions. Second operand has 5 states, 5 states have (on average 34.6) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:16,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:16,166 INFO L93 Difference]: Finished difference Result 2320 states and 3448 transitions. [2025-02-08 00:13:16,166 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:13:16,166 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.6) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-02-08 00:13:16,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:16,169 INFO L225 Difference]: With dead ends: 2320 [2025-02-08 00:13:16,169 INFO L226 Difference]: Without dead ends: 1300 [2025-02-08 00:13:16,170 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:16,171 INFO L435 NwaCegarLoop]: 1359 mSDtfsCounter, 0 mSDsluCounter, 2710 mSDsCounter, 0 mSdLazyCounter, 827 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4069 SdHoareTripleChecker+Invalid, 828 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 827 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:16,171 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4069 Invalid, 828 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 827 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-08 00:13:16,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1300 states. [2025-02-08 00:13:16,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1300 to 1300. [2025-02-08 00:13:16,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1300 states, 1299 states have (on average 1.4865280985373364) internal successors, (1931), 1299 states have internal predecessors, (1931), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:16,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1300 states to 1300 states and 1931 transitions. [2025-02-08 00:13:16,185 INFO L78 Accepts]: Start accepts. Automaton has 1300 states and 1931 transitions. Word has length 173 [2025-02-08 00:13:16,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:16,185 INFO L471 AbstractCegarLoop]: Abstraction has 1300 states and 1931 transitions. [2025-02-08 00:13:16,185 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.6) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:16,185 INFO L276 IsEmpty]: Start isEmpty. Operand 1300 states and 1931 transitions. [2025-02-08 00:13:16,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-08 00:13:16,187 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:16,187 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:16,187 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-02-08 00:13:16,187 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:16,187 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:16,187 INFO L85 PathProgramCache]: Analyzing trace with hash 1484471862, now seen corresponding path program 1 times [2025-02-08 00:13:16,188 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:16,188 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399347436] [2025-02-08 00:13:16,188 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:16,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:16,220 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-08 00:13:16,273 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-08 00:13:16,273 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:16,273 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:16,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:16,554 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:16,554 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1399347436] [2025-02-08 00:13:16,554 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1399347436] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:16,554 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:16,554 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:16,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1331345671] [2025-02-08 00:13:16,554 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:16,554 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:16,554 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:16,555 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:16,555 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:16,555 INFO L87 Difference]: Start difference. First operand 1300 states and 1931 transitions. Second operand has 5 states, 5 states have (on average 34.6) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:17,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:17,062 INFO L93 Difference]: Finished difference Result 2332 states and 3462 transitions. [2025-02-08 00:13:17,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:13:17,063 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.6) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-02-08 00:13:17,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:17,066 INFO L225 Difference]: With dead ends: 2332 [2025-02-08 00:13:17,066 INFO L226 Difference]: Without dead ends: 1308 [2025-02-08 00:13:17,067 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:17,068 INFO L435 NwaCegarLoop]: 1356 mSDtfsCounter, 6 mSDsluCounter, 4060 mSDsCounter, 0 mSdLazyCounter, 1111 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 5416 SdHoareTripleChecker+Invalid, 1111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:17,068 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 5416 Invalid, 1111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1111 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:17,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1308 states. [2025-02-08 00:13:17,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1308 to 1306. [2025-02-08 00:13:17,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1306 states, 1305 states have (on average 1.4850574712643678) internal successors, (1938), 1305 states have internal predecessors, (1938), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:17,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1306 states to 1306 states and 1938 transitions. [2025-02-08 00:13:17,080 INFO L78 Accepts]: Start accepts. Automaton has 1306 states and 1938 transitions. Word has length 173 [2025-02-08 00:13:17,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:17,080 INFO L471 AbstractCegarLoop]: Abstraction has 1306 states and 1938 transitions. [2025-02-08 00:13:17,080 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.6) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:17,080 INFO L276 IsEmpty]: Start isEmpty. Operand 1306 states and 1938 transitions. [2025-02-08 00:13:17,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2025-02-08 00:13:17,081 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:17,081 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:17,082 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-02-08 00:13:17,082 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:17,082 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:17,082 INFO L85 PathProgramCache]: Analyzing trace with hash 542743126, now seen corresponding path program 1 times [2025-02-08 00:13:17,082 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:17,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921892664] [2025-02-08 00:13:17,082 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:17,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:17,111 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 174 statements into 1 equivalence classes. [2025-02-08 00:13:17,127 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 174 of 174 statements. [2025-02-08 00:13:17,127 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:17,127 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:17,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:17,243 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:17,243 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1921892664] [2025-02-08 00:13:17,243 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1921892664] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:17,243 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:17,243 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 00:13:17,243 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [393380204] [2025-02-08 00:13:17,243 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:17,243 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-08 00:13:17,243 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:17,244 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 00:13:17,244 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:13:17,244 INFO L87 Difference]: Start difference. First operand 1306 states and 1938 transitions. Second operand has 4 states, 4 states have (on average 43.5) internal successors, (174), 4 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:17,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:17,598 INFO L93 Difference]: Finished difference Result 2340 states and 3470 transitions. [2025-02-08 00:13:17,598 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:13:17,598 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 43.5) internal successors, (174), 4 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 174 [2025-02-08 00:13:17,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:17,601 INFO L225 Difference]: With dead ends: 2340 [2025-02-08 00:13:17,601 INFO L226 Difference]: Without dead ends: 1310 [2025-02-08 00:13:17,601 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:13:17,602 INFO L435 NwaCegarLoop]: 1359 mSDtfsCounter, 0 mSDsluCounter, 2710 mSDsCounter, 0 mSdLazyCounter, 826 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4069 SdHoareTripleChecker+Invalid, 826 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 826 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:17,602 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4069 Invalid, 826 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 826 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-08 00:13:17,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1310 states. [2025-02-08 00:13:17,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1310 to 1310. [2025-02-08 00:13:17,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1310 states, 1309 states have (on average 1.4835752482811306) internal successors, (1942), 1309 states have internal predecessors, (1942), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:17,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1310 states to 1310 states and 1942 transitions. [2025-02-08 00:13:17,613 INFO L78 Accepts]: Start accepts. Automaton has 1310 states and 1942 transitions. Word has length 174 [2025-02-08 00:13:17,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:17,614 INFO L471 AbstractCegarLoop]: Abstraction has 1310 states and 1942 transitions. [2025-02-08 00:13:17,614 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 43.5) internal successors, (174), 4 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:17,614 INFO L276 IsEmpty]: Start isEmpty. Operand 1310 states and 1942 transitions. [2025-02-08 00:13:17,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2025-02-08 00:13:17,615 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:17,615 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:17,615 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-02-08 00:13:17,615 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:17,615 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:17,616 INFO L85 PathProgramCache]: Analyzing trace with hash 1440962120, now seen corresponding path program 1 times [2025-02-08 00:13:17,616 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:17,616 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [916995642] [2025-02-08 00:13:17,616 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:17,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:17,647 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 174 statements into 1 equivalence classes. [2025-02-08 00:13:17,689 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 174 of 174 statements. [2025-02-08 00:13:17,690 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:17,690 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:17,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:17,958 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:17,959 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [916995642] [2025-02-08 00:13:17,959 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [916995642] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:17,959 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:17,959 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:17,959 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [118297448] [2025-02-08 00:13:17,959 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:17,959 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:17,959 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:17,960 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:17,960 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:17,961 INFO L87 Difference]: Start difference. First operand 1310 states and 1942 transitions. Second operand has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:18,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:18,450 INFO L93 Difference]: Finished difference Result 2355 states and 3488 transitions. [2025-02-08 00:13:18,451 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:13:18,451 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 174 [2025-02-08 00:13:18,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:18,454 INFO L225 Difference]: With dead ends: 2355 [2025-02-08 00:13:18,454 INFO L226 Difference]: Without dead ends: 1321 [2025-02-08 00:13:18,455 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:18,455 INFO L435 NwaCegarLoop]: 1356 mSDtfsCounter, 6 mSDsluCounter, 4060 mSDsCounter, 0 mSdLazyCounter, 1111 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 5416 SdHoareTripleChecker+Invalid, 1111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:18,455 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 5416 Invalid, 1111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1111 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:18,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1321 states. [2025-02-08 00:13:18,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1321 to 1318. [2025-02-08 00:13:18,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1318 states, 1317 states have (on average 1.4813971146545177) internal successors, (1951), 1317 states have internal predecessors, (1951), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:18,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1318 states to 1318 states and 1951 transitions. [2025-02-08 00:13:18,468 INFO L78 Accepts]: Start accepts. Automaton has 1318 states and 1951 transitions. Word has length 174 [2025-02-08 00:13:18,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:18,468 INFO L471 AbstractCegarLoop]: Abstraction has 1318 states and 1951 transitions. [2025-02-08 00:13:18,469 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:18,469 INFO L276 IsEmpty]: Start isEmpty. Operand 1318 states and 1951 transitions. [2025-02-08 00:13:18,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-02-08 00:13:18,470 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:18,470 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:18,470 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-02-08 00:13:18,470 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:18,470 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:18,471 INFO L85 PathProgramCache]: Analyzing trace with hash 1111379021, now seen corresponding path program 1 times [2025-02-08 00:13:18,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:18,471 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1029833723] [2025-02-08 00:13:18,471 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:18,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:18,504 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-02-08 00:13:18,569 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-02-08 00:13:18,569 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:18,569 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:18,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:18,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:18,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1029833723] [2025-02-08 00:13:18,989 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1029833723] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:18,989 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:18,989 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-08 00:13:18,989 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [305514290] [2025-02-08 00:13:18,989 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:18,989 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-02-08 00:13:18,989 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:18,990 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-08 00:13:18,990 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-02-08 00:13:18,990 INFO L87 Difference]: Start difference. First operand 1318 states and 1951 transitions. Second operand has 10 states, 10 states have (on average 17.5) internal successors, (175), 10 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:20,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:20,027 INFO L93 Difference]: Finished difference Result 2393 states and 3539 transitions. [2025-02-08 00:13:20,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 00:13:20,027 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 17.5) internal successors, (175), 10 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-02-08 00:13:20,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:20,031 INFO L225 Difference]: With dead ends: 2393 [2025-02-08 00:13:20,031 INFO L226 Difference]: Without dead ends: 1351 [2025-02-08 00:13:20,032 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-02-08 00:13:20,032 INFO L435 NwaCegarLoop]: 1349 mSDtfsCounter, 34 mSDsluCounter, 10780 mSDsCounter, 0 mSdLazyCounter, 2568 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 12129 SdHoareTripleChecker+Invalid, 2569 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2568 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:20,033 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [34 Valid, 12129 Invalid, 2569 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2568 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-02-08 00:13:20,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1351 states. [2025-02-08 00:13:20,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1351 to 1337. [2025-02-08 00:13:20,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1337 states, 1336 states have (on average 1.4812874251497006) internal successors, (1979), 1336 states have internal predecessors, (1979), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:20,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1337 states to 1337 states and 1979 transitions. [2025-02-08 00:13:20,046 INFO L78 Accepts]: Start accepts. Automaton has 1337 states and 1979 transitions. Word has length 175 [2025-02-08 00:13:20,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:20,046 INFO L471 AbstractCegarLoop]: Abstraction has 1337 states and 1979 transitions. [2025-02-08 00:13:20,047 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 17.5) internal successors, (175), 10 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:20,047 INFO L276 IsEmpty]: Start isEmpty. Operand 1337 states and 1979 transitions. [2025-02-08 00:13:20,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-02-08 00:13:20,048 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:20,048 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:20,048 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-02-08 00:13:20,048 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:20,049 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:20,049 INFO L85 PathProgramCache]: Analyzing trace with hash -1699667654, now seen corresponding path program 1 times [2025-02-08 00:13:20,049 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:20,049 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214238775] [2025-02-08 00:13:20,049 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:20,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:20,087 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-02-08 00:13:20,170 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-02-08 00:13:20,170 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:20,171 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:20,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:20,473 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:20,473 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214238775] [2025-02-08 00:13:20,473 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1214238775] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:20,473 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:20,474 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 00:13:20,474 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1605101545] [2025-02-08 00:13:20,474 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:20,474 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:20,474 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:20,474 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:20,474 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:20,475 INFO L87 Difference]: Start difference. First operand 1337 states and 1979 transitions. Second operand has 5 states, 5 states have (on average 35.0) internal successors, (175), 4 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:20,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:20,926 INFO L93 Difference]: Finished difference Result 2406 states and 3557 transitions. [2025-02-08 00:13:20,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:13:20,926 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 4 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-02-08 00:13:20,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:20,929 INFO L225 Difference]: With dead ends: 2406 [2025-02-08 00:13:20,929 INFO L226 Difference]: Without dead ends: 1345 [2025-02-08 00:13:20,930 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:20,931 INFO L435 NwaCegarLoop]: 1334 mSDtfsCounter, 1530 mSDsluCounter, 2662 mSDsCounter, 0 mSdLazyCounter, 899 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1530 SdHoareTripleChecker+Valid, 3996 SdHoareTripleChecker+Invalid, 899 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 899 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:20,931 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1530 Valid, 3996 Invalid, 899 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 899 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-08 00:13:20,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1345 states. [2025-02-08 00:13:20,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1345 to 1345. [2025-02-08 00:13:20,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1345 states, 1344 states have (on average 1.4791666666666667) internal successors, (1988), 1344 states have internal predecessors, (1988), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:20,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1345 states to 1345 states and 1988 transitions. [2025-02-08 00:13:20,950 INFO L78 Accepts]: Start accepts. Automaton has 1345 states and 1988 transitions. Word has length 175 [2025-02-08 00:13:20,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:20,950 INFO L471 AbstractCegarLoop]: Abstraction has 1345 states and 1988 transitions. [2025-02-08 00:13:20,951 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 4 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:20,951 INFO L276 IsEmpty]: Start isEmpty. Operand 1345 states and 1988 transitions. [2025-02-08 00:13:20,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-02-08 00:13:20,953 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:20,953 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:20,953 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-02-08 00:13:20,953 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:20,953 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:20,954 INFO L85 PathProgramCache]: Analyzing trace with hash -759121427, now seen corresponding path program 1 times [2025-02-08 00:13:20,954 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:20,954 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [523942606] [2025-02-08 00:13:20,954 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:20,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:20,986 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-02-08 00:13:21,008 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-02-08 00:13:21,009 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:21,009 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:21,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:21,187 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:21,187 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [523942606] [2025-02-08 00:13:21,187 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [523942606] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:21,187 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:21,187 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:21,187 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [116084436] [2025-02-08 00:13:21,188 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:21,188 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:21,188 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:21,188 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:21,188 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:21,189 INFO L87 Difference]: Start difference. First operand 1345 states and 1988 transitions. Second operand has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:21,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:21,627 INFO L93 Difference]: Finished difference Result 2418 states and 3570 transitions. [2025-02-08 00:13:21,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:13:21,627 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-02-08 00:13:21,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:21,630 INFO L225 Difference]: With dead ends: 2418 [2025-02-08 00:13:21,630 INFO L226 Difference]: Without dead ends: 1349 [2025-02-08 00:13:21,631 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:21,632 INFO L435 NwaCegarLoop]: 1359 mSDtfsCounter, 0 mSDsluCounter, 4064 mSDsCounter, 0 mSdLazyCounter, 1104 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5423 SdHoareTripleChecker+Invalid, 1105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:21,632 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5423 Invalid, 1105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1104 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-08 00:13:21,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1349 states. [2025-02-08 00:13:21,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1349 to 1349. [2025-02-08 00:13:21,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1349 states, 1348 states have (on average 1.4777448071216617) internal successors, (1992), 1348 states have internal predecessors, (1992), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:21,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1349 states to 1349 states and 1992 transitions. [2025-02-08 00:13:21,643 INFO L78 Accepts]: Start accepts. Automaton has 1349 states and 1992 transitions. Word has length 175 [2025-02-08 00:13:21,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:21,643 INFO L471 AbstractCegarLoop]: Abstraction has 1349 states and 1992 transitions. [2025-02-08 00:13:21,643 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:21,643 INFO L276 IsEmpty]: Start isEmpty. Operand 1349 states and 1992 transitions. [2025-02-08 00:13:21,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-02-08 00:13:21,644 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:21,644 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:21,644 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-02-08 00:13:21,644 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:21,645 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:21,645 INFO L85 PathProgramCache]: Analyzing trace with hash 744424140, now seen corresponding path program 1 times [2025-02-08 00:13:21,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:21,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [519015378] [2025-02-08 00:13:21,645 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:21,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:21,675 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-02-08 00:13:21,814 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-02-08 00:13:21,814 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:21,814 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:22,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:22,078 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:22,078 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [519015378] [2025-02-08 00:13:22,078 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [519015378] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:22,078 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:22,078 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:22,078 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1132357873] [2025-02-08 00:13:22,078 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:22,078 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:22,078 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:22,079 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:22,079 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:22,079 INFO L87 Difference]: Start difference. First operand 1349 states and 1992 transitions. Second operand has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:22,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:22,683 INFO L93 Difference]: Finished difference Result 2430 states and 3584 transitions. [2025-02-08 00:13:22,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:13:22,684 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-02-08 00:13:22,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:22,687 INFO L225 Difference]: With dead ends: 2430 [2025-02-08 00:13:22,687 INFO L226 Difference]: Without dead ends: 1357 [2025-02-08 00:13:22,689 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:22,689 INFO L435 NwaCegarLoop]: 1356 mSDtfsCounter, 6 mSDsluCounter, 4060 mSDsCounter, 0 mSdLazyCounter, 1111 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 5416 SdHoareTripleChecker+Invalid, 1111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:22,689 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 5416 Invalid, 1111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1111 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-08 00:13:22,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1357 states. [2025-02-08 00:13:22,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1357 to 1355. [2025-02-08 00:13:22,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1355 states, 1354 states have (on average 1.4763663220088625) internal successors, (1999), 1354 states have internal predecessors, (1999), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:22,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1355 states to 1355 states and 1999 transitions. [2025-02-08 00:13:22,702 INFO L78 Accepts]: Start accepts. Automaton has 1355 states and 1999 transitions. Word has length 175 [2025-02-08 00:13:22,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:22,702 INFO L471 AbstractCegarLoop]: Abstraction has 1355 states and 1999 transitions. [2025-02-08 00:13:22,702 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:22,702 INFO L276 IsEmpty]: Start isEmpty. Operand 1355 states and 1999 transitions. [2025-02-08 00:13:22,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2025-02-08 00:13:22,703 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:22,703 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:22,703 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-02-08 00:13:22,703 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:22,704 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:22,704 INFO L85 PathProgramCache]: Analyzing trace with hash 39055101, now seen corresponding path program 1 times [2025-02-08 00:13:22,704 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:22,704 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1570687336] [2025-02-08 00:13:22,704 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:22,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:22,739 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 176 statements into 1 equivalence classes. [2025-02-08 00:13:22,816 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 176 of 176 statements. [2025-02-08 00:13:22,816 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:22,816 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:22,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:22,982 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:22,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1570687336] [2025-02-08 00:13:22,982 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1570687336] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:22,982 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:22,982 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 00:13:22,982 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [574402375] [2025-02-08 00:13:22,982 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:22,983 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-08 00:13:22,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:22,983 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 00:13:22,983 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:13:22,983 INFO L87 Difference]: Start difference. First operand 1355 states and 1999 transitions. Second operand has 4 states, 4 states have (on average 44.0) internal successors, (176), 4 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:23,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:23,318 INFO L93 Difference]: Finished difference Result 2438 states and 3592 transitions. [2025-02-08 00:13:23,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:13:23,319 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 44.0) internal successors, (176), 4 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 176 [2025-02-08 00:13:23,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:23,322 INFO L225 Difference]: With dead ends: 2438 [2025-02-08 00:13:23,322 INFO L226 Difference]: Without dead ends: 1359 [2025-02-08 00:13:23,323 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 00:13:23,323 INFO L435 NwaCegarLoop]: 1359 mSDtfsCounter, 0 mSDsluCounter, 2710 mSDsCounter, 0 mSdLazyCounter, 826 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4069 SdHoareTripleChecker+Invalid, 826 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 826 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:23,323 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4069 Invalid, 826 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 826 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-08 00:13:23,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1359 states. [2025-02-08 00:13:23,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1359 to 1359. [2025-02-08 00:13:23,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1359 states, 1358 states have (on average 1.4749631811487482) internal successors, (2003), 1358 states have internal predecessors, (2003), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:23,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1359 states to 1359 states and 2003 transitions. [2025-02-08 00:13:23,333 INFO L78 Accepts]: Start accepts. Automaton has 1359 states and 2003 transitions. Word has length 176 [2025-02-08 00:13:23,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:23,333 INFO L471 AbstractCegarLoop]: Abstraction has 1359 states and 2003 transitions. [2025-02-08 00:13:23,333 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 44.0) internal successors, (176), 4 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:23,334 INFO L276 IsEmpty]: Start isEmpty. Operand 1359 states and 2003 transitions. [2025-02-08 00:13:23,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2025-02-08 00:13:23,334 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:23,335 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:23,335 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-02-08 00:13:23,335 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:23,335 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:23,335 INFO L85 PathProgramCache]: Analyzing trace with hash -50627884, now seen corresponding path program 1 times [2025-02-08 00:13:23,335 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:23,335 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1415820835] [2025-02-08 00:13:23,335 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:23,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:23,370 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 176 statements into 1 equivalence classes. [2025-02-08 00:13:23,472 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 176 of 176 statements. [2025-02-08 00:13:23,473 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:23,473 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:23,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:23,777 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:23,777 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1415820835] [2025-02-08 00:13:23,777 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1415820835] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:23,777 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:23,777 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:13:23,777 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [244091509] [2025-02-08 00:13:23,777 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:23,777 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-08 00:13:23,777 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:23,778 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 00:13:23,778 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:23,778 INFO L87 Difference]: Start difference. First operand 1359 states and 2003 transitions. Second operand has 7 states, 7 states have (on average 25.142857142857142) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:24,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:24,319 INFO L93 Difference]: Finished difference Result 2449 states and 3605 transitions. [2025-02-08 00:13:24,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-08 00:13:24,319 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.142857142857142) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 176 [2025-02-08 00:13:24,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:24,322 INFO L225 Difference]: With dead ends: 2449 [2025-02-08 00:13:24,322 INFO L226 Difference]: Without dead ends: 1366 [2025-02-08 00:13:24,323 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:13:24,324 INFO L435 NwaCegarLoop]: 1331 mSDtfsCounter, 1475 mSDsluCounter, 5313 mSDsCounter, 0 mSdLazyCounter, 1515 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1475 SdHoareTripleChecker+Valid, 6644 SdHoareTripleChecker+Invalid, 1517 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1515 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:24,324 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1475 Valid, 6644 Invalid, 1517 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1515 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:24,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1366 states. [2025-02-08 00:13:24,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1366 to 1365. [2025-02-08 00:13:24,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1364 states have (on average 1.4736070381231672) internal successors, (2010), 1364 states have internal predecessors, (2010), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:24,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 2010 transitions. [2025-02-08 00:13:24,335 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 2010 transitions. Word has length 176 [2025-02-08 00:13:24,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:24,335 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 2010 transitions. [2025-02-08 00:13:24,335 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.142857142857142) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:24,335 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 2010 transitions. [2025-02-08 00:13:24,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2025-02-08 00:13:24,336 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:24,337 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:24,337 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-02-08 00:13:24,337 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:24,337 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:24,337 INFO L85 PathProgramCache]: Analyzing trace with hash -1123438056, now seen corresponding path program 1 times [2025-02-08 00:13:24,337 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:24,337 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524605996] [2025-02-08 00:13:24,338 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:24,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:24,374 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 177 statements into 1 equivalence classes. [2025-02-08 00:13:24,509 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 177 of 177 statements. [2025-02-08 00:13:24,510 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:24,510 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:24,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:24,984 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:24,984 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524605996] [2025-02-08 00:13:24,984 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [524605996] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:24,984 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:24,984 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2025-02-08 00:13:24,984 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1827830869] [2025-02-08 00:13:24,984 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:24,984 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2025-02-08 00:13:24,984 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:24,984 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2025-02-08 00:13:24,984 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2025-02-08 00:13:24,985 INFO L87 Difference]: Start difference. First operand 1365 states and 2010 transitions. Second operand has 12 states, 12 states have (on average 14.75) internal successors, (177), 12 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:25,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:25,866 INFO L93 Difference]: Finished difference Result 2499 states and 3669 transitions. [2025-02-08 00:13:25,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-02-08 00:13:25,869 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 14.75) internal successors, (177), 12 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 177 [2025-02-08 00:13:25,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:25,872 INFO L225 Difference]: With dead ends: 2499 [2025-02-08 00:13:25,872 INFO L226 Difference]: Without dead ends: 1410 [2025-02-08 00:13:25,873 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2025-02-08 00:13:25,876 INFO L435 NwaCegarLoop]: 1349 mSDtfsCounter, 36 mSDsluCounter, 10816 mSDsCounter, 0 mSdLazyCounter, 2588 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 12165 SdHoareTripleChecker+Invalid, 2588 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2588 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:25,876 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [36 Valid, 12165 Invalid, 2588 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2588 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-02-08 00:13:25,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1410 states. [2025-02-08 00:13:25,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1410 to 1393. [2025-02-08 00:13:25,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1393 states, 1392 states have (on average 1.4705459770114941) internal successors, (2047), 1392 states have internal predecessors, (2047), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:25,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1393 states to 1393 states and 2047 transitions. [2025-02-08 00:13:25,886 INFO L78 Accepts]: Start accepts. Automaton has 1393 states and 2047 transitions. Word has length 177 [2025-02-08 00:13:25,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:25,886 INFO L471 AbstractCegarLoop]: Abstraction has 1393 states and 2047 transitions. [2025-02-08 00:13:25,887 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 14.75) internal successors, (177), 12 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:25,887 INFO L276 IsEmpty]: Start isEmpty. Operand 1393 states and 2047 transitions. [2025-02-08 00:13:25,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2025-02-08 00:13:25,888 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:25,888 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:25,888 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-02-08 00:13:25,888 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:25,888 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:25,888 INFO L85 PathProgramCache]: Analyzing trace with hash 1759681372, now seen corresponding path program 1 times [2025-02-08 00:13:25,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:25,889 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409255309] [2025-02-08 00:13:25,889 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:25,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:25,923 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 177 statements into 1 equivalence classes. [2025-02-08 00:13:26,093 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 177 of 177 statements. [2025-02-08 00:13:26,093 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:26,093 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:26,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:26,405 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:26,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409255309] [2025-02-08 00:13:26,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1409255309] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:26,406 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:26,406 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:26,406 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1052175016] [2025-02-08 00:13:26,406 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:26,406 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:13:26,406 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:26,407 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:13:26,407 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:26,407 INFO L87 Difference]: Start difference. First operand 1393 states and 2047 transitions. Second operand has 6 states, 6 states have (on average 29.5) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:27,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:27,200 INFO L93 Difference]: Finished difference Result 2976 states and 4346 transitions. [2025-02-08 00:13:27,200 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:13:27,201 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.5) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 177 [2025-02-08 00:13:27,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:27,206 INFO L225 Difference]: With dead ends: 2976 [2025-02-08 00:13:27,206 INFO L226 Difference]: Without dead ends: 1859 [2025-02-08 00:13:27,207 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:27,208 INFO L435 NwaCegarLoop]: 1108 mSDtfsCounter, 1844 mSDsluCounter, 3314 mSDsCounter, 0 mSdLazyCounter, 2105 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1844 SdHoareTripleChecker+Valid, 4422 SdHoareTripleChecker+Invalid, 2105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:27,208 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1844 Valid, 4422 Invalid, 2105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2105 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-02-08 00:13:27,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1859 states. [2025-02-08 00:13:27,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1859 to 1727. [2025-02-08 00:13:27,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1727 states, 1726 states have (on average 1.4681344148319815) internal successors, (2534), 1726 states have internal predecessors, (2534), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:27,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1727 states to 1727 states and 2534 transitions. [2025-02-08 00:13:27,224 INFO L78 Accepts]: Start accepts. Automaton has 1727 states and 2534 transitions. Word has length 177 [2025-02-08 00:13:27,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:27,224 INFO L471 AbstractCegarLoop]: Abstraction has 1727 states and 2534 transitions. [2025-02-08 00:13:27,225 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.5) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:27,225 INFO L276 IsEmpty]: Start isEmpty. Operand 1727 states and 2534 transitions. [2025-02-08 00:13:27,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2025-02-08 00:13:27,226 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:27,226 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:27,227 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-02-08 00:13:27,227 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:27,228 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:27,228 INFO L85 PathProgramCache]: Analyzing trace with hash -513162346, now seen corresponding path program 1 times [2025-02-08 00:13:27,228 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:27,228 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445522486] [2025-02-08 00:13:27,228 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:27,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:27,269 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 177 statements into 1 equivalence classes. [2025-02-08 00:13:27,311 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 177 of 177 statements. [2025-02-08 00:13:27,311 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:27,311 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:27,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:27,650 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:27,650 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1445522486] [2025-02-08 00:13:27,650 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1445522486] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:27,650 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:27,650 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:27,650 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1999763726] [2025-02-08 00:13:27,650 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:27,651 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:13:27,651 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:27,651 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:13:27,651 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:27,651 INFO L87 Difference]: Start difference. First operand 1727 states and 2534 transitions. Second operand has 6 states, 6 states have (on average 29.5) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:28,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:28,214 INFO L93 Difference]: Finished difference Result 3636 states and 5303 transitions. [2025-02-08 00:13:28,214 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:13:28,214 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.5) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 177 [2025-02-08 00:13:28,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:28,221 INFO L225 Difference]: With dead ends: 3636 [2025-02-08 00:13:28,221 INFO L226 Difference]: Without dead ends: 2475 [2025-02-08 00:13:28,222 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:28,223 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 1873 mSDsluCounter, 3996 mSDsCounter, 0 mSdLazyCounter, 1196 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1873 SdHoareTripleChecker+Valid, 5331 SdHoareTripleChecker+Invalid, 1196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:28,223 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1873 Valid, 5331 Invalid, 1196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1196 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:28,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2475 states. [2025-02-08 00:13:28,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2475 to 2263. [2025-02-08 00:13:28,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2263 states, 2262 states have (on average 1.4677276746242263) internal successors, (3320), 2262 states have internal predecessors, (3320), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:28,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2263 states to 2263 states and 3320 transitions. [2025-02-08 00:13:28,243 INFO L78 Accepts]: Start accepts. Automaton has 2263 states and 3320 transitions. Word has length 177 [2025-02-08 00:13:28,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:28,244 INFO L471 AbstractCegarLoop]: Abstraction has 2263 states and 3320 transitions. [2025-02-08 00:13:28,244 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.5) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:28,244 INFO L276 IsEmpty]: Start isEmpty. Operand 2263 states and 3320 transitions. [2025-02-08 00:13:28,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2025-02-08 00:13:28,245 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:28,245 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:28,245 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2025-02-08 00:13:28,245 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:28,246 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:28,246 INFO L85 PathProgramCache]: Analyzing trace with hash -1512877084, now seen corresponding path program 1 times [2025-02-08 00:13:28,246 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:28,246 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356742253] [2025-02-08 00:13:28,246 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:28,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:28,303 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 177 statements into 1 equivalence classes. [2025-02-08 00:13:28,418 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 177 of 177 statements. [2025-02-08 00:13:28,418 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:28,418 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:28,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:28,637 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:28,637 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356742253] [2025-02-08 00:13:28,638 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1356742253] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:28,638 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:28,638 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:28,638 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761665021] [2025-02-08 00:13:28,638 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:28,638 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:13:28,638 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:28,639 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:13:28,639 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:28,639 INFO L87 Difference]: Start difference. First operand 2263 states and 3320 transitions. Second operand has 6 states, 6 states have (on average 29.5) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:29,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:29,580 INFO L93 Difference]: Finished difference Result 3588 states and 5230 transitions. [2025-02-08 00:13:29,580 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:13:29,580 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.5) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 177 [2025-02-08 00:13:29,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:29,584 INFO L225 Difference]: With dead ends: 3588 [2025-02-08 00:13:29,584 INFO L226 Difference]: Without dead ends: 2395 [2025-02-08 00:13:29,585 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:29,586 INFO L435 NwaCegarLoop]: 1108 mSDtfsCounter, 1854 mSDsluCounter, 3314 mSDsCounter, 0 mSdLazyCounter, 2105 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1854 SdHoareTripleChecker+Valid, 4422 SdHoareTripleChecker+Invalid, 2105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:29,586 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1854 Valid, 4422 Invalid, 2105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2105 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-02-08 00:13:29,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2395 states. [2025-02-08 00:13:29,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2395 to 2263. [2025-02-08 00:13:29,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2263 states, 2262 states have (on average 1.4659593280282937) internal successors, (3316), 2262 states have internal predecessors, (3316), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:29,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2263 states to 2263 states and 3316 transitions. [2025-02-08 00:13:29,605 INFO L78 Accepts]: Start accepts. Automaton has 2263 states and 3316 transitions. Word has length 177 [2025-02-08 00:13:29,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:29,605 INFO L471 AbstractCegarLoop]: Abstraction has 2263 states and 3316 transitions. [2025-02-08 00:13:29,606 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.5) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:29,606 INFO L276 IsEmpty]: Start isEmpty. Operand 2263 states and 3316 transitions. [2025-02-08 00:13:29,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-08 00:13:29,607 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:29,607 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:29,607 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-02-08 00:13:29,607 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:29,608 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:29,608 INFO L85 PathProgramCache]: Analyzing trace with hash -1335553275, now seen corresponding path program 1 times [2025-02-08 00:13:29,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:29,608 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1866993018] [2025-02-08 00:13:29,608 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:29,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:29,639 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-08 00:13:29,870 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-08 00:13:29,870 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:29,871 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:30,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:30,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:30,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1866993018] [2025-02-08 00:13:30,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1866993018] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:30,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:30,089 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:30,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1904159740] [2025-02-08 00:13:30,089 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:30,089 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:13:30,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:30,089 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:13:30,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:30,090 INFO L87 Difference]: Start difference. First operand 2263 states and 3316 transitions. Second operand has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:31,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:31,024 INFO L93 Difference]: Finished difference Result 3512 states and 5124 transitions. [2025-02-08 00:13:31,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:13:31,024 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-08 00:13:31,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:31,028 INFO L225 Difference]: With dead ends: 3512 [2025-02-08 00:13:31,028 INFO L226 Difference]: Without dead ends: 2395 [2025-02-08 00:13:31,029 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:31,029 INFO L435 NwaCegarLoop]: 1108 mSDtfsCounter, 1828 mSDsluCounter, 3314 mSDsCounter, 0 mSdLazyCounter, 2105 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1828 SdHoareTripleChecker+Valid, 4422 SdHoareTripleChecker+Invalid, 2105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:31,029 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1828 Valid, 4422 Invalid, 2105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2105 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-02-08 00:13:31,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2395 states. [2025-02-08 00:13:31,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2395 to 2340. [2025-02-08 00:13:31,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2340 states, 2339 states have (on average 1.459598118854211) internal successors, (3414), 2339 states have internal predecessors, (3414), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:31,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2340 states to 2340 states and 3414 transitions. [2025-02-08 00:13:31,086 INFO L78 Accepts]: Start accepts. Automaton has 2340 states and 3414 transitions. Word has length 178 [2025-02-08 00:13:31,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:31,086 INFO L471 AbstractCegarLoop]: Abstraction has 2340 states and 3414 transitions. [2025-02-08 00:13:31,086 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:31,087 INFO L276 IsEmpty]: Start isEmpty. Operand 2340 states and 3414 transitions. [2025-02-08 00:13:31,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-08 00:13:31,088 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:31,088 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:31,089 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2025-02-08 00:13:31,089 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:31,090 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:31,090 INFO L85 PathProgramCache]: Analyzing trace with hash 220892012, now seen corresponding path program 1 times [2025-02-08 00:13:31,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:31,090 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254802925] [2025-02-08 00:13:31,090 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:31,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:31,121 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-08 00:13:31,234 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-08 00:13:31,234 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:31,234 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:31,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:31,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:31,732 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254802925] [2025-02-08 00:13:31,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [254802925] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:31,732 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:31,732 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2025-02-08 00:13:31,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1098409609] [2025-02-08 00:13:31,732 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:31,733 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2025-02-08 00:13:31,733 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:31,733 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2025-02-08 00:13:31,736 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2025-02-08 00:13:31,737 INFO L87 Difference]: Start difference. First operand 2340 states and 3414 transitions. Second operand has 15 states, 15 states have (on average 11.866666666666667) internal successors, (178), 15 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:32,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:32,870 INFO L93 Difference]: Finished difference Result 3563 states and 5193 transitions. [2025-02-08 00:13:32,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-02-08 00:13:32,870 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 11.866666666666667) internal successors, (178), 15 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-08 00:13:32,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:32,874 INFO L225 Difference]: With dead ends: 3563 [2025-02-08 00:13:32,874 INFO L226 Difference]: Without dead ends: 2446 [2025-02-08 00:13:32,875 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2025-02-08 00:13:32,875 INFO L435 NwaCegarLoop]: 1343 mSDtfsCounter, 60 mSDsluCounter, 12146 mSDsCounter, 0 mSdLazyCounter, 2949 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 13489 SdHoareTripleChecker+Invalid, 2949 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2949 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:32,876 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [60 Valid, 13489 Invalid, 2949 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2949 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2025-02-08 00:13:32,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2446 states. [2025-02-08 00:13:32,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2446 to 2416. [2025-02-08 00:13:32,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2416 states, 2415 states have (on average 1.457142857142857) internal successors, (3519), 2415 states have internal predecessors, (3519), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:32,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2416 states to 2416 states and 3519 transitions. [2025-02-08 00:13:32,907 INFO L78 Accepts]: Start accepts. Automaton has 2416 states and 3519 transitions. Word has length 178 [2025-02-08 00:13:32,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:32,907 INFO L471 AbstractCegarLoop]: Abstraction has 2416 states and 3519 transitions. [2025-02-08 00:13:32,907 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 11.866666666666667) internal successors, (178), 15 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:32,907 INFO L276 IsEmpty]: Start isEmpty. Operand 2416 states and 3519 transitions. [2025-02-08 00:13:32,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-08 00:13:32,909 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:32,909 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:32,909 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2025-02-08 00:13:32,909 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:32,909 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:32,913 INFO L85 PathProgramCache]: Analyzing trace with hash 313770852, now seen corresponding path program 1 times [2025-02-08 00:13:32,913 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:32,914 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2034091434] [2025-02-08 00:13:32,914 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:32,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:32,949 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-08 00:13:33,001 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-08 00:13:33,001 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:33,001 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:33,359 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:33,360 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:33,360 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2034091434] [2025-02-08 00:13:33,360 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2034091434] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:33,360 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:33,360 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:33,360 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302112116] [2025-02-08 00:13:33,360 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:33,360 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:13:33,360 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:33,361 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:13:33,361 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:33,361 INFO L87 Difference]: Start difference. First operand 2416 states and 3519 transitions. Second operand has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:33,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:33,946 INFO L93 Difference]: Finished difference Result 4818 states and 6977 transitions. [2025-02-08 00:13:33,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:13:33,946 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-08 00:13:33,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:33,952 INFO L225 Difference]: With dead ends: 4818 [2025-02-08 00:13:33,952 INFO L226 Difference]: Without dead ends: 3658 [2025-02-08 00:13:33,953 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:33,954 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 2119 mSDsluCounter, 3996 mSDsCounter, 0 mSdLazyCounter, 1196 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2119 SdHoareTripleChecker+Valid, 5331 SdHoareTripleChecker+Invalid, 1196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:33,955 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2119 Valid, 5331 Invalid, 1196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1196 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:33,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3658 states. [2025-02-08 00:13:33,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3658 to 3568. [2025-02-08 00:13:33,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3568 states, 3567 states have (on average 1.4440706476030278) internal successors, (5151), 3567 states have internal predecessors, (5151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:33,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3568 states to 3568 states and 5151 transitions. [2025-02-08 00:13:33,988 INFO L78 Accepts]: Start accepts. Automaton has 3568 states and 5151 transitions. Word has length 178 [2025-02-08 00:13:33,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:33,988 INFO L471 AbstractCegarLoop]: Abstraction has 3568 states and 5151 transitions. [2025-02-08 00:13:33,988 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:33,988 INFO L276 IsEmpty]: Start isEmpty. Operand 3568 states and 5151 transitions. [2025-02-08 00:13:33,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-08 00:13:33,991 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:33,991 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:33,992 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2025-02-08 00:13:33,992 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:33,992 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:33,992 INFO L85 PathProgramCache]: Analyzing trace with hash 1039789316, now seen corresponding path program 1 times [2025-02-08 00:13:33,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:33,992 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1287714845] [2025-02-08 00:13:33,993 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:33,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:34,026 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-08 00:13:34,143 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-08 00:13:34,143 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:34,143 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:34,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:34,712 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:34,712 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1287714845] [2025-02-08 00:13:34,712 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1287714845] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:34,712 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:34,712 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-08 00:13:34,712 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [184246929] [2025-02-08 00:13:34,712 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:34,713 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-08 00:13:34,713 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:34,713 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-08 00:13:34,713 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:13:34,713 INFO L87 Difference]: Start difference. First operand 3568 states and 5151 transitions. Second operand has 8 states, 8 states have (on average 22.25) internal successors, (178), 7 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:35,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:35,399 INFO L93 Difference]: Finished difference Result 7513 states and 10827 transitions. [2025-02-08 00:13:35,399 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-08 00:13:35,399 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 22.25) internal successors, (178), 7 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-08 00:13:35,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:35,407 INFO L225 Difference]: With dead ends: 7513 [2025-02-08 00:13:35,408 INFO L226 Difference]: Without dead ends: 6353 [2025-02-08 00:13:35,411 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2025-02-08 00:13:35,416 INFO L435 NwaCegarLoop]: 1334 mSDtfsCounter, 2198 mSDsluCounter, 5533 mSDsCounter, 0 mSdLazyCounter, 1549 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2198 SdHoareTripleChecker+Valid, 6867 SdHoareTripleChecker+Invalid, 1549 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1549 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:35,416 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2198 Valid, 6867 Invalid, 1549 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1549 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-08 00:13:35,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6353 states. [2025-02-08 00:13:35,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6353 to 6349. [2025-02-08 00:13:35,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6349 states, 6348 states have (on average 1.437775677378702) internal successors, (9127), 6348 states have internal predecessors, (9127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:35,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6349 states to 6349 states and 9127 transitions. [2025-02-08 00:13:35,475 INFO L78 Accepts]: Start accepts. Automaton has 6349 states and 9127 transitions. Word has length 178 [2025-02-08 00:13:35,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:35,476 INFO L471 AbstractCegarLoop]: Abstraction has 6349 states and 9127 transitions. [2025-02-08 00:13:35,476 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 22.25) internal successors, (178), 7 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:35,476 INFO L276 IsEmpty]: Start isEmpty. Operand 6349 states and 9127 transitions. [2025-02-08 00:13:35,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-08 00:13:35,482 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:35,483 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:35,483 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2025-02-08 00:13:35,483 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:35,483 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:35,483 INFO L85 PathProgramCache]: Analyzing trace with hash -1812840502, now seen corresponding path program 1 times [2025-02-08 00:13:35,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:35,484 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1334531482] [2025-02-08 00:13:35,484 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:35,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:35,516 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-08 00:13:35,625 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-08 00:13:35,625 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:35,625 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:35,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:35,961 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:35,961 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1334531482] [2025-02-08 00:13:35,961 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1334531482] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:35,961 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:35,961 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:13:35,961 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932182064] [2025-02-08 00:13:35,961 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:35,962 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-08 00:13:35,962 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:35,962 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 00:13:35,962 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:35,962 INFO L87 Difference]: Start difference. First operand 6349 states and 9127 transitions. Second operand has 7 states, 7 states have (on average 25.428571428571427) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:36,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:36,567 INFO L93 Difference]: Finished difference Result 7513 states and 10827 transitions. [2025-02-08 00:13:36,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-08 00:13:36,567 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.428571428571427) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-08 00:13:36,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:36,577 INFO L225 Difference]: With dead ends: 7513 [2025-02-08 00:13:36,577 INFO L226 Difference]: Without dead ends: 6353 [2025-02-08 00:13:36,580 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:13:36,581 INFO L435 NwaCegarLoop]: 1331 mSDtfsCounter, 1468 mSDsluCounter, 5103 mSDsCounter, 0 mSdLazyCounter, 1464 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1468 SdHoareTripleChecker+Valid, 6434 SdHoareTripleChecker+Invalid, 1465 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1464 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:36,581 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1468 Valid, 6434 Invalid, 1465 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1464 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-08 00:13:36,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6353 states. [2025-02-08 00:13:36,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6353 to 6349. [2025-02-08 00:13:36,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6349 states, 6348 states have (on average 1.437775677378702) internal successors, (9127), 6348 states have internal predecessors, (9127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:36,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6349 states to 6349 states and 9127 transitions. [2025-02-08 00:13:36,685 INFO L78 Accepts]: Start accepts. Automaton has 6349 states and 9127 transitions. Word has length 178 [2025-02-08 00:13:36,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:36,686 INFO L471 AbstractCegarLoop]: Abstraction has 6349 states and 9127 transitions. [2025-02-08 00:13:36,686 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.428571428571427) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:36,686 INFO L276 IsEmpty]: Start isEmpty. Operand 6349 states and 9127 transitions. [2025-02-08 00:13:36,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-08 00:13:36,691 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:36,692 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:36,692 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2025-02-08 00:13:36,692 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:36,692 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:36,692 INFO L85 PathProgramCache]: Analyzing trace with hash -327160657, now seen corresponding path program 1 times [2025-02-08 00:13:36,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:36,693 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585387728] [2025-02-08 00:13:36,693 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:36,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:36,728 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-08 00:13:36,749 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-08 00:13:36,749 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:36,749 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:36,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:36,914 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:36,914 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1585387728] [2025-02-08 00:13:36,914 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1585387728] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:36,914 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:36,914 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:13:36,915 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766889834] [2025-02-08 00:13:36,915 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:36,915 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:13:36,915 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:36,915 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:13:36,915 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:36,915 INFO L87 Difference]: Start difference. First operand 6349 states and 9127 transitions. Second operand has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:37,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:37,494 INFO L93 Difference]: Finished difference Result 7545 states and 10875 transitions. [2025-02-08 00:13:37,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:13:37,495 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-08 00:13:37,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:37,503 INFO L225 Difference]: With dead ends: 7545 [2025-02-08 00:13:37,503 INFO L226 Difference]: Without dead ends: 6385 [2025-02-08 00:13:37,505 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:37,506 INFO L435 NwaCegarLoop]: 1358 mSDtfsCounter, 16 mSDsluCounter, 5417 mSDsCounter, 0 mSdLazyCounter, 1384 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 6775 SdHoareTripleChecker+Invalid, 1385 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1384 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:37,506 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 6775 Invalid, 1385 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1384 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:37,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6385 states. [2025-02-08 00:13:37,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6385 to 6385. [2025-02-08 00:13:37,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6385 states, 6384 states have (on average 1.4378132832080202) internal successors, (9179), 6384 states have internal predecessors, (9179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:37,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6385 states to 6385 states and 9179 transitions. [2025-02-08 00:13:37,565 INFO L78 Accepts]: Start accepts. Automaton has 6385 states and 9179 transitions. Word has length 178 [2025-02-08 00:13:37,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:37,565 INFO L471 AbstractCegarLoop]: Abstraction has 6385 states and 9179 transitions. [2025-02-08 00:13:37,565 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:37,565 INFO L276 IsEmpty]: Start isEmpty. Operand 6385 states and 9179 transitions. [2025-02-08 00:13:37,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-08 00:13:37,570 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:37,571 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:37,571 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2025-02-08 00:13:37,571 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:37,571 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:37,571 INFO L85 PathProgramCache]: Analyzing trace with hash 82545634, now seen corresponding path program 1 times [2025-02-08 00:13:37,571 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:37,572 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980656568] [2025-02-08 00:13:37,572 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:37,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:37,604 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-08 00:13:37,725 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-08 00:13:37,726 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:37,726 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:38,442 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:38,442 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:38,442 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980656568] [2025-02-08 00:13:38,442 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1980656568] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:38,443 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:38,443 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-08 00:13:38,443 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [140689004] [2025-02-08 00:13:38,443 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:38,443 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2025-02-08 00:13:38,443 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:38,444 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-02-08 00:13:38,444 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-02-08 00:13:38,444 INFO L87 Difference]: Start difference. First operand 6385 states and 9179 transitions. Second operand has 11 states, 11 states have (on average 16.272727272727273) internal successors, (179), 10 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:39,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:39,404 INFO L93 Difference]: Finished difference Result 9656 states and 13749 transitions. [2025-02-08 00:13:39,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-02-08 00:13:39,404 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 16.272727272727273) internal successors, (179), 10 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-08 00:13:39,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:39,413 INFO L225 Difference]: With dead ends: 9656 [2025-02-08 00:13:39,413 INFO L226 Difference]: Without dead ends: 8396 [2025-02-08 00:13:39,417 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=138, Unknown=0, NotChecked=0, Total=182 [2025-02-08 00:13:39,417 INFO L435 NwaCegarLoop]: 1328 mSDtfsCounter, 1855 mSDsluCounter, 7337 mSDsCounter, 0 mSdLazyCounter, 2046 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1855 SdHoareTripleChecker+Valid, 8665 SdHoareTripleChecker+Invalid, 2047 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2046 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:39,417 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1855 Valid, 8665 Invalid, 2047 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2046 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-02-08 00:13:39,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8396 states. [2025-02-08 00:13:39,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8396 to 8131. [2025-02-08 00:13:39,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8131 states, 8130 states have (on average 1.4168511685116851) internal successors, (11519), 8130 states have internal predecessors, (11519), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:39,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8131 states to 8131 states and 11519 transitions. [2025-02-08 00:13:39,497 INFO L78 Accepts]: Start accepts. Automaton has 8131 states and 11519 transitions. Word has length 179 [2025-02-08 00:13:39,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:39,497 INFO L471 AbstractCegarLoop]: Abstraction has 8131 states and 11519 transitions. [2025-02-08 00:13:39,497 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 16.272727272727273) internal successors, (179), 10 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:39,497 INFO L276 IsEmpty]: Start isEmpty. Operand 8131 states and 11519 transitions. [2025-02-08 00:13:39,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-08 00:13:39,506 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:39,506 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:39,506 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2025-02-08 00:13:39,506 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:39,506 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:39,506 INFO L85 PathProgramCache]: Analyzing trace with hash 1201092448, now seen corresponding path program 1 times [2025-02-08 00:13:39,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:39,507 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1617060398] [2025-02-08 00:13:39,507 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:39,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:39,537 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-08 00:13:39,648 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-08 00:13:39,648 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:39,648 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:39,939 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:39,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:39,940 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1617060398] [2025-02-08 00:13:39,940 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1617060398] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:39,940 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:39,940 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-08 00:13:39,940 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755364384] [2025-02-08 00:13:39,940 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:39,940 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:39,940 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:39,941 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:39,941 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:39,941 INFO L87 Difference]: Start difference. First operand 8131 states and 11519 transitions. Second operand has 5 states, 5 states have (on average 35.8) internal successors, (179), 4 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:40,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:40,404 INFO L93 Difference]: Finished difference Result 9740 states and 13841 transitions. [2025-02-08 00:13:40,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:13:40,404 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 4 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-08 00:13:40,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:40,411 INFO L225 Difference]: With dead ends: 9740 [2025-02-08 00:13:40,411 INFO L226 Difference]: Without dead ends: 8163 [2025-02-08 00:13:40,415 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:40,415 INFO L435 NwaCegarLoop]: 1334 mSDtfsCounter, 1516 mSDsluCounter, 2662 mSDsCounter, 0 mSdLazyCounter, 899 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1516 SdHoareTripleChecker+Valid, 3996 SdHoareTripleChecker+Invalid, 899 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 899 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:40,415 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1516 Valid, 3996 Invalid, 899 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 899 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-08 00:13:40,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8163 states. [2025-02-08 00:13:40,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8163 to 8163. [2025-02-08 00:13:40,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8163 states, 8162 states have (on average 1.4157069345748592) internal successors, (11555), 8162 states have internal predecessors, (11555), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:40,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8163 states to 8163 states and 11555 transitions. [2025-02-08 00:13:40,472 INFO L78 Accepts]: Start accepts. Automaton has 8163 states and 11555 transitions. Word has length 179 [2025-02-08 00:13:40,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:40,473 INFO L471 AbstractCegarLoop]: Abstraction has 8163 states and 11555 transitions. [2025-02-08 00:13:40,473 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 4 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:40,473 INFO L276 IsEmpty]: Start isEmpty. Operand 8163 states and 11555 transitions. [2025-02-08 00:13:40,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-08 00:13:40,480 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:40,480 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:40,481 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2025-02-08 00:13:40,481 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:40,481 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:40,481 INFO L85 PathProgramCache]: Analyzing trace with hash -848862305, now seen corresponding path program 1 times [2025-02-08 00:13:40,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:40,481 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [46923466] [2025-02-08 00:13:40,481 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:40,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:40,513 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-08 00:13:40,612 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-08 00:13:40,613 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:40,613 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:40,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:40,884 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:40,884 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [46923466] [2025-02-08 00:13:40,884 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [46923466] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:40,884 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:40,884 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:40,884 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [803027891] [2025-02-08 00:13:40,884 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:40,885 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:13:40,885 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:40,885 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:13:40,885 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:40,885 INFO L87 Difference]: Start difference. First operand 8163 states and 11555 transitions. Second operand has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:41,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:41,460 INFO L93 Difference]: Finished difference Result 17114 states and 24077 transitions. [2025-02-08 00:13:41,460 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:13:41,460 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-08 00:13:41,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:41,474 INFO L225 Difference]: With dead ends: 17114 [2025-02-08 00:13:41,474 INFO L226 Difference]: Without dead ends: 14529 [2025-02-08 00:13:41,479 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:41,479 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 1865 mSDsluCounter, 3996 mSDsCounter, 0 mSdLazyCounter, 1196 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1865 SdHoareTripleChecker+Valid, 5331 SdHoareTripleChecker+Invalid, 1196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:41,480 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1865 Valid, 5331 Invalid, 1196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1196 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:41,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14529 states. [2025-02-08 00:13:41,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14529 to 13539. [2025-02-08 00:13:41,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13539 states, 13538 states have (on average 1.4119515438026295) internal successors, (19115), 13538 states have internal predecessors, (19115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:41,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13539 states to 13539 states and 19115 transitions. [2025-02-08 00:13:41,594 INFO L78 Accepts]: Start accepts. Automaton has 13539 states and 19115 transitions. Word has length 179 [2025-02-08 00:13:41,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:41,595 INFO L471 AbstractCegarLoop]: Abstraction has 13539 states and 19115 transitions. [2025-02-08 00:13:41,595 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:41,595 INFO L276 IsEmpty]: Start isEmpty. Operand 13539 states and 19115 transitions. [2025-02-08 00:13:41,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-08 00:13:41,611 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:41,611 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:41,611 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2025-02-08 00:13:41,611 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:41,612 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:41,612 INFO L85 PathProgramCache]: Analyzing trace with hash 248269984, now seen corresponding path program 1 times [2025-02-08 00:13:41,612 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:41,613 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1320235466] [2025-02-08 00:13:41,613 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:41,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:41,643 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-08 00:13:41,699 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-08 00:13:41,700 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:41,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:41,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:41,897 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:41,897 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1320235466] [2025-02-08 00:13:41,897 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1320235466] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:41,897 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:41,897 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:41,898 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762651851] [2025-02-08 00:13:41,898 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:41,898 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:41,898 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:41,898 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:41,898 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:41,899 INFO L87 Difference]: Start difference. First operand 13539 states and 19115 transitions. Second operand has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:42,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:42,406 INFO L93 Difference]: Finished difference Result 16648 states and 23367 transitions. [2025-02-08 00:13:42,406 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:13:42,406 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-08 00:13:42,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:42,418 INFO L225 Difference]: With dead ends: 16648 [2025-02-08 00:13:42,418 INFO L226 Difference]: Without dead ends: 13575 [2025-02-08 00:13:42,424 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:42,426 INFO L435 NwaCegarLoop]: 1355 mSDtfsCounter, 215 mSDsluCounter, 4053 mSDsCounter, 0 mSdLazyCounter, 1119 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 215 SdHoareTripleChecker+Valid, 5408 SdHoareTripleChecker+Invalid, 1119 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1119 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:42,427 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [215 Valid, 5408 Invalid, 1119 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1119 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:42,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13575 states. [2025-02-08 00:13:42,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13575 to 13123. [2025-02-08 00:13:42,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13123 states, 13122 states have (on average 1.4115988416399938) internal successors, (18523), 13122 states have internal predecessors, (18523), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:42,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13123 states to 13123 states and 18523 transitions. [2025-02-08 00:13:42,618 INFO L78 Accepts]: Start accepts. Automaton has 13123 states and 18523 transitions. Word has length 179 [2025-02-08 00:13:42,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:42,618 INFO L471 AbstractCegarLoop]: Abstraction has 13123 states and 18523 transitions. [2025-02-08 00:13:42,618 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:42,618 INFO L276 IsEmpty]: Start isEmpty. Operand 13123 states and 18523 transitions. [2025-02-08 00:13:42,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-08 00:13:42,631 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:42,631 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:42,631 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2025-02-08 00:13:42,631 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:42,631 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:42,631 INFO L85 PathProgramCache]: Analyzing trace with hash -709659749, now seen corresponding path program 1 times [2025-02-08 00:13:42,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:42,631 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811484521] [2025-02-08 00:13:42,632 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:42,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:42,665 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-08 00:13:42,762 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-08 00:13:42,762 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:42,762 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:42,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:42,959 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:42,959 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811484521] [2025-02-08 00:13:42,959 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [811484521] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:42,960 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:42,960 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:42,960 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691343914] [2025-02-08 00:13:42,960 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:42,960 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:42,960 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:42,961 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:42,961 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:42,961 INFO L87 Difference]: Start difference. First operand 13123 states and 18523 transitions. Second operand has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:43,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:43,467 INFO L93 Difference]: Finished difference Result 15109 states and 21311 transitions. [2025-02-08 00:13:43,467 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:13:43,467 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-08 00:13:43,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:43,478 INFO L225 Difference]: With dead ends: 15109 [2025-02-08 00:13:43,478 INFO L226 Difference]: Without dead ends: 12205 [2025-02-08 00:13:43,483 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:43,484 INFO L435 NwaCegarLoop]: 1357 mSDtfsCounter, 223 mSDsluCounter, 4057 mSDsCounter, 0 mSdLazyCounter, 1125 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 223 SdHoareTripleChecker+Valid, 5414 SdHoareTripleChecker+Invalid, 1125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1125 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:43,484 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [223 Valid, 5414 Invalid, 1125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1125 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:43,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12205 states. [2025-02-08 00:13:43,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12205 to 11979. [2025-02-08 00:13:43,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11979 states, 11978 states have (on average 1.4221906829186843) internal successors, (17035), 11978 states have internal predecessors, (17035), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:43,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11979 states to 11979 states and 17035 transitions. [2025-02-08 00:13:43,579 INFO L78 Accepts]: Start accepts. Automaton has 11979 states and 17035 transitions. Word has length 179 [2025-02-08 00:13:43,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:43,579 INFO L471 AbstractCegarLoop]: Abstraction has 11979 states and 17035 transitions. [2025-02-08 00:13:43,579 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:43,579 INFO L276 IsEmpty]: Start isEmpty. Operand 11979 states and 17035 transitions. [2025-02-08 00:13:43,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-08 00:13:43,590 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:43,590 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:43,590 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2025-02-08 00:13:43,590 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:43,590 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:43,590 INFO L85 PathProgramCache]: Analyzing trace with hash 227259939, now seen corresponding path program 1 times [2025-02-08 00:13:43,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:43,591 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [665942325] [2025-02-08 00:13:43,591 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:43,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:43,623 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-08 00:13:43,670 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-08 00:13:43,670 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:43,670 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:44,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:44,090 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:44,090 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [665942325] [2025-02-08 00:13:44,090 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [665942325] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:44,090 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:44,090 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:13:44,090 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570151639] [2025-02-08 00:13:44,090 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:44,090 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-08 00:13:44,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:44,091 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 00:13:44,091 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:44,091 INFO L87 Difference]: Start difference. First operand 11979 states and 17035 transitions. Second operand has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:44,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:44,831 INFO L93 Difference]: Finished difference Result 26358 states and 37135 transitions. [2025-02-08 00:13:44,832 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:13:44,832 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-08 00:13:44,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:44,853 INFO L225 Difference]: With dead ends: 26358 [2025-02-08 00:13:44,854 INFO L226 Difference]: Without dead ends: 21809 [2025-02-08 00:13:44,865 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:13:44,866 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 1878 mSDsluCounter, 5326 mSDsCounter, 0 mSdLazyCounter, 1498 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1878 SdHoareTripleChecker+Valid, 6661 SdHoareTripleChecker+Invalid, 1499 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1498 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:44,866 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1878 Valid, 6661 Invalid, 1499 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1498 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-02-08 00:13:44,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21809 states. [2025-02-08 00:13:44,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21809 to 12011. [2025-02-08 00:13:44,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12011 states, 12010 states have (on average 1.4223980016652789) internal successors, (17083), 12010 states have internal predecessors, (17083), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:44,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12011 states to 12011 states and 17083 transitions. [2025-02-08 00:13:44,999 INFO L78 Accepts]: Start accepts. Automaton has 12011 states and 17083 transitions. Word has length 179 [2025-02-08 00:13:44,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:45,000 INFO L471 AbstractCegarLoop]: Abstraction has 12011 states and 17083 transitions. [2025-02-08 00:13:45,000 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:45,000 INFO L276 IsEmpty]: Start isEmpty. Operand 12011 states and 17083 transitions. [2025-02-08 00:13:45,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-08 00:13:45,010 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:45,010 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:45,010 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2025-02-08 00:13:45,010 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:45,010 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:45,011 INFO L85 PathProgramCache]: Analyzing trace with hash -1713237549, now seen corresponding path program 1 times [2025-02-08 00:13:45,011 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:45,011 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1933572838] [2025-02-08 00:13:45,011 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:45,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:45,042 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-08 00:13:45,167 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-08 00:13:45,168 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:45,168 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:45,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:45,421 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:45,421 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1933572838] [2025-02-08 00:13:45,422 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1933572838] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:45,422 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:45,422 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:13:45,422 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [802441642] [2025-02-08 00:13:45,422 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:45,422 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-08 00:13:45,422 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:45,422 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 00:13:45,423 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:45,423 INFO L87 Difference]: Start difference. First operand 12011 states and 17083 transitions. Second operand has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:46,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:46,961 INFO L93 Difference]: Finished difference Result 21511 states and 30552 transitions. [2025-02-08 00:13:46,962 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-08 00:13:46,962 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-08 00:13:46,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:46,977 INFO L225 Difference]: With dead ends: 21511 [2025-02-08 00:13:46,977 INFO L226 Difference]: Without dead ends: 16901 [2025-02-08 00:13:46,985 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2025-02-08 00:13:46,986 INFO L435 NwaCegarLoop]: 2460 mSDtfsCounter, 1573 mSDsluCounter, 10955 mSDsCounter, 0 mSdLazyCounter, 3323 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1573 SdHoareTripleChecker+Valid, 13415 SdHoareTripleChecker+Invalid, 3384 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 3323 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:46,986 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1573 Valid, 13415 Invalid, 3384 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 3323 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2025-02-08 00:13:46,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16901 states. [2025-02-08 00:13:47,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16901 to 15323. [2025-02-08 00:13:47,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15323 states, 15322 states have (on average 1.4329069312100249) internal successors, (21955), 15322 states have internal predecessors, (21955), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:47,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15323 states to 15323 states and 21955 transitions. [2025-02-08 00:13:47,109 INFO L78 Accepts]: Start accepts. Automaton has 15323 states and 21955 transitions. Word has length 179 [2025-02-08 00:13:47,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:47,110 INFO L471 AbstractCegarLoop]: Abstraction has 15323 states and 21955 transitions. [2025-02-08 00:13:47,110 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:47,110 INFO L276 IsEmpty]: Start isEmpty. Operand 15323 states and 21955 transitions. [2025-02-08 00:13:47,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-08 00:13:47,123 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:47,123 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:47,123 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2025-02-08 00:13:47,123 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:47,124 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:47,124 INFO L85 PathProgramCache]: Analyzing trace with hash -83334581, now seen corresponding path program 1 times [2025-02-08 00:13:47,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:47,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [8127943] [2025-02-08 00:13:47,124 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:47,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:47,154 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-08 00:13:47,369 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-08 00:13:47,369 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:47,369 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:47,638 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:47,638 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:47,639 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [8127943] [2025-02-08 00:13:47,639 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [8127943] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:47,639 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:47,639 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:13:47,639 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [986168917] [2025-02-08 00:13:47,639 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:47,639 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-08 00:13:47,639 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:47,640 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 00:13:47,640 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:47,640 INFO L87 Difference]: Start difference. First operand 15323 states and 21955 transitions. Second operand has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:48,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:48,904 INFO L93 Difference]: Finished difference Result 18916 states and 26929 transitions. [2025-02-08 00:13:48,904 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-08 00:13:48,904 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-08 00:13:48,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:48,920 INFO L225 Difference]: With dead ends: 18916 [2025-02-08 00:13:48,921 INFO L226 Difference]: Without dead ends: 17335 [2025-02-08 00:13:48,927 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:48,927 INFO L435 NwaCegarLoop]: 1592 mSDtfsCounter, 236 mSDsluCounter, 7105 mSDsCounter, 0 mSdLazyCounter, 2496 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 236 SdHoareTripleChecker+Valid, 8697 SdHoareTripleChecker+Invalid, 2498 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 2496 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:48,928 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [236 Valid, 8697 Invalid, 2498 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 2496 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2025-02-08 00:13:48,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17335 states. [2025-02-08 00:13:49,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17335 to 16907. [2025-02-08 00:13:49,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16907 states, 16906 states have (on average 1.4246421388856028) internal successors, (24085), 16906 states have internal predecessors, (24085), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:49,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16907 states to 16907 states and 24085 transitions. [2025-02-08 00:13:49,109 INFO L78 Accepts]: Start accepts. Automaton has 16907 states and 24085 transitions. Word has length 179 [2025-02-08 00:13:49,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:49,110 INFO L471 AbstractCegarLoop]: Abstraction has 16907 states and 24085 transitions. [2025-02-08 00:13:49,110 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:49,110 INFO L276 IsEmpty]: Start isEmpty. Operand 16907 states and 24085 transitions. [2025-02-08 00:13:49,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-08 00:13:49,124 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:49,124 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:49,124 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2025-02-08 00:13:49,124 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:49,124 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:49,124 INFO L85 PathProgramCache]: Analyzing trace with hash -1406934105, now seen corresponding path program 1 times [2025-02-08 00:13:49,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:49,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [304130580] [2025-02-08 00:13:49,124 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:49,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:49,155 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-08 00:13:49,188 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-08 00:13:49,188 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:49,188 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:49,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:49,467 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:49,467 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [304130580] [2025-02-08 00:13:49,467 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [304130580] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:49,467 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:49,467 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:49,467 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1594271702] [2025-02-08 00:13:49,467 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:49,468 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:13:49,468 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:49,468 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:13:49,468 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:49,468 INFO L87 Difference]: Start difference. First operand 16907 states and 24085 transitions. Second operand has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:50,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:50,069 INFO L93 Difference]: Finished difference Result 37984 states and 53641 transitions. [2025-02-08 00:13:50,069 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:13:50,069 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-08 00:13:50,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:50,096 INFO L225 Difference]: With dead ends: 37984 [2025-02-08 00:13:50,097 INFO L226 Difference]: Without dead ends: 30309 [2025-02-08 00:13:50,110 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:50,111 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 1883 mSDsluCounter, 3996 mSDsCounter, 0 mSdLazyCounter, 1196 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1883 SdHoareTripleChecker+Valid, 5331 SdHoareTripleChecker+Invalid, 1196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:50,111 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1883 Valid, 5331 Invalid, 1196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1196 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:13:50,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30309 states. [2025-02-08 00:13:50,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30309 to 16907. [2025-02-08 00:13:50,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16907 states, 16906 states have (on average 1.4246421388856028) internal successors, (24085), 16906 states have internal predecessors, (24085), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:50,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16907 states to 16907 states and 24085 transitions. [2025-02-08 00:13:50,285 INFO L78 Accepts]: Start accepts. Automaton has 16907 states and 24085 transitions. Word has length 179 [2025-02-08 00:13:50,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:50,285 INFO L471 AbstractCegarLoop]: Abstraction has 16907 states and 24085 transitions. [2025-02-08 00:13:50,285 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:50,285 INFO L276 IsEmpty]: Start isEmpty. Operand 16907 states and 24085 transitions. [2025-02-08 00:13:50,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-08 00:13:50,298 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:50,298 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:50,298 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2025-02-08 00:13:50,298 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:50,298 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:50,298 INFO L85 PathProgramCache]: Analyzing trace with hash 1722060888, now seen corresponding path program 1 times [2025-02-08 00:13:50,299 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:50,299 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1128510603] [2025-02-08 00:13:50,299 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:50,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:50,328 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-08 00:13:50,474 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-08 00:13:50,475 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:50,475 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:50,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:50,791 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:50,792 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1128510603] [2025-02-08 00:13:50,792 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1128510603] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:50,792 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:50,792 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:13:50,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [632502348] [2025-02-08 00:13:50,792 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:50,792 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-08 00:13:50,792 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:50,793 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 00:13:50,793 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:13:50,793 INFO L87 Difference]: Start difference. First operand 16907 states and 24085 transitions. Second operand has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 6 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:51,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:51,458 INFO L93 Difference]: Finished difference Result 34702 states and 49243 transitions. [2025-02-08 00:13:51,458 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:13:51,458 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 6 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-08 00:13:51,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:51,493 INFO L225 Difference]: With dead ends: 34702 [2025-02-08 00:13:51,493 INFO L226 Difference]: Without dead ends: 31885 [2025-02-08 00:13:51,506 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-08 00:13:51,506 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 1870 mSDsluCounter, 5326 mSDsCounter, 0 mSdLazyCounter, 1498 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1870 SdHoareTripleChecker+Valid, 6661 SdHoareTripleChecker+Invalid, 1499 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1498 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:51,509 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1870 Valid, 6661 Invalid, 1499 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1498 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-08 00:13:51,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31885 states. [2025-02-08 00:13:51,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31885 to 17003. [2025-02-08 00:13:51,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17003 states, 17002 states have (on average 1.4250676391012822) internal successors, (24229), 17002 states have internal predecessors, (24229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:51,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17003 states to 17003 states and 24229 transitions. [2025-02-08 00:13:51,723 INFO L78 Accepts]: Start accepts. Automaton has 17003 states and 24229 transitions. Word has length 180 [2025-02-08 00:13:51,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:51,724 INFO L471 AbstractCegarLoop]: Abstraction has 17003 states and 24229 transitions. [2025-02-08 00:13:51,726 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 6 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:51,726 INFO L276 IsEmpty]: Start isEmpty. Operand 17003 states and 24229 transitions. [2025-02-08 00:13:51,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-08 00:13:51,756 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:51,757 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:51,757 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2025-02-08 00:13:51,757 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:51,757 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:51,757 INFO L85 PathProgramCache]: Analyzing trace with hash 1791505263, now seen corresponding path program 1 times [2025-02-08 00:13:51,757 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:51,757 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091564873] [2025-02-08 00:13:51,757 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:51,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:51,795 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-08 00:13:51,866 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-08 00:13:51,866 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:51,866 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:52,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:52,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:52,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091564873] [2025-02-08 00:13:52,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2091564873] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:52,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:52,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:52,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258905978] [2025-02-08 00:13:52,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:52,088 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:52,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:52,089 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:52,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:52,089 INFO L87 Difference]: Start difference. First operand 17003 states and 24229 transitions. Second operand has 5 states, 5 states have (on average 36.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:52,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:52,547 INFO L93 Difference]: Finished difference Result 18909 states and 26925 transitions. [2025-02-08 00:13:52,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 00:13:52,547 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 36.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-08 00:13:52,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:52,563 INFO L225 Difference]: With dead ends: 18909 [2025-02-08 00:13:52,563 INFO L226 Difference]: Without dead ends: 17149 [2025-02-08 00:13:52,569 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:52,570 INFO L435 NwaCegarLoop]: 1360 mSDtfsCounter, 193 mSDsluCounter, 4063 mSDsCounter, 0 mSdLazyCounter, 1128 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 193 SdHoareTripleChecker+Valid, 5423 SdHoareTripleChecker+Invalid, 1128 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:52,570 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [193 Valid, 5423 Invalid, 1128 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1128 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-08 00:13:52,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17149 states. [2025-02-08 00:13:52,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17149 to 16987. [2025-02-08 00:13:52,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16987 states, 16986 states have (on average 1.4245260803014248) internal successors, (24197), 16986 states have internal predecessors, (24197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:52,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16987 states to 16987 states and 24197 transitions. [2025-02-08 00:13:52,709 INFO L78 Accepts]: Start accepts. Automaton has 16987 states and 24197 transitions. Word has length 180 [2025-02-08 00:13:52,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:52,709 INFO L471 AbstractCegarLoop]: Abstraction has 16987 states and 24197 transitions. [2025-02-08 00:13:52,709 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 36.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:52,709 INFO L276 IsEmpty]: Start isEmpty. Operand 16987 states and 24197 transitions. [2025-02-08 00:13:52,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-08 00:13:52,723 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:52,723 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:52,723 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2025-02-08 00:13:52,723 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:52,723 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:52,723 INFO L85 PathProgramCache]: Analyzing trace with hash 1618824468, now seen corresponding path program 1 times [2025-02-08 00:13:52,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:52,724 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1496116726] [2025-02-08 00:13:52,724 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:52,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:52,823 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-08 00:13:52,943 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-08 00:13:52,944 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:52,944 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:53,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:53,588 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:53,588 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1496116726] [2025-02-08 00:13:53,588 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1496116726] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:53,588 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:53,588 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2025-02-08 00:13:53,589 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1536296369] [2025-02-08 00:13:53,589 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:53,589 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2025-02-08 00:13:53,589 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:53,589 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2025-02-08 00:13:53,589 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=342, Unknown=0, NotChecked=0, Total=380 [2025-02-08 00:13:53,589 INFO L87 Difference]: Start difference. First operand 16987 states and 24197 transitions. Second operand has 20 states, 20 states have (on average 9.0) internal successors, (180), 20 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:55,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:55,724 INFO L93 Difference]: Finished difference Result 19192 states and 27306 transitions. [2025-02-08 00:13:55,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2025-02-08 00:13:55,725 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 9.0) internal successors, (180), 20 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-08 00:13:55,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:55,740 INFO L225 Difference]: With dead ends: 19192 [2025-02-08 00:13:55,740 INFO L226 Difference]: Without dead ends: 17645 [2025-02-08 00:13:55,746 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=416, Unknown=0, NotChecked=0, Total=462 [2025-02-08 00:13:55,746 INFO L435 NwaCegarLoop]: 1336 mSDtfsCounter, 88 mSDsluCounter, 22671 mSDsCounter, 0 mSdLazyCounter, 5510 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 88 SdHoareTripleChecker+Valid, 24007 SdHoareTripleChecker+Invalid, 5510 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5510 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.0s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:55,746 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [88 Valid, 24007 Invalid, 5510 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5510 Invalid, 0 Unknown, 0 Unchecked, 2.0s Time] [2025-02-08 00:13:55,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17645 states. [2025-02-08 00:13:55,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17645 to 17493. [2025-02-08 00:13:55,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17493 states, 17492 states have (on average 1.4247084381431512) internal successors, (24921), 17492 states have internal predecessors, (24921), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:55,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17493 states to 17493 states and 24921 transitions. [2025-02-08 00:13:55,893 INFO L78 Accepts]: Start accepts. Automaton has 17493 states and 24921 transitions. Word has length 180 [2025-02-08 00:13:55,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:55,893 INFO L471 AbstractCegarLoop]: Abstraction has 17493 states and 24921 transitions. [2025-02-08 00:13:55,894 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 9.0) internal successors, (180), 20 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:55,894 INFO L276 IsEmpty]: Start isEmpty. Operand 17493 states and 24921 transitions. [2025-02-08 00:13:55,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-08 00:13:55,910 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:55,910 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:55,911 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2025-02-08 00:13:55,911 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:55,911 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:55,911 INFO L85 PathProgramCache]: Analyzing trace with hash 833568057, now seen corresponding path program 1 times [2025-02-08 00:13:55,911 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:55,911 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98234734] [2025-02-08 00:13:55,911 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:55,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:55,950 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-08 00:13:56,056 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-08 00:13:56,056 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:56,056 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:56,642 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:56,642 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:56,642 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98234734] [2025-02-08 00:13:56,642 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [98234734] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:56,642 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:56,642 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2025-02-08 00:13:56,642 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1267406318] [2025-02-08 00:13:56,642 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:56,643 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2025-02-08 00:13:56,643 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:56,643 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2025-02-08 00:13:56,643 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2025-02-08 00:13:56,643 INFO L87 Difference]: Start difference. First operand 17493 states and 24921 transitions. Second operand has 18 states, 18 states have (on average 10.0) internal successors, (180), 18 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:58,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:58,104 INFO L93 Difference]: Finished difference Result 19354 states and 27541 transitions. [2025-02-08 00:13:58,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2025-02-08 00:13:58,104 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 10.0) internal successors, (180), 18 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-08 00:13:58,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:58,121 INFO L225 Difference]: With dead ends: 19354 [2025-02-08 00:13:58,122 INFO L226 Difference]: Without dead ends: 17641 [2025-02-08 00:13:58,129 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2025-02-08 00:13:58,129 INFO L435 NwaCegarLoop]: 1341 mSDtfsCounter, 80 mSDsluCounter, 17459 mSDsCounter, 0 mSdLazyCounter, 4219 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 80 SdHoareTripleChecker+Valid, 18800 SdHoareTripleChecker+Invalid, 4219 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4219 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:58,131 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [80 Valid, 18800 Invalid, 4219 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4219 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2025-02-08 00:13:58,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17641 states. [2025-02-08 00:13:58,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17641 to 17497. [2025-02-08 00:13:58,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17497 states, 17496 states have (on average 1.4246113397347966) internal successors, (24925), 17496 states have internal predecessors, (24925), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:58,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17497 states to 17497 states and 24925 transitions. [2025-02-08 00:13:58,285 INFO L78 Accepts]: Start accepts. Automaton has 17497 states and 24925 transitions. Word has length 180 [2025-02-08 00:13:58,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:58,285 INFO L471 AbstractCegarLoop]: Abstraction has 17497 states and 24925 transitions. [2025-02-08 00:13:58,285 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 10.0) internal successors, (180), 18 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:58,286 INFO L276 IsEmpty]: Start isEmpty. Operand 17497 states and 24925 transitions. [2025-02-08 00:13:58,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-08 00:13:58,299 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:58,299 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:58,299 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2025-02-08 00:13:58,299 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:58,300 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:58,300 INFO L85 PathProgramCache]: Analyzing trace with hash 1258272875, now seen corresponding path program 1 times [2025-02-08 00:13:58,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:58,300 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379845053] [2025-02-08 00:13:58,300 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:58,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:58,330 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-08 00:13:58,409 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-08 00:13:58,409 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:58,409 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:58,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:58,568 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:58,568 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1379845053] [2025-02-08 00:13:58,568 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1379845053] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:58,568 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:58,569 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:58,569 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [332505446] [2025-02-08 00:13:58,569 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:58,569 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:13:58,569 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:58,569 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:13:58,569 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:58,569 INFO L87 Difference]: Start difference. First operand 17497 states and 24925 transitions. Second operand has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:59,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:13:59,462 INFO L93 Difference]: Finished difference Result 19523 states and 27815 transitions. [2025-02-08 00:13:59,462 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:13:59,463 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-08 00:13:59,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:13:59,482 INFO L225 Difference]: With dead ends: 19523 [2025-02-08 00:13:59,482 INFO L226 Difference]: Without dead ends: 17737 [2025-02-08 00:13:59,487 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:13:59,489 INFO L435 NwaCegarLoop]: 1113 mSDtfsCounter, 1971 mSDsluCounter, 3324 mSDsCounter, 0 mSdLazyCounter, 2114 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1971 SdHoareTripleChecker+Valid, 4437 SdHoareTripleChecker+Invalid, 2115 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-02-08 00:13:59,489 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1971 Valid, 4437 Invalid, 2115 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2114 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-02-08 00:13:59,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17737 states. [2025-02-08 00:13:59,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17737 to 17737. [2025-02-08 00:13:59,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17737 states, 17736 states have (on average 1.422812359043753) internal successors, (25235), 17736 states have internal predecessors, (25235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:59,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17737 states to 17737 states and 25235 transitions. [2025-02-08 00:13:59,692 INFO L78 Accepts]: Start accepts. Automaton has 17737 states and 25235 transitions. Word has length 180 [2025-02-08 00:13:59,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:13:59,693 INFO L471 AbstractCegarLoop]: Abstraction has 17737 states and 25235 transitions. [2025-02-08 00:13:59,693 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:13:59,693 INFO L276 IsEmpty]: Start isEmpty. Operand 17737 states and 25235 transitions. [2025-02-08 00:13:59,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-08 00:13:59,707 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:13:59,707 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:13:59,707 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2025-02-08 00:13:59,707 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:13:59,708 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:13:59,708 INFO L85 PathProgramCache]: Analyzing trace with hash -16893118, now seen corresponding path program 1 times [2025-02-08 00:13:59,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:13:59,708 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589389289] [2025-02-08 00:13:59,708 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:13:59,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:13:59,739 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-08 00:13:59,760 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-08 00:13:59,760 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:13:59,760 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:13:59,900 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:13:59,900 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:13:59,900 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589389289] [2025-02-08 00:13:59,900 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589389289] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:13:59,900 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:13:59,900 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:13:59,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [601351256] [2025-02-08 00:13:59,900 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:13:59,901 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-08 00:13:59,901 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:13:59,901 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 00:13:59,901 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:13:59,901 INFO L87 Difference]: Start difference. First operand 17737 states and 25235 transitions. Second operand has 5 states, 5 states have (on average 36.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:00,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:14:00,299 INFO L93 Difference]: Finished difference Result 19856 states and 28247 transitions. [2025-02-08 00:14:00,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 00:14:00,300 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 36.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-08 00:14:00,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:14:00,316 INFO L225 Difference]: With dead ends: 19856 [2025-02-08 00:14:00,316 INFO L226 Difference]: Without dead ends: 17833 [2025-02-08 00:14:00,322 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-08 00:14:00,322 INFO L435 NwaCegarLoop]: 1359 mSDtfsCounter, 0 mSDsluCounter, 2710 mSDsCounter, 0 mSdLazyCounter, 827 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4069 SdHoareTripleChecker+Invalid, 828 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 827 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-08 00:14:00,322 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4069 Invalid, 828 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 827 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-08 00:14:00,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17833 states. [2025-02-08 00:14:00,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17833 to 17737. [2025-02-08 00:14:00,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17737 states, 17736 states have (on average 1.422812359043753) internal successors, (25235), 17736 states have internal predecessors, (25235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:00,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17737 states to 17737 states and 25235 transitions. [2025-02-08 00:14:00,465 INFO L78 Accepts]: Start accepts. Automaton has 17737 states and 25235 transitions. Word has length 180 [2025-02-08 00:14:00,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:14:00,465 INFO L471 AbstractCegarLoop]: Abstraction has 17737 states and 25235 transitions. [2025-02-08 00:14:00,465 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 36.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:00,466 INFO L276 IsEmpty]: Start isEmpty. Operand 17737 states and 25235 transitions. [2025-02-08 00:14:00,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-08 00:14:00,479 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:14:00,480 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:14:00,480 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2025-02-08 00:14:00,480 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:14:00,480 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:14:00,480 INFO L85 PathProgramCache]: Analyzing trace with hash -658525547, now seen corresponding path program 1 times [2025-02-08 00:14:00,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:14:00,480 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511695977] [2025-02-08 00:14:00,480 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:14:00,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:14:00,512 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-08 00:14:00,553 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-08 00:14:00,553 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:14:00,553 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:14:00,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:14:00,840 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:14:00,840 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [511695977] [2025-02-08 00:14:00,840 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [511695977] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:14:00,841 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:14:00,841 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:14:00,841 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [105114578] [2025-02-08 00:14:00,841 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:14:00,841 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:14:00,841 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:14:00,842 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:14:00,842 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:14:00,842 INFO L87 Difference]: Start difference. First operand 17737 states and 25235 transitions. Second operand has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:01,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:14:01,476 INFO L93 Difference]: Finished difference Result 39132 states and 55235 transitions. [2025-02-08 00:14:01,477 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:14:01,477 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-08 00:14:01,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:14:01,508 INFO L225 Difference]: With dead ends: 39132 [2025-02-08 00:14:01,509 INFO L226 Difference]: Without dead ends: 33125 [2025-02-08 00:14:01,522 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:14:01,522 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 1872 mSDsluCounter, 3996 mSDsCounter, 0 mSdLazyCounter, 1196 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1872 SdHoareTripleChecker+Valid, 5331 SdHoareTripleChecker+Invalid, 1196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:14:01,522 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1872 Valid, 5331 Invalid, 1196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1196 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:14:01,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33125 states. [2025-02-08 00:14:01,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33125 to 23305. [2025-02-08 00:14:01,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23305 states, 23304 states have (on average 1.4343889461036732) internal successors, (33427), 23304 states have internal predecessors, (33427), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:01,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23305 states to 23305 states and 33427 transitions. [2025-02-08 00:14:01,756 INFO L78 Accepts]: Start accepts. Automaton has 23305 states and 33427 transitions. Word has length 180 [2025-02-08 00:14:01,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:14:01,756 INFO L471 AbstractCegarLoop]: Abstraction has 23305 states and 33427 transitions. [2025-02-08 00:14:01,756 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:01,756 INFO L276 IsEmpty]: Start isEmpty. Operand 23305 states and 33427 transitions. [2025-02-08 00:14:01,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-08 00:14:01,775 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:14:01,775 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:14:01,775 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2025-02-08 00:14:01,775 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:14:01,775 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:14:01,775 INFO L85 PathProgramCache]: Analyzing trace with hash 845960036, now seen corresponding path program 1 times [2025-02-08 00:14:01,775 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:14:01,775 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1482432359] [2025-02-08 00:14:01,775 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:14:01,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:14:01,866 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-08 00:14:02,004 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-08 00:14:02,004 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:14:02,004 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:14:02,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:14:02,308 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:14:02,309 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1482432359] [2025-02-08 00:14:02,309 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1482432359] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:14:02,309 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:14:02,309 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:14:02,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1596800989] [2025-02-08 00:14:02,309 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:14:02,309 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:14:02,309 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:14:02,310 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:14:02,310 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:14:02,311 INFO L87 Difference]: Start difference. First operand 23305 states and 33427 transitions. Second operand has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:03,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:14:03,589 INFO L93 Difference]: Finished difference Result 25096 states and 36001 transitions. [2025-02-08 00:14:03,589 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:14:03,589 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-08 00:14:03,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:14:03,610 INFO L225 Difference]: With dead ends: 25096 [2025-02-08 00:14:03,610 INFO L226 Difference]: Without dead ends: 23325 [2025-02-08 00:14:03,620 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:14:03,621 INFO L435 NwaCegarLoop]: 1562 mSDtfsCounter, 216 mSDsluCounter, 5059 mSDsCounter, 0 mSdLazyCounter, 2613 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 216 SdHoareTripleChecker+Valid, 6621 SdHoareTripleChecker+Invalid, 2613 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2613 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2025-02-08 00:14:03,621 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [216 Valid, 6621 Invalid, 2613 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2613 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2025-02-08 00:14:03,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23325 states. [2025-02-08 00:14:03,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23325 to 23315. [2025-02-08 00:14:03,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23315 states, 23314 states have (on average 1.4342026250321696) internal successors, (33437), 23314 states have internal predecessors, (33437), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:03,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23315 states to 23315 states and 33437 transitions. [2025-02-08 00:14:03,821 INFO L78 Accepts]: Start accepts. Automaton has 23315 states and 33437 transitions. Word has length 180 [2025-02-08 00:14:03,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:14:03,822 INFO L471 AbstractCegarLoop]: Abstraction has 23315 states and 33437 transitions. [2025-02-08 00:14:03,822 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:03,822 INFO L276 IsEmpty]: Start isEmpty. Operand 23315 states and 33437 transitions. [2025-02-08 00:14:03,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-08 00:14:03,841 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:14:03,841 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:14:03,841 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2025-02-08 00:14:03,841 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:14:03,842 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:14:03,842 INFO L85 PathProgramCache]: Analyzing trace with hash 1932000125, now seen corresponding path program 1 times [2025-02-08 00:14:03,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:14:03,842 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1773985255] [2025-02-08 00:14:03,842 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:14:03,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:14:03,875 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-08 00:14:04,015 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-08 00:14:04,015 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:14:04,015 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:14:04,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:14:04,308 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:14:04,308 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1773985255] [2025-02-08 00:14:04,308 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1773985255] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:14:04,308 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:14:04,308 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:14:04,308 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1711877104] [2025-02-08 00:14:04,308 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:14:04,309 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:14:04,309 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:14:04,309 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:14:04,309 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:14:04,309 INFO L87 Difference]: Start difference. First operand 23315 states and 33437 transitions. Second operand has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:05,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:14:05,428 INFO L93 Difference]: Finished difference Result 27672 states and 39481 transitions. [2025-02-08 00:14:05,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:14:05,428 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-08 00:14:05,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:14:05,453 INFO L225 Difference]: With dead ends: 27672 [2025-02-08 00:14:05,453 INFO L226 Difference]: Without dead ends: 25813 [2025-02-08 00:14:05,463 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:14:05,464 INFO L435 NwaCegarLoop]: 1162 mSDtfsCounter, 1581 mSDsluCounter, 3413 mSDsCounter, 0 mSdLazyCounter, 2154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1581 SdHoareTripleChecker+Valid, 4575 SdHoareTripleChecker+Invalid, 2155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-02-08 00:14:05,464 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1581 Valid, 4575 Invalid, 2155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2154 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-02-08 00:14:05,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25813 states. [2025-02-08 00:14:05,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25813 to 24141. [2025-02-08 00:14:05,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24141 states, 24140 states have (on average 1.4310273405136702) internal successors, (34545), 24140 states have internal predecessors, (34545), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:05,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24141 states to 24141 states and 34545 transitions. [2025-02-08 00:14:05,687 INFO L78 Accepts]: Start accepts. Automaton has 24141 states and 34545 transitions. Word has length 180 [2025-02-08 00:14:05,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:14:05,687 INFO L471 AbstractCegarLoop]: Abstraction has 24141 states and 34545 transitions. [2025-02-08 00:14:05,687 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:05,687 INFO L276 IsEmpty]: Start isEmpty. Operand 24141 states and 34545 transitions. [2025-02-08 00:14:05,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-08 00:14:05,707 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:14:05,707 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:14:05,707 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2025-02-08 00:14:05,707 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:14:05,708 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:14:05,708 INFO L85 PathProgramCache]: Analyzing trace with hash -733064203, now seen corresponding path program 1 times [2025-02-08 00:14:05,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:14:05,708 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248896151] [2025-02-08 00:14:05,708 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:14:05,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:14:05,742 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-08 00:14:05,931 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-08 00:14:05,931 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:14:05,931 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:14:08,499 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:14:08,500 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:14:08,500 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248896151] [2025-02-08 00:14:08,500 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1248896151] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:14:08,500 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:14:08,500 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-08 00:14:08,500 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1430655518] [2025-02-08 00:14:08,500 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:14:08,500 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-08 00:14:08,500 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:14:08,501 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-08 00:14:08,501 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:14:08,501 INFO L87 Difference]: Start difference. First operand 24141 states and 34545 transitions. Second operand has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 6 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:10,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:14:10,268 INFO L93 Difference]: Finished difference Result 29872 states and 42455 transitions. [2025-02-08 00:14:10,269 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:14:10,269 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 6 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-08 00:14:10,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:14:10,295 INFO L225 Difference]: With dead ends: 29872 [2025-02-08 00:14:10,295 INFO L226 Difference]: Without dead ends: 27709 [2025-02-08 00:14:10,306 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:14:10,306 INFO L435 NwaCegarLoop]: 1176 mSDtfsCounter, 1638 mSDsluCounter, 4547 mSDsCounter, 0 mSdLazyCounter, 2662 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1638 SdHoareTripleChecker+Valid, 5723 SdHoareTripleChecker+Invalid, 2663 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2662 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2025-02-08 00:14:10,306 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1638 Valid, 5723 Invalid, 2663 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2662 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2025-02-08 00:14:10,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27709 states. [2025-02-08 00:14:10,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27709 to 25925. [2025-02-08 00:14:10,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25925 states, 25924 states have (on average 1.425821632464126) internal successors, (36963), 25924 states have internal predecessors, (36963), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:10,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25925 states to 25925 states and 36963 transitions. [2025-02-08 00:14:10,544 INFO L78 Accepts]: Start accepts. Automaton has 25925 states and 36963 transitions. Word has length 180 [2025-02-08 00:14:10,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:14:10,545 INFO L471 AbstractCegarLoop]: Abstraction has 25925 states and 36963 transitions. [2025-02-08 00:14:10,545 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 6 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:10,545 INFO L276 IsEmpty]: Start isEmpty. Operand 25925 states and 36963 transitions. [2025-02-08 00:14:10,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-08 00:14:10,569 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:14:10,569 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:14:10,569 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2025-02-08 00:14:10,569 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:14:10,570 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:14:10,570 INFO L85 PathProgramCache]: Analyzing trace with hash -2136503401, now seen corresponding path program 1 times [2025-02-08 00:14:10,570 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:14:10,570 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [770008973] [2025-02-08 00:14:10,570 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:14:10,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:14:10,604 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-08 00:14:10,652 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-08 00:14:10,652 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:14:10,652 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 00:14:10,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 00:14:10,962 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 00:14:10,962 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [770008973] [2025-02-08 00:14:10,962 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [770008973] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 00:14:10,962 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 00:14:10,962 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-08 00:14:10,962 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [445330617] [2025-02-08 00:14:10,962 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 00:14:10,963 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-08 00:14:10,963 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 00:14:10,963 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-08 00:14:10,963 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-08 00:14:10,963 INFO L87 Difference]: Start difference. First operand 25925 states and 36963 transitions. Second operand has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:11,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 00:14:11,632 INFO L93 Difference]: Finished difference Result 59054 states and 83539 transitions. [2025-02-08 00:14:11,632 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 00:14:11,632 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-08 00:14:11,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-08 00:14:11,675 INFO L225 Difference]: With dead ends: 59054 [2025-02-08 00:14:11,676 INFO L226 Difference]: Without dead ends: 47395 [2025-02-08 00:14:11,696 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-08 00:14:11,696 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 1883 mSDsluCounter, 3996 mSDsCounter, 0 mSdLazyCounter, 1196 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1883 SdHoareTripleChecker+Valid, 5331 SdHoareTripleChecker+Invalid, 1196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-08 00:14:11,696 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1883 Valid, 5331 Invalid, 1196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1196 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-08 00:14:11,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47395 states. [2025-02-08 00:14:12,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47395 to 32901. [2025-02-08 00:14:12,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32901 states, 32900 states have (on average 1.4404559270516717) internal successors, (47391), 32900 states have internal predecessors, (47391), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:12,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32901 states to 32901 states and 47391 transitions. [2025-02-08 00:14:12,224 INFO L78 Accepts]: Start accepts. Automaton has 32901 states and 47391 transitions. Word has length 180 [2025-02-08 00:14:12,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-08 00:14:12,224 INFO L471 AbstractCegarLoop]: Abstraction has 32901 states and 47391 transitions. [2025-02-08 00:14:12,224 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 00:14:12,225 INFO L276 IsEmpty]: Start isEmpty. Operand 32901 states and 47391 transitions. [2025-02-08 00:14:12,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2025-02-08 00:14:12,253 INFO L210 NwaCegarLoop]: Found error trace [2025-02-08 00:14:12,254 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:14:12,254 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2025-02-08 00:14:12,254 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-08 00:14:12,254 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 00:14:12,254 INFO L85 PathProgramCache]: Analyzing trace with hash 339344398, now seen corresponding path program 1 times [2025-02-08 00:14:12,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 00:14:12,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [116632340] [2025-02-08 00:14:12,254 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 00:14:12,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 00:14:12,287 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 181 statements into 1 equivalence classes. [2025-02-08 00:14:12,500 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 181 of 181 statements. [2025-02-08 00:14:12,501 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:14:12,501 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 00:14:12,501 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 00:14:12,515 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 181 statements into 1 equivalence classes. [2025-02-08 00:14:12,658 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 181 of 181 statements. [2025-02-08 00:14:12,658 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 00:14:12,658 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 00:14:12,751 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 00:14:12,752 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-02-08 00:14:12,752 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-02-08 00:14:12,754 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2025-02-08 00:14:12,756 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 00:14:12,852 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-08 00:14:12,879 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-02-08 00:14:12,882 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.02 12:14:12 BoogieIcfgContainer [2025-02-08 00:14:12,882 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-02-08 00:14:12,883 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-08 00:14:12,883 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-08 00:14:12,883 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-08 00:14:12,884 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 12:13:00" (3/4) ... [2025-02-08 00:14:12,885 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-02-08 00:14:12,886 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-08 00:14:12,886 INFO L158 Benchmark]: Toolchain (without parser) took 76772.11ms. Allocated memory was 167.8MB in the beginning and 2.5GB in the end (delta: 2.3GB). Free memory was 129.7MB in the beginning and 1.9GB in the end (delta: -1.8GB). Peak memory consumption was 566.0MB. Max. memory is 16.1GB. [2025-02-08 00:14:12,886 INFO L158 Benchmark]: CDTParser took 0.21ms. Allocated memory is still 226.5MB. Free memory is still 149.6MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 00:14:12,886 INFO L158 Benchmark]: CACSL2BoogieTranslator took 564.21ms. Allocated memory is still 167.8MB. Free memory was 129.7MB in the beginning and 51.5MB in the end (delta: 78.2MB). Peak memory consumption was 83.9MB. Max. memory is 16.1GB. [2025-02-08 00:14:12,887 INFO L158 Benchmark]: Boogie Procedure Inliner took 376.07ms. Allocated memory was 167.8MB in the beginning and 184.5MB in the end (delta: 16.8MB). Free memory was 51.5MB in the beginning and 87.7MB in the end (delta: -36.2MB). Peak memory consumption was 51.6MB. Max. memory is 16.1GB. [2025-02-08 00:14:12,887 INFO L158 Benchmark]: Boogie Preprocessor took 511.11ms. Allocated memory was 184.5MB in the beginning and 528.5MB in the end (delta: 343.9MB). Free memory was 87.7MB in the beginning and 412.4MB in the end (delta: -324.8MB). Peak memory consumption was 66.5MB. Max. memory is 16.1GB. [2025-02-08 00:14:12,887 INFO L158 Benchmark]: IcfgBuilder took 3057.64ms. Allocated memory was 528.5MB in the beginning and 394.3MB in the end (delta: -134.2MB). Free memory was 412.4MB in the beginning and 124.8MB in the end (delta: 287.7MB). Peak memory consumption was 205.5MB. Max. memory is 16.1GB. [2025-02-08 00:14:12,887 INFO L158 Benchmark]: TraceAbstraction took 72253.72ms. Allocated memory was 394.3MB in the beginning and 2.5GB in the end (delta: 2.1GB). Free memory was 124.8MB in the beginning and 1.9GB in the end (delta: -1.8GB). Peak memory consumption was 324.4MB. Max. memory is 16.1GB. [2025-02-08 00:14:12,887 INFO L158 Benchmark]: Witness Printer took 2.90ms. Allocated memory is still 2.5GB. Free memory was 1.9GB in the beginning and 1.9GB in the end (delta: 319.9kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-08 00:14:12,888 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21ms. Allocated memory is still 226.5MB. Free memory is still 149.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 564.21ms. Allocated memory is still 167.8MB. Free memory was 129.7MB in the beginning and 51.5MB in the end (delta: 78.2MB). Peak memory consumption was 83.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 376.07ms. Allocated memory was 167.8MB in the beginning and 184.5MB in the end (delta: 16.8MB). Free memory was 51.5MB in the beginning and 87.7MB in the end (delta: -36.2MB). Peak memory consumption was 51.6MB. Max. memory is 16.1GB. * Boogie Preprocessor took 511.11ms. Allocated memory was 184.5MB in the beginning and 528.5MB in the end (delta: 343.9MB). Free memory was 87.7MB in the beginning and 412.4MB in the end (delta: -324.8MB). Peak memory consumption was 66.5MB. Max. memory is 16.1GB. * IcfgBuilder took 3057.64ms. Allocated memory was 528.5MB in the beginning and 394.3MB in the end (delta: -134.2MB). Free memory was 412.4MB in the beginning and 124.8MB in the end (delta: 287.7MB). Peak memory consumption was 205.5MB. Max. memory is 16.1GB. * TraceAbstraction took 72253.72ms. Allocated memory was 394.3MB in the beginning and 2.5GB in the end (delta: 2.1GB). Free memory was 124.8MB in the beginning and 1.9GB in the end (delta: -1.8GB). Peak memory consumption was 324.4MB. Max. memory is 16.1GB. * Witness Printer took 2.90ms. Allocated memory is still 2.5GB. Free memory was 1.9GB in the beginning and 1.9GB in the end (delta: 319.9kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseAnd at line 369, overapproximation of bitwiseAnd at line 467. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 2); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (2 - 1); [L32] const SORT_26 mask_SORT_26 = (SORT_26)-1 >> (sizeof(SORT_26) * 8 - 4); [L33] const SORT_26 msb_SORT_26 = (SORT_26)1 << (4 - 1); [L35] const SORT_165 mask_SORT_165 = (SORT_165)-1 >> (sizeof(SORT_165) * 8 - 32); [L36] const SORT_165 msb_SORT_165 = (SORT_165)1 << (32 - 1); [L38] const SORT_196 mask_SORT_196 = (SORT_196)-1 >> (sizeof(SORT_196) * 8 - 3); [L39] const SORT_196 msb_SORT_196 = (SORT_196)1 << (3 - 1); [L41] const SORT_1 var_11 = 0; [L42] const SORT_3 var_14 = 2; [L43] const SORT_1 var_29 = 1; [L44] const SORT_165 var_167 = 1; [L45] const SORT_3 var_250 = 0; [L46] const SORT_3 var_251 = 3; [L47] const SORT_165 var_260 = 0; [L48] const SORT_165 var_471 = 2; [L50] SORT_1 input_2; [L51] SORT_3 input_4; [L52] SORT_3 input_5; [L53] SORT_1 input_6; [L54] SORT_3 input_7; [L55] SORT_1 input_8; [L56] SORT_1 input_9; [L57] SORT_1 input_186; [L58] SORT_3 input_249; [L59] SORT_3 input_265; [L60] SORT_3 input_266; [L61] SORT_3 input_267; [L62] SORT_3 input_268; [L63] SORT_3 input_295; [L64] SORT_3 input_296; [L65] SORT_3 input_297; [L66] SORT_3 input_306; [L67] SORT_3 input_360; [L68] SORT_3 input_372; [L69] SORT_3 input_373; [L70] SORT_3 input_374; [L71] SORT_3 input_375; [L72] SORT_3 input_384; [L73] SORT_3 input_405; [L74] SORT_3 input_406; [L75] SORT_3 input_407; [L76] SORT_3 input_416; [L77] SORT_3 input_418; [L78] SORT_3 input_464; [L79] SORT_3 input_478; [L80] SORT_3 input_479; [L81] SORT_3 input_480; [L82] SORT_3 input_481; [L83] SORT_3 input_490; [L84] SORT_3 input_492; [L85] SORT_3 input_514; [L86] SORT_3 input_515; [L87] SORT_3 input_516; [L88] SORT_3 input_525; [L89] SORT_3 input_527; [L90] SORT_3 input_529; [L91] SORT_3 input_575; [L92] SORT_3 input_586; [L93] SORT_3 input_587; [L94] SORT_3 input_588; [L95] SORT_3 input_596; [L96] SORT_3 input_598; [L97] SORT_3 input_600; [L98] SORT_3 input_620; [L99] SORT_3 input_621; [L100] SORT_3 input_629; [L101] SORT_3 input_631; [L102] SORT_3 input_633; [L103] SORT_3 input_635; [L105] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_26=15, mask_SORT_3=3, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L105] SORT_1 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L106] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_26=15, mask_SORT_3=3, state_10=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L106] SORT_3 state_13 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L107] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_26=15, mask_SORT_3=3, state_10=0, state_13=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L107] SORT_3 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L108] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_26=15, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L108] SORT_3 state_19 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L109] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_26=15, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L109] SORT_3 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L110] EXPR __VERIFIER_nondet_uchar() & mask_SORT_26 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L110] SORT_26 state_27 = __VERIFIER_nondet_uchar() & mask_SORT_26; [L111] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L111] SORT_3 state_32 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L112] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L112] SORT_3 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L113] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L113] SORT_3 state_37 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L114] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L114] SORT_3 state_40 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L115] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L115] SORT_3 state_48 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L116] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L116] SORT_3 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L117] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L117] SORT_3 state_53 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L118] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L118] SORT_3 state_56 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L119] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L119] SORT_3 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L120] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L120] SORT_3 state_66 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L121] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L121] SORT_3 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L122] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L122] SORT_3 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L123] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L123] SORT_3 state_127 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L124] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L124] SORT_3 state_128 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L125] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L125] SORT_3 state_129 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L126] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L126] SORT_3 state_130 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L127] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L127] SORT_3 state_131 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L128] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L128] SORT_3 state_132 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L129] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L129] SORT_3 state_133 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L130] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L130] SORT_3 state_134 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L131] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L131] SORT_3 state_135 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L132] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L132] SORT_3 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L133] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L133] SORT_3 state_137 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L134] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L134] SORT_3 state_138 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L135] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L135] SORT_3 state_139 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L136] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L136] SORT_3 state_140 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L137] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L137] SORT_3 state_141 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L138] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L138] SORT_3 state_142 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L142] input_2 = __VERIFIER_nondet_uchar() [L143] EXPR input_2 & mask_SORT_1 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L143] input_2 = input_2 & mask_SORT_1 [L144] input_4 = __VERIFIER_nondet_uchar() [L145] input_5 = __VERIFIER_nondet_uchar() [L146] input_6 = __VERIFIER_nondet_uchar() [L147] input_7 = __VERIFIER_nondet_uchar() [L148] input_8 = __VERIFIER_nondet_uchar() [L149] input_9 = __VERIFIER_nondet_uchar() [L150] EXPR input_9 & mask_SORT_1 VAL [input_2=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=0, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L150] input_9 = input_9 & mask_SORT_1 [L151] input_186 = __VERIFIER_nondet_uchar() [L152] input_249 = __VERIFIER_nondet_uchar() [L153] input_265 = __VERIFIER_nondet_uchar() [L154] input_266 = __VERIFIER_nondet_uchar() [L155] input_267 = __VERIFIER_nondet_uchar() [L156] input_268 = __VERIFIER_nondet_uchar() [L157] input_295 = __VERIFIER_nondet_uchar() [L158] input_296 = __VERIFIER_nondet_uchar() [L159] input_297 = __VERIFIER_nondet_uchar() [L160] input_306 = __VERIFIER_nondet_uchar() [L161] input_360 = __VERIFIER_nondet_uchar() [L162] input_372 = __VERIFIER_nondet_uchar() [L163] input_373 = __VERIFIER_nondet_uchar() [L164] input_374 = __VERIFIER_nondet_uchar() [L165] input_375 = __VERIFIER_nondet_uchar() [L166] input_384 = __VERIFIER_nondet_uchar() [L167] input_405 = __VERIFIER_nondet_uchar() [L168] input_406 = __VERIFIER_nondet_uchar() [L169] input_407 = __VERIFIER_nondet_uchar() [L170] input_416 = __VERIFIER_nondet_uchar() [L171] input_418 = __VERIFIER_nondet_uchar() [L172] input_464 = __VERIFIER_nondet_uchar() [L173] input_478 = __VERIFIER_nondet_uchar() [L174] input_479 = __VERIFIER_nondet_uchar() [L175] input_480 = __VERIFIER_nondet_uchar() [L176] input_481 = __VERIFIER_nondet_uchar() [L177] input_490 = __VERIFIER_nondet_uchar() [L178] input_492 = __VERIFIER_nondet_uchar() [L179] input_514 = __VERIFIER_nondet_uchar() [L180] input_515 = __VERIFIER_nondet_uchar() [L181] input_516 = __VERIFIER_nondet_uchar() [L182] input_525 = __VERIFIER_nondet_uchar() [L183] input_527 = __VERIFIER_nondet_uchar() [L184] input_529 = __VERIFIER_nondet_uchar() [L185] input_575 = __VERIFIER_nondet_uchar() [L186] input_586 = __VERIFIER_nondet_uchar() [L187] input_587 = __VERIFIER_nondet_uchar() [L188] input_588 = __VERIFIER_nondet_uchar() [L189] input_596 = __VERIFIER_nondet_uchar() [L190] input_598 = __VERIFIER_nondet_uchar() [L191] input_600 = __VERIFIER_nondet_uchar() [L192] input_620 = __VERIFIER_nondet_uchar() [L193] input_621 = __VERIFIER_nondet_uchar() [L194] input_629 = __VERIFIER_nondet_uchar() [L195] input_631 = __VERIFIER_nondet_uchar() [L196] input_633 = __VERIFIER_nondet_uchar() [L197] input_635 = __VERIFIER_nondet_uchar() [L200] SORT_1 var_12_arg_0 = state_10; [L201] SORT_1 var_12_arg_1 = var_11; [L202] SORT_1 var_12 = var_12_arg_0 == var_12_arg_1; [L203] SORT_3 var_15_arg_0 = state_13; [L204] SORT_3 var_15_arg_1 = var_14; [L205] SORT_1 var_15 = var_15_arg_0 >= var_15_arg_1; [L206] SORT_3 var_17_arg_0 = state_16; [L207] SORT_3 var_17_arg_1 = var_14; [L208] SORT_1 var_17 = var_17_arg_0 >= var_17_arg_1; [L209] SORT_1 var_18_arg_0 = var_15; [L210] SORT_1 var_18_arg_1 = var_17; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_18_arg_0=0, var_18_arg_1=0, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L211] EXPR var_18_arg_0 & var_18_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L211] SORT_1 var_18 = var_18_arg_0 & var_18_arg_1; [L212] SORT_3 var_20_arg_0 = state_19; [L213] SORT_3 var_20_arg_1 = var_14; [L214] SORT_1 var_20 = var_20_arg_0 >= var_20_arg_1; [L215] SORT_1 var_21_arg_0 = var_18; [L216] SORT_1 var_21_arg_1 = var_20; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_21_arg_0=0, var_21_arg_1=0, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L217] EXPR var_21_arg_0 & var_21_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L217] SORT_1 var_21 = var_21_arg_0 & var_21_arg_1; [L218] SORT_3 var_23_arg_0 = state_22; [L219] SORT_3 var_23_arg_1 = var_14; [L220] SORT_1 var_23 = var_23_arg_0 >= var_23_arg_1; [L221] SORT_1 var_24_arg_0 = var_21; [L222] SORT_1 var_24_arg_1 = var_23; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_24_arg_0=0, var_24_arg_1=0, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L223] EXPR var_24_arg_0 & var_24_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L223] SORT_1 var_24 = var_24_arg_0 & var_24_arg_1; [L224] SORT_1 var_25_arg_0 = var_24; [L225] SORT_1 var_25 = ~var_25_arg_0; [L226] SORT_26 var_28_arg_0 = state_27; [L227] SORT_1 var_28 = var_28_arg_0 >> 3; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_25=-1, var_260=0, var_28=0, var_29=1, var_471=2] [L228] EXPR var_28 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_25=-1, var_260=0, var_29=1, var_471=2] [L228] var_28 = var_28 & mask_SORT_1 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_1 var_30_arg_1 = var_29; [L231] SORT_1 var_30 = var_30_arg_0 == var_30_arg_1; [L232] SORT_1 var_31_arg_0 = var_25; [L233] SORT_1 var_31_arg_1 = var_30; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31_arg_0=-1, var_31_arg_1=0, var_471=2] [L234] EXPR var_31_arg_0 | var_31_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_471=2] [L234] SORT_1 var_31 = var_31_arg_0 | var_31_arg_1; [L235] SORT_3 var_33_arg_0 = state_32; [L236] SORT_3 var_33_arg_1 = var_14; [L237] SORT_1 var_33 = var_33_arg_0 >= var_33_arg_1; [L238] SORT_3 var_35_arg_0 = state_34; [L239] SORT_3 var_35_arg_1 = var_14; [L240] SORT_1 var_35 = var_35_arg_0 >= var_35_arg_1; [L241] SORT_1 var_36_arg_0 = var_33; [L242] SORT_1 var_36_arg_1 = var_35; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_36_arg_0=0, var_36_arg_1=0, var_471=2] [L243] EXPR var_36_arg_0 & var_36_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_471=2] [L243] SORT_1 var_36 = var_36_arg_0 & var_36_arg_1; [L244] SORT_3 var_38_arg_0 = state_37; [L245] SORT_3 var_38_arg_1 = var_14; [L246] SORT_1 var_38 = var_38_arg_0 >= var_38_arg_1; [L247] SORT_1 var_39_arg_0 = var_36; [L248] SORT_1 var_39_arg_1 = var_38; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_39_arg_0=0, var_39_arg_1=0, var_471=2] [L249] EXPR var_39_arg_0 & var_39_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_471=2] [L249] SORT_1 var_39 = var_39_arg_0 & var_39_arg_1; [L250] SORT_3 var_41_arg_0 = state_40; [L251] SORT_3 var_41_arg_1 = var_14; [L252] SORT_1 var_41 = var_41_arg_0 >= var_41_arg_1; [L253] SORT_1 var_42_arg_0 = var_39; [L254] SORT_1 var_42_arg_1 = var_41; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_42_arg_0=0, var_42_arg_1=0, var_471=2] [L255] EXPR var_42_arg_0 & var_42_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_471=2] [L255] SORT_1 var_42 = var_42_arg_0 & var_42_arg_1; [L256] SORT_1 var_43_arg_0 = var_42; [L257] SORT_1 var_43 = ~var_43_arg_0; [L258] SORT_26 var_44_arg_0 = state_27; [L259] SORT_1 var_44 = var_44_arg_0 >> 2; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_43=-1, var_44=0, var_471=2] [L260] EXPR var_44 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_43=-1, var_471=2] [L260] var_44 = var_44 & mask_SORT_1 [L261] SORT_1 var_45_arg_0 = var_44; [L262] SORT_1 var_45_arg_1 = var_29; [L263] SORT_1 var_45 = var_45_arg_0 >= var_45_arg_1; [L264] SORT_1 var_46_arg_0 = var_43; [L265] SORT_1 var_46_arg_1 = var_45; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_44=0, var_46_arg_0=-1, var_46_arg_1=0, var_471=2] [L266] EXPR var_46_arg_0 | var_46_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_44=0, var_471=2] [L266] SORT_1 var_46 = var_46_arg_0 | var_46_arg_1; [L267] SORT_1 var_47_arg_0 = var_31; [L268] SORT_1 var_47_arg_1 = var_46; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47_arg_0=255, var_47_arg_1=255] [L269] EXPR var_47_arg_0 & var_47_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2] [L269] SORT_1 var_47 = var_47_arg_0 & var_47_arg_1; [L270] SORT_3 var_49_arg_0 = state_48; [L271] SORT_3 var_49_arg_1 = var_14; [L272] SORT_1 var_49 = var_49_arg_0 >= var_49_arg_1; [L273] SORT_3 var_51_arg_0 = state_50; [L274] SORT_3 var_51_arg_1 = var_14; [L275] SORT_1 var_51 = var_51_arg_0 >= var_51_arg_1; [L276] SORT_1 var_52_arg_0 = var_49; [L277] SORT_1 var_52_arg_1 = var_51; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_52_arg_0=0, var_52_arg_1=0] [L278] EXPR var_52_arg_0 & var_52_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255] [L278] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L279] SORT_3 var_54_arg_0 = state_53; [L280] SORT_3 var_54_arg_1 = var_14; [L281] SORT_1 var_54 = var_54_arg_0 >= var_54_arg_1; [L282] SORT_1 var_55_arg_0 = var_52; [L283] SORT_1 var_55_arg_1 = var_54; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_55_arg_0=0, var_55_arg_1=0] [L284] EXPR var_55_arg_0 & var_55_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255] [L284] SORT_1 var_55 = var_55_arg_0 & var_55_arg_1; [L285] SORT_3 var_57_arg_0 = state_56; [L286] SORT_3 var_57_arg_1 = var_14; [L287] SORT_1 var_57 = var_57_arg_0 >= var_57_arg_1; [L288] SORT_1 var_58_arg_0 = var_55; [L289] SORT_1 var_58_arg_1 = var_57; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_58_arg_0=0, var_58_arg_1=0] [L290] EXPR var_58_arg_0 & var_58_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255] [L290] SORT_1 var_58 = var_58_arg_0 & var_58_arg_1; [L291] SORT_1 var_59_arg_0 = var_58; [L292] SORT_1 var_59 = ~var_59_arg_0; [L293] SORT_26 var_60_arg_0 = state_27; [L294] SORT_1 var_60 = var_60_arg_0 >> 1; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_59=-1, var_60=0] [L295] EXPR var_60 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_59=-1] [L295] var_60 = var_60 & mask_SORT_1 [L296] SORT_1 var_61_arg_0 = var_60; [L297] SORT_1 var_61_arg_1 = var_29; [L298] SORT_1 var_61 = var_61_arg_0 >= var_61_arg_1; [L299] SORT_1 var_62_arg_0 = var_59; [L300] SORT_1 var_62_arg_1 = var_61; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_60=0, var_62_arg_0=-1, var_62_arg_1=0] [L301] EXPR var_62_arg_0 | var_62_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_60=0] [L301] SORT_1 var_62 = var_62_arg_0 | var_62_arg_1; [L302] SORT_1 var_63_arg_0 = var_47; [L303] SORT_1 var_63_arg_1 = var_62; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63_arg_0=255, var_63_arg_1=255] [L304] EXPR var_63_arg_0 & var_63_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0] [L304] SORT_1 var_63 = var_63_arg_0 & var_63_arg_1; [L305] SORT_3 var_65_arg_0 = state_64; [L306] SORT_3 var_65_arg_1 = var_14; [L307] SORT_1 var_65 = var_65_arg_0 >= var_65_arg_1; [L308] SORT_3 var_67_arg_0 = state_66; [L309] SORT_3 var_67_arg_1 = var_14; [L310] SORT_1 var_67 = var_67_arg_0 >= var_67_arg_1; [L311] SORT_1 var_68_arg_0 = var_65; [L312] SORT_1 var_68_arg_1 = var_67; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_68_arg_0=0, var_68_arg_1=0] [L313] EXPR var_68_arg_0 & var_68_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255] [L313] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L314] SORT_3 var_70_arg_0 = state_69; [L315] SORT_3 var_70_arg_1 = var_14; [L316] SORT_1 var_70 = var_70_arg_0 >= var_70_arg_1; [L317] SORT_1 var_71_arg_0 = var_68; [L318] SORT_1 var_71_arg_1 = var_70; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_71_arg_0=0, var_71_arg_1=0] [L319] EXPR var_71_arg_0 & var_71_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255] [L319] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L320] SORT_3 var_73_arg_0 = state_72; [L321] SORT_3 var_73_arg_1 = var_14; [L322] SORT_1 var_73 = var_73_arg_0 >= var_73_arg_1; [L323] SORT_1 var_74_arg_0 = var_71; [L324] SORT_1 var_74_arg_1 = var_73; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_74_arg_0=0, var_74_arg_1=0] [L325] EXPR var_74_arg_0 & var_74_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255] [L325] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L326] SORT_1 var_75_arg_0 = var_74; [L327] SORT_1 var_75 = ~var_75_arg_0; [L328] SORT_26 var_76_arg_0 = state_27; [L329] SORT_1 var_76 = var_76_arg_0 >> 0; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_75=-1, var_76=0] [L330] EXPR var_76 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_75=-1] [L330] var_76 = var_76 & mask_SORT_1 [L331] SORT_1 var_77_arg_0 = var_76; [L332] SORT_1 var_77_arg_1 = var_29; [L333] SORT_1 var_77 = var_77_arg_0 >= var_77_arg_1; [L334] SORT_1 var_78_arg_0 = var_75; [L335] SORT_1 var_78_arg_1 = var_77; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_76=0, var_78_arg_0=-1, var_78_arg_1=0] [L336] EXPR var_78_arg_0 | var_78_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_76=0] [L336] SORT_1 var_78 = var_78_arg_0 | var_78_arg_1; [L337] SORT_1 var_79_arg_0 = var_63; [L338] SORT_1 var_79_arg_1 = var_78; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79_arg_0=255, var_79_arg_1=255] [L339] EXPR var_79_arg_0 & var_79_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L339] SORT_1 var_79 = var_79_arg_0 & var_79_arg_1; [L340] SORT_3 var_80_arg_0 = state_13; [L341] SORT_3 var_80_arg_1 = var_14; [L342] SORT_1 var_80 = var_80_arg_0 >= var_80_arg_1; [L343] SORT_3 var_81_arg_0 = state_16; [L344] SORT_3 var_81_arg_1 = var_14; [L345] SORT_1 var_81 = var_81_arg_0 >= var_81_arg_1; [L346] SORT_1 var_82_arg_0 = var_80; [L347] SORT_1 var_82_arg_1 = var_81; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255, var_82_arg_0=0, var_82_arg_1=0] [L348] EXPR var_82_arg_0 | var_82_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255] [L348] SORT_1 var_82 = var_82_arg_0 | var_82_arg_1; [L349] SORT_3 var_83_arg_0 = state_19; [L350] SORT_3 var_83_arg_1 = var_14; [L351] SORT_1 var_83 = var_83_arg_0 >= var_83_arg_1; [L352] SORT_1 var_84_arg_0 = var_82; [L353] SORT_1 var_84_arg_1 = var_83; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255, var_84_arg_0=0, var_84_arg_1=0] [L354] EXPR var_84_arg_0 | var_84_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255] [L354] SORT_1 var_84 = var_84_arg_0 | var_84_arg_1; [L355] SORT_3 var_85_arg_0 = state_22; [L356] SORT_3 var_85_arg_1 = var_14; [L357] SORT_1 var_85 = var_85_arg_0 >= var_85_arg_1; [L358] SORT_1 var_86_arg_0 = var_84; [L359] SORT_1 var_86_arg_1 = var_85; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255, var_86_arg_0=0, var_86_arg_1=0] [L360] EXPR var_86_arg_0 | var_86_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255] [L360] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L361] SORT_1 var_87_arg_0 = var_28; [L362] SORT_1 var_87_arg_1 = var_11; [L363] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L364] SORT_1 var_88_arg_0 = var_86; [L365] SORT_1 var_88_arg_1 = var_87; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255, var_88_arg_0=0, var_88_arg_1=1] [L366] EXPR var_88_arg_0 | var_88_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255] [L366] SORT_1 var_88 = var_88_arg_0 | var_88_arg_1; [L367] SORT_1 var_89_arg_0 = var_79; [L368] SORT_1 var_89_arg_1 = var_88; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89_arg_0=255, var_89_arg_1=1] [L369] EXPR var_89_arg_0 & var_89_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L369] SORT_1 var_89 = var_89_arg_0 & var_89_arg_1; [L370] SORT_3 var_90_arg_0 = state_32; [L371] SORT_3 var_90_arg_1 = var_14; [L372] SORT_1 var_90 = var_90_arg_0 >= var_90_arg_1; [L373] SORT_3 var_91_arg_0 = state_34; [L374] SORT_3 var_91_arg_1 = var_14; [L375] SORT_1 var_91 = var_91_arg_0 >= var_91_arg_1; [L376] SORT_1 var_92_arg_0 = var_90; [L377] SORT_1 var_92_arg_1 = var_91; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0, var_92_arg_0=0, var_92_arg_1=0] [L378] EXPR var_92_arg_0 | var_92_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0] [L378] SORT_1 var_92 = var_92_arg_0 | var_92_arg_1; [L379] SORT_3 var_93_arg_0 = state_37; [L380] SORT_3 var_93_arg_1 = var_14; [L381] SORT_1 var_93 = var_93_arg_0 >= var_93_arg_1; [L382] SORT_1 var_94_arg_0 = var_92; [L383] SORT_1 var_94_arg_1 = var_93; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0, var_94_arg_0=0, var_94_arg_1=0] [L384] EXPR var_94_arg_0 | var_94_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0] [L384] SORT_1 var_94 = var_94_arg_0 | var_94_arg_1; [L385] SORT_3 var_95_arg_0 = state_40; [L386] SORT_3 var_95_arg_1 = var_14; [L387] SORT_1 var_95 = var_95_arg_0 >= var_95_arg_1; [L388] SORT_1 var_96_arg_0 = var_94; [L389] SORT_1 var_96_arg_1 = var_95; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0, var_96_arg_0=0, var_96_arg_1=0] [L390] EXPR var_96_arg_0 | var_96_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0] [L390] SORT_1 var_96 = var_96_arg_0 | var_96_arg_1; [L391] SORT_1 var_97_arg_0 = var_44; [L392] SORT_1 var_97_arg_1 = var_11; [L393] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L394] SORT_1 var_98_arg_0 = var_96; [L395] SORT_1 var_98_arg_1 = var_97; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0, var_98_arg_0=0, var_98_arg_1=1] [L396] EXPR var_98_arg_0 | var_98_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0] [L396] SORT_1 var_98 = var_98_arg_0 | var_98_arg_1; [L397] SORT_1 var_99_arg_0 = var_89; [L398] SORT_1 var_99_arg_1 = var_98; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99_arg_0=0, var_99_arg_1=1] [L399] EXPR var_99_arg_0 & var_99_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L399] SORT_1 var_99 = var_99_arg_0 & var_99_arg_1; [L400] SORT_3 var_100_arg_0 = state_48; [L401] SORT_3 var_100_arg_1 = var_14; [L402] SORT_1 var_100 = var_100_arg_0 >= var_100_arg_1; [L403] SORT_3 var_101_arg_0 = state_50; [L404] SORT_3 var_101_arg_1 = var_14; [L405] SORT_1 var_101 = var_101_arg_0 >= var_101_arg_1; [L406] SORT_1 var_102_arg_0 = var_100; [L407] SORT_1 var_102_arg_1 = var_101; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_102_arg_0=0, var_102_arg_1=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L408] EXPR var_102_arg_0 | var_102_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L408] SORT_1 var_102 = var_102_arg_0 | var_102_arg_1; [L409] SORT_3 var_103_arg_0 = state_53; [L410] SORT_3 var_103_arg_1 = var_14; [L411] SORT_1 var_103 = var_103_arg_0 >= var_103_arg_1; [L412] SORT_1 var_104_arg_0 = var_102; [L413] SORT_1 var_104_arg_1 = var_103; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_104_arg_0=0, var_104_arg_1=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L414] EXPR var_104_arg_0 | var_104_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L414] SORT_1 var_104 = var_104_arg_0 | var_104_arg_1; [L415] SORT_3 var_105_arg_0 = state_56; [L416] SORT_3 var_105_arg_1 = var_14; [L417] SORT_1 var_105 = var_105_arg_0 >= var_105_arg_1; [L418] SORT_1 var_106_arg_0 = var_104; [L419] SORT_1 var_106_arg_1 = var_105; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_106_arg_0=0, var_106_arg_1=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L420] EXPR var_106_arg_0 | var_106_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L420] SORT_1 var_106 = var_106_arg_0 | var_106_arg_1; [L421] SORT_1 var_107_arg_0 = var_60; [L422] SORT_1 var_107_arg_1 = var_11; [L423] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L424] SORT_1 var_108_arg_0 = var_106; [L425] SORT_1 var_108_arg_1 = var_107; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_108_arg_0=0, var_108_arg_1=1, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L426] EXPR var_108_arg_0 | var_108_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L426] SORT_1 var_108 = var_108_arg_0 | var_108_arg_1; [L427] SORT_1 var_109_arg_0 = var_99; [L428] SORT_1 var_109_arg_1 = var_108; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_109_arg_0=0, var_109_arg_1=1, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L429] EXPR var_109_arg_0 & var_109_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L429] SORT_1 var_109 = var_109_arg_0 & var_109_arg_1; [L430] SORT_3 var_110_arg_0 = state_64; [L431] SORT_3 var_110_arg_1 = var_14; [L432] SORT_1 var_110 = var_110_arg_0 >= var_110_arg_1; [L433] SORT_3 var_111_arg_0 = state_66; [L434] SORT_3 var_111_arg_1 = var_14; [L435] SORT_1 var_111 = var_111_arg_0 >= var_111_arg_1; [L436] SORT_1 var_112_arg_0 = var_110; [L437] SORT_1 var_112_arg_1 = var_111; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_69=0, state_72=0, var_109=0, var_112_arg_0=0, var_112_arg_1=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L438] EXPR var_112_arg_0 | var_112_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_69=0, state_72=0, var_109=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L438] SORT_1 var_112 = var_112_arg_0 | var_112_arg_1; [L439] SORT_3 var_113_arg_0 = state_69; [L440] SORT_3 var_113_arg_1 = var_14; [L441] SORT_1 var_113 = var_113_arg_0 >= var_113_arg_1; [L442] SORT_1 var_114_arg_0 = var_112; [L443] SORT_1 var_114_arg_1 = var_113; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_72=0, var_109=0, var_114_arg_0=0, var_114_arg_1=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L444] EXPR var_114_arg_0 | var_114_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_72=0, var_109=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L444] SORT_1 var_114 = var_114_arg_0 | var_114_arg_1; [L445] SORT_3 var_115_arg_0 = state_72; [L446] SORT_3 var_115_arg_1 = var_14; [L447] SORT_1 var_115 = var_115_arg_0 >= var_115_arg_1; [L448] SORT_1 var_116_arg_0 = var_114; [L449] SORT_1 var_116_arg_1 = var_115; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_109=0, var_116_arg_0=0, var_116_arg_1=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L450] EXPR var_116_arg_0 | var_116_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_109=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L450] SORT_1 var_116 = var_116_arg_0 | var_116_arg_1; [L451] SORT_1 var_117_arg_0 = var_76; [L452] SORT_1 var_117_arg_1 = var_11; [L453] SORT_1 var_117 = var_117_arg_0 == var_117_arg_1; [L454] SORT_1 var_118_arg_0 = var_116; [L455] SORT_1 var_118_arg_1 = var_117; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_109=0, var_118_arg_0=0, var_118_arg_1=1, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L456] EXPR var_118_arg_0 | var_118_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_109=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L456] SORT_1 var_118 = var_118_arg_0 | var_118_arg_1; [L457] SORT_1 var_119_arg_0 = var_109; [L458] SORT_1 var_119_arg_1 = var_118; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_119_arg_0=0, var_119_arg_1=1, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L459] EXPR var_119_arg_0 & var_119_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_12=1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L459] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L460] SORT_1 var_120_arg_0 = var_12; [L461] SORT_1 var_120_arg_1 = var_119; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_120_arg_0=1, var_120_arg_1=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L462] EXPR var_120_arg_0 | var_120_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L462] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L463] SORT_1 var_123_arg_0 = var_120; [L464] SORT_1 var_123 = ~var_123_arg_0; [L465] SORT_1 var_124_arg_0 = var_29; [L466] SORT_1 var_124_arg_1 = var_123; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_124_arg_0=1, var_124_arg_1=-2, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L467] EXPR var_124_arg_0 & var_124_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L467] SORT_1 var_124 = var_124_arg_0 & var_124_arg_1; [L468] EXPR var_124 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L468] var_124 = var_124 & mask_SORT_1 [L469] SORT_1 bad_125_arg_0 = var_124; [L470] CALL __VERIFIER_assert(!(bad_125_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 1092 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 72.0s, OverallIterations: 52, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.4s, AutomataDifference: 39.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 44328 SdHoareTripleChecker+Valid, 35.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 44328 mSDsluCounter, 348893 SdHoareTripleChecker+Invalid, 30.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 279970 mSDsCounter, 85 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 85165 IncrementalHoareTripleChecker+Invalid, 85250 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 85 mSolverCounterUnsat, 68923 mSDtfsCounter, 85165 mSolverCounterSat, 0.5s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 396 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 284 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 1.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=32901occurred in iteration=51, InterpolantAutomatonStates: 342, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.3s AutomataMinimizationTime, 51 MinimizatonAttempts, 71205 StatesRemovedByMinimization, 37 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.7s SsaConstructionTime, 4.9s SatisfiabilityAnalysisTime, 20.1s InterpolantComputationTime, 9176 NumberOfCodeBlocks, 9176 NumberOfCodeBlocksAsserted, 52 NumberOfCheckSat, 8944 ConstructedInterpolants, 0 QuantifiedInterpolants, 26542 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 51 InterpolantComputations, 51 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2025-02-08 00:14:12,924 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request...