./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 48c9605d Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 36da946a83103a61b88f0f1db9af94484aad5eefbde5313f974f53b267bd14bf --- Real Ultimate output --- This is Ultimate 0.3.0-?-48c9605-m [2025-02-07 20:37:04,628 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-07 20:37:04,667 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-02-07 20:37:04,672 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-07 20:37:04,674 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-07 20:37:04,695 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-07 20:37:04,697 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-07 20:37:04,697 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-07 20:37:04,697 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-07 20:37:04,697 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-07 20:37:04,697 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-02-07 20:37:04,697 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-02-07 20:37:04,698 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * Use SBE=true [2025-02-07 20:37:04,698 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-07 20:37:04,698 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-07 20:37:04,700 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-07 20:37:04,700 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-02-07 20:37:04,700 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 36da946a83103a61b88f0f1db9af94484aad5eefbde5313f974f53b267bd14bf [2025-02-07 20:37:04,924 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-07 20:37:04,929 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-07 20:37:04,931 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-07 20:37:04,931 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-07 20:37:04,932 INFO L274 PluginConnector]: CDTParser initialized [2025-02-07 20:37:04,932 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c [2025-02-07 20:37:06,035 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/aa4202913/1c49d7d16fcc4e1b80828b40e035040a/FLAG14dad9e0d [2025-02-07 20:37:06,253 INFO L384 CDTParser]: Found 1 translation units. [2025-02-07 20:37:06,254 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c [2025-02-07 20:37:06,261 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/aa4202913/1c49d7d16fcc4e1b80828b40e035040a/FLAG14dad9e0d [2025-02-07 20:37:06,602 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/aa4202913/1c49d7d16fcc4e1b80828b40e035040a [2025-02-07 20:37:06,604 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-07 20:37:06,606 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-07 20:37:06,607 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-07 20:37:06,607 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-07 20:37:06,610 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-07 20:37:06,610 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,611 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@24bab302 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06, skipping insertion in model container [2025-02-07 20:37:06,611 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,619 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-07 20:37:06,701 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c[524,537] [2025-02-07 20:37:06,715 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-07 20:37:06,721 INFO L200 MainTranslator]: Completed pre-run [2025-02-07 20:37:06,727 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c[524,537] [2025-02-07 20:37:06,733 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-07 20:37:06,742 INFO L204 MainTranslator]: Completed translation [2025-02-07 20:37:06,743 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06 WrapperNode [2025-02-07 20:37:06,743 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-07 20:37:06,744 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-07 20:37:06,745 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-07 20:37:06,745 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-07 20:37:06,748 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,752 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,763 INFO L138 Inliner]: procedures = 14, calls = 11, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 46 [2025-02-07 20:37:06,764 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-07 20:37:06,765 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-07 20:37:06,765 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-07 20:37:06,765 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-07 20:37:06,769 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,770 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,771 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,781 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-07 20:37:06,781 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,781 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,785 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,786 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,786 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,787 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,788 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-07 20:37:06,789 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-07 20:37:06,791 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-07 20:37:06,791 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-07 20:37:06,792 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (1/1) ... [2025-02-07 20:37:06,795 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-07 20:37:06,804 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-07 20:37:06,816 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-02-07 20:37:06,822 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-02-07 20:37:06,836 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-07 20:37:06,836 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2025-02-07 20:37:06,837 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2025-02-07 20:37:06,837 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-07 20:37:06,837 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-07 20:37:06,837 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-07 20:37:06,837 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2025-02-07 20:37:06,837 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2025-02-07 20:37:06,879 INFO L257 CfgBuilder]: Building ICFG [2025-02-07 20:37:06,881 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-07 20:37:06,994 INFO L? ?]: Removed 7 outVars from TransFormulas that were not future-live. [2025-02-07 20:37:06,995 INFO L308 CfgBuilder]: Performing block encoding [2025-02-07 20:37:07,001 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-07 20:37:07,001 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-07 20:37:07,001 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 07.02 08:37:07 BoogieIcfgContainer [2025-02-07 20:37:07,001 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-07 20:37:07,003 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-02-07 20:37:07,003 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-02-07 20:37:07,005 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-02-07 20:37:07,006 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.02 08:37:06" (1/3) ... [2025-02-07 20:37:07,006 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@56e53d67 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.02 08:37:07, skipping insertion in model container [2025-02-07 20:37:07,006 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.02 08:37:06" (2/3) ... [2025-02-07 20:37:07,006 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@56e53d67 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.02 08:37:07, skipping insertion in model container [2025-02-07 20:37:07,006 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 07.02 08:37:07" (3/3) ... [2025-02-07 20:37:07,007 INFO L128 eAbstractionObserver]: Analyzing ICFG fermat2-ll_unwindbound100.c [2025-02-07 20:37:07,016 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-02-07 20:37:07,017 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG fermat2-ll_unwindbound100.c that has 3 procedures, 23 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-02-07 20:37:07,044 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-02-07 20:37:07,051 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7deea321, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-02-07 20:37:07,051 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-02-07 20:37:07,053 INFO L276 IsEmpty]: Start isEmpty. Operand has 23 states, 15 states have (on average 1.4666666666666666) internal successors, (22), 16 states have internal predecessors, (22), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2025-02-07 20:37:07,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2025-02-07 20:37:07,057 INFO L210 NwaCegarLoop]: Found error trace [2025-02-07 20:37:07,057 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-07 20:37:07,058 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-07 20:37:07,060 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-07 20:37:07,061 INFO L85 PathProgramCache]: Analyzing trace with hash -1774886395, now seen corresponding path program 1 times [2025-02-07 20:37:07,065 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-07 20:37:07,065 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [350270193] [2025-02-07 20:37:07,065 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-07 20:37:07,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-07 20:37:07,106 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-02-07 20:37:07,115 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-02-07 20:37:07,115 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:37:07,115 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:07,146 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-07 20:37:07,146 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-07 20:37:07,147 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [350270193] [2025-02-07 20:37:07,147 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [350270193] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-07 20:37:07,147 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1079075857] [2025-02-07 20:37:07,147 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-07 20:37:07,147 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:07,148 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-07 20:37:07,149 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-07 20:37:07,154 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-02-07 20:37:07,191 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-02-07 20:37:07,213 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-02-07 20:37:07,213 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:37:07,213 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:07,214 INFO L256 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 1 conjuncts are in the unsatisfiable core [2025-02-07 20:37:07,216 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-07 20:37:07,221 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-07 20:37:07,223 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-07 20:37:07,223 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1079075857] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-07 20:37:07,223 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-07 20:37:07,223 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2025-02-07 20:37:07,224 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [848219040] [2025-02-07 20:37:07,224 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-07 20:37:07,226 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-02-07 20:37:07,227 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-07 20:37:07,240 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-02-07 20:37:07,240 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-07 20:37:07,241 INFO L87 Difference]: Start difference. First operand has 23 states, 15 states have (on average 1.4666666666666666) internal successors, (22), 16 states have internal predecessors, (22), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 2 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-07 20:37:07,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-07 20:37:07,254 INFO L93 Difference]: Finished difference Result 44 states and 61 transitions. [2025-02-07 20:37:07,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-02-07 20:37:07,255 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 17 [2025-02-07 20:37:07,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-07 20:37:07,259 INFO L225 Difference]: With dead ends: 44 [2025-02-07 20:37:07,260 INFO L226 Difference]: Without dead ends: 20 [2025-02-07 20:37:07,263 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-07 20:37:07,265 INFO L435 NwaCegarLoop]: 27 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-07 20:37:07,265 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-07 20:37:07,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2025-02-07 20:37:07,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2025-02-07 20:37:07,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 14 states have internal predecessors, (17), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-07 20:37:07,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2025-02-07 20:37:07,290 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 17 [2025-02-07 20:37:07,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-07 20:37:07,291 INFO L471 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2025-02-07 20:37:07,292 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-07 20:37:07,292 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2025-02-07 20:37:07,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2025-02-07 20:37:07,293 INFO L210 NwaCegarLoop]: Found error trace [2025-02-07 20:37:07,293 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-07 20:37:07,299 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2025-02-07 20:37:07,494 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2025-02-07 20:37:07,495 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-07 20:37:07,495 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-07 20:37:07,496 INFO L85 PathProgramCache]: Analyzing trace with hash 2078079995, now seen corresponding path program 1 times [2025-02-07 20:37:07,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-07 20:37:07,496 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [146230636] [2025-02-07 20:37:07,497 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-07 20:37:07,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-07 20:37:07,505 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-02-07 20:37:07,547 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-02-07 20:37:07,551 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:37:07,551 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-07 20:37:07,553 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1799934596] [2025-02-07 20:37:07,553 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-07 20:37:07,554 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:07,554 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-07 20:37:07,558 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-07 20:37:07,560 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-02-07 20:37:07,584 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-02-07 20:37:07,597 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-02-07 20:37:07,598 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:37:07,598 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:07,598 INFO L256 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 9 conjuncts are in the unsatisfiable core [2025-02-07 20:37:07,600 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-07 20:37:07,819 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:07,820 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-07 20:37:07,820 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-07 20:37:07,820 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [146230636] [2025-02-07 20:37:07,821 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2025-02-07 20:37:07,821 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1799934596] [2025-02-07 20:37:07,821 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1799934596] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-07 20:37:07,821 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-07 20:37:07,821 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-07 20:37:07,821 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [455150527] [2025-02-07 20:37:07,821 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-07 20:37:07,822 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-07 20:37:07,822 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-07 20:37:07,822 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-07 20:37:07,822 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-07 20:37:07,823 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-07 20:37:09,587 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.71s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2025-02-07 20:37:09,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-07 20:37:09,593 INFO L93 Difference]: Finished difference Result 32 states and 39 transitions. [2025-02-07 20:37:09,594 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-07 20:37:09,594 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 18 [2025-02-07 20:37:09,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-07 20:37:09,595 INFO L225 Difference]: With dead ends: 32 [2025-02-07 20:37:09,595 INFO L226 Difference]: Without dead ends: 30 [2025-02-07 20:37:09,595 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-07 20:37:09,596 INFO L435 NwaCegarLoop]: 17 mSDtfsCounter, 5 mSDsluCounter, 48 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2025-02-07 20:37:09,596 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 65 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2025-02-07 20:37:09,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2025-02-07 20:37:09,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2025-02-07 20:37:09,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 20 states have (on average 1.35) internal successors, (27), 21 states have internal predecessors, (27), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2025-02-07 20:37:09,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 36 transitions. [2025-02-07 20:37:09,604 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 36 transitions. Word has length 18 [2025-02-07 20:37:09,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-07 20:37:09,605 INFO L471 AbstractCegarLoop]: Abstraction has 29 states and 36 transitions. [2025-02-07 20:37:09,605 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-07 20:37:09,605 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 36 transitions. [2025-02-07 20:37:09,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2025-02-07 20:37:09,606 INFO L210 NwaCegarLoop]: Found error trace [2025-02-07 20:37:09,606 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-07 20:37:09,612 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2025-02-07 20:37:09,806 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,3 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:09,806 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-07 20:37:09,807 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-07 20:37:09,807 INFO L85 PathProgramCache]: Analyzing trace with hash 2078943934, now seen corresponding path program 1 times [2025-02-07 20:37:09,807 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-07 20:37:09,807 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [819786195] [2025-02-07 20:37:09,807 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-07 20:37:09,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-07 20:37:09,811 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-02-07 20:37:09,823 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-02-07 20:37:09,826 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:37:09,826 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:09,932 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:09,933 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-07 20:37:09,933 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [819786195] [2025-02-07 20:37:09,933 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [819786195] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-07 20:37:09,933 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-07 20:37:09,933 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-07 20:37:09,933 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1740885244] [2025-02-07 20:37:09,933 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-07 20:37:09,933 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-07 20:37:09,934 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-07 20:37:09,934 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-07 20:37:09,935 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-07 20:37:09,935 INFO L87 Difference]: Start difference. First operand 29 states and 36 transitions. Second operand has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-07 20:37:09,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-07 20:37:09,953 INFO L93 Difference]: Finished difference Result 38 states and 45 transitions. [2025-02-07 20:37:09,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-07 20:37:09,953 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 18 [2025-02-07 20:37:09,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-07 20:37:09,954 INFO L225 Difference]: With dead ends: 38 [2025-02-07 20:37:09,954 INFO L226 Difference]: Without dead ends: 31 [2025-02-07 20:37:09,955 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-07 20:37:09,956 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 5 mSDsluCounter, 33 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 55 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-07 20:37:09,956 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 55 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-07 20:37:09,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2025-02-07 20:37:09,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2025-02-07 20:37:09,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 22 states have (on average 1.3181818181818181) internal successors, (29), 23 states have internal predecessors, (29), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2025-02-07 20:37:09,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 38 transitions. [2025-02-07 20:37:09,966 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 38 transitions. Word has length 18 [2025-02-07 20:37:09,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-07 20:37:09,966 INFO L471 AbstractCegarLoop]: Abstraction has 31 states and 38 transitions. [2025-02-07 20:37:09,966 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-07 20:37:09,966 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 38 transitions. [2025-02-07 20:37:09,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2025-02-07 20:37:09,967 INFO L210 NwaCegarLoop]: Found error trace [2025-02-07 20:37:09,967 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-07 20:37:09,967 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-02-07 20:37:09,968 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-07 20:37:09,968 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-07 20:37:09,968 INFO L85 PathProgramCache]: Analyzing trace with hash 770442274, now seen corresponding path program 1 times [2025-02-07 20:37:09,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-07 20:37:09,969 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70859300] [2025-02-07 20:37:09,969 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-07 20:37:09,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-07 20:37:09,976 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-07 20:37:09,990 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-07 20:37:09,990 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:37:09,990 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:10,244 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:10,244 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-07 20:37:10,244 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [70859300] [2025-02-07 20:37:10,244 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [70859300] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-07 20:37:10,244 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [893977576] [2025-02-07 20:37:10,245 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-07 20:37:10,245 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:10,245 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-07 20:37:10,247 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-07 20:37:10,247 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-02-07 20:37:10,273 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-07 20:37:10,286 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-07 20:37:10,286 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:37:10,286 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:10,287 INFO L256 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-02-07 20:37:10,288 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-07 20:37:10,348 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:10,348 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-07 20:37:10,440 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:10,441 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [893977576] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-07 20:37:10,441 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-07 20:37:10,441 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 8] total 12 [2025-02-07 20:37:10,441 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1977945645] [2025-02-07 20:37:10,441 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-07 20:37:10,441 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2025-02-07 20:37:10,441 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-07 20:37:10,442 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2025-02-07 20:37:10,442 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2025-02-07 20:37:10,442 INFO L87 Difference]: Start difference. First operand 31 states and 38 transitions. Second operand has 12 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) [2025-02-07 20:37:10,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-07 20:37:10,518 INFO L93 Difference]: Finished difference Result 38 states and 44 transitions. [2025-02-07 20:37:10,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-07 20:37:10,520 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) Word has length 24 [2025-02-07 20:37:10,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-07 20:37:10,521 INFO L225 Difference]: With dead ends: 38 [2025-02-07 20:37:10,521 INFO L226 Difference]: Without dead ends: 33 [2025-02-07 20:37:10,521 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 43 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2025-02-07 20:37:10,521 INFO L435 NwaCegarLoop]: 17 mSDtfsCounter, 7 mSDsluCounter, 84 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-07 20:37:10,521 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 101 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-07 20:37:10,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2025-02-07 20:37:10,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 24. [2025-02-07 20:37:10,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 17 states have (on average 1.1176470588235294) internal successors, (19), 17 states have internal predecessors, (19), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-07 20:37:10,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2025-02-07 20:37:10,528 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 24 [2025-02-07 20:37:10,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-07 20:37:10,528 INFO L471 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2025-02-07 20:37:10,529 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) [2025-02-07 20:37:10,529 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2025-02-07 20:37:10,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2025-02-07 20:37:10,530 INFO L210 NwaCegarLoop]: Found error trace [2025-02-07 20:37:10,530 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-07 20:37:10,538 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2025-02-07 20:37:10,730 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:10,731 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-07 20:37:10,731 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-07 20:37:10,731 INFO L85 PathProgramCache]: Analyzing trace with hash 1415919544, now seen corresponding path program 1 times [2025-02-07 20:37:10,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-07 20:37:10,731 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676337908] [2025-02-07 20:37:10,731 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-07 20:37:10,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-07 20:37:10,738 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 27 statements into 1 equivalence classes. [2025-02-07 20:37:10,744 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 27 of 27 statements. [2025-02-07 20:37:10,744 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:37:10,744 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:10,811 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:10,812 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-07 20:37:10,813 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676337908] [2025-02-07 20:37:10,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [676337908] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-07 20:37:10,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [279228475] [2025-02-07 20:37:10,814 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-07 20:37:10,814 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:10,814 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-07 20:37:10,817 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-07 20:37:10,818 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-02-07 20:37:10,840 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 27 statements into 1 equivalence classes. [2025-02-07 20:37:10,850 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 27 of 27 statements. [2025-02-07 20:37:10,851 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:37:10,851 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:10,851 INFO L256 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 5 conjuncts are in the unsatisfiable core [2025-02-07 20:37:10,852 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-07 20:37:10,887 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:10,887 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-07 20:37:10,945 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:10,945 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [279228475] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-07 20:37:10,945 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-07 20:37:10,945 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 5] total 10 [2025-02-07 20:37:10,945 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [709968819] [2025-02-07 20:37:10,945 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-07 20:37:10,946 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-02-07 20:37:10,946 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-07 20:37:10,946 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-07 20:37:10,946 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2025-02-07 20:37:10,946 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand has 10 states, 10 states have (on average 3.5) internal successors, (35), 10 states have internal predecessors, (35), 6 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 5 states have call predecessors, (9), 5 states have call successors, (9) [2025-02-07 20:37:10,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-07 20:37:10,992 INFO L93 Difference]: Finished difference Result 56 states and 63 transitions. [2025-02-07 20:37:10,992 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-07 20:37:10,993 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.5) internal successors, (35), 10 states have internal predecessors, (35), 6 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 5 states have call predecessors, (9), 5 states have call successors, (9) Word has length 27 [2025-02-07 20:37:10,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-07 20:37:10,993 INFO L225 Difference]: With dead ends: 56 [2025-02-07 20:37:10,993 INFO L226 Difference]: Without dead ends: 51 [2025-02-07 20:37:10,994 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2025-02-07 20:37:10,994 INFO L435 NwaCegarLoop]: 21 mSDtfsCounter, 21 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-07 20:37:10,994 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 80 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 25 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-07 20:37:10,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2025-02-07 20:37:11,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2025-02-07 20:37:11,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 38 states have (on average 1.131578947368421) internal successors, (43), 38 states have internal predecessors, (43), 7 states have call successors, (7), 6 states have call predecessors, (7), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-07 20:37:11,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 56 transitions. [2025-02-07 20:37:11,003 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 56 transitions. Word has length 27 [2025-02-07 20:37:11,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-07 20:37:11,004 INFO L471 AbstractCegarLoop]: Abstraction has 51 states and 56 transitions. [2025-02-07 20:37:11,004 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.5) internal successors, (35), 10 states have internal predecessors, (35), 6 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 5 states have call predecessors, (9), 5 states have call successors, (9) [2025-02-07 20:37:11,004 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 56 transitions. [2025-02-07 20:37:11,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2025-02-07 20:37:11,005 INFO L210 NwaCegarLoop]: Found error trace [2025-02-07 20:37:11,005 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-07 20:37:11,012 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2025-02-07 20:37:11,209 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:11,209 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-07 20:37:11,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-07 20:37:11,210 INFO L85 PathProgramCache]: Analyzing trace with hash 656559422, now seen corresponding path program 2 times [2025-02-07 20:37:11,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-07 20:37:11,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [305144009] [2025-02-07 20:37:11,210 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-07 20:37:11,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-07 20:37:11,216 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 54 statements into 2 equivalence classes. [2025-02-07 20:37:11,223 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 54 of 54 statements. [2025-02-07 20:37:11,223 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-07 20:37:11,223 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:11,359 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 38 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-02-07 20:37:11,359 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-07 20:37:11,359 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [305144009] [2025-02-07 20:37:11,360 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [305144009] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-07 20:37:11,360 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [611315510] [2025-02-07 20:37:11,360 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-07 20:37:11,360 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:11,360 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-07 20:37:11,362 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-07 20:37:11,363 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-02-07 20:37:11,388 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 54 statements into 2 equivalence classes. [2025-02-07 20:37:11,404 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 54 of 54 statements. [2025-02-07 20:37:11,404 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-07 20:37:11,404 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:11,405 INFO L256 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 11 conjuncts are in the unsatisfiable core [2025-02-07 20:37:11,406 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-07 20:37:11,466 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 62 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:11,466 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-07 20:37:11,576 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 38 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-02-07 20:37:11,576 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [611315510] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-07 20:37:11,577 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-07 20:37:11,577 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7, 8] total 17 [2025-02-07 20:37:11,577 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [742054817] [2025-02-07 20:37:11,577 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-07 20:37:11,577 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2025-02-07 20:37:11,577 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-07 20:37:11,578 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-02-07 20:37:11,578 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=166, Unknown=0, NotChecked=0, Total=272 [2025-02-07 20:37:11,578 INFO L87 Difference]: Start difference. First operand 51 states and 56 transitions. Second operand has 17 states, 17 states have (on average 4.117647058823529) internal successors, (70), 17 states have internal predecessors, (70), 12 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2025-02-07 20:37:11,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-07 20:37:11,743 INFO L93 Difference]: Finished difference Result 110 states and 126 transitions. [2025-02-07 20:37:11,744 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2025-02-07 20:37:11,744 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 4.117647058823529) internal successors, (70), 17 states have internal predecessors, (70), 12 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) Word has length 54 [2025-02-07 20:37:11,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-07 20:37:11,745 INFO L225 Difference]: With dead ends: 110 [2025-02-07 20:37:11,745 INFO L226 Difference]: Without dead ends: 105 [2025-02-07 20:37:11,745 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=215, Invalid=385, Unknown=0, NotChecked=0, Total=600 [2025-02-07 20:37:11,746 INFO L435 NwaCegarLoop]: 21 mSDtfsCounter, 55 mSDsluCounter, 116 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 137 SdHoareTripleChecker+Invalid, 68 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-07 20:37:11,746 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [55 Valid, 137 Invalid, 68 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-07 20:37:11,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2025-02-07 20:37:11,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2025-02-07 20:37:11,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 80 states have (on average 1.1375) internal successors, (91), 80 states have internal predecessors, (91), 13 states have call successors, (13), 12 states have call predecessors, (13), 11 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2025-02-07 20:37:11,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 116 transitions. [2025-02-07 20:37:11,764 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 116 transitions. Word has length 54 [2025-02-07 20:37:11,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-07 20:37:11,764 INFO L471 AbstractCegarLoop]: Abstraction has 105 states and 116 transitions. [2025-02-07 20:37:11,764 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 4.117647058823529) internal successors, (70), 17 states have internal predecessors, (70), 12 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2025-02-07 20:37:11,764 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 116 transitions. [2025-02-07 20:37:11,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2025-02-07 20:37:11,766 INFO L210 NwaCegarLoop]: Found error trace [2025-02-07 20:37:11,766 INFO L218 NwaCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-07 20:37:11,772 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2025-02-07 20:37:11,966 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,6 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:11,967 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-07 20:37:11,967 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-07 20:37:11,967 INFO L85 PathProgramCache]: Analyzing trace with hash -1989547778, now seen corresponding path program 3 times [2025-02-07 20:37:11,968 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-07 20:37:11,968 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249282653] [2025-02-07 20:37:11,968 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-07 20:37:11,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-07 20:37:11,975 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 108 statements into 11 equivalence classes. [2025-02-07 20:37:12,035 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 108 of 108 statements. [2025-02-07 20:37:12,036 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-02-07 20:37:12,036 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:12,608 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 245 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2025-02-07 20:37:12,609 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-07 20:37:12,609 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249282653] [2025-02-07 20:37:12,609 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1249282653] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-07 20:37:12,609 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1271220639] [2025-02-07 20:37:12,609 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-07 20:37:12,609 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:12,609 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-07 20:37:12,611 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-07 20:37:12,613 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-02-07 20:37:12,637 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 108 statements into 11 equivalence classes. [2025-02-07 20:37:12,806 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 108 of 108 statements. [2025-02-07 20:37:12,806 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-02-07 20:37:12,806 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:12,807 INFO L256 TraceCheckSpWp]: Trace formula consists of 265 conjuncts, 23 conjuncts are in the unsatisfiable core [2025-02-07 20:37:12,810 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-07 20:37:12,927 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 425 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:12,928 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-07 20:37:13,283 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 245 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2025-02-07 20:37:13,283 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1271220639] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-07 20:37:13,283 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-07 20:37:13,283 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 13, 14] total 36 [2025-02-07 20:37:13,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [516304195] [2025-02-07 20:37:13,284 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-07 20:37:13,284 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2025-02-07 20:37:13,284 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-07 20:37:13,285 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2025-02-07 20:37:13,286 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=521, Invalid=739, Unknown=0, NotChecked=0, Total=1260 [2025-02-07 20:37:13,286 INFO L87 Difference]: Start difference. First operand 105 states and 116 transitions. Second operand has 36 states, 36 states have (on average 4.166666666666667) internal successors, (150), 36 states have internal predecessors, (150), 24 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 23 states have call predecessors, (36), 23 states have call successors, (36) [2025-02-07 20:37:13,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-07 20:37:13,693 INFO L93 Difference]: Finished difference Result 218 states and 252 transitions. [2025-02-07 20:37:13,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2025-02-07 20:37:13,694 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 4.166666666666667) internal successors, (150), 36 states have internal predecessors, (150), 24 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 23 states have call predecessors, (36), 23 states have call successors, (36) Word has length 108 [2025-02-07 20:37:13,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-07 20:37:13,695 INFO L225 Difference]: With dead ends: 218 [2025-02-07 20:37:13,695 INFO L226 Difference]: Without dead ends: 213 [2025-02-07 20:37:13,696 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 203 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=857, Invalid=1495, Unknown=0, NotChecked=0, Total=2352 [2025-02-07 20:37:13,697 INFO L435 NwaCegarLoop]: 21 mSDtfsCounter, 121 mSDsluCounter, 183 mSDsCounter, 0 mSdLazyCounter, 100 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 121 SdHoareTripleChecker+Valid, 204 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 100 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-07 20:37:13,697 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [121 Valid, 204 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 100 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-07 20:37:13,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2025-02-07 20:37:13,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 213. [2025-02-07 20:37:13,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 213 states, 164 states have (on average 1.1402439024390243) internal successors, (187), 164 states have internal predecessors, (187), 25 states have call successors, (25), 24 states have call predecessors, (25), 23 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2025-02-07 20:37:13,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 236 transitions. [2025-02-07 20:37:13,725 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 236 transitions. Word has length 108 [2025-02-07 20:37:13,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-07 20:37:13,726 INFO L471 AbstractCegarLoop]: Abstraction has 213 states and 236 transitions. [2025-02-07 20:37:13,726 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 4.166666666666667) internal successors, (150), 36 states have internal predecessors, (150), 24 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 23 states have call predecessors, (36), 23 states have call successors, (36) [2025-02-07 20:37:13,726 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 236 transitions. [2025-02-07 20:37:13,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2025-02-07 20:37:13,728 INFO L210 NwaCegarLoop]: Found error trace [2025-02-07 20:37:13,728 INFO L218 NwaCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 22, 22, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-07 20:37:13,732 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2025-02-07 20:37:13,928 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2025-02-07 20:37:13,928 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-07 20:37:13,929 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-07 20:37:13,929 INFO L85 PathProgramCache]: Analyzing trace with hash -340905858, now seen corresponding path program 4 times [2025-02-07 20:37:13,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-07 20:37:13,929 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851121821] [2025-02-07 20:37:13,929 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-07 20:37:13,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-07 20:37:13,939 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 216 statements into 2 equivalence classes. [2025-02-07 20:37:13,986 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 216 of 216 statements. [2025-02-07 20:37:13,990 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-07 20:37:13,990 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:15,358 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 1199 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2025-02-07 20:37:15,358 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-07 20:37:15,358 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [851121821] [2025-02-07 20:37:15,359 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [851121821] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-07 20:37:15,359 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1229638721] [2025-02-07 20:37:15,359 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-07 20:37:15,359 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:15,359 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-07 20:37:15,361 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-07 20:37:15,365 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-02-07 20:37:15,397 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 216 statements into 2 equivalence classes. [2025-02-07 20:37:15,459 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 216 of 216 statements. [2025-02-07 20:37:15,459 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-07 20:37:15,459 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:15,462 INFO L256 TraceCheckSpWp]: Trace formula consists of 505 conjuncts, 47 conjuncts are in the unsatisfiable core [2025-02-07 20:37:15,467 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-07 20:37:15,767 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 2123 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:15,767 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-07 20:37:16,731 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 1199 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2025-02-07 20:37:16,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1229638721] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-07 20:37:16,732 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-07 20:37:16,732 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 25, 26] total 57 [2025-02-07 20:37:16,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1709004870] [2025-02-07 20:37:16,732 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-07 20:37:16,734 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 57 states [2025-02-07 20:37:16,734 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-07 20:37:16,735 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2025-02-07 20:37:16,737 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1269, Invalid=1923, Unknown=0, NotChecked=0, Total=3192 [2025-02-07 20:37:16,737 INFO L87 Difference]: Start difference. First operand 213 states and 236 transitions. Second operand has 57 states, 56 states have (on average 4.839285714285714) internal successors, (271), 56 states have internal predecessors, (271), 49 states have call successors, (74), 26 states have call predecessors, (74), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) [2025-02-07 20:37:18,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-07 20:37:18,085 INFO L93 Difference]: Finished difference Result 434 states and 504 transitions. [2025-02-07 20:37:18,085 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2025-02-07 20:37:18,086 INFO L78 Accepts]: Start accepts. Automaton has has 57 states, 56 states have (on average 4.839285714285714) internal successors, (271), 56 states have internal predecessors, (271), 49 states have call successors, (74), 26 states have call predecessors, (74), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) Word has length 216 [2025-02-07 20:37:18,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-07 20:37:18,089 INFO L225 Difference]: With dead ends: 434 [2025-02-07 20:37:18,089 INFO L226 Difference]: Without dead ends: 429 [2025-02-07 20:37:18,092 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 505 GetRequests, 406 SyntacticMatches, 0 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1578 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=3446, Invalid=6654, Unknown=0, NotChecked=0, Total=10100 [2025-02-07 20:37:18,093 INFO L435 NwaCegarLoop]: 21 mSDtfsCounter, 344 mSDsluCounter, 381 mSDsCounter, 0 mSdLazyCounter, 214 mSolverCounterSat, 38 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 344 SdHoareTripleChecker+Valid, 402 SdHoareTripleChecker+Invalid, 252 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 38 IncrementalHoareTripleChecker+Valid, 214 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-07 20:37:18,093 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [344 Valid, 402 Invalid, 252 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [38 Valid, 214 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-07 20:37:18,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states. [2025-02-07 20:37:18,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 429. [2025-02-07 20:37:18,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 429 states, 332 states have (on average 1.141566265060241) internal successors, (379), 332 states have internal predecessors, (379), 49 states have call successors, (49), 48 states have call predecessors, (49), 47 states have return successors, (48), 48 states have call predecessors, (48), 48 states have call successors, (48) [2025-02-07 20:37:18,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 429 states to 429 states and 476 transitions. [2025-02-07 20:37:18,143 INFO L78 Accepts]: Start accepts. Automaton has 429 states and 476 transitions. Word has length 216 [2025-02-07 20:37:18,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-07 20:37:18,144 INFO L471 AbstractCegarLoop]: Abstraction has 429 states and 476 transitions. [2025-02-07 20:37:18,144 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 57 states, 56 states have (on average 4.839285714285714) internal successors, (271), 56 states have internal predecessors, (271), 49 states have call successors, (74), 26 states have call predecessors, (74), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) [2025-02-07 20:37:18,144 INFO L276 IsEmpty]: Start isEmpty. Operand 429 states and 476 transitions. [2025-02-07 20:37:18,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 433 [2025-02-07 20:37:18,148 INFO L210 NwaCegarLoop]: Found error trace [2025-02-07 20:37:18,148 INFO L218 NwaCegarLoop]: trace histogram [47, 47, 46, 46, 46, 46, 46, 46, 46, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-07 20:37:18,158 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2025-02-07 20:37:18,351 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,8 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:18,352 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-07 20:37:18,352 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-07 20:37:18,352 INFO L85 PathProgramCache]: Analyzing trace with hash -535101570, now seen corresponding path program 5 times [2025-02-07 20:37:18,352 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-07 20:37:18,352 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [439632312] [2025-02-07 20:37:18,352 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-07 20:37:18,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-07 20:37:18,385 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 432 statements into 47 equivalence classes. [2025-02-07 20:37:18,628 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 432 of 432 statements. [2025-02-07 20:37:18,628 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-02-07 20:37:18,628 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:21,957 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 5267 refuted. 0 times theorem prover too weak. 4144 trivial. 0 not checked. [2025-02-07 20:37:21,957 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-07 20:37:21,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [439632312] [2025-02-07 20:37:21,957 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [439632312] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-07 20:37:21,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1099692680] [2025-02-07 20:37:21,957 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-07 20:37:21,957 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:21,957 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-07 20:37:21,962 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-07 20:37:21,965 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-02-07 20:37:22,017 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 432 statements into 47 equivalence classes. [2025-02-07 20:37:24,393 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 432 of 432 statements. [2025-02-07 20:37:24,393 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-02-07 20:37:24,393 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:24,403 INFO L256 TraceCheckSpWp]: Trace formula consists of 985 conjuncts, 95 conjuncts are in the unsatisfiable core [2025-02-07 20:37:24,409 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-07 20:37:24,891 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 9407 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:24,891 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-07 20:37:27,226 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 5267 refuted. 0 times theorem prover too weak. 4144 trivial. 0 not checked. [2025-02-07 20:37:27,230 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1099692680] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-07 20:37:27,230 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-07 20:37:27,231 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 49, 50] total 99 [2025-02-07 20:37:27,231 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [561628802] [2025-02-07 20:37:27,231 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-07 20:37:27,232 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 99 states [2025-02-07 20:37:27,232 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-07 20:37:27,234 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2025-02-07 20:37:27,236 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4658, Invalid=5044, Unknown=0, NotChecked=0, Total=9702 [2025-02-07 20:37:27,238 INFO L87 Difference]: Start difference. First operand 429 states and 476 transitions. Second operand has 99 states, 99 states have (on average 5.333333333333333) internal successors, (528), 99 states have internal predecessors, (528), 95 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 94 states have call predecessors, (144), 94 states have call successors, (144) [2025-02-07 20:37:31,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-07 20:37:31,251 INFO L93 Difference]: Finished difference Result 866 states and 1008 transitions. [2025-02-07 20:37:31,251 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2025-02-07 20:37:31,252 INFO L78 Accepts]: Start accepts. Automaton has has 99 states, 99 states have (on average 5.333333333333333) internal successors, (528), 99 states have internal predecessors, (528), 95 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 94 states have call predecessors, (144), 94 states have call successors, (144) Word has length 432 [2025-02-07 20:37:31,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-07 20:37:31,256 INFO L225 Difference]: With dead ends: 866 [2025-02-07 20:37:31,256 INFO L226 Difference]: Without dead ends: 861 [2025-02-07 20:37:31,262 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1005 GetRequests, 816 SyntacticMatches, 0 SemanticMatches, 189 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5716 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=13540, Invalid=22750, Unknown=0, NotChecked=0, Total=36290 [2025-02-07 20:37:31,262 INFO L435 NwaCegarLoop]: 21 mSDtfsCounter, 886 mSDsluCounter, 628 mSDsCounter, 0 mSdLazyCounter, 384 mSolverCounterSat, 105 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 886 SdHoareTripleChecker+Valid, 649 SdHoareTripleChecker+Invalid, 489 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 105 IncrementalHoareTripleChecker+Valid, 384 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-07 20:37:31,263 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [886 Valid, 649 Invalid, 489 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [105 Valid, 384 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-07 20:37:31,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 861 states. [2025-02-07 20:37:31,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 861 to 861. [2025-02-07 20:37:31,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 861 states, 668 states have (on average 1.1422155688622755) internal successors, (763), 668 states have internal predecessors, (763), 97 states have call successors, (97), 96 states have call predecessors, (97), 95 states have return successors, (96), 96 states have call predecessors, (96), 96 states have call successors, (96) [2025-02-07 20:37:31,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 861 states to 861 states and 956 transitions. [2025-02-07 20:37:31,323 INFO L78 Accepts]: Start accepts. Automaton has 861 states and 956 transitions. Word has length 432 [2025-02-07 20:37:31,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-07 20:37:31,324 INFO L471 AbstractCegarLoop]: Abstraction has 861 states and 956 transitions. [2025-02-07 20:37:31,324 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 99 states, 99 states have (on average 5.333333333333333) internal successors, (528), 99 states have internal predecessors, (528), 95 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 94 states have call predecessors, (144), 94 states have call successors, (144) [2025-02-07 20:37:31,325 INFO L276 IsEmpty]: Start isEmpty. Operand 861 states and 956 transitions. [2025-02-07 20:37:31,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 865 [2025-02-07 20:37:31,335 INFO L210 NwaCegarLoop]: Found error trace [2025-02-07 20:37:31,335 INFO L218 NwaCegarLoop]: trace histogram [95, 95, 94, 94, 94, 94, 94, 94, 94, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-07 20:37:31,346 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2025-02-07 20:37:31,540 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,9 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:31,540 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-07 20:37:31,541 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-07 20:37:31,541 INFO L85 PathProgramCache]: Analyzing trace with hash 688233854, now seen corresponding path program 6 times [2025-02-07 20:37:31,541 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-07 20:37:31,541 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506113428] [2025-02-07 20:37:31,541 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-07 20:37:31,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-07 20:37:31,571 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 864 statements into 95 equivalence classes. [2025-02-07 20:37:32,983 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 864 of 864 statements. [2025-02-07 20:37:32,984 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-02-07 20:37:32,984 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:47,584 INFO L134 CoverageAnalysis]: Checked inductivity of 39719 backedges. 188 proven. 22043 refuted. 0 times theorem prover too weak. 17488 trivial. 0 not checked. [2025-02-07 20:37:47,584 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-07 20:37:47,584 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1506113428] [2025-02-07 20:37:47,585 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1506113428] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-07 20:37:47,585 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1833531659] [2025-02-07 20:37:47,585 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-07 20:37:47,585 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:37:47,585 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-07 20:37:47,591 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-07 20:37:47,592 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-02-07 20:37:47,669 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 864 statements into 95 equivalence classes. [2025-02-07 20:37:55,042 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 864 of 864 statements. [2025-02-07 20:37:55,042 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-02-07 20:37:55,042 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-07 20:37:55,079 INFO L256 TraceCheckSpWp]: Trace formula consists of 1945 conjuncts, 191 conjuncts are in the unsatisfiable core [2025-02-07 20:37:55,109 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-07 20:37:55,885 INFO L134 CoverageAnalysis]: Checked inductivity of 39719 backedges. 188 proven. 39527 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-07 20:37:55,885 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-07 20:38:00,044 INFO L134 CoverageAnalysis]: Checked inductivity of 39719 backedges. 188 proven. 22043 refuted. 0 times theorem prover too weak. 17488 trivial. 0 not checked. [2025-02-07 20:38:00,044 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1833531659] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-07 20:38:00,044 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-07 20:38:00,044 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [132, 97, 98] total 139 [2025-02-07 20:38:00,045 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1908463621] [2025-02-07 20:38:00,045 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-07 20:38:00,046 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 139 states [2025-02-07 20:38:00,046 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-07 20:38:00,049 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 139 interpolants. [2025-02-07 20:38:00,050 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=6897, Invalid=12285, Unknown=0, NotChecked=0, Total=19182 [2025-02-07 20:38:00,051 INFO L87 Difference]: Start difference. First operand 861 states and 956 transitions. Second operand has 139 states, 139 states have (on average 5.525179856115108) internal successors, (768), 139 states have internal predecessors, (768), 102 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 101 states have call predecessors, (199), 101 states have call successors, (199) [2025-02-07 20:38:03,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-07 20:38:03,189 INFO L93 Difference]: Finished difference Result 920 states and 1026 transitions. [2025-02-07 20:38:03,189 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 202 states. [2025-02-07 20:38:03,190 INFO L78 Accepts]: Start accepts. Automaton has has 139 states, 139 states have (on average 5.525179856115108) internal successors, (768), 139 states have internal predecessors, (768), 102 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 101 states have call predecessors, (199), 101 states have call successors, (199) Word has length 864 [2025-02-07 20:38:03,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-07 20:38:03,194 INFO L225 Difference]: With dead ends: 920 [2025-02-07 20:38:03,194 INFO L226 Difference]: Without dead ends: 915 [2025-02-07 20:38:03,197 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1924 GetRequests, 1631 SyntacticMatches, 90 SemanticMatches, 203 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10424 ImplicationChecksByTransitivity, 9.7s TimeCoverageRelationStatistics Valid=15560, Invalid=26260, Unknown=0, NotChecked=0, Total=41820 [2025-02-07 20:38:03,198 INFO L435 NwaCegarLoop]: 21 mSDtfsCounter, 355 mSDsluCounter, 696 mSDsCounter, 0 mSdLazyCounter, 455 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 355 SdHoareTripleChecker+Valid, 717 SdHoareTripleChecker+Invalid, 457 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 455 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-07 20:38:03,198 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [355 Valid, 717 Invalid, 457 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 455 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-07 20:38:03,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 915 states. [2025-02-07 20:38:03,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 915 to 915. [2025-02-07 20:38:03,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 915 states, 710 states have (on average 1.1422535211267606) internal successors, (811), 710 states have internal predecessors, (811), 103 states have call successors, (103), 102 states have call predecessors, (103), 101 states have return successors, (102), 102 states have call predecessors, (102), 102 states have call successors, (102) [2025-02-07 20:38:03,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 915 states to 915 states and 1016 transitions. [2025-02-07 20:38:03,265 INFO L78 Accepts]: Start accepts. Automaton has 915 states and 1016 transitions. Word has length 864 [2025-02-07 20:38:03,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-07 20:38:03,268 INFO L471 AbstractCegarLoop]: Abstraction has 915 states and 1016 transitions. [2025-02-07 20:38:03,269 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 139 states, 139 states have (on average 5.525179856115108) internal successors, (768), 139 states have internal predecessors, (768), 102 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 101 states have call predecessors, (199), 101 states have call successors, (199) [2025-02-07 20:38:03,269 INFO L276 IsEmpty]: Start isEmpty. Operand 915 states and 1016 transitions. [2025-02-07 20:38:03,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 919 [2025-02-07 20:38:03,288 INFO L210 NwaCegarLoop]: Found error trace [2025-02-07 20:38:03,289 INFO L218 NwaCegarLoop]: trace histogram [101, 101, 100, 100, 100, 100, 100, 100, 100, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-07 20:38:03,300 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2025-02-07 20:38:03,493 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,10 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:38:03,493 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-07 20:38:03,495 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-07 20:38:03,495 INFO L85 PathProgramCache]: Analyzing trace with hash 315001150, now seen corresponding path program 7 times [2025-02-07 20:38:03,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-07 20:38:03,495 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219459831] [2025-02-07 20:38:03,495 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-07 20:38:03,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-07 20:38:03,519 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 918 statements into 1 equivalence classes. [2025-02-07 20:38:03,825 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 918 of 918 statements. [2025-02-07 20:38:03,825 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:38:03,825 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-07 20:38:03,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [46102351] [2025-02-07 20:38:03,832 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-07 20:38:03,833 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:38:03,833 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-07 20:38:03,834 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-07 20:38:03,836 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-02-07 20:38:03,916 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 918 statements into 1 equivalence classes. [2025-02-07 20:38:04,151 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 918 of 918 statements. [2025-02-07 20:38:04,151 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:38:04,151 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-07 20:38:04,151 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-07 20:38:04,217 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 918 statements into 1 equivalence classes. [2025-02-07 20:38:04,334 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 918 of 918 statements. [2025-02-07 20:38:04,334 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-07 20:38:04,334 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-07 20:38:04,497 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-07 20:38:04,498 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-02-07 20:38:04,499 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-02-07 20:38:04,515 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2025-02-07 20:38:04,701 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,11 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-07 20:38:04,706 INFO L422 BasicCegarLoop]: Path program histogram: [7, 1, 1, 1, 1] [2025-02-07 20:38:04,832 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-02-07 20:38:04,834 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.02 08:38:04 BoogieIcfgContainer [2025-02-07 20:38:04,834 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-02-07 20:38:04,835 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-07 20:38:04,835 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-07 20:38:04,835 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-07 20:38:04,835 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 07.02 08:37:07" (3/4) ... [2025-02-07 20:38:04,836 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-02-07 20:38:04,948 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 711. [2025-02-07 20:38:05,119 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-07 20:38:05,120 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.yml [2025-02-07 20:38:05,120 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-07 20:38:05,121 INFO L158 Benchmark]: Toolchain (without parser) took 58515.24ms. Allocated memory was 167.8MB in the beginning and 1.8GB in the end (delta: 1.6GB). Free memory was 124.2MB in the beginning and 1.0GB in the end (delta: -911.3MB). Peak memory consumption was 710.3MB. Max. memory is 16.1GB. [2025-02-07 20:38:05,122 INFO L158 Benchmark]: CDTParser took 0.19ms. Allocated memory is still 201.3MB. Free memory is still 121.2MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-07 20:38:05,122 INFO L158 Benchmark]: CACSL2BoogieTranslator took 137.00ms. Allocated memory is still 167.8MB. Free memory was 124.2MB in the beginning and 112.9MB in the end (delta: 11.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-07 20:38:05,122 INFO L158 Benchmark]: Boogie Procedure Inliner took 20.20ms. Allocated memory is still 167.8MB. Free memory was 112.9MB in the beginning and 111.7MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-07 20:38:05,123 INFO L158 Benchmark]: Boogie Preprocessor took 23.45ms. Allocated memory is still 167.8MB. Free memory was 111.7MB in the beginning and 110.8MB in the end (delta: 905.1kB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-07 20:38:05,123 INFO L158 Benchmark]: IcfgBuilder took 212.86ms. Allocated memory is still 167.8MB. Free memory was 110.8MB in the beginning and 98.8MB in the end (delta: 12.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-07 20:38:05,123 INFO L158 Benchmark]: TraceAbstraction took 57831.62ms. Allocated memory was 167.8MB in the beginning and 1.8GB in the end (delta: 1.6GB). Free memory was 98.4MB in the beginning and 1.1GB in the end (delta: -987.5MB). Peak memory consumption was 634.8MB. Max. memory is 16.1GB. [2025-02-07 20:38:05,124 INFO L158 Benchmark]: Witness Printer took 285.50ms. Allocated memory is still 1.8GB. Free memory was 1.1GB in the beginning and 1.0GB in the end (delta: 50.3MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. [2025-02-07 20:38:05,125 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19ms. Allocated memory is still 201.3MB. Free memory is still 121.2MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 137.00ms. Allocated memory is still 167.8MB. Free memory was 124.2MB in the beginning and 112.9MB in the end (delta: 11.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 20.20ms. Allocated memory is still 167.8MB. Free memory was 112.9MB in the beginning and 111.7MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 23.45ms. Allocated memory is still 167.8MB. Free memory was 111.7MB in the beginning and 110.8MB in the end (delta: 905.1kB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 212.86ms. Allocated memory is still 167.8MB. Free memory was 110.8MB in the beginning and 98.8MB in the end (delta: 12.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * TraceAbstraction took 57831.62ms. Allocated memory was 167.8MB in the beginning and 1.8GB in the end (delta: 1.6GB). Free memory was 98.4MB in the beginning and 1.1GB in the end (delta: -987.5MB). Peak memory consumption was 634.8MB. Max. memory is 16.1GB. * Witness Printer took 285.50ms. Allocated memory is still 1.8GB. Free memory was 1.1GB in the beginning and 1.0GB in the end (delta: 50.3MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 14]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L19] int counter = 0; [L21] int A, R; [L22] long long u, v, r; [L23] A = __VERIFIER_nondet_int() [L24] R = __VERIFIER_nondet_int() [L26] CALL assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) VAL [\old(cond)=1, counter=0] [L26] RET assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [A=25010003, R=5002, counter=0] [L28] CALL assume_abort_if_not(A % 2 == 1) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) VAL [\old(cond)=1, counter=0] [L28] RET assume_abort_if_not(A % 2 == 1) VAL [A=25010003, R=5002, counter=0] [L30] u = ((long long) 2 * R) + 1 [L31] v = 1 [L32] r = ((long long) R * R) - A VAL [A=25010003, counter=0, r=10001, u=10005, v=1] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=1, r=10001, u=10005, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=1] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=1] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=1, r=10001, u=10005, v=1] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=1, r=10001, u=10005, v=1] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=1, r=10000, u=10005, v=3] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=2, r=10000, u=10005, v=3] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=2] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=2] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=2, r=10000, u=10005, v=3] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=2, r=10000, u=10005, v=3] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=2, r=9997, u=10005, v=5] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=3, r=9997, u=10005, v=5] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=3] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=3] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=3, r=9997, u=10005, v=5] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=3, r=9997, u=10005, v=5] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=3, r=9992, u=10005, v=7] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=4, r=9992, u=10005, v=7] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=4] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=4] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=4, r=9992, u=10005, v=7] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=4, r=9992, u=10005, v=7] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=4, r=9985, u=10005, v=9] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=5, r=9985, u=10005, v=9] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=5] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=5] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=5, r=9985, u=10005, v=9] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=5, r=9985, u=10005, v=9] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=5, r=9976, u=10005, v=11] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=6, r=9976, u=10005, v=11] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=6] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=6] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=6, r=9976, u=10005, v=11] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=6, r=9976, u=10005, v=11] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=6, r=9965, u=10005, v=13] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=7, r=9965, u=10005, v=13] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=7] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=7] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=7, r=9965, u=10005, v=13] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=7, r=9965, u=10005, v=13] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=7, r=9952, u=10005, v=15] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=8, r=9952, u=10005, v=15] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=8] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=8] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=8, r=9952, u=10005, v=15] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=8, r=9952, u=10005, v=15] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=8, r=9937, u=10005, v=17] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=9, r=9937, u=10005, v=17] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=9] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=9] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=9, r=9937, u=10005, v=17] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=9, r=9937, u=10005, v=17] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=9, r=9920, u=10005, v=19] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=10, r=9920, u=10005, v=19] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=10] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=10] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=10, r=9920, u=10005, v=19] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=10, r=9920, u=10005, v=19] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=10, r=9901, u=10005, v=21] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=11, r=9901, u=10005, v=21] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=11] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=11] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=11, r=9901, u=10005, v=21] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=11, r=9901, u=10005, v=21] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=11, r=9880, u=10005, v=23] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=12, r=9880, u=10005, v=23] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=12] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=12] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=12, r=9880, u=10005, v=23] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=12, r=9880, u=10005, v=23] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=12, r=9857, u=10005, v=25] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=13, r=9857, u=10005, v=25] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=13] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=13] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=13, r=9857, u=10005, v=25] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=13, r=9857, u=10005, v=25] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=13, r=9832, u=10005, v=27] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=14, r=9832, u=10005, v=27] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=14] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=14] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=14, r=9832, u=10005, v=27] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=14, r=9832, u=10005, v=27] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=14, r=9805, u=10005, v=29] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=15, r=9805, u=10005, v=29] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=15] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=15] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=15, r=9805, u=10005, v=29] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=15, r=9805, u=10005, v=29] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=15, r=9776, u=10005, v=31] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=16, r=9776, u=10005, v=31] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=16] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=16] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=16, r=9776, u=10005, v=31] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=16, r=9776, u=10005, v=31] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=16, r=9745, u=10005, v=33] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=17, r=9745, u=10005, v=33] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=17] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=17] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=17, r=9745, u=10005, v=33] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=17, r=9745, u=10005, v=33] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=17, r=9712, u=10005, v=35] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=18, r=9712, u=10005, v=35] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=18] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=18] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=18, r=9712, u=10005, v=35] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=18, r=9712, u=10005, v=35] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=18, r=9677, u=10005, v=37] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=19, r=9677, u=10005, v=37] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=19] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=19] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=19, r=9677, u=10005, v=37] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=19, r=9677, u=10005, v=37] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=19, r=9640, u=10005, v=39] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=20, r=9640, u=10005, v=39] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=20] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=20] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=20, r=9640, u=10005, v=39] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=20, r=9640, u=10005, v=39] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=20, r=9601, u=10005, v=41] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=21, r=9601, u=10005, v=41] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=21] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=21] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=21, r=9601, u=10005, v=41] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=21, r=9601, u=10005, v=41] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=21, r=9560, u=10005, v=43] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=22, r=9560, u=10005, v=43] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=22] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=22] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=22, r=9560, u=10005, v=43] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=22, r=9560, u=10005, v=43] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=22, r=9517, u=10005, v=45] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=23, r=9517, u=10005, v=45] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=23] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=23] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=23, r=9517, u=10005, v=45] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=23, r=9517, u=10005, v=45] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=23, r=9472, u=10005, v=47] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=24, r=9472, u=10005, v=47] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=24] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=24] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=24, r=9472, u=10005, v=47] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=24, r=9472, u=10005, v=47] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=24, r=9425, u=10005, v=49] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=25, r=9425, u=10005, v=49] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=25] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=25] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=25, r=9425, u=10005, v=49] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=25, r=9425, u=10005, v=49] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=25, r=9376, u=10005, v=51] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=26, r=9376, u=10005, v=51] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=26] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=26] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=26, r=9376, u=10005, v=51] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=26, r=9376, u=10005, v=51] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=26, r=9325, u=10005, v=53] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=27, r=9325, u=10005, v=53] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=27] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=27] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=27, r=9325, u=10005, v=53] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=27, r=9325, u=10005, v=53] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=27, r=9272, u=10005, v=55] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=28, r=9272, u=10005, v=55] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=28] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=28] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=28, r=9272, u=10005, v=55] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=28, r=9272, u=10005, v=55] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=28, r=9217, u=10005, v=57] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=29, r=9217, u=10005, v=57] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=29] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=29] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=29, r=9217, u=10005, v=57] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=29, r=9217, u=10005, v=57] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=29, r=9160, u=10005, v=59] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=30, r=9160, u=10005, v=59] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=30] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=30] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=30, r=9160, u=10005, v=59] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=30, r=9160, u=10005, v=59] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=30, r=9101, u=10005, v=61] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=31, r=9101, u=10005, v=61] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=31] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=31] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=31, r=9101, u=10005, v=61] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=31, r=9101, u=10005, v=61] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=31, r=9040, u=10005, v=63] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=32, r=9040, u=10005, v=63] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=32] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=32] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=32, r=9040, u=10005, v=63] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=32, r=9040, u=10005, v=63] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=32, r=8977, u=10005, v=65] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=33, r=8977, u=10005, v=65] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=33] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=33] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=33, r=8977, u=10005, v=65] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=33, r=8977, u=10005, v=65] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=33, r=8912, u=10005, v=67] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=34, r=8912, u=10005, v=67] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=34] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=34] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=34, r=8912, u=10005, v=67] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=34, r=8912, u=10005, v=67] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=34, r=8845, u=10005, v=69] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=35, r=8845, u=10005, v=69] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=35] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=35] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=35, r=8845, u=10005, v=69] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=35, r=8845, u=10005, v=69] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=35, r=8776, u=10005, v=71] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=36, r=8776, u=10005, v=71] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=36] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=36] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=36, r=8776, u=10005, v=71] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=36, r=8776, u=10005, v=71] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=36, r=8705, u=10005, v=73] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=37, r=8705, u=10005, v=73] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=37] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=37] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=37, r=8705, u=10005, v=73] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=37, r=8705, u=10005, v=73] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=37, r=8632, u=10005, v=75] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=38, r=8632, u=10005, v=75] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=38] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=38] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=38, r=8632, u=10005, v=75] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=38, r=8632, u=10005, v=75] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=38, r=8557, u=10005, v=77] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=39, r=8557, u=10005, v=77] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=39] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=39] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=39, r=8557, u=10005, v=77] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=39, r=8557, u=10005, v=77] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=39, r=8480, u=10005, v=79] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=40, r=8480, u=10005, v=79] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=40] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=40] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=40, r=8480, u=10005, v=79] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=40, r=8480, u=10005, v=79] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=40, r=8401, u=10005, v=81] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=41, r=8401, u=10005, v=81] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=41] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=41] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=41, r=8401, u=10005, v=81] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=41, r=8401, u=10005, v=81] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=41, r=8320, u=10005, v=83] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=42, r=8320, u=10005, v=83] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=42] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=42] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=42, r=8320, u=10005, v=83] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=42, r=8320, u=10005, v=83] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=42, r=8237, u=10005, v=85] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=43, r=8237, u=10005, v=85] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=43] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=43] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=43, r=8237, u=10005, v=85] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=43, r=8237, u=10005, v=85] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=43, r=8152, u=10005, v=87] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=44, r=8152, u=10005, v=87] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=44] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=44] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=44, r=8152, u=10005, v=87] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=44, r=8152, u=10005, v=87] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=44, r=8065, u=10005, v=89] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=45, r=8065, u=10005, v=89] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=45] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=45] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=45, r=8065, u=10005, v=89] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=45, r=8065, u=10005, v=89] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=45, r=7976, u=10005, v=91] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=46, r=7976, u=10005, v=91] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=46] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=46] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=46, r=7976, u=10005, v=91] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=46, r=7976, u=10005, v=91] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=46, r=7885, u=10005, v=93] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=47, r=7885, u=10005, v=93] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=47] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=47] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=47, r=7885, u=10005, v=93] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=47, r=7885, u=10005, v=93] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=47, r=7792, u=10005, v=95] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=48, r=7792, u=10005, v=95] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=48] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=48] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=48, r=7792, u=10005, v=95] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=48, r=7792, u=10005, v=95] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=48, r=7697, u=10005, v=97] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=49, r=7697, u=10005, v=97] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=49] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=49] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=49, r=7697, u=10005, v=97] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=49, r=7697, u=10005, v=97] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=49, r=7600, u=10005, v=99] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=50, r=7600, u=10005, v=99] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=50] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=50] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=50, r=7600, u=10005, v=99] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=50, r=7600, u=10005, v=99] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=50, r=7501, u=10005, v=101] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=51, r=7501, u=10005, v=101] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=51] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=51] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=51, r=7501, u=10005, v=101] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=51, r=7501, u=10005, v=101] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=51, r=7400, u=10005, v=103] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=52, r=7400, u=10005, v=103] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=52] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=52] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=52, r=7400, u=10005, v=103] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=52, r=7400, u=10005, v=103] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=52, r=7297, u=10005, v=105] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=53, r=7297, u=10005, v=105] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=53] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=53] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=53, r=7297, u=10005, v=105] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=53, r=7297, u=10005, v=105] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=53, r=7192, u=10005, v=107] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=54, r=7192, u=10005, v=107] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=54] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=54] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=54, r=7192, u=10005, v=107] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=54, r=7192, u=10005, v=107] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=54, r=7085, u=10005, v=109] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=55, r=7085, u=10005, v=109] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=55] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=55] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=55, r=7085, u=10005, v=109] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=55, r=7085, u=10005, v=109] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=55, r=6976, u=10005, v=111] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=56, r=6976, u=10005, v=111] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=56] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=56] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=56, r=6976, u=10005, v=111] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=56, r=6976, u=10005, v=111] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=56, r=6865, u=10005, v=113] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=57, r=6865, u=10005, v=113] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=57] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=57] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=57, r=6865, u=10005, v=113] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=57, r=6865, u=10005, v=113] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=57, r=6752, u=10005, v=115] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=58, r=6752, u=10005, v=115] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=58] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=58] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=58, r=6752, u=10005, v=115] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=58, r=6752, u=10005, v=115] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=58, r=6637, u=10005, v=117] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=59, r=6637, u=10005, v=117] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=59] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=59] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=59, r=6637, u=10005, v=117] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=59, r=6637, u=10005, v=117] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=59, r=6520, u=10005, v=119] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=60, r=6520, u=10005, v=119] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=60] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=60] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=60, r=6520, u=10005, v=119] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=60, r=6520, u=10005, v=119] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=60, r=6401, u=10005, v=121] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=61, r=6401, u=10005, v=121] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=61] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=61] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=61, r=6401, u=10005, v=121] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=61, r=6401, u=10005, v=121] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=61, r=6280, u=10005, v=123] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=62, r=6280, u=10005, v=123] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=62] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=62] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=62, r=6280, u=10005, v=123] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=62, r=6280, u=10005, v=123] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=62, r=6157, u=10005, v=125] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=63, r=6157, u=10005, v=125] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=63] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=63] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=63, r=6157, u=10005, v=125] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=63, r=6157, u=10005, v=125] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=63, r=6032, u=10005, v=127] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=64, r=6032, u=10005, v=127] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=64] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=64] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=64, r=6032, u=10005, v=127] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=64, r=6032, u=10005, v=127] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=64, r=5905, u=10005, v=129] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=65, r=5905, u=10005, v=129] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=65] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=65] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=65, r=5905, u=10005, v=129] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=65, r=5905, u=10005, v=129] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=65, r=5776, u=10005, v=131] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=66, r=5776, u=10005, v=131] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=66] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=66] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=66, r=5776, u=10005, v=131] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=66, r=5776, u=10005, v=131] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=66, r=5645, u=10005, v=133] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=67, r=5645, u=10005, v=133] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=67] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=67] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=67, r=5645, u=10005, v=133] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=67, r=5645, u=10005, v=133] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=67, r=5512, u=10005, v=135] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=68, r=5512, u=10005, v=135] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=68] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=68] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=68, r=5512, u=10005, v=135] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=68, r=5512, u=10005, v=135] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=68, r=5377, u=10005, v=137] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=69, r=5377, u=10005, v=137] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=69] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=69] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=69, r=5377, u=10005, v=137] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=69, r=5377, u=10005, v=137] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=69, r=5240, u=10005, v=139] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=70, r=5240, u=10005, v=139] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=70] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=70] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=70, r=5240, u=10005, v=139] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=70, r=5240, u=10005, v=139] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=70, r=5101, u=10005, v=141] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=71, r=5101, u=10005, v=141] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=71] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=71] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=71, r=5101, u=10005, v=141] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=71, r=5101, u=10005, v=141] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=71, r=4960, u=10005, v=143] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=72, r=4960, u=10005, v=143] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=72] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=72] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=72, r=4960, u=10005, v=143] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=72, r=4960, u=10005, v=143] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=72, r=4817, u=10005, v=145] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=73, r=4817, u=10005, v=145] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=73] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=73] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=73, r=4817, u=10005, v=145] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=73, r=4817, u=10005, v=145] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=73, r=4672, u=10005, v=147] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=74, r=4672, u=10005, v=147] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=74] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=74] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=74, r=4672, u=10005, v=147] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=74, r=4672, u=10005, v=147] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=74, r=4525, u=10005, v=149] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=75, r=4525, u=10005, v=149] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=75] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=75] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=75, r=4525, u=10005, v=149] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=75, r=4525, u=10005, v=149] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=75, r=4376, u=10005, v=151] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=76, r=4376, u=10005, v=151] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=76] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=76] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=76, r=4376, u=10005, v=151] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=76, r=4376, u=10005, v=151] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=76, r=4225, u=10005, v=153] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=77, r=4225, u=10005, v=153] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=77] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=77] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=77, r=4225, u=10005, v=153] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=77, r=4225, u=10005, v=153] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=77, r=4072, u=10005, v=155] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=78, r=4072, u=10005, v=155] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=78] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=78] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=78, r=4072, u=10005, v=155] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=78, r=4072, u=10005, v=155] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=78, r=3917, u=10005, v=157] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=79, r=3917, u=10005, v=157] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=79] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=79] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=79, r=3917, u=10005, v=157] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=79, r=3917, u=10005, v=157] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=79, r=3760, u=10005, v=159] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=80, r=3760, u=10005, v=159] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=80] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=80] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=80, r=3760, u=10005, v=159] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=80, r=3760, u=10005, v=159] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=80, r=3601, u=10005, v=161] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=81, r=3601, u=10005, v=161] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=81] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=81] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=81, r=3601, u=10005, v=161] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=81, r=3601, u=10005, v=161] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=81, r=3440, u=10005, v=163] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=82, r=3440, u=10005, v=163] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=82] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=82] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=82, r=3440, u=10005, v=163] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=82, r=3440, u=10005, v=163] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=82, r=3277, u=10005, v=165] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=83, r=3277, u=10005, v=165] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=83] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=83] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=83, r=3277, u=10005, v=165] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=83, r=3277, u=10005, v=165] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=83, r=3112, u=10005, v=167] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=84, r=3112, u=10005, v=167] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=84] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=84] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=84, r=3112, u=10005, v=167] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=84, r=3112, u=10005, v=167] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=84, r=2945, u=10005, v=169] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=85, r=2945, u=10005, v=169] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=85] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=85] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=85, r=2945, u=10005, v=169] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=85, r=2945, u=10005, v=169] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=85, r=2776, u=10005, v=171] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=86, r=2776, u=10005, v=171] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=86] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=86] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=86, r=2776, u=10005, v=171] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=86, r=2776, u=10005, v=171] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=86, r=2605, u=10005, v=173] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=87, r=2605, u=10005, v=173] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=87] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=87] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=87, r=2605, u=10005, v=173] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=87, r=2605, u=10005, v=173] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=87, r=2432, u=10005, v=175] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=88, r=2432, u=10005, v=175] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=88] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=88] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=88, r=2432, u=10005, v=175] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=88, r=2432, u=10005, v=175] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=88, r=2257, u=10005, v=177] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=89, r=2257, u=10005, v=177] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=89] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=89] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=89, r=2257, u=10005, v=177] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=89, r=2257, u=10005, v=177] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=89, r=2080, u=10005, v=179] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=90, r=2080, u=10005, v=179] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=90] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=90] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=90, r=2080, u=10005, v=179] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=90, r=2080, u=10005, v=179] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=90, r=1901, u=10005, v=181] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=91, r=1901, u=10005, v=181] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=91] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=91] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=91, r=1901, u=10005, v=181] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=91, r=1901, u=10005, v=181] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=91, r=1720, u=10005, v=183] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=92, r=1720, u=10005, v=183] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=92] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=92] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=92, r=1720, u=10005, v=183] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=92, r=1720, u=10005, v=183] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=92, r=1537, u=10005, v=185] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=93, r=1537, u=10005, v=185] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=93] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=93] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=93, r=1537, u=10005, v=185] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=93, r=1537, u=10005, v=185] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=93, r=1352, u=10005, v=187] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=94, r=1352, u=10005, v=187] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=94] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=94] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=94, r=1352, u=10005, v=187] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=94, r=1352, u=10005, v=187] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=94, r=1165, u=10005, v=189] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=95, r=1165, u=10005, v=189] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=95] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=95] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=95, r=1165, u=10005, v=189] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=95, r=1165, u=10005, v=189] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=95, r=976, u=10005, v=191] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=96, r=976, u=10005, v=191] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=96] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=96] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=96, r=976, u=10005, v=191] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=96, r=976, u=10005, v=191] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=96, r=785, u=10005, v=193] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=97, r=785, u=10005, v=193] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=97] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=97] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=97, r=785, u=10005, v=193] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=97, r=785, u=10005, v=193] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=97, r=592, u=10005, v=195] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=98, r=592, u=10005, v=195] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=98] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=98] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=98, r=592, u=10005, v=195] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=98, r=592, u=10005, v=195] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=98, r=397, u=10005, v=197] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=99, r=397, u=10005, v=197] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=99] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=99] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=99, r=397, u=10005, v=197] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=99, r=397, u=10005, v=197] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=99, r=200, u=10005, v=199] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=100, r=200, u=10005, v=199] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=100] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=100] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=100, r=200, u=10005, v=199] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=100, r=200, u=10005, v=199] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=100, r=1, u=10005, v=201] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=101, r=1, u=10005, v=201] [L34] COND FALSE !(counter++<100) [L48] CALL __VERIFIER_assert(((long long) 4*A) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=0, counter=101] [L12] COND TRUE !(cond) VAL [\old(cond)=0, counter=101] [L14] reach_error() VAL [\old(cond)=0, counter=101] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 23 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 57.7s, OverallIterations: 11, TraceHistogramMax: 101, PathProgramHistogramMax: 7, EmptinessCheckTime: 0.0s, AutomataDifference: 11.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 1800 SdHoareTripleChecker+Valid, 3.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1799 mSDsluCounter, 2437 SdHoareTripleChecker+Invalid, 3.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 2228 mSDsCounter, 165 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1334 IncrementalHoareTripleChecker+Invalid, 1499 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 165 mSolverCounterUnsat, 209 mSDtfsCounter, 1334 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 3964 GetRequests, 3284 SyntacticMatches, 92 SemanticMatches, 588 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18128 ImplicationChecksByTransitivity, 18.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=915occurred in iteration=10, InterpolantAutomatonStates: 583, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 10 MinimizatonAttempts, 10 StatesRemovedByMinimization, 2 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 12.5s SatisfiabilityAnalysisTime, 30.7s InterpolantComputationTime, 5374 NumberOfCodeBlocks, 5374 NumberOfCodeBlocksAsserted, 325 NumberOfCheckSat, 5220 ConstructedInterpolants, 0 QuantifiedInterpolants, 12882 SizeOfPredicates, 179 NumberOfNonLiveVariables, 4132 ConjunctsInSsa, 392 ConjunctsInUnsatCore, 25 InterpolantComputations, 3 PerfectInterpolantSequences, 46667/155806 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-02-07 20:38:05,160 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE