./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 906036225f588312d23f50dd6f109319810cf1ead43ce885e134bcc5a0be0190 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 16:22:01,813 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 16:22:01,864 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-04 16:22:01,870 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 16:22:01,870 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 16:22:01,870 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 16:22:01,889 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 16:22:01,889 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 16:22:01,890 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 16:22:01,890 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 16:22:01,890 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 16:22:01,890 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 16:22:01,890 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 16:22:01,890 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 16:22:01,890 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 16:22:01,890 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 16:22:01,890 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 16:22:01,890 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 16:22:01,890 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 16:22:01,890 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 16:22:01,890 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 16:22:01,891 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 16:22:01,891 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 16:22:01,891 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 16:22:01,891 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 906036225f588312d23f50dd6f109319810cf1ead43ce885e134bcc5a0be0190 [2025-03-04 16:22:02,106 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 16:22:02,111 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 16:22:02,113 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 16:22:02,114 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 16:22:02,114 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 16:22:02,116 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-03-04 16:22:03,349 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ee52600f4/ae43779e95ef435c9522e77ebc92f7be/FLAGc3b6a466a [2025-03-04 16:22:03,618 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 16:22:03,618 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-03-04 16:22:03,633 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ee52600f4/ae43779e95ef435c9522e77ebc92f7be/FLAGc3b6a466a [2025-03-04 16:22:03,655 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ee52600f4/ae43779e95ef435c9522e77ebc92f7be [2025-03-04 16:22:03,657 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 16:22:03,658 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 16:22:03,660 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 16:22:03,660 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 16:22:03,663 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 16:22:03,663 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:03,665 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2a050653 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03, skipping insertion in model container [2025-03-04 16:22:03,666 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:03,691 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 16:22:03,844 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:22:03,854 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 16:22:03,917 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:22:03,931 INFO L204 MainTranslator]: Completed translation [2025-03-04 16:22:03,932 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03 WrapperNode [2025-03-04 16:22:03,932 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 16:22:03,933 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 16:22:03,933 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 16:22:03,933 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 16:22:03,938 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:03,953 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:03,987 INFO L138 Inliner]: procedures = 32, calls = 49, calls flagged for inlining = 44, calls inlined = 84, statements flattened = 927 [2025-03-04 16:22:03,989 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 16:22:03,990 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 16:22:03,990 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 16:22:03,990 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 16:22:03,996 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:03,996 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:04,000 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:04,024 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-04 16:22:04,024 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:04,024 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:04,036 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:04,038 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:04,045 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:04,048 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:04,056 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 16:22:04,057 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 16:22:04,057 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 16:22:04,057 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 16:22:04,058 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (1/1) ... [2025-03-04 16:22:04,061 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:22:04,073 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:22:04,089 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:22:04,093 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 16:22:04,111 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-04 16:22:04,111 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-04 16:22:04,111 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 16:22:04,111 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 16:22:04,187 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 16:22:04,189 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 16:22:04,970 INFO L? ?]: Removed 309 outVars from TransFormulas that were not future-live. [2025-03-04 16:22:04,970 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 16:22:04,986 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 16:22:04,986 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-04 16:22:04,987 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:22:04 BoogieIcfgContainer [2025-03-04 16:22:04,987 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 16:22:04,987 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 16:22:04,987 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 16:22:04,991 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 16:22:04,991 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:22:04,991 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 04:22:03" (1/3) ... [2025-03-04 16:22:04,992 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3908317f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:22:04, skipping insertion in model container [2025-03-04 16:22:04,992 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:22:04,992 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:22:03" (2/3) ... [2025-03-04 16:22:04,992 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3908317f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:22:04, skipping insertion in model container [2025-03-04 16:22:04,992 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:22:04,992 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:22:04" (3/3) ... [2025-03-04 16:22:04,993 INFO L363 chiAutomizerObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-03-04 16:22:05,028 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 16:22:05,028 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 16:22:05,028 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 16:22:05,028 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 16:22:05,028 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 16:22:05,028 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 16:22:05,028 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 16:22:05,029 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 16:22:05,036 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 274 states, 273 states have (on average 1.564102564102564) internal successors, (427), 273 states have internal predecessors, (427), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:05,055 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 254 [2025-03-04 16:22:05,055 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:05,055 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:05,066 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2025-03-04 16:22:05,066 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:05,066 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 16:22:05,068 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 274 states, 273 states have (on average 1.564102564102564) internal successors, (427), 273 states have internal predecessors, (427), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:05,074 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 254 [2025-03-04 16:22:05,074 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:05,074 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:05,075 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2025-03-04 16:22:05,075 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:05,080 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume 0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296);init_#res#1 := 0;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:05,081 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume 0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_0~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume 0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1;" "assume 0 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side2_failed_history_#res#1 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);" "check_#t~ret16#1 := read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;havoc read_side2_failed_history_#in~index#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := (if 0 == check_#t~ret16#1 % 256 then 0 else 1);havoc check_#t~ret16#1;" "assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "check_#t~ret17#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1;" "assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:05,085 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:05,085 INFO L85 PathProgramCache]: Analyzing trace with hash 362066584, now seen corresponding path program 1 times [2025-03-04 16:22:05,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:05,091 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356325533] [2025-03-04 16:22:05,091 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:05,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:05,148 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-04 16:22:05,181 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-04 16:22:05,181 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:05,181 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:05,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:05,340 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:05,340 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356325533] [2025-03-04 16:22:05,340 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1356325533] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:05,340 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:05,341 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:22:05,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1776636897] [2025-03-04 16:22:05,342 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:05,344 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:22:05,344 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:05,344 INFO L85 PathProgramCache]: Analyzing trace with hash -503351434, now seen corresponding path program 1 times [2025-03-04 16:22:05,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:05,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1518141307] [2025-03-04 16:22:05,345 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:05,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:05,362 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-03-04 16:22:05,387 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-04 16:22:05,388 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:05,388 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:05,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:05,479 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:05,479 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1518141307] [2025-03-04 16:22:05,479 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1518141307] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:05,479 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:05,479 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:22:05,480 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [881511563] [2025-03-04 16:22:05,480 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:05,480 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:05,481 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:05,499 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:22:05,500 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:22:05,502 INFO L87 Difference]: Start difference. First operand has 274 states, 273 states have (on average 1.564102564102564) internal successors, (427), 273 states have internal predecessors, (427), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:05,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:05,565 INFO L93 Difference]: Finished difference Result 250 states and 377 transitions. [2025-03-04 16:22:05,568 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 250 states and 377 transitions. [2025-03-04 16:22:05,574 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 208 [2025-03-04 16:22:05,580 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 250 states to 225 states and 341 transitions. [2025-03-04 16:22:05,581 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 225 [2025-03-04 16:22:05,582 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 225 [2025-03-04 16:22:05,582 INFO L73 IsDeterministic]: Start isDeterministic. Operand 225 states and 341 transitions. [2025-03-04 16:22:05,583 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:05,584 INFO L218 hiAutomatonCegarLoop]: Abstraction has 225 states and 341 transitions. [2025-03-04 16:22:05,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states and 341 transitions. [2025-03-04 16:22:05,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 225. [2025-03-04 16:22:05,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 225 states, 225 states have (on average 1.5155555555555555) internal successors, (341), 224 states have internal predecessors, (341), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:05,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 341 transitions. [2025-03-04 16:22:05,616 INFO L240 hiAutomatonCegarLoop]: Abstraction has 225 states and 341 transitions. [2025-03-04 16:22:05,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:22:05,619 INFO L432 stractBuchiCegarLoop]: Abstraction has 225 states and 341 transitions. [2025-03-04 16:22:05,620 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 16:22:05,620 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 225 states and 341 transitions. [2025-03-04 16:22:05,621 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 208 [2025-03-04 16:22:05,623 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:05,623 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:05,625 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:05,626 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:05,626 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:05,626 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume 0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_0~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume 0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1;" "assume 0 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side2_failed_history_#res#1 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);" "check_#t~ret16#1 := read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;havoc read_side2_failed_history_#in~index#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := (if 0 == check_#t~ret16#1 % 256 then 0 else 1);havoc check_#t~ret16#1;" "assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "check_#t~ret17#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1;" "assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:05,628 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:05,628 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 1 times [2025-03-04 16:22:05,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:05,629 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577908023] [2025-03-04 16:22:05,629 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:05,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:05,636 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:05,662 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:05,665 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:05,665 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:05,665 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:05,674 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:05,699 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:05,700 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:05,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:05,724 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:05,724 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:05,724 INFO L85 PathProgramCache]: Analyzing trace with hash -503351434, now seen corresponding path program 2 times [2025-03-04 16:22:05,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:05,724 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456696307] [2025-03-04 16:22:05,725 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:22:05,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:05,736 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 35 statements into 1 equivalence classes. [2025-03-04 16:22:05,747 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-03-04 16:22:05,747 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:22:05,747 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:05,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:05,832 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:05,834 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456696307] [2025-03-04 16:22:05,834 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1456696307] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:05,834 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:05,834 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:22:05,834 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2067175870] [2025-03-04 16:22:05,835 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:05,835 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:05,835 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:05,835 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:22:05,835 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:22:05,836 INFO L87 Difference]: Start difference. First operand 225 states and 341 transitions. cyclomatic complexity: 117 Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:05,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:05,874 INFO L93 Difference]: Finished difference Result 420 states and 642 transitions. [2025-03-04 16:22:05,874 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 420 states and 642 transitions. [2025-03-04 16:22:05,876 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 403 [2025-03-04 16:22:05,883 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 420 states to 420 states and 642 transitions. [2025-03-04 16:22:05,883 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 420 [2025-03-04 16:22:05,886 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 420 [2025-03-04 16:22:05,886 INFO L73 IsDeterministic]: Start isDeterministic. Operand 420 states and 642 transitions. [2025-03-04 16:22:05,887 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:05,887 INFO L218 hiAutomatonCegarLoop]: Abstraction has 420 states and 642 transitions. [2025-03-04 16:22:05,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420 states and 642 transitions. [2025-03-04 16:22:05,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420 to 255. [2025-03-04 16:22:05,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 255 states, 255 states have (on average 1.5215686274509803) internal successors, (388), 254 states have internal predecessors, (388), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:05,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 388 transitions. [2025-03-04 16:22:05,904 INFO L240 hiAutomatonCegarLoop]: Abstraction has 255 states and 388 transitions. [2025-03-04 16:22:05,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:22:05,905 INFO L432 stractBuchiCegarLoop]: Abstraction has 255 states and 388 transitions. [2025-03-04 16:22:05,905 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 16:22:05,905 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 255 states and 388 transitions. [2025-03-04 16:22:05,906 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 238 [2025-03-04 16:22:05,906 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:05,906 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:05,907 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:05,907 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:05,907 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:05,908 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume !(0 == ~side1Failed~0 % 256);" "assume 0 == ~side2Failed~0 % 256;check_~tmp~3#1 := 1;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume 0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_0~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume 0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1;" "assume 0 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side2_failed_history_#res#1 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);" "check_#t~ret16#1 := read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;havoc read_side2_failed_history_#in~index#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := (if 0 == check_#t~ret16#1 % 256 then 0 else 1);havoc check_#t~ret16#1;" "assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "check_#t~ret17#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1;" "assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:05,909 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:05,909 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 2 times [2025-03-04 16:22:05,910 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:05,910 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [92600284] [2025-03-04 16:22:05,910 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:22:05,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:05,917 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:05,939 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:05,939 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:22:05,939 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:05,939 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:05,942 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:05,959 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:05,963 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:05,964 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:05,969 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:05,969 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:05,969 INFO L85 PathProgramCache]: Analyzing trace with hash 930191384, now seen corresponding path program 1 times [2025-03-04 16:22:05,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:05,969 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091695040] [2025-03-04 16:22:05,970 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:05,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:05,983 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 36 statements into 1 equivalence classes. [2025-03-04 16:22:05,992 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 36 of 36 statements. [2025-03-04 16:22:05,992 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:05,992 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:06,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:06,040 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:06,040 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1091695040] [2025-03-04 16:22:06,040 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1091695040] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:06,040 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:06,040 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:22:06,040 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1849929968] [2025-03-04 16:22:06,040 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:06,041 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:06,041 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:06,041 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:22:06,041 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:22:06,042 INFO L87 Difference]: Start difference. First operand 255 states and 388 transitions. cyclomatic complexity: 134 Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:06,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:06,070 INFO L93 Difference]: Finished difference Result 469 states and 718 transitions. [2025-03-04 16:22:06,070 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 469 states and 718 transitions. [2025-03-04 16:22:06,073 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 452 [2025-03-04 16:22:06,075 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 469 states to 469 states and 718 transitions. [2025-03-04 16:22:06,075 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 469 [2025-03-04 16:22:06,076 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 469 [2025-03-04 16:22:06,076 INFO L73 IsDeterministic]: Start isDeterministic. Operand 469 states and 718 transitions. [2025-03-04 16:22:06,077 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:06,077 INFO L218 hiAutomatonCegarLoop]: Abstraction has 469 states and 718 transitions. [2025-03-04 16:22:06,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 469 states and 718 transitions. [2025-03-04 16:22:06,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 469 to 290. [2025-03-04 16:22:06,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 290 states have (on average 1.5241379310344827) internal successors, (442), 289 states have internal predecessors, (442), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:06,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 442 transitions. [2025-03-04 16:22:06,092 INFO L240 hiAutomatonCegarLoop]: Abstraction has 290 states and 442 transitions. [2025-03-04 16:22:06,094 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:22:06,094 INFO L432 stractBuchiCegarLoop]: Abstraction has 290 states and 442 transitions. [2025-03-04 16:22:06,095 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 16:22:06,095 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 290 states and 442 transitions. [2025-03-04 16:22:06,096 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 273 [2025-03-04 16:22:06,096 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:06,096 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:06,097 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:06,097 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:06,097 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:06,097 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume !(0 == ~side1Failed~0 % 256);" "assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume 0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_0~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume 0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1;" "assume 0 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side2_failed_history_#res#1 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);" "check_#t~ret16#1 := read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;havoc read_side2_failed_history_#in~index#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := (if 0 == check_#t~ret16#1 % 256 then 0 else 1);havoc check_#t~ret16#1;" "assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "check_#t~ret17#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1;" "assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:06,100 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:06,100 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 3 times [2025-03-04 16:22:06,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:06,100 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1016616692] [2025-03-04 16:22:06,100 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:22:06,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:06,109 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:06,125 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:06,125 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:22:06,125 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:06,125 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:06,133 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:06,148 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:06,148 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:06,148 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:06,156 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:06,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:06,157 INFO L85 PathProgramCache]: Analyzing trace with hash 521367159, now seen corresponding path program 1 times [2025-03-04 16:22:06,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:06,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131962011] [2025-03-04 16:22:06,157 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:06,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:06,166 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 36 statements into 1 equivalence classes. [2025-03-04 16:22:06,179 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 36 of 36 statements. [2025-03-04 16:22:06,179 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:06,179 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:06,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:06,277 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:06,277 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131962011] [2025-03-04 16:22:06,277 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2131962011] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:06,277 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:06,277 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:22:06,277 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [204968031] [2025-03-04 16:22:06,278 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:06,278 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:06,278 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:06,278 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:22:06,278 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:22:06,278 INFO L87 Difference]: Start difference. First operand 290 states and 442 transitions. cyclomatic complexity: 153 Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:06,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:06,299 INFO L93 Difference]: Finished difference Result 287 states and 436 transitions. [2025-03-04 16:22:06,299 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 287 states and 436 transitions. [2025-03-04 16:22:06,301 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 270 [2025-03-04 16:22:06,304 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 287 states to 287 states and 436 transitions. [2025-03-04 16:22:06,304 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 287 [2025-03-04 16:22:06,304 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 287 [2025-03-04 16:22:06,305 INFO L73 IsDeterministic]: Start isDeterministic. Operand 287 states and 436 transitions. [2025-03-04 16:22:06,306 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:06,306 INFO L218 hiAutomatonCegarLoop]: Abstraction has 287 states and 436 transitions. [2025-03-04 16:22:06,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287 states and 436 transitions. [2025-03-04 16:22:06,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 287 to 287. [2025-03-04 16:22:06,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 287 states, 287 states have (on average 1.519163763066202) internal successors, (436), 286 states have internal predecessors, (436), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:06,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287 states to 287 states and 436 transitions. [2025-03-04 16:22:06,317 INFO L240 hiAutomatonCegarLoop]: Abstraction has 287 states and 436 transitions. [2025-03-04 16:22:06,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:22:06,318 INFO L432 stractBuchiCegarLoop]: Abstraction has 287 states and 436 transitions. [2025-03-04 16:22:06,319 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 16:22:06,319 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 287 states and 436 transitions. [2025-03-04 16:22:06,320 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 270 [2025-03-04 16:22:06,321 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:06,321 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:06,322 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:06,322 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:06,323 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:06,323 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume !(0 == ~side1Failed~0 % 256);" "assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume !(0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_1~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume 0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1;" "assume 0 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side2_failed_history_#res#1 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);" "check_#t~ret16#1 := read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;havoc read_side2_failed_history_#in~index#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := (if 0 == check_#t~ret16#1 % 256 then 0 else 1);havoc check_#t~ret16#1;" "assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "check_#t~ret17#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1;" "assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:06,323 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:06,324 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 4 times [2025-03-04 16:22:06,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:06,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [423959517] [2025-03-04 16:22:06,324 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:22:06,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:06,334 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 17 statements into 2 equivalence classes. [2025-03-04 16:22:06,345 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:06,346 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:22:06,346 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:06,347 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:06,349 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:06,363 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:06,363 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:06,364 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:06,372 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:06,373 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:06,373 INFO L85 PathProgramCache]: Analyzing trace with hash -1015436364, now seen corresponding path program 1 times [2025-03-04 16:22:06,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:06,373 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1131455280] [2025-03-04 16:22:06,373 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:06,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:06,382 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-03-04 16:22:06,392 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-03-04 16:22:06,392 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:06,392 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:06,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:06,465 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:06,465 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1131455280] [2025-03-04 16:22:06,465 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1131455280] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:06,465 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:06,465 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:22:06,465 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1511694015] [2025-03-04 16:22:06,465 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:06,466 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:06,466 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:06,466 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:22:06,466 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:22:06,466 INFO L87 Difference]: Start difference. First operand 287 states and 436 transitions. cyclomatic complexity: 150 Second operand has 3 states, 3 states have (on average 12.333333333333334) internal successors, (37), 3 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:06,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:06,527 INFO L93 Difference]: Finished difference Result 275 states and 412 transitions. [2025-03-04 16:22:06,527 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 275 states and 412 transitions. [2025-03-04 16:22:06,529 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 258 [2025-03-04 16:22:06,531 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 275 states to 275 states and 412 transitions. [2025-03-04 16:22:06,532 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 275 [2025-03-04 16:22:06,533 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 275 [2025-03-04 16:22:06,533 INFO L73 IsDeterministic]: Start isDeterministic. Operand 275 states and 412 transitions. [2025-03-04 16:22:06,533 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:06,533 INFO L218 hiAutomatonCegarLoop]: Abstraction has 275 states and 412 transitions. [2025-03-04 16:22:06,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states and 412 transitions. [2025-03-04 16:22:06,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 275. [2025-03-04 16:22:06,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 275 states, 275 states have (on average 1.4981818181818183) internal successors, (412), 274 states have internal predecessors, (412), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:06,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 275 states to 275 states and 412 transitions. [2025-03-04 16:22:06,539 INFO L240 hiAutomatonCegarLoop]: Abstraction has 275 states and 412 transitions. [2025-03-04 16:22:06,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:22:06,540 INFO L432 stractBuchiCegarLoop]: Abstraction has 275 states and 412 transitions. [2025-03-04 16:22:06,541 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 16:22:06,541 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 275 states and 412 transitions. [2025-03-04 16:22:06,543 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 258 [2025-03-04 16:22:06,543 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:06,543 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:06,543 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:06,543 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:06,543 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:06,544 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume !(0 == ~side1Failed~0 % 256);" "assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume !(0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_1~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1;" "assume 0 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side2_failed_history_#res#1 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);" "check_#t~ret16#1 := read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;havoc read_side2_failed_history_#in~index#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := (if 0 == check_#t~ret16#1 % 256 then 0 else 1);havoc check_#t~ret16#1;" "assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "check_#t~ret17#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1;" "assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:06,545 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:06,545 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 5 times [2025-03-04 16:22:06,545 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:06,545 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880310959] [2025-03-04 16:22:06,545 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:22:06,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:06,555 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:06,568 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:06,568 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:22:06,568 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:06,569 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:06,572 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:06,581 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:06,582 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:06,582 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:06,587 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:06,588 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:06,588 INFO L85 PathProgramCache]: Analyzing trace with hash 1306335811, now seen corresponding path program 1 times [2025-03-04 16:22:06,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:06,588 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1500770885] [2025-03-04 16:22:06,588 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:06,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:06,598 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 38 statements into 1 equivalence classes. [2025-03-04 16:22:06,606 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 38 of 38 statements. [2025-03-04 16:22:06,607 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:06,607 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:06,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:06,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:06,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1500770885] [2025-03-04 16:22:06,691 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1500770885] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:06,691 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:06,692 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:22:06,692 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1425746092] [2025-03-04 16:22:06,693 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:06,693 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:06,693 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:06,693 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:22:06,693 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:22:06,693 INFO L87 Difference]: Start difference. First operand 275 states and 412 transitions. cyclomatic complexity: 138 Second operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 3 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:06,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:06,750 INFO L93 Difference]: Finished difference Result 263 states and 388 transitions. [2025-03-04 16:22:06,750 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 263 states and 388 transitions. [2025-03-04 16:22:06,751 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 246 [2025-03-04 16:22:06,753 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 263 states to 263 states and 388 transitions. [2025-03-04 16:22:06,753 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 263 [2025-03-04 16:22:06,753 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 263 [2025-03-04 16:22:06,753 INFO L73 IsDeterministic]: Start isDeterministic. Operand 263 states and 388 transitions. [2025-03-04 16:22:06,754 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:06,754 INFO L218 hiAutomatonCegarLoop]: Abstraction has 263 states and 388 transitions. [2025-03-04 16:22:06,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263 states and 388 transitions. [2025-03-04 16:22:06,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263 to 263. [2025-03-04 16:22:06,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 263 states, 263 states have (on average 1.4752851711026616) internal successors, (388), 262 states have internal predecessors, (388), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:06,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 388 transitions. [2025-03-04 16:22:06,760 INFO L240 hiAutomatonCegarLoop]: Abstraction has 263 states and 388 transitions. [2025-03-04 16:22:06,760 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:22:06,761 INFO L432 stractBuchiCegarLoop]: Abstraction has 263 states and 388 transitions. [2025-03-04 16:22:06,761 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 16:22:06,761 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 263 states and 388 transitions. [2025-03-04 16:22:06,762 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 246 [2025-03-04 16:22:06,763 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:06,763 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:06,763 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:06,763 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:06,764 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:06,764 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume !(0 == ~side1Failed~0 % 256);" "assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume !(0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_1~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1;" "assume !(0 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side2_failed_history_#res#1 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret16#1 := read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;havoc read_side2_failed_history_#in~index#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := (if 0 == check_#t~ret16#1 % 256 then 0 else 1);havoc check_#t~ret16#1;" "assume 0 == check_~tmp___8~0#1 % 256;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "check_#t~ret17#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___5~0#1 := check_#t~ret17#1;havoc check_#t~ret17#1;" "assume !(2 == check_~tmp___5~0#1);check_#res#1 := 0;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:06,764 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:06,765 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 6 times [2025-03-04 16:22:06,765 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:06,765 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020357851] [2025-03-04 16:22:06,765 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:22:06,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:06,771 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:06,784 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:06,785 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:22:06,786 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:06,786 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:06,789 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:06,799 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:06,800 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:06,800 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:06,805 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:06,806 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:06,806 INFO L85 PathProgramCache]: Analyzing trace with hash -554722580, now seen corresponding path program 1 times [2025-03-04 16:22:06,806 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:06,806 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869430874] [2025-03-04 16:22:06,806 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:06,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:06,816 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-03-04 16:22:06,836 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-03-04 16:22:06,836 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:06,836 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:07,012 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:07,012 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:07,012 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869430874] [2025-03-04 16:22:07,012 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [869430874] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:07,012 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:07,013 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:22:07,013 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [808203583] [2025-03-04 16:22:07,013 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:07,013 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:07,013 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:07,013 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:22:07,013 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:22:07,014 INFO L87 Difference]: Start difference. First operand 263 states and 388 transitions. cyclomatic complexity: 126 Second operand has 4 states, 4 states have (on average 9.75) internal successors, (39), 4 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:07,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:07,057 INFO L93 Difference]: Finished difference Result 249 states and 357 transitions. [2025-03-04 16:22:07,057 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 249 states and 357 transitions. [2025-03-04 16:22:07,059 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 214 [2025-03-04 16:22:07,060 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 249 states to 231 states and 332 transitions. [2025-03-04 16:22:07,060 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 231 [2025-03-04 16:22:07,060 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 231 [2025-03-04 16:22:07,060 INFO L73 IsDeterministic]: Start isDeterministic. Operand 231 states and 332 transitions. [2025-03-04 16:22:07,061 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:07,061 INFO L218 hiAutomatonCegarLoop]: Abstraction has 231 states and 332 transitions. [2025-03-04 16:22:07,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states and 332 transitions. [2025-03-04 16:22:07,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 231. [2025-03-04 16:22:07,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 231 states, 231 states have (on average 1.4372294372294372) internal successors, (332), 230 states have internal predecessors, (332), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:07,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 332 transitions. [2025-03-04 16:22:07,066 INFO L240 hiAutomatonCegarLoop]: Abstraction has 231 states and 332 transitions. [2025-03-04 16:22:07,067 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:22:07,067 INFO L432 stractBuchiCegarLoop]: Abstraction has 231 states and 332 transitions. [2025-03-04 16:22:07,067 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 16:22:07,068 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 231 states and 332 transitions. [2025-03-04 16:22:07,068 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 214 [2025-03-04 16:22:07,069 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:07,069 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:07,069 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:07,069 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:07,069 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:07,070 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume !(0 == ~side1Failed~0 % 256);" "assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume !(0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_1~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume !(0 != check_~tmp___7~0#1 % 256);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret19#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := (if 0 == check_#t~ret19#1 % 256 then 0 else 1);havoc check_#t~ret19#1;" "assume !(0 == check_~tmp___11~0#1 % 256);" "assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "check_#t~ret23#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1;" "assume !(check_~tmp___20~0#1 > -2);" "check_#res#1 := 1;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:07,071 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:07,071 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 7 times [2025-03-04 16:22:07,071 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:07,071 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810031776] [2025-03-04 16:22:07,071 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:22:07,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:07,079 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:07,096 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:07,096 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:07,096 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:07,096 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:07,103 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:07,123 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:07,123 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:07,123 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:07,129 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:07,129 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:07,129 INFO L85 PathProgramCache]: Analyzing trace with hash 1559127887, now seen corresponding path program 1 times [2025-03-04 16:22:07,129 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:07,129 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [268493485] [2025-03-04 16:22:07,129 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:07,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:07,143 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 42 statements into 1 equivalence classes. [2025-03-04 16:22:07,152 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-03-04 16:22:07,152 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:07,152 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:07,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:07,285 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:07,285 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [268493485] [2025-03-04 16:22:07,285 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [268493485] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:07,285 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:07,285 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:22:07,285 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [45184082] [2025-03-04 16:22:07,285 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:07,285 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:07,285 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:07,285 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:22:07,285 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:22:07,286 INFO L87 Difference]: Start difference. First operand 231 states and 332 transitions. cyclomatic complexity: 102 Second operand has 6 states, 6 states have (on average 7.0) internal successors, (42), 6 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:07,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:07,414 INFO L93 Difference]: Finished difference Result 463 states and 665 transitions. [2025-03-04 16:22:07,414 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 463 states and 665 transitions. [2025-03-04 16:22:07,416 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 446 [2025-03-04 16:22:07,418 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 463 states to 463 states and 665 transitions. [2025-03-04 16:22:07,419 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 463 [2025-03-04 16:22:07,419 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 463 [2025-03-04 16:22:07,419 INFO L73 IsDeterministic]: Start isDeterministic. Operand 463 states and 665 transitions. [2025-03-04 16:22:07,420 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:07,420 INFO L218 hiAutomatonCegarLoop]: Abstraction has 463 states and 665 transitions. [2025-03-04 16:22:07,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 463 states and 665 transitions. [2025-03-04 16:22:07,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 463 to 324. [2025-03-04 16:22:07,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 324 states have (on average 1.404320987654321) internal successors, (455), 323 states have internal predecessors, (455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:07,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 455 transitions. [2025-03-04 16:22:07,429 INFO L240 hiAutomatonCegarLoop]: Abstraction has 324 states and 455 transitions. [2025-03-04 16:22:07,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:22:07,431 INFO L432 stractBuchiCegarLoop]: Abstraction has 324 states and 455 transitions. [2025-03-04 16:22:07,431 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-04 16:22:07,431 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 455 transitions. [2025-03-04 16:22:07,433 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 307 [2025-03-04 16:22:07,433 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:07,433 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:07,433 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:07,433 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:07,434 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:07,434 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume !(1 == Pendulum_prism_task_each_pals_period_~side1~2#1);" "assume 1 == Pendulum_prism_task_each_pals_period_~side2~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 2;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume !(0 == ~side1Failed~0 % 256);" "assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume !(0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_1~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume !(0 != check_~tmp___7~0#1 % 256);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret19#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := (if 0 == check_#t~ret19#1 % 256 then 0 else 1);havoc check_#t~ret19#1;" "assume !(0 == check_~tmp___11~0#1 % 256);" "assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "check_#t~ret23#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1;" "assume !(check_~tmp___20~0#1 > -2);" "check_#res#1 := 1;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:07,435 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:07,435 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 8 times [2025-03-04 16:22:07,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:07,436 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [275307573] [2025-03-04 16:22:07,436 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:22:07,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:07,444 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:07,453 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:07,453 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:22:07,453 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:07,453 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:07,456 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:07,463 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:07,463 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:07,463 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:07,469 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:07,470 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:07,470 INFO L85 PathProgramCache]: Analyzing trace with hash -589016511, now seen corresponding path program 1 times [2025-03-04 16:22:07,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:07,471 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322654840] [2025-03-04 16:22:07,471 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:07,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:07,481 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 43 statements into 1 equivalence classes. [2025-03-04 16:22:07,489 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 43 of 43 statements. [2025-03-04 16:22:07,489 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:07,489 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:07,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:07,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:07,649 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1322654840] [2025-03-04 16:22:07,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1322654840] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:07,649 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:07,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:22:07,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [723013865] [2025-03-04 16:22:07,649 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:07,649 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:07,649 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:07,650 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:22:07,650 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:22:07,650 INFO L87 Difference]: Start difference. First operand 324 states and 455 transitions. cyclomatic complexity: 132 Second operand has 6 states, 6 states have (on average 7.166666666666667) internal successors, (43), 6 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:07,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:07,808 INFO L93 Difference]: Finished difference Result 560 states and 792 transitions. [2025-03-04 16:22:07,808 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 560 states and 792 transitions. [2025-03-04 16:22:07,811 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 543 [2025-03-04 16:22:07,814 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 560 states to 560 states and 792 transitions. [2025-03-04 16:22:07,814 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 560 [2025-03-04 16:22:07,814 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 560 [2025-03-04 16:22:07,814 INFO L73 IsDeterministic]: Start isDeterministic. Operand 560 states and 792 transitions. [2025-03-04 16:22:07,815 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:07,815 INFO L218 hiAutomatonCegarLoop]: Abstraction has 560 states and 792 transitions. [2025-03-04 16:22:07,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 560 states and 792 transitions. [2025-03-04 16:22:07,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 560 to 324. [2025-03-04 16:22:07,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 324 states have (on average 1.404320987654321) internal successors, (455), 323 states have internal predecessors, (455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:07,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 455 transitions. [2025-03-04 16:22:07,824 INFO L240 hiAutomatonCegarLoop]: Abstraction has 324 states and 455 transitions. [2025-03-04 16:22:07,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:22:07,826 INFO L432 stractBuchiCegarLoop]: Abstraction has 324 states and 455 transitions. [2025-03-04 16:22:07,826 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-04 16:22:07,826 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 455 transitions. [2025-03-04 16:22:07,828 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 307 [2025-03-04 16:22:07,828 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:07,828 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:07,829 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:07,829 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:07,829 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:07,830 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume !(0 == ~side1Failed~0 % 256);" "assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume !(0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_1~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume !(0 != check_~tmp___7~0#1 % 256);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret19#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := (if 0 == check_#t~ret19#1 % 256 then 0 else 1);havoc check_#t~ret19#1;" "assume !(0 == check_~tmp___11~0#1 % 256);" "assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume !(0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_1~0;" "check_#t~ret23#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1;" "assume !(check_~tmp___20~0#1 > -2);" "check_#res#1 := 1;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:07,830 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:07,830 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 9 times [2025-03-04 16:22:07,830 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:07,830 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875330868] [2025-03-04 16:22:07,831 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:22:07,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:07,838 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:07,846 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:07,846 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:22:07,846 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:07,846 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:07,849 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:07,857 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:07,858 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:07,858 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:07,862 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:07,863 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:07,863 INFO L85 PathProgramCache]: Analyzing trace with hash 1667352448, now seen corresponding path program 1 times [2025-03-04 16:22:07,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:07,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619378665] [2025-03-04 16:22:07,863 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:07,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:07,874 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 43 statements into 1 equivalence classes. [2025-03-04 16:22:07,881 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 43 of 43 statements. [2025-03-04 16:22:07,881 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:07,881 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:07,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:07,961 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:07,961 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1619378665] [2025-03-04 16:22:07,961 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1619378665] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:07,961 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:07,961 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:22:07,961 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [772090652] [2025-03-04 16:22:07,962 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:07,962 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:07,962 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:07,962 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:22:07,962 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:22:07,962 INFO L87 Difference]: Start difference. First operand 324 states and 455 transitions. cyclomatic complexity: 132 Second operand has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:08,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:08,003 INFO L93 Difference]: Finished difference Result 322 states and 450 transitions. [2025-03-04 16:22:08,003 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 322 states and 450 transitions. [2025-03-04 16:22:08,005 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 305 [2025-03-04 16:22:08,007 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 322 states to 322 states and 450 transitions. [2025-03-04 16:22:08,007 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 322 [2025-03-04 16:22:08,007 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 322 [2025-03-04 16:22:08,007 INFO L73 IsDeterministic]: Start isDeterministic. Operand 322 states and 450 transitions. [2025-03-04 16:22:08,007 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:08,007 INFO L218 hiAutomatonCegarLoop]: Abstraction has 322 states and 450 transitions. [2025-03-04 16:22:08,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322 states and 450 transitions. [2025-03-04 16:22:08,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322 to 231. [2025-03-04 16:22:08,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 231 states, 231 states have (on average 1.4285714285714286) internal successors, (330), 230 states have internal predecessors, (330), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:08,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 330 transitions. [2025-03-04 16:22:08,017 INFO L240 hiAutomatonCegarLoop]: Abstraction has 231 states and 330 transitions. [2025-03-04 16:22:08,017 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:22:08,018 INFO L432 stractBuchiCegarLoop]: Abstraction has 231 states and 330 transitions. [2025-03-04 16:22:08,018 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-04 16:22:08,018 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 231 states and 330 transitions. [2025-03-04 16:22:08,019 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 214 [2025-03-04 16:22:08,019 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:08,019 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:08,019 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:08,019 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:08,019 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:08,019 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume !(0 == ~side1Failed~0 % 256);" "assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume !(0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_1~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume !(0 != check_~tmp___7~0#1 % 256);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret19#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := (if 0 == check_#t~ret19#1 % 256 then 0 else 1);havoc check_#t~ret19#1;" "assume !(0 == check_~tmp___11~0#1 % 256);" "assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume !(0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume !(1 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 2 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_2~0;" "check_#t~ret23#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1;" "assume !(check_~tmp___20~0#1 > -2);" "check_#res#1 := 1;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:08,021 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:08,021 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 10 times [2025-03-04 16:22:08,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:08,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1076237114] [2025-03-04 16:22:08,021 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:22:08,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:08,029 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 17 statements into 2 equivalence classes. [2025-03-04 16:22:08,056 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:08,056 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:22:08,056 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:08,056 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:08,058 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:08,066 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:08,070 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:08,070 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:08,073 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:08,074 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:08,074 INFO L85 PathProgramCache]: Analyzing trace with hash 1568890196, now seen corresponding path program 1 times [2025-03-04 16:22:08,074 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:08,074 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017516787] [2025-03-04 16:22:08,075 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:08,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:08,083 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:22:08,092 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:22:08,095 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:08,095 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:08,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:08,384 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:08,384 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2017516787] [2025-03-04 16:22:08,384 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2017516787] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:08,384 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:08,384 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:22:08,384 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2145883143] [2025-03-04 16:22:08,384 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:08,384 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:08,384 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:08,385 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:22:08,385 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:22:08,385 INFO L87 Difference]: Start difference. First operand 231 states and 330 transitions. cyclomatic complexity: 100 Second operand has 7 states, 7 states have (on average 6.285714285714286) internal successors, (44), 7 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:08,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:08,527 INFO L93 Difference]: Finished difference Result 299 states and 418 transitions. [2025-03-04 16:22:08,527 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 299 states and 418 transitions. [2025-03-04 16:22:08,528 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 282 [2025-03-04 16:22:08,529 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 299 states to 299 states and 418 transitions. [2025-03-04 16:22:08,530 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 299 [2025-03-04 16:22:08,530 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 299 [2025-03-04 16:22:08,530 INFO L73 IsDeterministic]: Start isDeterministic. Operand 299 states and 418 transitions. [2025-03-04 16:22:08,530 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:08,530 INFO L218 hiAutomatonCegarLoop]: Abstraction has 299 states and 418 transitions. [2025-03-04 16:22:08,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 299 states and 418 transitions. [2025-03-04 16:22:08,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 299 to 236. [2025-03-04 16:22:08,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 236 states, 236 states have (on average 1.4194915254237288) internal successors, (335), 235 states have internal predecessors, (335), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:08,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 335 transitions. [2025-03-04 16:22:08,534 INFO L240 hiAutomatonCegarLoop]: Abstraction has 236 states and 335 transitions. [2025-03-04 16:22:08,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:22:08,535 INFO L432 stractBuchiCegarLoop]: Abstraction has 236 states and 335 transitions. [2025-03-04 16:22:08,535 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-04 16:22:08,535 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 236 states and 335 transitions. [2025-03-04 16:22:08,536 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 219 [2025-03-04 16:22:08,536 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:08,536 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:08,536 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:08,536 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:08,537 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:08,537 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume 0 != ~side1Failed~0 % 256;~s1s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s1p_new~0) % 256 - 256);~side1_written~0 := ~nomsg~0;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume !(0 == ~side1Failed~0 % 256);" "assume !(0 == ~side2Failed~0 % 256);check_~tmp~3#1 := 0;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume !(0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_1~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1;" "assume !(0 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side2_failed_history_#res#1 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret16#1 := read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;havoc read_side2_failed_history_#in~index#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := (if 0 == check_#t~ret16#1 % 256 then 0 else 1);havoc check_#t~ret16#1;" "assume !(0 == check_~tmp___8~0#1 % 256);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret19#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := (if 0 == check_#t~ret19#1 % 256 then 0 else 1);havoc check_#t~ret19#1;" "assume !(0 == check_~tmp___11~0#1 % 256);" "assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume !(0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume !(1 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 2 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_2~0;" "check_#t~ret23#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1;" "assume !(check_~tmp___20~0#1 > -2);" "check_#res#1 := 1;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:08,538 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:08,538 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 11 times [2025-03-04 16:22:08,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:08,538 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813496813] [2025-03-04 16:22:08,538 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:22:08,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:08,544 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:08,554 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:08,554 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:22:08,554 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:08,554 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:08,557 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:08,565 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:08,566 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:08,566 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:08,569 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:08,571 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:08,571 INFO L85 PathProgramCache]: Analyzing trace with hash 859146721, now seen corresponding path program 1 times [2025-03-04 16:22:08,571 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:08,571 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [83834866] [2025-03-04 16:22:08,571 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:08,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:08,581 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-03-04 16:22:08,597 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-03-04 16:22:08,597 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:08,598 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:08,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:08,700 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:08,700 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [83834866] [2025-03-04 16:22:08,700 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [83834866] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:08,700 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:08,700 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:22:08,702 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [719770681] [2025-03-04 16:22:08,702 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:08,703 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:22:08,703 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:22:08,704 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:22:08,704 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:22:08,704 INFO L87 Difference]: Start difference. First operand 236 states and 335 transitions. cyclomatic complexity: 100 Second operand has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:08,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:22:08,716 INFO L93 Difference]: Finished difference Result 238 states and 336 transitions. [2025-03-04 16:22:08,717 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 238 states and 336 transitions. [2025-03-04 16:22:08,718 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 203 [2025-03-04 16:22:08,719 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 238 states to 220 states and 308 transitions. [2025-03-04 16:22:08,719 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 220 [2025-03-04 16:22:08,719 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 220 [2025-03-04 16:22:08,719 INFO L73 IsDeterministic]: Start isDeterministic. Operand 220 states and 308 transitions. [2025-03-04 16:22:08,719 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:22:08,719 INFO L218 hiAutomatonCegarLoop]: Abstraction has 220 states and 308 transitions. [2025-03-04 16:22:08,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states and 308 transitions. [2025-03-04 16:22:08,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 220. [2025-03-04 16:22:08,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 220 states, 220 states have (on average 1.4) internal successors, (308), 219 states have internal predecessors, (308), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:22:08,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 308 transitions. [2025-03-04 16:22:08,723 INFO L240 hiAutomatonCegarLoop]: Abstraction has 220 states and 308 transitions. [2025-03-04 16:22:08,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:22:08,724 INFO L432 stractBuchiCegarLoop]: Abstraction has 220 states and 308 transitions. [2025-03-04 16:22:08,724 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-04 16:22:08,724 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 220 states and 308 transitions. [2025-03-04 16:22:08,725 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 203 [2025-03-04 16:22:08,725 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:22:08,725 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:22:08,726 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:08,726 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:22:08,726 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(52, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~cs1~0 := 0;~cs1_old~0 := 0;~cs1_new~0 := 0;~cs2~0 := 0;~cs2_old~0 := 0;~cs2_new~0 := 0;~s1s2~0 := 0;~s1s2_old~0 := 0;~s1s2_new~0 := 0;~s1s1~0 := 0;~s1s1_old~0 := 0;~s1s1_new~0 := 0;~s2s1~0 := 0;~s2s1_old~0 := 0;~s2s1_new~0 := 0;~s2s2~0 := 0;~s2s2_old~0 := 0;~s2s2_new~0 := 0;~s1p~0 := 0;~s1p_old~0 := 0;~s1p_new~0 := 0;~s2p~0 := 0;~s2p_old~0 := 0;~s2p_new~0 := 0;~side1Failed~0 := 0;~side2Failed~0 := 0;~side1_written~0 := 0;~side2_written~0 := 0;~side1Failed_History_0~0 := 0;~side1Failed_History_1~0 := 0;~side1Failed_History_2~0 := 0;~side2Failed_History_0~0 := 0;~side2Failed_History_1~0 := 0;~side2Failed_History_2~0 := 0;~active_side_History_0~0 := 0;~active_side_History_1~0 := 0;~active_side_History_2~0 := 0;~manual_selection_History_0~0 := 0;~manual_selection_History_1~0 := 0;~manual_selection_History_2~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~nondet37#1, main_#t~nondet38#1, main_#t~nondet39#1, main_#t~nondet40#1, main_#t~nondet41#1, main_#t~nondet42#1, main_#t~nondet43#1, main_#t~nondet44#1, main_#t~nondet45#1, main_#t~nondet46#1, main_#t~ret47#1, main_#t~ret48#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet31#1;assume 0 == main_#t~nondet31#1 || 1 == main_#t~nondet31#1;~side1Failed~0 := (if 0 == main_#t~nondet31#1 % 256 then 0 else 1);havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~side2Failed~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~side1_written~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~side2_written~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;assume 0 == main_#t~nondet35#1 || 1 == main_#t~nondet35#1;~side1Failed_History_0~0 := (if 0 == main_#t~nondet35#1 % 256 then 0 else 1);havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~side1Failed_History_1~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;havoc main_#t~nondet37#1;assume 0 == main_#t~nondet37#1 || 1 == main_#t~nondet37#1;~side1Failed_History_2~0 := (if 0 == main_#t~nondet37#1 % 256 then 0 else 1);havoc main_#t~nondet37#1;havoc main_#t~nondet38#1;assume 0 == main_#t~nondet38#1 || 1 == main_#t~nondet38#1;~side2Failed_History_0~0 := (if 0 == main_#t~nondet38#1 % 256 then 0 else 1);havoc main_#t~nondet38#1;havoc main_#t~nondet39#1;assume 0 == main_#t~nondet39#1 || 1 == main_#t~nondet39#1;~side2Failed_History_1~0 := (if 0 == main_#t~nondet39#1 % 256 then 0 else 1);havoc main_#t~nondet39#1;havoc main_#t~nondet40#1;assume 0 == main_#t~nondet40#1 || 1 == main_#t~nondet40#1;~side2Failed_History_2~0 := (if 0 == main_#t~nondet40#1 % 256 then 0 else 1);havoc main_#t~nondet40#1;havoc main_#t~nondet41#1;~active_side_History_0~0 := main_#t~nondet41#1;havoc main_#t~nondet41#1;havoc main_#t~nondet42#1;~active_side_History_1~0 := main_#t~nondet42#1;havoc main_#t~nondet42#1;havoc main_#t~nondet43#1;~active_side_History_2~0 := main_#t~nondet43#1;havoc main_#t~nondet43#1;havoc main_#t~nondet44#1;~manual_selection_History_0~0 := main_#t~nondet44#1;havoc main_#t~nondet44#1;havoc main_#t~nondet45#1;~manual_selection_History_1~0 := main_#t~nondet45#1;havoc main_#t~nondet45#1;havoc main_#t~nondet46#1;~manual_selection_History_2~0 := main_#t~nondet46#1;havoc main_#t~nondet46#1;assume { :begin_inline_init } true;havoc init_#res#1;" "assume !(0 != (if ~side1Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_0~0 % 256 % 4294967296 else ~side1Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_0~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_0~0 % 256 % 4294967296 else ~side2Failed_History_0~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_0~0);" "assume !(0 != ~manual_selection_History_0~0);" "assume !(0 != (if ~side1Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_1~0 % 256 % 4294967296 else ~side1Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_1~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_1~0 % 256 % 4294967296 else ~side2Failed_History_1~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_1~0);" "assume !(0 != ~manual_selection_History_1~0);" "assume !(0 != (if ~side1Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side1Failed_History_2~0 % 256 % 4294967296 else ~side1Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(0 != (if ~side2Failed_History_2~0 % 256 % 4294967296 <= 2147483647 then ~side2Failed_History_2~0 % 256 % 4294967296 else ~side2Failed_History_2~0 % 256 % 4294967296 - 4294967296));" "assume !(-2 != ~active_side_History_2~0);" "assume !(0 != ~manual_selection_History_2~0);init_#res#1 := 1;" "main_#t~ret47#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret47#1;havoc main_#t~ret47#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~cs1_old~0 := ~nomsg~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~nomsg~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~nomsg~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~nomsg~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~nomsg~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~nomsg~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~nomsg~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~nomsg~0;~s2p_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-03-04 16:22:08,726 INFO L754 eck$LassoCheckResult]: Loop: "assume true;assume { :begin_inline_Console_task_each_pals_period } true;havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_~manual_selection~0#1;havoc Console_task_each_pals_period_~tmp~1#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~tmp~1#1 := Console_task_each_pals_period_#t~nondet4#1;havoc Console_task_each_pals_period_#t~nondet4#1;Console_task_each_pals_period_~manual_selection~0#1 := Console_task_each_pals_period_~tmp~1#1;assume { :begin_inline_write_manual_selection_history } true;write_manual_selection_history_#in~val#1 := Console_task_each_pals_period_~manual_selection~0#1;havoc write_manual_selection_history_~val#1;write_manual_selection_history_~val#1 := write_manual_selection_history_#in~val#1;~manual_selection_History_2~0 := ~manual_selection_History_1~0;~manual_selection_History_1~0 := ~manual_selection_History_0~0;~manual_selection_History_0~0 := write_manual_selection_history_~val#1;" "havoc write_manual_selection_history_~val#1;havoc write_manual_selection_history_#in~val#1;assume { :end_inline_write_manual_selection_history } true;~cs1_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs1_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs1_new~0) % 256 - 256);~cs2_new~0 := (if (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 <= 127 then (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 else (if Console_task_each_pals_period_~manual_selection~0#1 != ~nomsg~0 && ~cs2_new~0 == ~nomsg~0 then Console_task_each_pals_period_~manual_selection~0#1 else ~cs2_new~0) % 256 - 256);Console_task_each_pals_period_~manual_selection~0#1 := 0;" "havoc Console_task_each_pals_period_#t~nondet4#1, Console_task_each_pals_period_~manual_selection~0#1, Console_task_each_pals_period_~tmp~1#1;assume { :end_inline_Console_task_each_pals_period } true;assume { :begin_inline_Side1_activestandby_task_each_pals_period } true;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;havoc Side1_activestandby_task_each_pals_period_~side1~0#1;havoc Side1_activestandby_task_each_pals_period_~side2~0#1;havoc Side1_activestandby_task_each_pals_period_~manual_selection~1#1;havoc Side1_activestandby_task_each_pals_period_~next_state~0#1;Side1_activestandby_task_each_pals_period_~side1~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := 0;havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 || 1 == Side1_activestandby_task_each_pals_period_#t~nondet5#1;~side1Failed~0 := (if 0 == Side1_activestandby_task_each_pals_period_#t~nondet5#1 % 256 then 0 else 1);havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1;assume { :begin_inline_write_side1_failed_history } true;write_side1_failed_history_#in~val#1 := (if 0 == ~side1Failed~0 % 256 then 0 else 1);havoc write_side1_failed_history_~val#1;write_side1_failed_history_~val#1 := write_side1_failed_history_#in~val#1;~side1Failed_History_2~0 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);~side1Failed_History_1~0 := (if 0 == ~side1Failed_History_0~0 % 256 then 0 else 1);~side1Failed_History_0~0 := (if 0 == write_side1_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side1_failed_history_~val#1;havoc write_side1_failed_history_#in~val#1;assume { :end_inline_write_side1_failed_history } true;" "assume !(0 != ~side1Failed~0 % 256);Side1_activestandby_task_each_pals_period_~side1~0#1 := ~s1s1_old~0;~s1s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~side2~0#1 := ~s2s1_old~0;~s2s1_old~0 := ~nomsg~0;Side1_activestandby_task_each_pals_period_~manual_selection~1#1 := ~cs1_old~0;~cs1_old~0 := ~nomsg~0;" "assume Side1_activestandby_task_each_pals_period_~side1~0#1 == Side1_activestandby_task_each_pals_period_~side2~0#1;Side1_activestandby_task_each_pals_period_~next_state~0#1 := 1;" "~s1s1_new~0 := (if (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s1_new~0) % 256 <= 127 then (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s1_new~0) % 256 else (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s1_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s1_new~0) % 256 - 256);~s1s2_new~0 := (if (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s2_new~0) % 256 <= 127 then (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s2_new~0) % 256 else (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1s2_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1s2_new~0) % 256 - 256);~s1p_new~0 := (if (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1p_new~0) % 256 <= 127 then (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1p_new~0) % 256 else (if Side1_activestandby_task_each_pals_period_~next_state~0#1 != ~nomsg~0 && ~s1p_new~0 == ~nomsg~0 then Side1_activestandby_task_each_pals_period_~next_state~0#1 else ~s1p_new~0) % 256 - 256);~side1_written~0 := Side1_activestandby_task_each_pals_period_~next_state~0#1;" "havoc Side1_activestandby_task_each_pals_period_#t~nondet5#1, Side1_activestandby_task_each_pals_period_#t~ret6#1, Side1_activestandby_task_each_pals_period_~side1~0#1, Side1_activestandby_task_each_pals_period_~side2~0#1, Side1_activestandby_task_each_pals_period_~manual_selection~1#1, Side1_activestandby_task_each_pals_period_~next_state~0#1;assume { :end_inline_Side1_activestandby_task_each_pals_period } true;assume { :begin_inline_Side2_activestandby_task_each_pals_period } true;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;havoc Side2_activestandby_task_each_pals_period_~side1~1#1;havoc Side2_activestandby_task_each_pals_period_~side2~1#1;havoc Side2_activestandby_task_each_pals_period_~manual_selection~2#1;havoc Side2_activestandby_task_each_pals_period_~next_state~1#1;Side2_activestandby_task_each_pals_period_~side1~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~side2~1#1 := ~nomsg~0;Side2_activestandby_task_each_pals_period_~manual_selection~2#1 := 0;havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 || 1 == Side2_activestandby_task_each_pals_period_#t~nondet7#1;~side2Failed~0 := (if 0 == Side2_activestandby_task_each_pals_period_#t~nondet7#1 % 256 then 0 else 1);havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1;assume { :begin_inline_write_side2_failed_history } true;write_side2_failed_history_#in~val#1 := (if 0 == ~side2Failed~0 % 256 then 0 else 1);havoc write_side2_failed_history_~val#1;write_side2_failed_history_~val#1 := write_side2_failed_history_#in~val#1;~side2Failed_History_2~0 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);~side2Failed_History_1~0 := (if 0 == ~side2Failed_History_0~0 % 256 then 0 else 1);~side2Failed_History_0~0 := (if 0 == write_side2_failed_history_~val#1 % 256 then 0 else 1);" "havoc write_side2_failed_history_~val#1;havoc write_side2_failed_history_#in~val#1;assume { :end_inline_write_side2_failed_history } true;" "assume 0 != ~side2Failed~0 % 256;~s2s1_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s1_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s1_new~0) % 256 - 256);~s2s2_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2s2_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2s2_new~0) % 256 - 256);~s2p_new~0 := (if (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 <= 127 then (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 else (if ~nomsg~0 != ~nomsg~0 && ~s2p_new~0 == ~nomsg~0 then ~nomsg~0 else ~s2p_new~0) % 256 - 256);~side2_written~0 := ~nomsg~0;" "havoc Side2_activestandby_task_each_pals_period_#t~nondet7#1, Side2_activestandby_task_each_pals_period_#t~ret8#1, Side2_activestandby_task_each_pals_period_~side1~1#1, Side2_activestandby_task_each_pals_period_~side2~1#1, Side2_activestandby_task_each_pals_period_~manual_selection~2#1, Side2_activestandby_task_each_pals_period_~next_state~1#1;assume { :end_inline_Side2_activestandby_task_each_pals_period } true;assume { :begin_inline_Pendulum_prism_task_each_pals_period } true;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;havoc Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc Pendulum_prism_task_each_pals_period_~tmp~2#1;havoc Pendulum_prism_task_each_pals_period_~side1~2#1;havoc Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 0;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume 0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_0~0;" "Pendulum_prism_task_each_pals_period_#t~ret9#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;Pendulum_prism_task_each_pals_period_~tmp~2#1 := Pendulum_prism_task_each_pals_period_#t~ret9#1;havoc Pendulum_prism_task_each_pals_period_#t~ret9#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := Pendulum_prism_task_each_pals_period_~tmp~2#1;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side1~2#1 := ~s1p_old~0;~s1p_old~0 := ~nomsg~0;Pendulum_prism_task_each_pals_period_~side2~2#1 := ~s2p_old~0;~s2p_old~0 := ~nomsg~0;" "assume 1 == Pendulum_prism_task_each_pals_period_~side1~2#1;Pendulum_prism_task_each_pals_period_~active_side~0#1 := 1;" "assume { :begin_inline_write_active_side_history } true;write_active_side_history_#in~val#1 := Pendulum_prism_task_each_pals_period_~active_side~0#1;havoc write_active_side_history_~val#1;write_active_side_history_~val#1 := write_active_side_history_#in~val#1;~active_side_History_2~0 := ~active_side_History_1~0;~active_side_History_1~0 := ~active_side_History_0~0;~active_side_History_0~0 := write_active_side_history_~val#1;" "havoc write_active_side_history_~val#1;havoc write_active_side_history_#in~val#1;assume { :end_inline_write_active_side_history } true;" "havoc Pendulum_prism_task_each_pals_period_#t~ret9#1, Pendulum_prism_task_each_pals_period_~active_side~0#1, Pendulum_prism_task_each_pals_period_~tmp~2#1, Pendulum_prism_task_each_pals_period_~side1~2#1, Pendulum_prism_task_each_pals_period_~side2~2#1;assume { :end_inline_Pendulum_prism_task_each_pals_period } true;~cs1_old~0 := ~cs1_new~0;~cs1_new~0 := ~nomsg~0;~cs2_old~0 := ~cs2_new~0;~cs2_new~0 := ~nomsg~0;~s1s2_old~0 := ~s1s2_new~0;~s1s2_new~0 := ~nomsg~0;~s1s1_old~0 := ~s1s1_new~0;~s1s1_new~0 := ~nomsg~0;~s2s1_old~0 := ~s2s1_new~0;~s2s1_new~0 := ~nomsg~0;~s2s2_old~0 := ~s2s2_new~0;~s2s2_new~0 := ~nomsg~0;~s1p_old~0 := ~s1p_new~0;~s1p_new~0 := ~nomsg~0;~s2p_old~0 := ~s2p_new~0;~s2p_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;havoc check_~tmp~3#1;havoc check_~tmp___0~0#1;havoc check_~tmp___1~0#1;havoc check_~tmp___2~0#1;havoc check_~tmp___3~0#1;havoc check_~tmp___4~0#1;havoc check_~tmp___5~0#1;havoc check_~tmp___6~0#1;havoc check_~tmp___7~0#1;havoc check_~tmp___8~0#1;havoc check_~tmp___9~0#1;havoc check_~tmp___10~0#1;havoc check_~tmp___11~0#1;havoc check_~tmp___12~0#1;havoc check_~tmp___13~0#1;havoc check_~tmp___14~0#1;havoc check_~tmp___15~0#1;havoc check_~tmp___16~0#1;havoc check_~tmp___17~0#1;havoc check_~tmp___18~0#1;havoc check_~tmp___19~0#1;havoc check_~tmp___20~0#1;" "assume 0 == ~side1Failed~0 % 256;check_~tmp~3#1 := 1;" "assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 <= 2147483647 then (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 else (if 0 == check_~tmp~3#1 then 0 else 1) % 256 % 4294967296 - 4294967296);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;assume { :begin_inline_read_manual_selection_history } true;read_manual_selection_history_#in~index#1 := 1;havoc read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;read_manual_selection_history_~index#1 := read_manual_selection_history_#in~index#1;" "assume !(0 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_manual_selection_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_manual_selection_history_~index#1 % 256 % 4294967296 else read_manual_selection_history_~index#1 % 256 % 4294967296 - 4294967296);read_manual_selection_history_#res#1 := ~manual_selection_History_1~0;" "check_#t~ret10#1 := read_manual_selection_history_#res#1;havoc read_manual_selection_history_~index#1;havoc read_manual_selection_history_#in~index#1;assume { :end_inline_read_manual_selection_history } true;check_~tmp___0~0#1 := check_#t~ret10#1;havoc check_#t~ret10#1;" "assume !(0 == check_~tmp___0~0#1);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret15#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___7~0#1 := (if 0 == check_#t~ret15#1 % 256 then 0 else 1);havoc check_#t~ret15#1;" "assume 0 != check_~tmp___7~0#1 % 256;assume { :begin_inline_read_side2_failed_history } true;read_side2_failed_history_#in~index#1 := 1;havoc read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;read_side2_failed_history_~index#1 := read_side2_failed_history_#in~index#1;" "assume !(0 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side2_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side2_failed_history_~index#1 % 256 % 4294967296 else read_side2_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side2_failed_history_#res#1 := (if 0 == ~side2Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret16#1 := read_side2_failed_history_#res#1;havoc read_side2_failed_history_~index#1;havoc read_side2_failed_history_#in~index#1;assume { :end_inline_read_side2_failed_history } true;check_~tmp___8~0#1 := (if 0 == check_#t~ret16#1 % 256 then 0 else 1);havoc check_#t~ret16#1;" "assume !(0 == check_~tmp___8~0#1 % 256);" "assume { :begin_inline_read_side1_failed_history } true;read_side1_failed_history_#in~index#1 := 1;havoc read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;read_side1_failed_history_~index#1 := read_side1_failed_history_#in~index#1;" "assume !(0 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 1 == (if read_side1_failed_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_side1_failed_history_~index#1 % 256 % 4294967296 else read_side1_failed_history_~index#1 % 256 % 4294967296 - 4294967296);read_side1_failed_history_#res#1 := (if 0 == ~side1Failed_History_1~0 % 256 then 0 else 1);" "check_#t~ret19#1 := read_side1_failed_history_#res#1;havoc read_side1_failed_history_~index#1;havoc read_side1_failed_history_#in~index#1;assume { :end_inline_read_side1_failed_history } true;check_~tmp___11~0#1 := (if 0 == check_#t~ret19#1 % 256 then 0 else 1);havoc check_#t~ret19#1;" "assume !(0 == check_~tmp___11~0#1 % 256);" "assume { :begin_inline_read_active_side_history } true;read_active_side_history_#in~index#1 := 2;havoc read_active_side_history_#res#1;havoc read_active_side_history_~index#1;read_active_side_history_~index#1 := read_active_side_history_#in~index#1;" "assume !(0 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume !(1 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296));" "assume 2 == (if read_active_side_history_~index#1 % 256 % 4294967296 <= 2147483647 then read_active_side_history_~index#1 % 256 % 4294967296 else read_active_side_history_~index#1 % 256 % 4294967296 - 4294967296);read_active_side_history_#res#1 := ~active_side_History_2~0;" "check_#t~ret23#1 := read_active_side_history_#res#1;havoc read_active_side_history_~index#1;havoc read_active_side_history_#in~index#1;assume { :end_inline_read_active_side_history } true;check_~tmp___20~0#1 := check_#t~ret23#1;havoc check_#t~ret23#1;" "assume !(check_~tmp___20~0#1 > -2);" "check_#res#1 := 1;" "main_#t~ret48#1 := check_#res#1;havoc check_#t~ret10#1, check_#t~ret11#1, check_#t~ret12#1, check_#t~ret13#1, check_#t~ret14#1, check_#t~ret15#1, check_#t~ret16#1, check_#t~ret17#1, check_#t~ret18#1, check_#t~ret19#1, check_#t~ret20#1, check_#t~ret21#1, check_#t~ret22#1, check_#t~ret23#1, check_#t~ret24#1, check_#t~ret25#1, check_#t~ret26#1, check_#t~ret27#1, check_#t~ret28#1, check_#t~ret29#1, check_#t~ret30#1, check_~tmp~3#1, check_~tmp___0~0#1, check_~tmp___1~0#1, check_~tmp___2~0#1, check_~tmp___3~0#1, check_~tmp___4~0#1, check_~tmp___5~0#1, check_~tmp___6~0#1, check_~tmp___7~0#1, check_~tmp___8~0#1, check_~tmp___9~0#1, check_~tmp___10~0#1, check_~tmp___11~0#1, check_~tmp___12~0#1, check_~tmp___13~0#1, check_~tmp___14~0#1, check_~tmp___15~0#1, check_~tmp___16~0#1, check_~tmp___17~0#1, check_~tmp___18~0#1, check_~tmp___19~0#1, check_~tmp___20~0#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret48#1;havoc main_#t~ret48#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2025-03-04 16:22:08,727 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:08,727 INFO L85 PathProgramCache]: Analyzing trace with hash -665535718, now seen corresponding path program 12 times [2025-03-04 16:22:08,727 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:08,727 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796041212] [2025-03-04 16:22:08,727 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:22:08,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:08,734 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:08,742 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:08,743 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:22:08,743 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:08,743 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:08,745 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-03-04 16:22:08,751 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-03-04 16:22:08,752 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:08,752 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:08,755 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:08,757 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:08,757 INFO L85 PathProgramCache]: Analyzing trace with hash 1612806049, now seen corresponding path program 1 times [2025-03-04 16:22:08,757 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:08,758 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361633243] [2025-03-04 16:22:08,758 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:08,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:08,767 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-04 16:22:08,800 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-04 16:22:08,800 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:08,800 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:08,800 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:22:08,804 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-04 16:22:08,825 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-04 16:22:08,825 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:08,825 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:22:08,831 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:22:08,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:22:08,832 INFO L85 PathProgramCache]: Analyzing trace with hash -1875421784, now seen corresponding path program 1 times [2025-03-04 16:22:08,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:22:08,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [160929296] [2025-03-04 16:22:08,832 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:22:08,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:22:08,845 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 66 statements into 1 equivalence classes. [2025-03-04 16:22:08,852 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 66 of 66 statements. [2025-03-04 16:22:08,852 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:22:08,852 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:22:08,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:22:08,929 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:22:08,929 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [160929296] [2025-03-04 16:22:08,929 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [160929296] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:22:08,929 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:22:08,929 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:22:08,930 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [980719137] [2025-03-04 16:22:08,930 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:22:13,811 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 16:22:13,812 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 16:22:13,812 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 16:22:13,812 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 16:22:13,812 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-03-04 16:22:13,812 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:22:13,812 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 16:22:13,812 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 16:22:13,812 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c_Iteration13_Loop [2025-03-04 16:22:13,812 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 16:22:13,813 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 16:22:13,832 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,838 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,840 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,841 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,842 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,844 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,845 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,846 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,848 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,865 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,867 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,869 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,871 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,872 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,873 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,875 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,876 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,877 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,879 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,880 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,881 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,883 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,884 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,887 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,888 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,889 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:13,891 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,809 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,820 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,823 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,824 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,826 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,827 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,828 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,829 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,830 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,831 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,832 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,834 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,835 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,836 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,837 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,838 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,839 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,842 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,843 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,844 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,846 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,847 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,848 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,851 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,853 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,854 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,855 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,860 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,862 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,863 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,865 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,866 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,867 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,868 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,870 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,871 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,872 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,874 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,875 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,890 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,892 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,893 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,895 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,896 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,897 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,899 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,900 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,901 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,902 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,903 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,904 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,909 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,910 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,911 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,913 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,914 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,918 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,920 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,921 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,922 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,923 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,925 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,926 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,927 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,932 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,933 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,934 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,935 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,936 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,938 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:14,941 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:22:16,195 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 30