./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/systemc/pipeline.cil-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/systemc/pipeline.cil-1.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 79bbe68806c3ba3852cd8c209d4ce80dca551636a131cc65daaf97524d927c63 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 16:20:02,710 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 16:20:02,762 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-04 16:20:02,767 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 16:20:02,767 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 16:20:02,767 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 16:20:02,781 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 16:20:02,782 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 16:20:02,782 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 16:20:02,782 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 16:20:02,785 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 16:20:02,786 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 16:20:02,786 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 16:20:02,786 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 16:20:02,786 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 16:20:02,787 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-04 16:20:02,787 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 16:20:02,787 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 16:20:02,787 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 16:20:02,787 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 16:20:02,787 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 16:20:02,787 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 16:20:02,787 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 16:20:02,787 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 16:20:02,787 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 16:20:02,787 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 79bbe68806c3ba3852cd8c209d4ce80dca551636a131cc65daaf97524d927c63 [2025-03-04 16:20:03,024 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 16:20:03,031 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 16:20:03,034 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 16:20:03,035 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 16:20:03,035 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 16:20:03,036 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/pipeline.cil-1.c [2025-03-04 16:20:04,212 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/11b6c1f50/3369e62492d1489c9a35a21a5267c094/FLAGbc5103c43 [2025-03-04 16:20:04,471 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 16:20:04,472 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/pipeline.cil-1.c [2025-03-04 16:20:04,484 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/11b6c1f50/3369e62492d1489c9a35a21a5267c094/FLAGbc5103c43 [2025-03-04 16:20:04,787 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/11b6c1f50/3369e62492d1489c9a35a21a5267c094 [2025-03-04 16:20:04,789 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 16:20:04,790 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 16:20:04,791 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 16:20:04,791 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 16:20:04,794 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 16:20:04,794 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:20:04" (1/1) ... [2025-03-04 16:20:04,795 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@68fad818 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:04, skipping insertion in model container [2025-03-04 16:20:04,795 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:20:04" (1/1) ... [2025-03-04 16:20:04,817 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 16:20:05,002 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:20:05,017 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 16:20:05,072 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:20:05,085 INFO L204 MainTranslator]: Completed translation [2025-03-04 16:20:05,085 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05 WrapperNode [2025-03-04 16:20:05,085 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 16:20:05,086 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 16:20:05,086 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 16:20:05,086 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 16:20:05,090 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,098 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,142 INFO L138 Inliner]: procedures = 20, calls = 18, calls flagged for inlining = 13, calls inlined = 25, statements flattened = 1031 [2025-03-04 16:20:05,143 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 16:20:05,143 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 16:20:05,143 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 16:20:05,143 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 16:20:05,154 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,154 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,161 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,179 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-04 16:20:05,179 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,180 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,187 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,189 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,190 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,191 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,197 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 16:20:05,197 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 16:20:05,197 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 16:20:05,197 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 16:20:05,198 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (1/1) ... [2025-03-04 16:20:05,206 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:05,222 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:05,235 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:05,237 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 16:20:05,253 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-04 16:20:05,253 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-04 16:20:05,253 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 16:20:05,253 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 16:20:05,323 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 16:20:05,324 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 16:20:06,220 INFO L? ?]: Removed 76 outVars from TransFormulas that were not future-live. [2025-03-04 16:20:06,221 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 16:20:06,234 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 16:20:06,234 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-04 16:20:06,235 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:20:06 BoogieIcfgContainer [2025-03-04 16:20:06,235 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 16:20:06,235 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 16:20:06,236 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 16:20:06,239 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 16:20:06,240 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:20:06,240 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 04:20:04" (1/3) ... [2025-03-04 16:20:06,241 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@31766551 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:20:06, skipping insertion in model container [2025-03-04 16:20:06,241 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:20:06,241 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:20:05" (2/3) ... [2025-03-04 16:20:06,241 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@31766551 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:20:06, skipping insertion in model container [2025-03-04 16:20:06,241 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:20:06,241 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:20:06" (3/3) ... [2025-03-04 16:20:06,242 INFO L363 chiAutomizerObserver]: Analyzing ICFG pipeline.cil-1.c [2025-03-04 16:20:06,286 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 16:20:06,287 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 16:20:06,287 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 16:20:06,287 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 16:20:06,287 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 16:20:06,288 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 16:20:06,288 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 16:20:06,288 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 16:20:06,294 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 423 states, 422 states have (on average 1.7962085308056872) internal successors, (758), 422 states have internal predecessors, (758), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:06,321 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 361 [2025-03-04 16:20:06,322 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:06,322 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:06,328 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:06,329 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:06,329 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 16:20:06,330 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 423 states, 422 states have (on average 1.7962085308056872) internal successors, (758), 422 states have internal predecessors, (758), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:06,344 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 361 [2025-03-04 16:20:06,344 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:06,344 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:06,345 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:06,345 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:06,350 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" [2025-03-04 16:20:06,351 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume !true;" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume 0 == ~main_in1_ev~0;~main_in1_ev~0 := 1;" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-03-04 16:20:06,358 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:06,358 INFO L85 PathProgramCache]: Analyzing trace with hash 1362474382, now seen corresponding path program 1 times [2025-03-04 16:20:06,363 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:06,363 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151147932] [2025-03-04 16:20:06,364 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:06,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:06,415 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-03-04 16:20:06,441 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-04 16:20:06,442 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:06,442 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:06,442 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:06,450 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-03-04 16:20:06,473 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-04 16:20:06,474 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:06,474 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:06,501 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:06,503 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:06,503 INFO L85 PathProgramCache]: Analyzing trace with hash 520539416, now seen corresponding path program 1 times [2025-03-04 16:20:06,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:06,503 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968299459] [2025-03-04 16:20:06,503 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:06,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:06,511 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-03-04 16:20:06,513 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-03-04 16:20:06,513 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:06,513 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:06,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:06,549 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:06,549 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1968299459] [2025-03-04 16:20:06,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1968299459] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:06,550 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:06,551 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-04 16:20:06,551 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [857918114] [2025-03-04 16:20:06,551 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:06,554 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:06,555 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:06,571 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-03-04 16:20:06,572 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-04 16:20:06,574 INFO L87 Difference]: Start difference. First operand has 423 states, 422 states have (on average 1.7962085308056872) internal successors, (758), 422 states have internal predecessors, (758), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 19.5) internal successors, (39), 2 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:06,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:06,595 INFO L93 Difference]: Finished difference Result 417 states and 745 transitions. [2025-03-04 16:20:06,596 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 417 states and 745 transitions. [2025-03-04 16:20:06,599 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 358 [2025-03-04 16:20:06,604 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 417 states to 416 states and 744 transitions. [2025-03-04 16:20:06,605 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 416 [2025-03-04 16:20:06,606 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 416 [2025-03-04 16:20:06,606 INFO L73 IsDeterministic]: Start isDeterministic. Operand 416 states and 744 transitions. [2025-03-04 16:20:06,608 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:06,608 INFO L218 hiAutomatonCegarLoop]: Abstraction has 416 states and 744 transitions. [2025-03-04 16:20:06,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states and 744 transitions. [2025-03-04 16:20:06,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 416. [2025-03-04 16:20:06,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 416 states, 416 states have (on average 1.7884615384615385) internal successors, (744), 415 states have internal predecessors, (744), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:06,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 416 states to 416 states and 744 transitions. [2025-03-04 16:20:06,640 INFO L240 hiAutomatonCegarLoop]: Abstraction has 416 states and 744 transitions. [2025-03-04 16:20:06,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-03-04 16:20:06,642 INFO L432 stractBuchiCegarLoop]: Abstraction has 416 states and 744 transitions. [2025-03-04 16:20:06,642 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 16:20:06,642 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 416 states and 744 transitions. [2025-03-04 16:20:06,644 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 358 [2025-03-04 16:20:06,644 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:06,644 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:06,645 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:06,645 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:06,645 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" [2025-03-04 16:20:06,646 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume 0 == ~main_in1_ev~0;~main_in1_ev~0 := 1;" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-03-04 16:20:06,646 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:06,646 INFO L85 PathProgramCache]: Analyzing trace with hash 1362474382, now seen corresponding path program 2 times [2025-03-04 16:20:06,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:06,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2068448077] [2025-03-04 16:20:06,647 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:20:06,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:06,653 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 40 statements into 1 equivalence classes. [2025-03-04 16:20:06,670 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-04 16:20:06,670 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:20:06,670 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:06,670 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:06,678 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-03-04 16:20:06,694 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-04 16:20:06,694 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:06,694 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:06,704 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:06,706 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:06,706 INFO L85 PathProgramCache]: Analyzing trace with hash 16513805, now seen corresponding path program 1 times [2025-03-04 16:20:06,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:06,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399234928] [2025-03-04 16:20:06,706 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:06,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:06,711 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:06,721 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:06,722 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:06,722 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:06,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:06,781 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:06,781 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1399234928] [2025-03-04 16:20:06,781 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1399234928] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:06,782 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:06,782 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:06,782 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1714088975] [2025-03-04 16:20:06,782 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:06,782 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:06,782 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:06,782 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:06,782 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:06,783 INFO L87 Difference]: Start difference. First operand 416 states and 744 transitions. cyclomatic complexity: 330 Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:06,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:06,853 INFO L93 Difference]: Finished difference Result 506 states and 918 transitions. [2025-03-04 16:20:06,853 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 506 states and 918 transitions. [2025-03-04 16:20:06,856 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 433 [2025-03-04 16:20:06,858 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 506 states to 506 states and 918 transitions. [2025-03-04 16:20:06,859 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 506 [2025-03-04 16:20:06,859 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 506 [2025-03-04 16:20:06,859 INFO L73 IsDeterministic]: Start isDeterministic. Operand 506 states and 918 transitions. [2025-03-04 16:20:06,861 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:06,861 INFO L218 hiAutomatonCegarLoop]: Abstraction has 506 states and 918 transitions. [2025-03-04 16:20:06,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 506 states and 918 transitions. [2025-03-04 16:20:06,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 506 to 506. [2025-03-04 16:20:06,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 506 states, 506 states have (on average 1.8142292490118577) internal successors, (918), 505 states have internal predecessors, (918), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:06,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 918 transitions. [2025-03-04 16:20:06,871 INFO L240 hiAutomatonCegarLoop]: Abstraction has 506 states and 918 transitions. [2025-03-04 16:20:06,871 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:06,872 INFO L432 stractBuchiCegarLoop]: Abstraction has 506 states and 918 transitions. [2025-03-04 16:20:06,872 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 16:20:06,872 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 506 states and 918 transitions. [2025-03-04 16:20:06,874 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 433 [2025-03-04 16:20:06,874 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:06,874 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:06,875 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:06,875 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:06,875 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume 0 == ~main_in1_ev~0;~main_in1_ev~0 := 1;" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_in1_ev~0;~main_in1_ev~0 := 2;" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" [2025-03-04 16:20:06,875 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume 0 == ~main_in1_ev~0;~main_in1_ev~0 := 1;" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume 1 == ~main_in1_ev~0;~main_in1_ev~0 := 2;" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-03-04 16:20:06,876 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:06,876 INFO L85 PathProgramCache]: Analyzing trace with hash -658770066, now seen corresponding path program 1 times [2025-03-04 16:20:06,876 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:06,876 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1905580855] [2025-03-04 16:20:06,876 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:06,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:06,899 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-03-04 16:20:06,903 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-04 16:20:06,904 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:06,904 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:06,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:06,971 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:06,971 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1905580855] [2025-03-04 16:20:06,971 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1905580855] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:06,971 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:06,971 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:06,971 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1213947082] [2025-03-04 16:20:06,971 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:06,976 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:06,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:06,976 INFO L85 PathProgramCache]: Analyzing trace with hash 1813465164, now seen corresponding path program 1 times [2025-03-04 16:20:06,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:06,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079467989] [2025-03-04 16:20:06,976 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:06,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:06,980 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:06,982 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:06,982 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:06,982 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:07,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:07,017 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:07,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079467989] [2025-03-04 16:20:07,017 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1079467989] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:07,017 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:07,017 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:07,018 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [412795765] [2025-03-04 16:20:07,018 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:07,018 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:07,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:07,018 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:07,018 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:07,018 INFO L87 Difference]: Start difference. First operand 506 states and 918 transitions. cyclomatic complexity: 414 Second operand has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:07,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:07,079 INFO L93 Difference]: Finished difference Result 918 states and 1644 transitions. [2025-03-04 16:20:07,079 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 918 states and 1644 transitions. [2025-03-04 16:20:07,084 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 791 [2025-03-04 16:20:07,088 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 918 states to 918 states and 1644 transitions. [2025-03-04 16:20:07,089 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 918 [2025-03-04 16:20:07,089 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 918 [2025-03-04 16:20:07,090 INFO L73 IsDeterministic]: Start isDeterministic. Operand 918 states and 1644 transitions. [2025-03-04 16:20:07,091 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:07,091 INFO L218 hiAutomatonCegarLoop]: Abstraction has 918 states and 1644 transitions. [2025-03-04 16:20:07,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 918 states and 1644 transitions. [2025-03-04 16:20:07,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 918 to 918. [2025-03-04 16:20:07,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 918 states, 918 states have (on average 1.7908496732026145) internal successors, (1644), 917 states have internal predecessors, (1644), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:07,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 918 states to 918 states and 1644 transitions. [2025-03-04 16:20:07,104 INFO L240 hiAutomatonCegarLoop]: Abstraction has 918 states and 1644 transitions. [2025-03-04 16:20:07,105 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:07,105 INFO L432 stractBuchiCegarLoop]: Abstraction has 918 states and 1644 transitions. [2025-03-04 16:20:07,105 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 16:20:07,105 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 918 states and 1644 transitions. [2025-03-04 16:20:07,109 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 791 [2025-03-04 16:20:07,109 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:07,109 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:07,110 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:07,110 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:07,110 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" [2025-03-04 16:20:07,110 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-03-04 16:20:07,110 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:07,110 INFO L85 PathProgramCache]: Analyzing trace with hash 1362474382, now seen corresponding path program 3 times [2025-03-04 16:20:07,111 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:07,111 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [623437378] [2025-03-04 16:20:07,111 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:20:07,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:07,118 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 40 statements into 1 equivalence classes. [2025-03-04 16:20:07,121 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-04 16:20:07,122 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:20:07,122 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:07,122 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:07,124 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-03-04 16:20:07,129 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-04 16:20:07,131 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:07,131 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:07,136 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:07,136 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:07,136 INFO L85 PathProgramCache]: Analyzing trace with hash 47533612, now seen corresponding path program 1 times [2025-03-04 16:20:07,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:07,136 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [972060955] [2025-03-04 16:20:07,136 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:07,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:07,140 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:07,142 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:07,142 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:07,142 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:07,159 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:07,159 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:07,159 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [972060955] [2025-03-04 16:20:07,159 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [972060955] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:07,159 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:07,159 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:07,159 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1339656419] [2025-03-04 16:20:07,159 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:07,160 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:07,160 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:07,160 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:07,160 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:07,160 INFO L87 Difference]: Start difference. First operand 918 states and 1644 transitions. cyclomatic complexity: 728 Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:07,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:07,325 INFO L93 Difference]: Finished difference Result 1140 states and 1974 transitions. [2025-03-04 16:20:07,325 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1140 states and 1974 transitions. [2025-03-04 16:20:07,331 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 976 [2025-03-04 16:20:07,337 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1140 states to 1140 states and 1974 transitions. [2025-03-04 16:20:07,339 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1140 [2025-03-04 16:20:07,340 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1140 [2025-03-04 16:20:07,340 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1140 states and 1974 transitions. [2025-03-04 16:20:07,343 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:07,343 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1140 states and 1974 transitions. [2025-03-04 16:20:07,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1140 states and 1974 transitions. [2025-03-04 16:20:07,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1140 to 1140. [2025-03-04 16:20:07,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1140 states, 1140 states have (on average 1.731578947368421) internal successors, (1974), 1139 states have internal predecessors, (1974), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:07,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1140 states to 1140 states and 1974 transitions. [2025-03-04 16:20:07,364 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1140 states and 1974 transitions. [2025-03-04 16:20:07,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:07,365 INFO L432 stractBuchiCegarLoop]: Abstraction has 1140 states and 1974 transitions. [2025-03-04 16:20:07,365 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 16:20:07,365 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1140 states and 1974 transitions. [2025-03-04 16:20:07,370 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 976 [2025-03-04 16:20:07,370 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:07,370 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:07,371 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:07,371 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:07,372 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" [2025-03-04 16:20:07,372 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-03-04 16:20:07,372 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:07,373 INFO L85 PathProgramCache]: Analyzing trace with hash 968443117, now seen corresponding path program 1 times [2025-03-04 16:20:07,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:07,374 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1319312869] [2025-03-04 16:20:07,374 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:07,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:07,380 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-03-04 16:20:07,385 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-04 16:20:07,385 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:07,385 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:07,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:07,445 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:07,445 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1319312869] [2025-03-04 16:20:07,445 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1319312869] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:07,445 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:07,445 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:07,445 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [317294909] [2025-03-04 16:20:07,445 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:07,446 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:07,446 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:07,446 INFO L85 PathProgramCache]: Analyzing trace with hash 47532651, now seen corresponding path program 1 times [2025-03-04 16:20:07,446 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:07,446 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [362748693] [2025-03-04 16:20:07,446 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:07,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:07,473 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:07,478 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:07,479 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:07,479 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:07,479 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:07,480 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:07,485 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:07,485 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:07,485 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:07,489 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:08,016 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 16:20:08,016 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 16:20:08,016 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 16:20:08,017 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 16:20:08,017 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-03-04 16:20:08,017 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:08,017 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 16:20:08,017 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 16:20:08,017 INFO L132 ssoRankerPreferences]: Filename of dumped script: pipeline.cil-1.c_Iteration5_Loop [2025-03-04 16:20:08,017 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 16:20:08,017 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 16:20:08,043 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,048 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,050 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,057 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,059 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,061 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,062 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,066 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,067 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,071 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,072 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,075 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,077 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,081 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,082 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,086 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,087 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,091 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,095 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,096 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,098 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,102 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,105 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,110 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,112 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,116 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,121 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,123 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,128 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,131 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,133 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,137 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,143 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,447 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 16:20:08,447 INFO L365 LassoAnalysis]: Checking for nontermination... [2025-03-04 16:20:08,448 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:08,448 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:08,451 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:08,453 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-04 16:20:08,454 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:08,454 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:08,468 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:08,468 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_eval_#t~nondet4#1=0} Honda state: {ULTIMATE.start_eval_#t~nondet4#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:08,475 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2025-03-04 16:20:08,476 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:08,476 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:08,480 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:08,481 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-04 16:20:08,482 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:08,482 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:08,498 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:08,498 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_eval_~tmp___1~0#1=0} Honda state: {ULTIMATE.start_eval_~tmp___1~0#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:08,508 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2025-03-04 16:20:08,509 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:08,509 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:08,511 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:08,513 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-04 16:20:08,515 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:08,515 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:08,536 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2025-03-04 16:20:08,537 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:08,538 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:08,539 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:08,541 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-04 16:20:08,542 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-03-04 16:20:08,542 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:08,562 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2025-03-04 16:20:08,569 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-03-04 16:20:08,569 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 16:20:08,569 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 16:20:08,569 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 16:20:08,569 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 16:20:08,569 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-04 16:20:08,569 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:08,569 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 16:20:08,569 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 16:20:08,569 INFO L132 ssoRankerPreferences]: Filename of dumped script: pipeline.cil-1.c_Iteration5_Loop [2025-03-04 16:20:08,569 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 16:20:08,569 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 16:20:08,571 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,577 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,582 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,586 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,588 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,591 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,594 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,598 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,600 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,602 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,605 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,609 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,614 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,616 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,620 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,622 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,626 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,630 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,634 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,636 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,639 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,642 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,647 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,651 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,654 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,658 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,662 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,664 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,667 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,672 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,676 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,680 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,682 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:08,941 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 16:20:08,946 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-04 16:20:08,947 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:08,947 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:08,949 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:08,951 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2025-03-04 16:20:08,952 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:08,963 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:08,963 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:08,964 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:08,964 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:20:08,964 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:08,967 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 16:20:08,967 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:08,970 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:08,977 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2025-03-04 16:20:08,977 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:08,977 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:08,979 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:08,980 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2025-03-04 16:20:08,982 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:08,992 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:08,993 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:08,993 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:08,993 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:20:08,993 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:08,993 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 16:20:08,993 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:08,994 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:09,000 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2025-03-04 16:20:09,000 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:09,000 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:09,002 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:09,004 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-03-04 16:20:09,005 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:09,015 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:09,015 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:09,016 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:09,016 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:20:09,016 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:09,017 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 16:20:09,017 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:09,020 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-04 16:20:09,024 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2025-03-04 16:20:09,025 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2025-03-04 16:20:09,026 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:09,026 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:09,029 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:09,030 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2025-03-04 16:20:09,031 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-04 16:20:09,031 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2025-03-04 16:20:09,031 INFO L474 LassoAnalysis]: Proved termination. [2025-03-04 16:20:09,031 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(~main_dbl_ev~0) = -1*~main_dbl_ev~0 + 1 Supporting invariants [] [2025-03-04 16:20:09,037 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2025-03-04 16:20:09,041 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2025-03-04 16:20:09,078 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:09,102 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-03-04 16:20:09,123 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-04 16:20:09,123 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:09,123 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:09,125 INFO L256 TraceCheckSpWp]: Trace formula consists of 232 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-04 16:20:09,126 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:20:09,185 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:09,195 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:09,195 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:09,195 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:09,196 INFO L256 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-04 16:20:09,197 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:20:09,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:09,285 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2025-03-04 16:20:09,286 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 1140 states and 1974 transitions. cyclomatic complexity: 836 Second operand has 5 states, 5 states have (on average 16.8) internal successors, (84), 5 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:09,379 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2025-03-04 16:20:09,484 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 1140 states and 1974 transitions. cyclomatic complexity: 836. Second operand has 5 states, 5 states have (on average 16.8) internal successors, (84), 5 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 4148 states and 7215 transitions. Complement of second has 5 states. [2025-03-04 16:20:09,486 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-03-04 16:20:09,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 16.8) internal successors, (84), 5 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:09,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1400 transitions. [2025-03-04 16:20:09,496 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 1400 transitions. Stem has 40 letters. Loop has 44 letters. [2025-03-04 16:20:09,497 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:20:09,497 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 1400 transitions. Stem has 84 letters. Loop has 44 letters. [2025-03-04 16:20:09,498 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:20:09,498 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 1400 transitions. Stem has 40 letters. Loop has 88 letters. [2025-03-04 16:20:09,501 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:20:09,501 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4148 states and 7215 transitions. [2025-03-04 16:20:09,528 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 2928 [2025-03-04 16:20:09,550 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4148 states to 4148 states and 7215 transitions. [2025-03-04 16:20:09,550 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3098 [2025-03-04 16:20:09,553 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3135 [2025-03-04 16:20:09,553 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4148 states and 7215 transitions. [2025-03-04 16:20:09,554 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:09,554 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4148 states and 7215 transitions. [2025-03-04 16:20:09,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4148 states and 7215 transitions. [2025-03-04 16:20:09,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4148 to 3133. [2025-03-04 16:20:09,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3133 states, 3133 states have (on average 1.7405043089690393) internal successors, (5453), 3132 states have internal predecessors, (5453), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:09,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3133 states to 3133 states and 5453 transitions. [2025-03-04 16:20:09,622 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3133 states and 5453 transitions. [2025-03-04 16:20:09,623 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:09,623 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:09,623 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:09,623 INFO L87 Difference]: Start difference. First operand 3133 states and 5453 transitions. Second operand has 4 states, 4 states have (on average 10.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:09,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:09,913 INFO L93 Difference]: Finished difference Result 5016 states and 8751 transitions. [2025-03-04 16:20:09,913 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5016 states and 8751 transitions. [2025-03-04 16:20:09,946 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2990 [2025-03-04 16:20:09,973 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5016 states to 5016 states and 8751 transitions. [2025-03-04 16:20:09,973 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3383 [2025-03-04 16:20:09,976 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3383 [2025-03-04 16:20:09,977 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5016 states and 8751 transitions. [2025-03-04 16:20:09,977 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:09,977 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5016 states and 8751 transitions. [2025-03-04 16:20:09,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5016 states and 8751 transitions. [2025-03-04 16:20:10,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5016 to 3684. [2025-03-04 16:20:10,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3684 states, 3684 states have (on average 1.752442996742671) internal successors, (6456), 3683 states have internal predecessors, (6456), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:10,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3684 states to 3684 states and 6456 transitions. [2025-03-04 16:20:10,054 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3684 states and 6456 transitions. [2025-03-04 16:20:10,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-04 16:20:10,057 INFO L432 stractBuchiCegarLoop]: Abstraction has 3684 states and 6456 transitions. [2025-03-04 16:20:10,057 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 16:20:10,057 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3684 states and 6456 transitions. [2025-03-04 16:20:10,073 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2284 [2025-03-04 16:20:10,073 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:10,073 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:10,074 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:10,077 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:10,077 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" [2025-03-04 16:20:10,077 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-03-04 16:20:10,077 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:10,077 INFO L85 PathProgramCache]: Analyzing trace with hash -1973214483, now seen corresponding path program 1 times [2025-03-04 16:20:10,078 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:10,078 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1664586065] [2025-03-04 16:20:10,078 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:10,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:10,084 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-03-04 16:20:10,089 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-04 16:20:10,093 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:10,093 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:10,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:10,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:10,145 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1664586065] [2025-03-04 16:20:10,146 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1664586065] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:10,146 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:10,146 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:10,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1418240793] [2025-03-04 16:20:10,146 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:10,146 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:10,146 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:10,147 INFO L85 PathProgramCache]: Analyzing trace with hash -949539702, now seen corresponding path program 1 times [2025-03-04 16:20:10,147 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:10,147 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860757068] [2025-03-04 16:20:10,147 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:10,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:10,151 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:10,155 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:10,155 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:10,155 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:10,155 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:10,156 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:10,158 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:10,158 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:10,158 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:10,168 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:10,656 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 16:20:10,657 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 16:20:10,657 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 16:20:10,657 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 16:20:10,657 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-03-04 16:20:10,657 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:10,657 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 16:20:10,657 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 16:20:10,657 INFO L132 ssoRankerPreferences]: Filename of dumped script: pipeline.cil-1.c_Iteration6_Loop [2025-03-04 16:20:10,657 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 16:20:10,657 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 16:20:10,659 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,661 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,665 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,668 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,669 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,673 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,676 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,680 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,683 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,689 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,693 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,698 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,703 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,707 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,711 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,714 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,717 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,721 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,723 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,725 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,729 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,731 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,733 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,734 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,736 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,737 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,738 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,742 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,746 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,748 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,758 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,760 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,761 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:10,995 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 16:20:10,995 INFO L365 LassoAnalysis]: Checking for nontermination... [2025-03-04 16:20:10,995 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:10,995 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:10,997 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:10,998 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2025-03-04 16:20:11,000 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:11,000 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:11,012 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:11,012 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_eval_#t~nondet7#1=0} Honda state: {ULTIMATE.start_eval_#t~nondet7#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:11,018 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2025-03-04 16:20:11,018 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:11,018 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:11,020 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:11,021 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2025-03-04 16:20:11,023 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:11,023 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:11,039 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2025-03-04 16:20:11,039 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:11,039 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:11,041 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:11,042 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2025-03-04 16:20:11,044 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-03-04 16:20:11,044 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:11,059 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2025-03-04 16:20:11,065 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2025-03-04 16:20:11,065 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 16:20:11,065 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 16:20:11,065 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 16:20:11,065 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 16:20:11,066 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-04 16:20:11,066 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:11,066 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 16:20:11,066 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 16:20:11,066 INFO L132 ssoRankerPreferences]: Filename of dumped script: pipeline.cil-1.c_Iteration6_Loop [2025-03-04 16:20:11,066 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 16:20:11,066 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 16:20:11,069 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,071 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,075 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,077 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,081 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,083 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,087 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,091 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,095 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,098 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,102 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,106 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,107 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,112 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,116 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,117 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,119 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,121 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,125 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,129 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,131 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,132 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,136 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,137 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,139 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,141 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,144 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,148 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,150 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,155 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,157 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,161 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,162 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:11,381 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 16:20:11,381 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-04 16:20:11,381 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:11,381 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:11,389 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:11,390 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2025-03-04 16:20:11,390 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:11,400 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:11,400 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:11,400 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:11,400 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:20:11,400 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:11,400 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 16:20:11,400 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:11,402 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:11,408 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2025-03-04 16:20:11,408 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:11,408 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:11,410 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:11,411 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2025-03-04 16:20:11,413 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:11,423 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:11,423 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:11,423 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:11,423 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:20:11,423 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:11,424 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 16:20:11,424 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:11,426 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-04 16:20:11,428 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2025-03-04 16:20:11,428 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2025-03-04 16:20:11,428 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:11,428 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:11,429 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:11,430 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2025-03-04 16:20:11,431 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-04 16:20:11,431 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2025-03-04 16:20:11,431 INFO L474 LassoAnalysis]: Proved termination. [2025-03-04 16:20:11,431 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(~main_pres_ev~0) = -1*~main_pres_ev~0 + 1 Supporting invariants [] [2025-03-04 16:20:11,436 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2025-03-04 16:20:11,437 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2025-03-04 16:20:11,449 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:11,461 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-03-04 16:20:11,480 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-04 16:20:11,480 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:11,480 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:11,481 INFO L256 TraceCheckSpWp]: Trace formula consists of 232 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-04 16:20:11,482 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:20:11,524 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:11,532 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:11,532 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:11,532 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:11,533 INFO L256 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-04 16:20:11,533 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:20:11,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:11,597 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2025-03-04 16:20:11,598 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 3684 states and 6456 transitions. cyclomatic complexity: 2778 Second operand has 5 states, 5 states have (on average 16.8) internal successors, (84), 5 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:11,684 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 3684 states and 6456 transitions. cyclomatic complexity: 2778. Second operand has 5 states, 5 states have (on average 16.8) internal successors, (84), 5 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 7220 states and 12660 transitions. Complement of second has 5 states. [2025-03-04 16:20:11,685 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-03-04 16:20:11,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 16.8) internal successors, (84), 5 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:11,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1400 transitions. [2025-03-04 16:20:11,687 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 1400 transitions. Stem has 40 letters. Loop has 44 letters. [2025-03-04 16:20:11,687 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:20:11,687 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 1400 transitions. Stem has 84 letters. Loop has 44 letters. [2025-03-04 16:20:11,687 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:20:11,687 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 1400 transitions. Stem has 40 letters. Loop has 88 letters. [2025-03-04 16:20:11,688 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:20:11,688 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7220 states and 12660 transitions. [2025-03-04 16:20:11,718 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 4568 [2025-03-04 16:20:11,751 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7220 states to 7220 states and 12660 transitions. [2025-03-04 16:20:11,752 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4780 [2025-03-04 16:20:11,756 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4832 [2025-03-04 16:20:11,756 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7220 states and 12660 transitions. [2025-03-04 16:20:11,757 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:11,757 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7220 states and 12660 transitions. [2025-03-04 16:20:11,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7220 states and 12660 transitions. [2025-03-04 16:20:11,871 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2025-03-04 16:20:11,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7220 to 6024. [2025-03-04 16:20:11,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6024 states, 6024 states have (on average 1.754980079681275) internal successors, (10572), 6023 states have internal predecessors, (10572), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:11,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6024 states to 6024 states and 10572 transitions. [2025-03-04 16:20:11,908 INFO L240 hiAutomatonCegarLoop]: Abstraction has 6024 states and 10572 transitions. [2025-03-04 16:20:11,908 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:11,909 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:11,909 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:11,909 INFO L87 Difference]: Start difference. First operand 6024 states and 10572 transitions. Second operand has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:12,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:12,063 INFO L93 Difference]: Finished difference Result 10082 states and 17344 transitions. [2025-03-04 16:20:12,063 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10082 states and 17344 transitions. [2025-03-04 16:20:12,103 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 5799 [2025-03-04 16:20:12,140 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10082 states to 10082 states and 17344 transitions. [2025-03-04 16:20:12,141 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6058 [2025-03-04 16:20:12,146 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6058 [2025-03-04 16:20:12,147 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10082 states and 17344 transitions. [2025-03-04 16:20:12,147 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:12,147 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10082 states and 17344 transitions. [2025-03-04 16:20:12,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10082 states and 17344 transitions. [2025-03-04 16:20:12,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10082 to 10032. [2025-03-04 16:20:12,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10032 states, 10032 states have (on average 1.7188995215311005) internal successors, (17244), 10031 states have internal predecessors, (17244), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:12,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10032 states to 10032 states and 17244 transitions. [2025-03-04 16:20:12,276 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10032 states and 17244 transitions. [2025-03-04 16:20:12,279 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:12,280 INFO L432 stractBuchiCegarLoop]: Abstraction has 10032 states and 17244 transitions. [2025-03-04 16:20:12,280 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 16:20:12,280 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10032 states and 17244 transitions. [2025-03-04 16:20:12,303 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 5769 [2025-03-04 16:20:12,304 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:12,304 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:12,305 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:12,305 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:12,305 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume true;" [2025-03-04 16:20:12,305 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume !(1 == ~main_pres_ev~0);" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" "assume true;" [2025-03-04 16:20:12,305 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:12,305 INFO L85 PathProgramCache]: Analyzing trace with hash -712966469, now seen corresponding path program 1 times [2025-03-04 16:20:12,305 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:12,306 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [911190007] [2025-03-04 16:20:12,306 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:12,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:12,309 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:12,312 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:12,312 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:12,312 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:12,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:12,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:12,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [911190007] [2025-03-04 16:20:12,342 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [911190007] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:12,343 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:12,343 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:12,343 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1390788080] [2025-03-04 16:20:12,343 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:12,343 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:12,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:12,343 INFO L85 PathProgramCache]: Analyzing trace with hash 1512973912, now seen corresponding path program 1 times [2025-03-04 16:20:12,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:12,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661690371] [2025-03-04 16:20:12,343 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:12,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:12,346 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:12,348 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:12,348 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:12,348 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:12,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:12,366 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:12,366 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1661690371] [2025-03-04 16:20:12,366 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1661690371] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:12,366 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:12,366 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:12,366 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [565971394] [2025-03-04 16:20:12,366 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:12,366 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:12,366 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:12,367 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:12,367 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:12,367 INFO L87 Difference]: Start difference. First operand 10032 states and 17244 transitions. cyclomatic complexity: 7222 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:12,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:12,648 INFO L93 Difference]: Finished difference Result 15331 states and 25903 transitions. [2025-03-04 16:20:12,648 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15331 states and 25903 transitions. [2025-03-04 16:20:12,699 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 8921 [2025-03-04 16:20:12,744 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15331 states to 15331 states and 25903 transitions. [2025-03-04 16:20:12,744 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9389 [2025-03-04 16:20:12,753 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9389 [2025-03-04 16:20:12,753 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15331 states and 25903 transitions. [2025-03-04 16:20:12,755 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:12,755 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15331 states and 25903 transitions. [2025-03-04 16:20:12,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15331 states and 25903 transitions. [2025-03-04 16:20:12,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15331 to 12848. [2025-03-04 16:20:12,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12848 states, 12848 states have (on average 1.6961394769613947) internal successors, (21792), 12847 states have internal predecessors, (21792), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:12,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12848 states to 12848 states and 21792 transitions. [2025-03-04 16:20:12,933 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12848 states and 21792 transitions. [2025-03-04 16:20:12,935 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:20:12,936 INFO L432 stractBuchiCegarLoop]: Abstraction has 12848 states and 21792 transitions. [2025-03-04 16:20:12,936 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 16:20:12,936 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12848 states and 21792 transitions. [2025-03-04 16:20:12,964 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 7359 [2025-03-04 16:20:12,964 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:12,964 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:12,965 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:12,965 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:12,965 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume true;" [2025-03-04 16:20:12,966 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume !(1 == ~main_pres_ev~0);" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" "assume true;" [2025-03-04 16:20:12,966 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:12,966 INFO L85 PathProgramCache]: Analyzing trace with hash -2066276166, now seen corresponding path program 1 times [2025-03-04 16:20:12,966 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:12,966 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139145200] [2025-03-04 16:20:12,966 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:12,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:12,969 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:12,972 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:12,972 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:12,972 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:13,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:13,006 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:13,006 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2139145200] [2025-03-04 16:20:13,006 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2139145200] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:13,006 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:13,006 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:13,006 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1404466597] [2025-03-04 16:20:13,006 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:13,006 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:13,006 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:13,006 INFO L85 PathProgramCache]: Analyzing trace with hash 1512973912, now seen corresponding path program 2 times [2025-03-04 16:20:13,006 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:13,007 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513413160] [2025-03-04 16:20:13,007 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:20:13,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:13,010 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:13,011 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:13,011 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:20:13,011 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:13,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:13,039 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:13,039 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513413160] [2025-03-04 16:20:13,039 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1513413160] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:13,039 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:13,039 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:13,039 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [158469712] [2025-03-04 16:20:13,039 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:13,039 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:13,039 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:13,039 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:13,039 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:13,040 INFO L87 Difference]: Start difference. First operand 12848 states and 21792 transitions. cyclomatic complexity: 8954 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:13,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:13,207 INFO L93 Difference]: Finished difference Result 13065 states and 21940 transitions. [2025-03-04 16:20:13,207 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13065 states and 21940 transitions. [2025-03-04 16:20:13,249 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 7558 [2025-03-04 16:20:13,282 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13065 states to 13065 states and 21940 transitions. [2025-03-04 16:20:13,283 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7920 [2025-03-04 16:20:13,289 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7920 [2025-03-04 16:20:13,289 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13065 states and 21940 transitions. [2025-03-04 16:20:13,290 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:13,290 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13065 states and 21940 transitions. [2025-03-04 16:20:13,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13065 states and 21940 transitions. [2025-03-04 16:20:13,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13065 to 11962. [2025-03-04 16:20:13,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11962 states, 11962 states have (on average 1.6833305467313158) internal successors, (20136), 11961 states have internal predecessors, (20136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:13,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11962 states to 11962 states and 20136 transitions. [2025-03-04 16:20:13,427 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11962 states and 20136 transitions. [2025-03-04 16:20:13,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-04 16:20:13,428 INFO L432 stractBuchiCegarLoop]: Abstraction has 11962 states and 20136 transitions. [2025-03-04 16:20:13,428 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-04 16:20:13,428 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11962 states and 20136 transitions. [2025-03-04 16:20:13,453 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 6852 [2025-03-04 16:20:13,453 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:13,453 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:13,454 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:13,454 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:13,454 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-03-04 16:20:13,455 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume 0 == ~N_generate_st~0;" "assume true;" [2025-03-04 16:20:13,455 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:13,455 INFO L85 PathProgramCache]: Analyzing trace with hash -712966438, now seen corresponding path program 1 times [2025-03-04 16:20:13,455 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:13,455 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287887584] [2025-03-04 16:20:13,455 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:13,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:13,458 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:13,461 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:13,461 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:13,461 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:13,461 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:13,463 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:13,465 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:13,466 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:13,466 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:13,471 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:13,471 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:13,471 INFO L85 PathProgramCache]: Analyzing trace with hash 672742392, now seen corresponding path program 1 times [2025-03-04 16:20:13,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:13,471 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [643299062] [2025-03-04 16:20:13,471 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:13,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:13,476 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:13,478 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:13,478 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:13,478 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:13,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:13,501 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:13,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [643299062] [2025-03-04 16:20:13,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [643299062] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:13,501 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:13,501 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:13,501 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1296319959] [2025-03-04 16:20:13,501 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:13,501 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:13,502 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:13,502 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:13,502 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:13,502 INFO L87 Difference]: Start difference. First operand 11962 states and 20136 transitions. cyclomatic complexity: 8184 Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:13,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:13,618 INFO L93 Difference]: Finished difference Result 16565 states and 27763 transitions. [2025-03-04 16:20:13,618 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16565 states and 27763 transitions. [2025-03-04 16:20:13,674 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 9392 [2025-03-04 16:20:13,721 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16565 states to 16565 states and 27763 transitions. [2025-03-04 16:20:13,722 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9989 [2025-03-04 16:20:13,730 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9989 [2025-03-04 16:20:13,730 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16565 states and 27763 transitions. [2025-03-04 16:20:13,731 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:13,731 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16565 states and 27763 transitions. [2025-03-04 16:20:13,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16565 states and 27763 transitions. [2025-03-04 16:20:13,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16565 to 16499. [2025-03-04 16:20:13,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16499 states, 16499 states have (on average 1.678707800472756) internal successors, (27697), 16498 states have internal predecessors, (27697), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:13,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16499 states to 16499 states and 27697 transitions. [2025-03-04 16:20:13,950 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16499 states and 27697 transitions. [2025-03-04 16:20:13,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:13,952 INFO L432 stractBuchiCegarLoop]: Abstraction has 16499 states and 27697 transitions. [2025-03-04 16:20:13,952 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-04 16:20:13,952 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16499 states and 27697 transitions. [2025-03-04 16:20:13,990 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 9356 [2025-03-04 16:20:13,991 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:13,991 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:13,993 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:13,993 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:13,994 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume 1 == ~N_generate_i~0;~N_generate_st~0 := 0;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-03-04 16:20:13,994 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume 0 == ~N_generate_st~0;" "assume true;" [2025-03-04 16:20:13,995 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:13,995 INFO L85 PathProgramCache]: Analyzing trace with hash -1063766375, now seen corresponding path program 1 times [2025-03-04 16:20:13,995 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:13,995 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361465624] [2025-03-04 16:20:13,995 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:13,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:13,999 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:14,001 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:14,001 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:14,001 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:14,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:14,037 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:14,037 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361465624] [2025-03-04 16:20:14,037 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [361465624] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:14,037 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:14,037 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:14,037 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1091395509] [2025-03-04 16:20:14,037 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:14,038 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:14,038 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:14,038 INFO L85 PathProgramCache]: Analyzing trace with hash -1520730431, now seen corresponding path program 1 times [2025-03-04 16:20:14,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:14,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954170761] [2025-03-04 16:20:14,038 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:14,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:14,042 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 47 statements into 1 equivalence classes. [2025-03-04 16:20:14,043 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 47 of 47 statements. [2025-03-04 16:20:14,043 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:14,043 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:14,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:14,061 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:14,062 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1954170761] [2025-03-04 16:20:14,062 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1954170761] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:14,062 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:14,062 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:14,062 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737818250] [2025-03-04 16:20:14,062 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:14,062 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:14,062 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:14,062 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:14,062 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:14,062 INFO L87 Difference]: Start difference. First operand 16499 states and 27697 transitions. cyclomatic complexity: 11212 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:14,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:14,141 INFO L93 Difference]: Finished difference Result 18549 states and 30570 transitions. [2025-03-04 16:20:14,141 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18549 states and 30570 transitions. [2025-03-04 16:20:14,199 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 10836 [2025-03-04 16:20:14,323 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18549 states to 18549 states and 30570 transitions. [2025-03-04 16:20:14,323 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11003 [2025-03-04 16:20:14,329 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11003 [2025-03-04 16:20:14,329 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18549 states and 30570 transitions. [2025-03-04 16:20:14,329 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:14,329 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18549 states and 30570 transitions. [2025-03-04 16:20:14,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18549 states and 30570 transitions. [2025-03-04 16:20:14,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18549 to 18549. [2025-03-04 16:20:14,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18549 states, 18549 states have (on average 1.648067281255054) internal successors, (30570), 18548 states have internal predecessors, (30570), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:14,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18549 states to 18549 states and 30570 transitions. [2025-03-04 16:20:14,474 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18549 states and 30570 transitions. [2025-03-04 16:20:14,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:20:14,475 INFO L432 stractBuchiCegarLoop]: Abstraction has 18549 states and 30570 transitions. [2025-03-04 16:20:14,475 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-04 16:20:14,475 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18549 states and 30570 transitions. [2025-03-04 16:20:14,511 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 10836 [2025-03-04 16:20:14,511 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:14,511 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:14,512 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:14,512 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:14,512 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-03-04 16:20:14,512 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume 0 == ~S1_addsub_st~0;" "assume true;" [2025-03-04 16:20:14,512 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:14,512 INFO L85 PathProgramCache]: Analyzing trace with hash -712966438, now seen corresponding path program 2 times [2025-03-04 16:20:14,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:14,512 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [205794394] [2025-03-04 16:20:14,513 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:20:14,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:14,516 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:14,518 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:14,518 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:20:14,518 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:14,518 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:14,519 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:14,522 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:14,522 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:14,522 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:14,525 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:14,525 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:14,525 INFO L85 PathProgramCache]: Analyzing trace with hash -619825120, now seen corresponding path program 1 times [2025-03-04 16:20:14,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:14,525 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [673625283] [2025-03-04 16:20:14,526 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:14,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:14,530 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 45 statements into 1 equivalence classes. [2025-03-04 16:20:14,531 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 45 of 45 statements. [2025-03-04 16:20:14,531 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:14,531 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:14,545 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:14,545 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:14,545 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [673625283] [2025-03-04 16:20:14,545 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [673625283] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:14,545 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:14,545 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:14,545 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [923547826] [2025-03-04 16:20:14,545 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:14,546 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:14,546 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:14,546 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:14,546 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:14,546 INFO L87 Difference]: Start difference. First operand 18549 states and 30570 transitions. cyclomatic complexity: 12041 Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:14,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:14,636 INFO L93 Difference]: Finished difference Result 25209 states and 41413 transitions. [2025-03-04 16:20:14,636 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25209 states and 41413 transitions. [2025-03-04 16:20:14,714 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 14688 [2025-03-04 16:20:14,769 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25209 states to 25209 states and 41413 transitions. [2025-03-04 16:20:14,769 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14958 [2025-03-04 16:20:14,781 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14958 [2025-03-04 16:20:14,781 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25209 states and 41413 transitions. [2025-03-04 16:20:14,781 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:14,781 INFO L218 hiAutomatonCegarLoop]: Abstraction has 25209 states and 41413 transitions. [2025-03-04 16:20:14,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25209 states and 41413 transitions. [2025-03-04 16:20:15,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25209 to 25086. [2025-03-04 16:20:15,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25086 states, 25086 states have (on average 1.6459379733716017) internal successors, (41290), 25085 states have internal predecessors, (41290), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:15,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25086 states to 25086 states and 41290 transitions. [2025-03-04 16:20:15,212 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25086 states and 41290 transitions. [2025-03-04 16:20:15,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:15,213 INFO L432 stractBuchiCegarLoop]: Abstraction has 25086 states and 41290 transitions. [2025-03-04 16:20:15,213 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-04 16:20:15,213 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25086 states and 41290 transitions. [2025-03-04 16:20:15,346 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 14616 [2025-03-04 16:20:15,346 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:15,346 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:15,346 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:15,346 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:15,347 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume 1 == ~S1_addsub_i~0;~S1_addsub_st~0 := 0;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-03-04 16:20:15,347 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume 0 == ~S1_addsub_st~0;" "assume true;" [2025-03-04 16:20:15,347 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:15,347 INFO L85 PathProgramCache]: Analyzing trace with hash -724282565, now seen corresponding path program 1 times [2025-03-04 16:20:15,347 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:15,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [49174701] [2025-03-04 16:20:15,347 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:15,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:15,351 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:15,353 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:15,353 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:15,353 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:15,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:15,377 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:15,377 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [49174701] [2025-03-04 16:20:15,377 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [49174701] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:15,378 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:15,378 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:15,378 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1786056344] [2025-03-04 16:20:15,378 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:15,378 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:15,378 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:15,378 INFO L85 PathProgramCache]: Analyzing trace with hash 510818328, now seen corresponding path program 1 times [2025-03-04 16:20:15,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:15,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [932160180] [2025-03-04 16:20:15,379 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:15,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:15,382 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-03-04 16:20:15,383 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-03-04 16:20:15,383 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:15,383 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:15,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:15,394 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:15,394 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [932160180] [2025-03-04 16:20:15,394 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [932160180] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:15,394 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:15,394 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:15,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [502678312] [2025-03-04 16:20:15,394 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:15,394 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:15,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:15,395 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:15,395 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:15,395 INFO L87 Difference]: Start difference. First operand 25086 states and 41290 transitions. cyclomatic complexity: 16226 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:15,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:15,480 INFO L93 Difference]: Finished difference Result 20947 states and 33958 transitions. [2025-03-04 16:20:15,480 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20947 states and 33958 transitions. [2025-03-04 16:20:15,541 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 12249 [2025-03-04 16:20:15,588 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20947 states to 20947 states and 33958 transitions. [2025-03-04 16:20:15,588 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12429 [2025-03-04 16:20:15,597 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12429 [2025-03-04 16:20:15,597 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20947 states and 33958 transitions. [2025-03-04 16:20:15,598 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:15,598 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20947 states and 33958 transitions. [2025-03-04 16:20:15,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20947 states and 33958 transitions. [2025-03-04 16:20:15,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20947 to 20947. [2025-03-04 16:20:15,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20947 states, 20947 states have (on average 1.6211390652599418) internal successors, (33958), 20946 states have internal predecessors, (33958), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:15,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20947 states to 20947 states and 33958 transitions. [2025-03-04 16:20:15,909 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20947 states and 33958 transitions. [2025-03-04 16:20:15,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:20:15,910 INFO L432 stractBuchiCegarLoop]: Abstraction has 20947 states and 33958 transitions. [2025-03-04 16:20:15,910 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-04 16:20:15,910 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20947 states and 33958 transitions. [2025-03-04 16:20:15,965 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 12249 [2025-03-04 16:20:15,966 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:15,966 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:15,966 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:15,966 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:15,967 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-03-04 16:20:15,967 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume 0 == ~S2_presdbl_st~0;" "assume true;" [2025-03-04 16:20:15,967 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:15,967 INFO L85 PathProgramCache]: Analyzing trace with hash -712966438, now seen corresponding path program 3 times [2025-03-04 16:20:15,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:15,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [921657317] [2025-03-04 16:20:15,967 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:20:15,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:15,971 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:15,974 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:15,974 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:20:15,974 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:15,974 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:15,976 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:15,980 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:15,980 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:15,980 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:15,985 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:15,985 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:15,986 INFO L85 PathProgramCache]: Analyzing trace with hash -2034712390, now seen corresponding path program 1 times [2025-03-04 16:20:15,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:15,986 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017159927] [2025-03-04 16:20:15,986 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:15,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:15,990 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 46 statements into 1 equivalence classes. [2025-03-04 16:20:15,996 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 46 of 46 statements. [2025-03-04 16:20:15,996 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:15,996 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:16,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:16,010 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:16,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2017159927] [2025-03-04 16:20:16,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2017159927] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:16,010 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:16,010 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:16,010 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [115203024] [2025-03-04 16:20:16,010 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:16,010 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:16,010 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:16,011 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:16,011 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:16,011 INFO L87 Difference]: Start difference. First operand 20947 states and 33958 transitions. cyclomatic complexity: 13031 Second operand has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:16,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:16,127 INFO L93 Difference]: Finished difference Result 28633 states and 46180 transitions. [2025-03-04 16:20:16,127 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28633 states and 46180 transitions. [2025-03-04 16:20:16,245 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 16718 [2025-03-04 16:20:16,322 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28633 states to 28633 states and 46180 transitions. [2025-03-04 16:20:16,322 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16999 [2025-03-04 16:20:16,336 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16999 [2025-03-04 16:20:16,337 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28633 states and 46180 transitions. [2025-03-04 16:20:16,337 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:16,337 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28633 states and 46180 transitions. [2025-03-04 16:20:16,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28633 states and 46180 transitions. [2025-03-04 16:20:16,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28633 to 28428. [2025-03-04 16:20:16,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28428 states, 28428 states have (on average 1.617243562684677) internal successors, (45975), 28427 states have internal predecessors, (45975), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:16,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28428 states to 28428 states and 45975 transitions. [2025-03-04 16:20:16,696 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28428 states and 45975 transitions. [2025-03-04 16:20:16,696 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:16,696 INFO L432 stractBuchiCegarLoop]: Abstraction has 28428 states and 45975 transitions. [2025-03-04 16:20:16,696 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-03-04 16:20:16,696 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28428 states and 45975 transitions. [2025-03-04 16:20:16,775 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 16598 [2025-03-04 16:20:16,775 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:16,775 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:16,776 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:16,776 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:16,776 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume 1 == ~S2_presdbl_i~0;~S2_presdbl_st~0 := 0;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-03-04 16:20:16,776 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume 0 == ~S2_presdbl_st~0;" "assume true;" [2025-03-04 16:20:16,777 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:16,777 INFO L85 PathProgramCache]: Analyzing trace with hash -1406068135, now seen corresponding path program 1 times [2025-03-04 16:20:16,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:16,777 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [578489833] [2025-03-04 16:20:16,777 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:16,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:16,781 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:16,784 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:16,784 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:16,784 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:16,910 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:16,911 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:16,911 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [578489833] [2025-03-04 16:20:16,911 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [578489833] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:16,911 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:16,911 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:16,911 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2079402560] [2025-03-04 16:20:16,911 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:16,911 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:16,912 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:16,912 INFO L85 PathProgramCache]: Analyzing trace with hash -1133152957, now seen corresponding path program 1 times [2025-03-04 16:20:16,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:16,912 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2117365451] [2025-03-04 16:20:16,912 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:16,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:16,915 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-04 16:20:16,916 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-04 16:20:16,916 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:16,916 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:16,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:16,926 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:16,926 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2117365451] [2025-03-04 16:20:16,926 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2117365451] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:16,926 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:16,926 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:16,927 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [372160990] [2025-03-04 16:20:16,927 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:16,927 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:16,927 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:16,927 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:16,927 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:16,927 INFO L87 Difference]: Start difference. First operand 28428 states and 45975 transitions. cyclomatic complexity: 17569 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:17,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:17,012 INFO L93 Difference]: Finished difference Result 24444 states and 38985 transitions. [2025-03-04 16:20:17,013 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 24444 states and 38985 transitions. [2025-03-04 16:20:17,081 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 14322 [2025-03-04 16:20:17,132 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 24444 states to 24444 states and 38985 transitions. [2025-03-04 16:20:17,132 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14514 [2025-03-04 16:20:17,142 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14514 [2025-03-04 16:20:17,143 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24444 states and 38985 transitions. [2025-03-04 16:20:17,143 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:17,143 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24444 states and 38985 transitions. [2025-03-04 16:20:17,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24444 states and 38985 transitions. [2025-03-04 16:20:17,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24444 to 24444. [2025-03-04 16:20:17,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24444 states, 24444 states have (on average 1.594869906725577) internal successors, (38985), 24443 states have internal predecessors, (38985), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:17,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24444 states to 24444 states and 38985 transitions. [2025-03-04 16:20:17,365 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24444 states and 38985 transitions. [2025-03-04 16:20:17,365 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:20:17,366 INFO L432 stractBuchiCegarLoop]: Abstraction has 24444 states and 38985 transitions. [2025-03-04 16:20:17,366 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-03-04 16:20:17,366 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24444 states and 38985 transitions. [2025-03-04 16:20:17,416 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 14322 [2025-03-04 16:20:17,417 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:17,417 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:17,417 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:17,417 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:17,417 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-03-04 16:20:17,417 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume 0 == ~S3_zero_st~0;" "assume true;" [2025-03-04 16:20:17,418 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:17,418 INFO L85 PathProgramCache]: Analyzing trace with hash -712966438, now seen corresponding path program 4 times [2025-03-04 16:20:17,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:17,418 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015784750] [2025-03-04 16:20:17,418 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:20:17,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:17,423 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 41 statements into 2 equivalence classes. [2025-03-04 16:20:17,426 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:17,426 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:20:17,426 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:17,426 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:17,428 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:17,431 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:17,431 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:17,431 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:17,435 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:17,436 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:17,436 INFO L85 PathProgramCache]: Analyzing trace with hash 1348422434, now seen corresponding path program 1 times [2025-03-04 16:20:17,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:17,436 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [15637283] [2025-03-04 16:20:17,436 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:17,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:17,440 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 47 statements into 1 equivalence classes. [2025-03-04 16:20:17,441 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 47 of 47 statements. [2025-03-04 16:20:17,441 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:17,441 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:17,452 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:17,452 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:17,452 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [15637283] [2025-03-04 16:20:17,452 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [15637283] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:17,452 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:17,452 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:17,452 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [687408894] [2025-03-04 16:20:17,452 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:17,453 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:17,453 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:17,453 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:17,453 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:17,453 INFO L87 Difference]: Start difference. First operand 24444 states and 38985 transitions. cyclomatic complexity: 14561 Second operand has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:17,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:17,566 INFO L93 Difference]: Finished difference Result 34172 states and 53962 transitions. [2025-03-04 16:20:17,566 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34172 states and 53962 transitions. [2025-03-04 16:20:17,670 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 20017 [2025-03-04 16:20:17,746 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34172 states to 34172 states and 53962 transitions. [2025-03-04 16:20:17,747 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20309 [2025-03-04 16:20:17,761 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20309 [2025-03-04 16:20:17,761 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34172 states and 53962 transitions. [2025-03-04 16:20:17,762 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:17,762 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34172 states and 53962 transitions. [2025-03-04 16:20:17,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34172 states and 53962 transitions. [2025-03-04 16:20:18,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34172 to 33844. [2025-03-04 16:20:18,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33844 states, 33844 states have (on average 1.5847417562935824) internal successors, (53634), 33843 states have internal predecessors, (53634), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:18,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33844 states to 33844 states and 53634 transitions. [2025-03-04 16:20:18,409 INFO L240 hiAutomatonCegarLoop]: Abstraction has 33844 states and 53634 transitions. [2025-03-04 16:20:18,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:18,410 INFO L432 stractBuchiCegarLoop]: Abstraction has 33844 states and 53634 transitions. [2025-03-04 16:20:18,410 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-03-04 16:20:18,410 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33844 states and 53634 transitions. [2025-03-04 16:20:18,468 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 19825 [2025-03-04 16:20:18,468 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:18,468 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:18,469 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:18,469 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:18,469 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume 1 == ~S3_zero_i~0;~S3_zero_st~0 := 0;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-03-04 16:20:18,469 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume 0 == ~S3_zero_st~0;" "assume true;" [2025-03-04 16:20:18,469 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:18,469 INFO L85 PathProgramCache]: Analyzing trace with hash -458229893, now seen corresponding path program 1 times [2025-03-04 16:20:18,469 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:18,469 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1502214154] [2025-03-04 16:20:18,469 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:18,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:18,473 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:18,475 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:18,475 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:18,475 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:18,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:18,495 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:18,495 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1502214154] [2025-03-04 16:20:18,495 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1502214154] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:18,495 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:18,495 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:18,495 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1423392278] [2025-03-04 16:20:18,495 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:18,495 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:18,496 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:18,496 INFO L85 PathProgramCache]: Analyzing trace with hash -768006215, now seen corresponding path program 1 times [2025-03-04 16:20:18,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:18,496 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744987272] [2025-03-04 16:20:18,496 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:18,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:18,499 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 50 statements into 1 equivalence classes. [2025-03-04 16:20:18,499 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 50 of 50 statements. [2025-03-04 16:20:18,500 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:18,500 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:18,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:18,508 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:18,508 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744987272] [2025-03-04 16:20:18,508 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744987272] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:18,508 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:18,508 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:18,508 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1636055758] [2025-03-04 16:20:18,509 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:18,509 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:18,509 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:18,509 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:18,509 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:18,509 INFO L87 Difference]: Start difference. First operand 33844 states and 53634 transitions. cyclomatic complexity: 19812 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:18,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:18,614 INFO L93 Difference]: Finished difference Result 30015 states and 46986 transitions. [2025-03-04 16:20:18,614 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30015 states and 46986 transitions. [2025-03-04 16:20:18,709 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 17640 [2025-03-04 16:20:18,771 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30015 states to 30015 states and 46986 transitions. [2025-03-04 16:20:18,771 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17843 [2025-03-04 16:20:18,784 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17843 [2025-03-04 16:20:18,784 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30015 states and 46986 transitions. [2025-03-04 16:20:18,785 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:18,785 INFO L218 hiAutomatonCegarLoop]: Abstraction has 30015 states and 46986 transitions. [2025-03-04 16:20:18,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30015 states and 46986 transitions. [2025-03-04 16:20:19,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30015 to 30015. [2025-03-04 16:20:19,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30015 states, 30015 states have (on average 1.565417291354323) internal successors, (46986), 30014 states have internal predecessors, (46986), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:19,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30015 states to 30015 states and 46986 transitions. [2025-03-04 16:20:19,211 INFO L240 hiAutomatonCegarLoop]: Abstraction has 30015 states and 46986 transitions. [2025-03-04 16:20:19,211 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:20:19,212 INFO L432 stractBuchiCegarLoop]: Abstraction has 30015 states and 46986 transitions. [2025-03-04 16:20:19,212 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-03-04 16:20:19,212 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 30015 states and 46986 transitions. [2025-03-04 16:20:19,275 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 17640 [2025-03-04 16:20:19,276 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:19,276 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:19,276 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:19,276 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:19,277 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-03-04 16:20:19,277 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume 0 == ~D_print_st~0;" "assume true;" [2025-03-04 16:20:19,277 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:19,277 INFO L85 PathProgramCache]: Analyzing trace with hash -712966438, now seen corresponding path program 5 times [2025-03-04 16:20:19,277 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:19,277 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1630362816] [2025-03-04 16:20:19,277 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:20:19,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:19,281 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:19,284 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:19,284 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:20:19,284 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:19,284 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:19,289 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:19,291 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:19,291 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:19,291 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:19,295 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:19,295 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:19,295 INFO L85 PathProgramCache]: Analyzing trace with hash -1148580484, now seen corresponding path program 1 times [2025-03-04 16:20:19,295 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:19,295 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471868977] [2025-03-04 16:20:19,295 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:19,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:19,298 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-03-04 16:20:19,299 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-03-04 16:20:19,299 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:19,299 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:19,313 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:19,313 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:19,313 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1471868977] [2025-03-04 16:20:19,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1471868977] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:19,313 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:19,314 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:19,314 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1763252088] [2025-03-04 16:20:19,314 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:19,314 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:19,314 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:19,314 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:19,314 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:19,314 INFO L87 Difference]: Start difference. First operand 30015 states and 46986 transitions. cyclomatic complexity: 16991 Second operand has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:19,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:19,433 INFO L93 Difference]: Finished difference Result 42077 states and 64602 transitions. [2025-03-04 16:20:19,433 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 42077 states and 64602 transitions. [2025-03-04 16:20:19,697 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 23943 [2025-03-04 16:20:19,778 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 42077 states to 42077 states and 64602 transitions. [2025-03-04 16:20:19,778 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25056 [2025-03-04 16:20:19,793 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25056 [2025-03-04 16:20:19,793 INFO L73 IsDeterministic]: Start isDeterministic. Operand 42077 states and 64602 transitions. [2025-03-04 16:20:19,795 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:19,795 INFO L218 hiAutomatonCegarLoop]: Abstraction has 42077 states and 64602 transitions. [2025-03-04 16:20:19,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42077 states and 64602 transitions. [2025-03-04 16:20:20,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42077 to 41585. [2025-03-04 16:20:20,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41585 states, 41585 states have (on average 1.5416616568474208) internal successors, (64110), 41584 states have internal predecessors, (64110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:20,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41585 states to 41585 states and 64110 transitions. [2025-03-04 16:20:20,277 INFO L240 hiAutomatonCegarLoop]: Abstraction has 41585 states and 64110 transitions. [2025-03-04 16:20:20,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:20,278 INFO L432 stractBuchiCegarLoop]: Abstraction has 41585 states and 64110 transitions. [2025-03-04 16:20:20,278 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-03-04 16:20:20,278 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 41585 states and 64110 transitions. [2025-03-04 16:20:20,362 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 23655 [2025-03-04 16:20:20,362 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:20,362 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:20,363 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:20,363 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:20,363 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume 1 == ~D_print_i~0;~D_print_st~0 := 0;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-03-04 16:20:20,363 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume 0 == ~D_print_st~0;" "assume true;" [2025-03-04 16:20:20,363 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:20,364 INFO L85 PathProgramCache]: Analyzing trace with hash -1674580455, now seen corresponding path program 1 times [2025-03-04 16:20:20,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:20,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [523322890] [2025-03-04 16:20:20,364 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:20,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:20,367 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-04 16:20:20,369 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-04 16:20:20,369 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:20,369 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:20,397 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:20,397 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:20,397 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [523322890] [2025-03-04 16:20:20,397 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [523322890] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:20,397 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:20,397 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:20,397 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1940899345] [2025-03-04 16:20:20,397 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:20,398 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:20,398 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:20,398 INFO L85 PathProgramCache]: Analyzing trace with hash 716843652, now seen corresponding path program 1 times [2025-03-04 16:20:20,398 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:20,398 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [428769705] [2025-03-04 16:20:20,398 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:20,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:20,402 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 51 statements into 1 equivalence classes. [2025-03-04 16:20:20,403 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 51 of 51 statements. [2025-03-04 16:20:20,403 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:20,403 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:20,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:20,413 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:20,413 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [428769705] [2025-03-04 16:20:20,413 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [428769705] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:20,413 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:20,413 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:20,413 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [778586220] [2025-03-04 16:20:20,413 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:20,413 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:20,414 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:20,414 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:20,414 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:20,414 INFO L87 Difference]: Start difference. First operand 41585 states and 64110 transitions. cyclomatic complexity: 22547 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:20,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:20,558 INFO L93 Difference]: Finished difference Result 37911 states and 57804 transitions. [2025-03-04 16:20:20,558 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37911 states and 57804 transitions. [2025-03-04 16:20:20,697 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 21561 [2025-03-04 16:20:20,784 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37911 states to 37911 states and 57804 transitions. [2025-03-04 16:20:20,784 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22584 [2025-03-04 16:20:20,799 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22584 [2025-03-04 16:20:20,800 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37911 states and 57804 transitions. [2025-03-04 16:20:20,802 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:20,802 INFO L218 hiAutomatonCegarLoop]: Abstraction has 37911 states and 57804 transitions. [2025-03-04 16:20:20,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37911 states and 57804 transitions. [2025-03-04 16:20:21,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37911 to 37911. [2025-03-04 16:20:21,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37911 states, 37911 states have (on average 1.5247289704835008) internal successors, (57804), 37910 states have internal predecessors, (57804), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:21,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37911 states to 37911 states and 57804 transitions. [2025-03-04 16:20:21,407 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37911 states and 57804 transitions. [2025-03-04 16:20:21,407 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:20:21,407 INFO L432 stractBuchiCegarLoop]: Abstraction has 37911 states and 57804 transitions. [2025-03-04 16:20:21,407 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-03-04 16:20:21,407 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37911 states and 57804 transitions. [2025-03-04 16:20:21,487 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 21561 [2025-03-04 16:20:21,487 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:21,487 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:21,488 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:21,488 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:21,488 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-03-04 16:20:21,488 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume 0 == ~N_generate_st~0;" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume 0 == ~N_generate_st~0;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" [2025-03-04 16:20:21,489 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:21,489 INFO L85 PathProgramCache]: Analyzing trace with hash -627122419, now seen corresponding path program 1 times [2025-03-04 16:20:21,489 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:21,489 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598324337] [2025-03-04 16:20:21,489 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:21,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:21,492 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 42 statements into 1 equivalence classes. [2025-03-04 16:20:21,494 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-03-04 16:20:21,494 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:21,494 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:21,494 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:21,496 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 42 statements into 1 equivalence classes. [2025-03-04 16:20:21,497 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-03-04 16:20:21,497 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:21,497 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:21,500 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:21,501 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:21,501 INFO L85 PathProgramCache]: Analyzing trace with hash -244030365, now seen corresponding path program 1 times [2025-03-04 16:20:21,501 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:21,501 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008172580] [2025-03-04 16:20:21,501 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:21,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:21,504 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 54 statements into 1 equivalence classes. [2025-03-04 16:20:21,504 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 54 of 54 statements. [2025-03-04 16:20:21,505 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:21,505 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:21,513 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:21,514 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:21,514 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008172580] [2025-03-04 16:20:21,514 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1008172580] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:21,514 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:21,514 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:21,514 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [163695666] [2025-03-04 16:20:21,514 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:21,514 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:21,514 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:21,515 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:21,515 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:21,515 INFO L87 Difference]: Start difference. First operand 37911 states and 57804 transitions. cyclomatic complexity: 19913 Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:21,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:21,778 INFO L93 Difference]: Finished difference Result 37911 states and 57602 transitions. [2025-03-04 16:20:21,778 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37911 states and 57602 transitions. [2025-03-04 16:20:21,873 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 21561 [2025-03-04 16:20:21,927 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37911 states to 37911 states and 57602 transitions. [2025-03-04 16:20:21,927 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22584 [2025-03-04 16:20:21,936 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22584 [2025-03-04 16:20:21,936 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37911 states and 57602 transitions. [2025-03-04 16:20:21,936 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:21,936 INFO L218 hiAutomatonCegarLoop]: Abstraction has 37911 states and 57602 transitions. [2025-03-04 16:20:21,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37911 states and 57602 transitions. [2025-03-04 16:20:22,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37911 to 37911. [2025-03-04 16:20:22,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37911 states, 37911 states have (on average 1.5194007016433224) internal successors, (57602), 37910 states have internal predecessors, (57602), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:22,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37911 states to 37911 states and 57602 transitions. [2025-03-04 16:20:22,371 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37911 states and 57602 transitions. [2025-03-04 16:20:22,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:22,371 INFO L432 stractBuchiCegarLoop]: Abstraction has 37911 states and 57602 transitions. [2025-03-04 16:20:22,371 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-03-04 16:20:22,371 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37911 states and 57602 transitions. [2025-03-04 16:20:22,475 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 21561 [2025-03-04 16:20:22,475 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:22,475 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:22,476 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:22,476 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:22,476 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-03-04 16:20:22,477 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume 0 == ~N_generate_st~0;" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume 0 == ~N_generate_st~0;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" [2025-03-04 16:20:22,477 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:22,477 INFO L85 PathProgramCache]: Analyzing trace with hash -627122419, now seen corresponding path program 2 times [2025-03-04 16:20:22,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:22,477 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [358392385] [2025-03-04 16:20:22,477 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:20:22,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:22,481 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 42 statements into 1 equivalence classes. [2025-03-04 16:20:22,484 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-03-04 16:20:22,484 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:20:22,484 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:22,484 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:22,486 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 42 statements into 1 equivalence classes. [2025-03-04 16:20:22,489 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-03-04 16:20:22,489 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:22,489 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:22,494 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:22,494 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:22,494 INFO L85 PathProgramCache]: Analyzing trace with hash 10706180, now seen corresponding path program 1 times [2025-03-04 16:20:22,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:22,495 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [522834366] [2025-03-04 16:20:22,495 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:22,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:22,498 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 54 statements into 1 equivalence classes. [2025-03-04 16:20:22,500 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 54 of 54 statements. [2025-03-04 16:20:22,500 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:22,500 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:22,511 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:22,511 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:22,511 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [522834366] [2025-03-04 16:20:22,511 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [522834366] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:22,511 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:22,511 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:22,512 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1703464207] [2025-03-04 16:20:22,512 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:22,512 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:22,512 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:22,512 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:22,512 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:22,512 INFO L87 Difference]: Start difference. First operand 37911 states and 57602 transitions. cyclomatic complexity: 19711 Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:22,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:22,638 INFO L93 Difference]: Finished difference Result 37896 states and 56102 transitions. [2025-03-04 16:20:22,638 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37896 states and 56102 transitions. [2025-03-04 16:20:22,763 INFO L131 ngComponentsAnalysis]: Automaton has 156 accepting balls. 20997 [2025-03-04 16:20:22,842 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37896 states to 37896 states and 56102 transitions. [2025-03-04 16:20:22,842 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22575 [2025-03-04 16:20:22,854 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22575 [2025-03-04 16:20:22,854 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37896 states and 56102 transitions. [2025-03-04 16:20:22,855 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:22,855 INFO L218 hiAutomatonCegarLoop]: Abstraction has 37896 states and 56102 transitions. [2025-03-04 16:20:22,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37896 states and 56102 transitions. [2025-03-04 16:20:23,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37896 to 34561. [2025-03-04 16:20:23,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34561 states, 34561 states have (on average 1.486415323630682) internal successors, (51372), 34560 states have internal predecessors, (51372), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:23,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34561 states to 34561 states and 51372 transitions. [2025-03-04 16:20:23,313 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34561 states and 51372 transitions. [2025-03-04 16:20:23,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:23,313 INFO L432 stractBuchiCegarLoop]: Abstraction has 34561 states and 51372 transitions. [2025-03-04 16:20:23,313 INFO L338 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2025-03-04 16:20:23,313 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34561 states and 51372 transitions. [2025-03-04 16:20:23,380 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 19557 [2025-03-04 16:20:23,380 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:23,380 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:23,381 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:23,381 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:23,381 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-03-04 16:20:23,381 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume 0 == ~S1_addsub_st~0;" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume 0 == ~S1_addsub_st~0;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" [2025-03-04 16:20:23,381 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:23,381 INFO L85 PathProgramCache]: Analyzing trace with hash -627122419, now seen corresponding path program 3 times [2025-03-04 16:20:23,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:23,381 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1815515723] [2025-03-04 16:20:23,381 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:20:23,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:23,385 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 42 statements into 1 equivalence classes. [2025-03-04 16:20:23,386 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-03-04 16:20:23,387 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:20:23,387 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:23,387 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:23,388 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 42 statements into 1 equivalence classes. [2025-03-04 16:20:23,389 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-03-04 16:20:23,389 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:23,389 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:23,394 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:23,395 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:23,395 INFO L85 PathProgramCache]: Analyzing trace with hash -287373672, now seen corresponding path program 1 times [2025-03-04 16:20:23,395 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:23,395 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [80668888] [2025-03-04 16:20:23,395 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:23,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:23,400 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-03-04 16:20:23,401 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-03-04 16:20:23,401 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:23,401 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:23,415 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:23,415 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:23,415 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [80668888] [2025-03-04 16:20:23,415 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [80668888] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:23,415 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:23,415 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:23,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [6868900] [2025-03-04 16:20:23,415 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:23,416 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:23,416 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:23,416 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:23,416 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:23,416 INFO L87 Difference]: Start difference. First operand 34561 states and 51372 transitions. cyclomatic complexity: 16831 Second operand has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:23,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:23,546 INFO L93 Difference]: Finished difference Result 22250 states and 32307 transitions. [2025-03-04 16:20:23,546 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22250 states and 32307 transitions. [2025-03-04 16:20:23,605 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 12261 [2025-03-04 16:20:23,647 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22250 states to 22250 states and 32307 transitions. [2025-03-04 16:20:23,647 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13270 [2025-03-04 16:20:23,656 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13270 [2025-03-04 16:20:23,656 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22250 states and 32307 transitions. [2025-03-04 16:20:23,657 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:23,657 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22250 states and 32307 transitions. [2025-03-04 16:20:23,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22250 states and 32307 transitions. [2025-03-04 16:20:23,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22250 to 21925. [2025-03-04 16:20:24,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21925 states, 21925 states have (on average 1.4509464082098062) internal successors, (31812), 21924 states have internal predecessors, (31812), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:24,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21925 states to 21925 states and 31812 transitions. [2025-03-04 16:20:24,025 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21925 states and 31812 transitions. [2025-03-04 16:20:24,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:24,025 INFO L432 stractBuchiCegarLoop]: Abstraction has 21925 states and 31812 transitions. [2025-03-04 16:20:24,025 INFO L338 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2025-03-04 16:20:24,025 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21925 states and 31812 transitions. [2025-03-04 16:20:24,064 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 12261 [2025-03-04 16:20:24,064 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:24,064 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:24,065 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:24,065 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:24,065 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-03-04 16:20:24,065 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume 0 == ~N_generate_st~0;" "assume 0 == ~N_generate_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume 0 != eval_~tmp~0#1;~N_generate_st~0 := 1;assume { :begin_inline_N_generate } true;havoc N_generate_~a~0#1, N_generate_~b~0#1;havoc N_generate_~a~0#1;havoc N_generate_~b~0#1;~main_in1_val_t~0 := N_generate_~a~0#1;~main_in1_req_up~0 := 1;~main_in2_val_t~0 := N_generate_~b~0#1;~main_in2_req_up~0 := 1;" "havoc N_generate_~a~0#1, N_generate_~b~0#1;assume { :end_inline_N_generate } true;" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume 0 == ~N_generate_st~0;" "assume true;" [2025-03-04 16:20:24,065 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:24,066 INFO L85 PathProgramCache]: Analyzing trace with hash -2062638999, now seen corresponding path program 1 times [2025-03-04 16:20:24,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:24,066 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901370685] [2025-03-04 16:20:24,066 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:24,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:24,069 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-04 16:20:24,070 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-04 16:20:24,071 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:24,071 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:24,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:24,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:24,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901370685] [2025-03-04 16:20:24,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1901370685] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:24,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:24,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:24,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [632054777] [2025-03-04 16:20:24,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:24,088 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:24,088 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:24,089 INFO L85 PathProgramCache]: Analyzing trace with hash -1087832447, now seen corresponding path program 1 times [2025-03-04 16:20:24,089 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:24,089 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [892923361] [2025-03-04 16:20:24,089 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:24,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:24,092 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-03-04 16:20:24,092 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-03-04 16:20:24,093 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:24,093 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:24,101 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:24,101 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:24,101 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [892923361] [2025-03-04 16:20:24,101 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [892923361] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:24,101 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:24,101 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:24,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1524507753] [2025-03-04 16:20:24,101 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:24,102 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:24,102 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:24,102 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:24,102 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:24,102 INFO L87 Difference]: Start difference. First operand 21925 states and 31812 transitions. cyclomatic complexity: 9902 Second operand has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:24,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:24,154 INFO L93 Difference]: Finished difference Result 8622 states and 12403 transitions. [2025-03-04 16:20:24,154 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8622 states and 12403 transitions. [2025-03-04 16:20:24,174 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 5568 [2025-03-04 16:20:24,187 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8622 states to 8622 states and 12403 transitions. [2025-03-04 16:20:24,188 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5722 [2025-03-04 16:20:24,191 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5722 [2025-03-04 16:20:24,191 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8622 states and 12403 transitions. [2025-03-04 16:20:24,191 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:24,191 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8622 states and 12403 transitions. [2025-03-04 16:20:24,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8622 states and 12403 transitions. [2025-03-04 16:20:24,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8622 to 8616. [2025-03-04 16:20:24,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8616 states, 8616 states have (on average 1.4388347260909935) internal successors, (12397), 8615 states have internal predecessors, (12397), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:24,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8616 states to 8616 states and 12397 transitions. [2025-03-04 16:20:24,255 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8616 states and 12397 transitions. [2025-03-04 16:20:24,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:20:24,256 INFO L432 stractBuchiCegarLoop]: Abstraction has 8616 states and 12397 transitions. [2025-03-04 16:20:24,256 INFO L338 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2025-03-04 16:20:24,257 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8616 states and 12397 transitions. [2025-03-04 16:20:24,273 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 5568 [2025-03-04 16:20:24,273 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:24,273 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:24,274 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:24,275 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:24,275 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:24,278 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:24,278 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:24,278 INFO L85 PathProgramCache]: Analyzing trace with hash 1245953054, now seen corresponding path program 1 times [2025-03-04 16:20:24,278 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:24,278 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [590862793] [2025-03-04 16:20:24,279 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:24,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:24,284 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:24,286 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:24,286 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:24,286 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:24,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:24,318 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:24,318 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [590862793] [2025-03-04 16:20:24,318 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [590862793] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:24,318 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:24,318 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:24,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1010754294] [2025-03-04 16:20:24,318 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:24,318 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:24,319 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:24,319 INFO L85 PathProgramCache]: Analyzing trace with hash 1482777633, now seen corresponding path program 1 times [2025-03-04 16:20:24,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:24,319 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1298862974] [2025-03-04 16:20:24,319 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:24,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:24,325 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-03-04 16:20:24,326 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-04 16:20:24,326 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:24,326 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:24,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:24,344 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:24,344 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1298862974] [2025-03-04 16:20:24,344 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1298862974] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:24,344 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:24,344 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:24,344 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [745315431] [2025-03-04 16:20:24,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:24,346 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:24,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:24,347 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:24,347 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:24,347 INFO L87 Difference]: Start difference. First operand 8616 states and 12397 transitions. cyclomatic complexity: 3787 Second operand has 4 states, 4 states have (on average 22.25) internal successors, (89), 4 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:24,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:24,443 INFO L93 Difference]: Finished difference Result 9482 states and 13607 transitions. [2025-03-04 16:20:24,443 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9482 states and 13607 transitions. [2025-03-04 16:20:24,552 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 6032 [2025-03-04 16:20:24,567 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9482 states to 9482 states and 13607 transitions. [2025-03-04 16:20:24,567 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6282 [2025-03-04 16:20:24,569 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6282 [2025-03-04 16:20:24,569 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9482 states and 13607 transitions. [2025-03-04 16:20:24,570 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:24,570 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9482 states and 13607 transitions. [2025-03-04 16:20:24,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9482 states and 13607 transitions. [2025-03-04 16:20:24,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9482 to 8616. [2025-03-04 16:20:24,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8616 states, 8616 states have (on average 1.432799442896936) internal successors, (12345), 8615 states have internal predecessors, (12345), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:24,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8616 states to 8616 states and 12345 transitions. [2025-03-04 16:20:24,637 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8616 states and 12345 transitions. [2025-03-04 16:20:24,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-04 16:20:24,637 INFO L432 stractBuchiCegarLoop]: Abstraction has 8616 states and 12345 transitions. [2025-03-04 16:20:24,637 INFO L338 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2025-03-04 16:20:24,638 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8616 states and 12345 transitions. [2025-03-04 16:20:24,655 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 5568 [2025-03-04 16:20:24,655 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:24,655 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:24,656 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:24,656 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:24,657 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:24,657 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:24,657 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:24,657 INFO L85 PathProgramCache]: Analyzing trace with hash -1350089443, now seen corresponding path program 1 times [2025-03-04 16:20:24,657 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:24,657 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326319806] [2025-03-04 16:20:24,657 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:24,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:24,662 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:24,665 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:24,665 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:24,665 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:24,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:24,695 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:24,695 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326319806] [2025-03-04 16:20:24,696 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [326319806] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:24,696 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:24,696 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:24,696 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2113508635] [2025-03-04 16:20:24,696 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:24,696 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:24,696 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:24,696 INFO L85 PathProgramCache]: Analyzing trace with hash -1525146528, now seen corresponding path program 1 times [2025-03-04 16:20:24,696 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:24,696 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1880352076] [2025-03-04 16:20:24,696 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:24,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:24,702 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-03-04 16:20:24,703 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-04 16:20:24,703 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:24,703 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:24,720 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:24,721 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:24,721 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1880352076] [2025-03-04 16:20:24,721 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1880352076] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:24,721 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:24,721 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:24,721 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2865486] [2025-03-04 16:20:24,721 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:24,721 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:24,721 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:24,722 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:24,722 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:24,722 INFO L87 Difference]: Start difference. First operand 8616 states and 12345 transitions. cyclomatic complexity: 3735 Second operand has 4 states, 4 states have (on average 22.25) internal successors, (89), 4 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:24,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:24,841 INFO L93 Difference]: Finished difference Result 12047 states and 17085 transitions. [2025-03-04 16:20:24,841 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12047 states and 17085 transitions. [2025-03-04 16:20:24,873 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 7394 [2025-03-04 16:20:24,894 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12047 states to 12047 states and 17085 transitions. [2025-03-04 16:20:24,894 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7640 [2025-03-04 16:20:24,899 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7640 [2025-03-04 16:20:24,899 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12047 states and 17085 transitions. [2025-03-04 16:20:24,901 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:20:24,901 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12047 states and 17085 transitions. [2025-03-04 16:20:24,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12047 states and 17085 transitions. [2025-03-04 16:20:24,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12047 to 8947. [2025-03-04 16:20:24,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8947 states, 8947 states have (on average 1.4225997541075222) internal successors, (12728), 8946 states have internal predecessors, (12728), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:24,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8947 states to 8947 states and 12728 transitions. [2025-03-04 16:20:24,974 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8947 states and 12728 transitions. [2025-03-04 16:20:24,974 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-04 16:20:24,974 INFO L432 stractBuchiCegarLoop]: Abstraction has 8947 states and 12728 transitions. [2025-03-04 16:20:24,974 INFO L338 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2025-03-04 16:20:24,974 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8947 states and 12728 transitions. [2025-03-04 16:20:24,992 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 5914 [2025-03-04 16:20:24,992 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:24,992 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:24,993 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:24,993 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:24,994 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:24,994 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:24,995 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:24,995 INFO L85 PathProgramCache]: Analyzing trace with hash -1319069636, now seen corresponding path program 1 times [2025-03-04 16:20:24,995 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:24,995 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1500298992] [2025-03-04 16:20:24,996 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:24,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:25,001 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:25,004 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:25,004 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:25,004 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:25,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:25,031 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:25,031 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1500298992] [2025-03-04 16:20:25,031 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1500298992] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:25,031 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:25,031 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:20:25,031 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [661701129] [2025-03-04 16:20:25,032 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:25,032 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:20:25,032 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:25,033 INFO L85 PathProgramCache]: Analyzing trace with hash -1525146528, now seen corresponding path program 2 times [2025-03-04 16:20:25,033 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:25,033 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1193730945] [2025-03-04 16:20:25,034 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:20:25,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:25,039 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 178 statements into 1 equivalence classes. [2025-03-04 16:20:25,040 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-04 16:20:25,040 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:20:25,040 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:25,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:25,057 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:25,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1193730945] [2025-03-04 16:20:25,058 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1193730945] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:25,058 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:25,058 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:25,058 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [107514887] [2025-03-04 16:20:25,058 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:25,058 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:25,058 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:25,058 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:20:25,058 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:20:25,058 INFO L87 Difference]: Start difference. First operand 8947 states and 12728 transitions. cyclomatic complexity: 3787 Second operand has 4 states, 4 states have (on average 22.25) internal successors, (89), 4 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:25,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:25,212 INFO L93 Difference]: Finished difference Result 9972 states and 14052 transitions. [2025-03-04 16:20:25,212 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9972 states and 14052 transitions. [2025-03-04 16:20:25,240 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 6556 [2025-03-04 16:20:25,252 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9972 states to 6834 states and 9656 transitions. [2025-03-04 16:20:25,252 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6834 [2025-03-04 16:20:25,255 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6834 [2025-03-04 16:20:25,255 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6834 states and 9656 transitions. [2025-03-04 16:20:25,260 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:25,260 INFO L218 hiAutomatonCegarLoop]: Abstraction has 6834 states and 9656 transitions. [2025-03-04 16:20:25,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6834 states and 9656 transitions. [2025-03-04 16:20:25,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6834 to 3711. [2025-03-04 16:20:25,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3711 states, 3711 states have (on average 1.4195634599838318) internal successors, (5268), 3710 states have internal predecessors, (5268), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:25,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3711 states to 3711 states and 5268 transitions. [2025-03-04 16:20:25,293 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3711 states and 5268 transitions. [2025-03-04 16:20:25,294 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:20:25,294 INFO L432 stractBuchiCegarLoop]: Abstraction has 3711 states and 5268 transitions. [2025-03-04 16:20:25,294 INFO L338 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2025-03-04 16:20:25,294 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3711 states and 5268 transitions. [2025-03-04 16:20:25,299 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3540 [2025-03-04 16:20:25,299 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:25,299 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:25,300 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:25,300 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:25,300 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:25,301 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:25,301 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:25,301 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 1 times [2025-03-04 16:20:25,301 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:25,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928203132] [2025-03-04 16:20:25,302 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:25,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:25,306 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:25,308 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:25,308 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:25,309 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:25,309 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:25,312 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:25,314 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:25,314 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:25,314 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:25,326 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:25,326 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:25,326 INFO L85 PathProgramCache]: Analyzing trace with hash -1525146528, now seen corresponding path program 3 times [2025-03-04 16:20:25,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:25,327 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294526725] [2025-03-04 16:20:25,327 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:20:25,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:25,333 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 178 statements into 1 equivalence classes. [2025-03-04 16:20:25,334 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-04 16:20:25,334 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:20:25,334 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:25,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:25,379 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:25,379 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294526725] [2025-03-04 16:20:25,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [294526725] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:25,379 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:25,379 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:25,379 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17974995] [2025-03-04 16:20:25,379 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:25,380 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:25,380 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:25,381 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:25,381 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:25,381 INFO L87 Difference]: Start difference. First operand 3711 states and 5268 transitions. cyclomatic complexity: 1559 Second operand has 3 states, 3 states have (on average 59.333333333333336) internal successors, (178), 3 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:25,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:25,401 INFO L93 Difference]: Finished difference Result 3711 states and 5256 transitions. [2025-03-04 16:20:25,401 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3711 states and 5256 transitions. [2025-03-04 16:20:25,411 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3540 [2025-03-04 16:20:25,421 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3711 states to 3711 states and 5256 transitions. [2025-03-04 16:20:25,421 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3711 [2025-03-04 16:20:25,423 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3711 [2025-03-04 16:20:25,423 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3711 states and 5256 transitions. [2025-03-04 16:20:25,427 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:25,427 INFO L218 hiAutomatonCegarLoop]: Abstraction has 3711 states and 5256 transitions. [2025-03-04 16:20:25,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3711 states and 5256 transitions. [2025-03-04 16:20:25,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3711 to 3711. [2025-03-04 16:20:25,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3711 states, 3711 states have (on average 1.4163298302344383) internal successors, (5256), 3710 states have internal predecessors, (5256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:25,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3711 states to 3711 states and 5256 transitions. [2025-03-04 16:20:25,465 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3711 states and 5256 transitions. [2025-03-04 16:20:25,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:25,468 INFO L432 stractBuchiCegarLoop]: Abstraction has 3711 states and 5256 transitions. [2025-03-04 16:20:25,468 INFO L338 stractBuchiCegarLoop]: ======== Iteration 27 ============ [2025-03-04 16:20:25,468 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3711 states and 5256 transitions. [2025-03-04 16:20:25,476 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3540 [2025-03-04 16:20:25,476 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:25,476 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:25,477 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:25,477 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:25,478 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:25,478 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:25,478 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:25,479 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 2 times [2025-03-04 16:20:25,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:25,479 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967535121] [2025-03-04 16:20:25,479 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:20:25,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:25,484 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:25,488 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:25,488 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:20:25,488 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:25,488 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:25,491 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:25,493 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:25,493 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:25,493 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:25,504 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:25,505 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:25,506 INFO L85 PathProgramCache]: Analyzing trace with hash -1786134912, now seen corresponding path program 1 times [2025-03-04 16:20:25,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:25,506 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773181067] [2025-03-04 16:20:25,506 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:25,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:25,513 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-03-04 16:20:25,515 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-03-04 16:20:25,516 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:25,516 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:25,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:25,581 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:25,581 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773181067] [2025-03-04 16:20:25,581 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [773181067] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:25,581 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:25,581 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:25,581 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [222604012] [2025-03-04 16:20:25,581 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:25,582 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:25,582 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:25,582 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:25,582 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:25,582 INFO L87 Difference]: Start difference. First operand 3711 states and 5256 transitions. cyclomatic complexity: 1547 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:25,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:25,650 INFO L93 Difference]: Finished difference Result 7417 states and 10393 transitions. [2025-03-04 16:20:25,650 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7417 states and 10393 transitions. [2025-03-04 16:20:25,676 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 7080 [2025-03-04 16:20:25,693 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7417 states to 7417 states and 10393 transitions. [2025-03-04 16:20:25,693 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7417 [2025-03-04 16:20:25,698 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7417 [2025-03-04 16:20:25,698 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7417 states and 10393 transitions. [2025-03-04 16:20:25,706 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:25,707 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7417 states and 10393 transitions. [2025-03-04 16:20:25,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7417 states and 10393 transitions. [2025-03-04 16:20:25,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7417 to 7417. [2025-03-04 16:20:25,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7417 states, 7417 states have (on average 1.4012403936901712) internal successors, (10393), 7416 states have internal predecessors, (10393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:25,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7417 states to 7417 states and 10393 transitions. [2025-03-04 16:20:25,785 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7417 states and 10393 transitions. [2025-03-04 16:20:25,786 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:25,786 INFO L432 stractBuchiCegarLoop]: Abstraction has 7417 states and 10393 transitions. [2025-03-04 16:20:25,786 INFO L338 stractBuchiCegarLoop]: ======== Iteration 28 ============ [2025-03-04 16:20:25,787 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7417 states and 10393 transitions. [2025-03-04 16:20:25,807 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 7080 [2025-03-04 16:20:25,808 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:25,808 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:25,809 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:25,809 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:25,810 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:25,810 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:25,810 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:25,810 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 3 times [2025-03-04 16:20:25,811 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:25,811 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1827196974] [2025-03-04 16:20:25,811 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:20:25,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:25,817 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:25,820 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:25,820 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:20:25,820 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:25,820 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:25,822 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:25,824 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:25,825 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:25,825 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:25,836 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:25,836 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:25,837 INFO L85 PathProgramCache]: Analyzing trace with hash 404569728, now seen corresponding path program 1 times [2025-03-04 16:20:25,837 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:25,837 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1898627855] [2025-03-04 16:20:25,837 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:25,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:25,844 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-03-04 16:20:25,846 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-03-04 16:20:25,847 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:25,847 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:25,886 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:25,886 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:25,886 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1898627855] [2025-03-04 16:20:25,886 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1898627855] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:25,887 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:25,887 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:25,887 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [657458556] [2025-03-04 16:20:25,887 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:25,887 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:25,887 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:25,888 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:25,888 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:25,888 INFO L87 Difference]: Start difference. First operand 7417 states and 10393 transitions. cyclomatic complexity: 2978 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:25,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:25,967 INFO L93 Difference]: Finished difference Result 14823 states and 20545 transitions. [2025-03-04 16:20:25,968 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14823 states and 20545 transitions. [2025-03-04 16:20:26,028 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14160 [2025-03-04 16:20:26,069 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14823 states to 14823 states and 20545 transitions. [2025-03-04 16:20:26,069 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14823 [2025-03-04 16:20:26,080 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14823 [2025-03-04 16:20:26,080 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14823 states and 20545 transitions. [2025-03-04 16:20:26,094 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:26,095 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14823 states and 20545 transitions. [2025-03-04 16:20:26,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14823 states and 20545 transitions. [2025-03-04 16:20:26,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14823 to 14823. [2025-03-04 16:20:26,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14823 states, 14823 states have (on average 1.3860217229980436) internal successors, (20545), 14822 states have internal predecessors, (20545), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:26,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14823 states to 14823 states and 20545 transitions. [2025-03-04 16:20:26,256 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14823 states and 20545 transitions. [2025-03-04 16:20:26,257 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:26,257 INFO L432 stractBuchiCegarLoop]: Abstraction has 14823 states and 20545 transitions. [2025-03-04 16:20:26,257 INFO L338 stractBuchiCegarLoop]: ======== Iteration 29 ============ [2025-03-04 16:20:26,257 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14823 states and 20545 transitions. [2025-03-04 16:20:26,303 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14160 [2025-03-04 16:20:26,303 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:26,303 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:26,305 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:26,306 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:26,306 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:26,306 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:26,306 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:26,307 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 4 times [2025-03-04 16:20:26,307 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:26,307 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1303874465] [2025-03-04 16:20:26,307 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:20:26,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:26,312 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 89 statements into 2 equivalence classes. [2025-03-04 16:20:26,315 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:26,315 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:20:26,315 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:26,315 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:26,317 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:26,320 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:26,320 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:26,320 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:26,329 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:26,330 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:26,330 INFO L85 PathProgramCache]: Analyzing trace with hash 890879616, now seen corresponding path program 1 times [2025-03-04 16:20:26,330 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:26,330 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963183545] [2025-03-04 16:20:26,330 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:26,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:26,338 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-03-04 16:20:26,340 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-03-04 16:20:26,340 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:26,340 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:26,371 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:26,371 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:26,371 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [963183545] [2025-03-04 16:20:26,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [963183545] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:26,371 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:26,371 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:26,372 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [933400981] [2025-03-04 16:20:26,372 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:26,372 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:26,372 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:26,372 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:26,372 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:26,372 INFO L87 Difference]: Start difference. First operand 14823 states and 20545 transitions. cyclomatic complexity: 5724 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:26,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:26,481 INFO L93 Difference]: Finished difference Result 29623 states and 40605 transitions. [2025-03-04 16:20:26,481 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29623 states and 40605 transitions. [2025-03-04 16:20:26,602 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 28320 [2025-03-04 16:20:26,758 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29623 states to 29623 states and 40605 transitions. [2025-03-04 16:20:26,759 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29623 [2025-03-04 16:20:26,767 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29623 [2025-03-04 16:20:26,767 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29623 states and 40605 transitions. [2025-03-04 16:20:26,779 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:26,779 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29623 states and 40605 transitions. [2025-03-04 16:20:26,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29623 states and 40605 transitions. [2025-03-04 16:20:26,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29623 to 29623. [2025-03-04 16:20:26,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29623 states, 29623 states have (on average 1.370725449819397) internal successors, (40605), 29622 states have internal predecessors, (40605), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:26,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29623 states to 29623 states and 40605 transitions. [2025-03-04 16:20:26,981 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29623 states and 40605 transitions. [2025-03-04 16:20:26,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:26,982 INFO L432 stractBuchiCegarLoop]: Abstraction has 29623 states and 40605 transitions. [2025-03-04 16:20:26,982 INFO L338 stractBuchiCegarLoop]: ======== Iteration 30 ============ [2025-03-04 16:20:26,982 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29623 states and 40605 transitions. [2025-03-04 16:20:27,043 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 28320 [2025-03-04 16:20:27,043 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:27,043 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:27,045 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:27,045 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:27,045 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:27,045 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:27,045 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:27,046 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 5 times [2025-03-04 16:20:27,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:27,046 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1427723761] [2025-03-04 16:20:27,046 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:20:27,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:27,050 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:27,052 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:27,052 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:20:27,052 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:27,052 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:27,053 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:27,055 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:27,055 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:27,055 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:27,062 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:27,062 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:27,062 INFO L85 PathProgramCache]: Analyzing trace with hash 1183661696, now seen corresponding path program 1 times [2025-03-04 16:20:27,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:27,062 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1083796260] [2025-03-04 16:20:27,062 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:27,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:27,067 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-03-04 16:20:27,069 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-03-04 16:20:27,069 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:27,069 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:27,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:27,098 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:27,098 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1083796260] [2025-03-04 16:20:27,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1083796260] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:27,098 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:27,098 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:27,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [792444443] [2025-03-04 16:20:27,098 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:27,098 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:27,098 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:27,099 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:27,099 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:27,099 INFO L87 Difference]: Start difference. First operand 29623 states and 40605 transitions. cyclomatic complexity: 10984 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:27,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:27,242 INFO L93 Difference]: Finished difference Result 59199 states and 80237 transitions. [2025-03-04 16:20:27,242 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59199 states and 80237 transitions. [2025-03-04 16:20:27,660 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 56640 [2025-03-04 16:20:27,770 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59199 states to 59199 states and 80237 transitions. [2025-03-04 16:20:27,770 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 59199 [2025-03-04 16:20:27,808 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 59199 [2025-03-04 16:20:27,808 INFO L73 IsDeterministic]: Start isDeterministic. Operand 59199 states and 80237 transitions. [2025-03-04 16:20:27,851 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:27,851 INFO L218 hiAutomatonCegarLoop]: Abstraction has 59199 states and 80237 transitions. [2025-03-04 16:20:27,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59199 states and 80237 transitions. [2025-03-04 16:20:28,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59199 to 59199. [2025-03-04 16:20:28,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59199 states, 59199 states have (on average 1.3553776246220375) internal successors, (80237), 59198 states have internal predecessors, (80237), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:28,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59199 states to 59199 states and 80237 transitions. [2025-03-04 16:20:28,584 INFO L240 hiAutomatonCegarLoop]: Abstraction has 59199 states and 80237 transitions. [2025-03-04 16:20:28,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:28,584 INFO L432 stractBuchiCegarLoop]: Abstraction has 59199 states and 80237 transitions. [2025-03-04 16:20:28,584 INFO L338 stractBuchiCegarLoop]: ======== Iteration 31 ============ [2025-03-04 16:20:28,584 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59199 states and 80237 transitions. [2025-03-04 16:20:28,710 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 56640 [2025-03-04 16:20:28,710 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:28,710 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:28,713 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:28,714 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:28,714 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:28,714 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:28,714 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:28,714 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 6 times [2025-03-04 16:20:28,715 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:28,715 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1719185094] [2025-03-04 16:20:28,715 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:20:28,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:28,719 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:28,721 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:28,722 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:20:28,722 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:28,722 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:28,724 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:28,725 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:28,725 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:28,725 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:28,734 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:28,735 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:28,735 INFO L85 PathProgramCache]: Analyzing trace with hash 1322455679, now seen corresponding path program 1 times [2025-03-04 16:20:28,735 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:28,735 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2036741187] [2025-03-04 16:20:28,735 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:28,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:28,741 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-03-04 16:20:28,742 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-03-04 16:20:28,743 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:28,743 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:28,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:28,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:28,769 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2036741187] [2025-03-04 16:20:28,769 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2036741187] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:28,769 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:28,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:28,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064941888] [2025-03-04 16:20:28,769 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:28,769 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:28,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:28,770 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:28,770 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:28,770 INFO L87 Difference]: Start difference. First operand 59199 states and 80237 transitions. cyclomatic complexity: 21040 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:29,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:29,031 INFO L93 Difference]: Finished difference Result 118207 states and 158749 transitions. [2025-03-04 16:20:29,031 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 118207 states and 158749 transitions. [2025-03-04 16:20:29,724 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 113280 [2025-03-04 16:20:29,970 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 118207 states to 118207 states and 158749 transitions. [2025-03-04 16:20:29,970 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 118207 [2025-03-04 16:20:30,048 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 118207 [2025-03-04 16:20:30,048 INFO L73 IsDeterministic]: Start isDeterministic. Operand 118207 states and 158749 transitions. [2025-03-04 16:20:30,104 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:30,104 INFO L218 hiAutomatonCegarLoop]: Abstraction has 118207 states and 158749 transitions. [2025-03-04 16:20:30,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118207 states and 158749 transitions. [2025-03-04 16:20:30,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118207 to 118207. [2025-03-04 16:20:31,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118207 states, 118207 states have (on average 1.342974612332603) internal successors, (158749), 118206 states have internal predecessors, (158749), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:31,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118207 states to 118207 states and 158749 transitions. [2025-03-04 16:20:31,489 INFO L240 hiAutomatonCegarLoop]: Abstraction has 118207 states and 158749 transitions. [2025-03-04 16:20:31,490 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:31,490 INFO L432 stractBuchiCegarLoop]: Abstraction has 118207 states and 158749 transitions. [2025-03-04 16:20:31,490 INFO L338 stractBuchiCegarLoop]: ======== Iteration 32 ============ [2025-03-04 16:20:31,490 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 118207 states and 158749 transitions. [2025-03-04 16:20:31,806 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 113280 [2025-03-04 16:20:31,806 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:31,806 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:31,815 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:31,815 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:31,816 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:31,816 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:31,816 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:31,816 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 7 times [2025-03-04 16:20:31,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:31,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1463250569] [2025-03-04 16:20:31,816 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:20:31,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:31,822 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:31,824 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:31,824 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:31,824 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:31,824 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:31,826 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:31,828 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:31,829 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:31,829 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:31,838 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:31,838 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:31,838 INFO L85 PathProgramCache]: Analyzing trace with hash 1578078847, now seen corresponding path program 1 times [2025-03-04 16:20:31,839 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:31,839 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098338359] [2025-03-04 16:20:31,839 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:31,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:31,846 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-03-04 16:20:31,848 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-03-04 16:20:31,848 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:31,848 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:31,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:31,874 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:31,874 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2098338359] [2025-03-04 16:20:31,874 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2098338359] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:31,874 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:31,874 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:31,874 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1020376185] [2025-03-04 16:20:31,874 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:31,874 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:31,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:31,875 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:31,875 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:31,875 INFO L87 Difference]: Start difference. First operand 118207 states and 158749 transitions. cyclomatic complexity: 40544 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:32,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:32,435 INFO L93 Difference]: Finished difference Result 209343 states and 282429 transitions. [2025-03-04 16:20:32,435 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 209343 states and 282429 transitions. [2025-03-04 16:20:33,576 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 204416 [2025-03-04 16:20:34,309 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 209343 states to 209343 states and 282429 transitions. [2025-03-04 16:20:34,309 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 209343 [2025-03-04 16:20:34,391 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 209343 [2025-03-04 16:20:34,391 INFO L73 IsDeterministic]: Start isDeterministic. Operand 209343 states and 282429 transitions. [2025-03-04 16:20:34,444 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:34,444 INFO L218 hiAutomatonCegarLoop]: Abstraction has 209343 states and 282429 transitions. [2025-03-04 16:20:34,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209343 states and 282429 transitions. [2025-03-04 16:20:35,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209343 to 209343. [2025-03-04 16:20:36,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 209343 states, 209343 states have (on average 1.3491208208538141) internal successors, (282429), 209342 states have internal predecessors, (282429), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:36,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209343 states to 209343 states and 282429 transitions. [2025-03-04 16:20:36,554 INFO L240 hiAutomatonCegarLoop]: Abstraction has 209343 states and 282429 transitions. [2025-03-04 16:20:36,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:36,554 INFO L432 stractBuchiCegarLoop]: Abstraction has 209343 states and 282429 transitions. [2025-03-04 16:20:36,554 INFO L338 stractBuchiCegarLoop]: ======== Iteration 33 ============ [2025-03-04 16:20:36,554 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 209343 states and 282429 transitions. [2025-03-04 16:20:37,289 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 204416 [2025-03-04 16:20:37,289 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:37,289 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:37,314 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:37,314 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:37,315 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:37,315 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:37,315 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:37,315 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 8 times [2025-03-04 16:20:37,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:37,316 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1387056723] [2025-03-04 16:20:37,316 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:20:37,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:37,324 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:37,326 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:37,327 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:20:37,327 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:37,327 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:37,329 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:37,332 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:37,332 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:37,332 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:37,345 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:37,346 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:37,346 INFO L85 PathProgramCache]: Analyzing trace with hash 1701820031, now seen corresponding path program 1 times [2025-03-04 16:20:37,346 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:37,346 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005153835] [2025-03-04 16:20:37,346 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:37,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:37,354 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-03-04 16:20:37,358 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-03-04 16:20:37,358 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:37,358 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:37,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:37,429 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:37,429 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005153835] [2025-03-04 16:20:37,429 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1005153835] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:37,429 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:37,429 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-04 16:20:37,429 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1647497485] [2025-03-04 16:20:37,429 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:37,429 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:37,429 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:37,430 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-04 16:20:37,430 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-04 16:20:37,430 INFO L87 Difference]: Start difference. First operand 209343 states and 282429 transitions. cyclomatic complexity: 73088 Second operand has 5 states, 5 states have (on average 36.4) internal successors, (182), 5 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:38,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:38,304 INFO L93 Difference]: Finished difference Result 216511 states and 293485 transitions. [2025-03-04 16:20:38,304 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 216511 states and 293485 transitions. [2025-03-04 16:20:39,537 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 211584 [2025-03-04 16:20:40,008 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 216511 states to 216511 states and 293485 transitions. [2025-03-04 16:20:40,008 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 216511 [2025-03-04 16:20:40,129 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 216511 [2025-03-04 16:20:40,129 INFO L73 IsDeterministic]: Start isDeterministic. Operand 216511 states and 293485 transitions. [2025-03-04 16:20:40,226 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:40,226 INFO L218 hiAutomatonCegarLoop]: Abstraction has 216511 states and 293485 transitions. [2025-03-04 16:20:40,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216511 states and 293485 transitions. [2025-03-04 16:20:41,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216511 to 195487. [2025-03-04 16:20:41,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195487 states, 195487 states have (on average 1.3523405648457443) internal successors, (264365), 195486 states have internal predecessors, (264365), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:42,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195487 states to 195487 states and 264365 transitions. [2025-03-04 16:20:42,387 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195487 states and 264365 transitions. [2025-03-04 16:20:42,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:20:42,387 INFO L432 stractBuchiCegarLoop]: Abstraction has 195487 states and 264365 transitions. [2025-03-04 16:20:42,387 INFO L338 stractBuchiCegarLoop]: ======== Iteration 34 ============ [2025-03-04 16:20:42,387 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195487 states and 264365 transitions. [2025-03-04 16:20:43,026 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 190560 [2025-03-04 16:20:43,027 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:43,027 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:43,042 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:43,043 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:43,043 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:43,043 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume !(1 == ~main_clk_val~0);~main_clk_neg_edge~0 := 0;~main_clk_pos_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:43,044 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:43,044 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 9 times [2025-03-04 16:20:43,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:43,044 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [60509733] [2025-03-04 16:20:43,044 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:20:43,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:43,058 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:43,060 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:43,060 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:20:43,060 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:43,061 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:43,062 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:43,064 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:43,068 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:43,068 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:43,090 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:43,093 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:43,093 INFO L85 PathProgramCache]: Analyzing trace with hash 1917271841, now seen corresponding path program 1 times [2025-03-04 16:20:43,093 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:43,093 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1455980712] [2025-03-04 16:20:43,093 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:43,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:43,107 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 183 statements into 1 equivalence classes. [2025-03-04 16:20:43,110 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 183 of 183 statements. [2025-03-04 16:20:43,110 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:43,110 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:43,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:43,130 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:43,130 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1455980712] [2025-03-04 16:20:43,130 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1455980712] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:43,130 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:43,130 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 16:20:43,130 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1674314461] [2025-03-04 16:20:43,130 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:43,131 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:20:43,131 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:20:43,131 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:20:43,131 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:20:43,131 INFO L87 Difference]: Start difference. First operand 195487 states and 264365 transitions. cyclomatic complexity: 68880 Second operand has 3 states, 3 states have (on average 61.0) internal successors, (183), 3 states have internal predecessors, (183), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:43,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:20:43,930 INFO L93 Difference]: Finished difference Result 117247 states and 156589 transitions. [2025-03-04 16:20:43,931 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117247 states and 156589 transitions. [2025-03-04 16:20:44,349 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 112320 [2025-03-04 16:20:44,570 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117247 states to 117247 states and 156589 transitions. [2025-03-04 16:20:44,570 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117247 [2025-03-04 16:20:44,630 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117247 [2025-03-04 16:20:44,630 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117247 states and 156589 transitions. [2025-03-04 16:20:44,680 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:20:44,680 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117247 states and 156589 transitions. [2025-03-04 16:20:44,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117247 states and 156589 transitions. [2025-03-04 16:20:45,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117247 to 117247. [2025-03-04 16:20:45,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117247 states, 117247 states have (on average 1.3355480310796866) internal successors, (156589), 117246 states have internal predecessors, (156589), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:45,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117247 states to 117247 states and 156589 transitions. [2025-03-04 16:20:45,921 INFO L240 hiAutomatonCegarLoop]: Abstraction has 117247 states and 156589 transitions. [2025-03-04 16:20:45,922 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:20:45,922 INFO L432 stractBuchiCegarLoop]: Abstraction has 117247 states and 156589 transitions. [2025-03-04 16:20:45,922 INFO L338 stractBuchiCegarLoop]: ======== Iteration 35 ============ [2025-03-04 16:20:45,922 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 117247 states and 156589 transitions. [2025-03-04 16:20:46,243 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 112320 [2025-03-04 16:20:46,243 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:20:46,243 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:20:46,250 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:46,250 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:20:46,251 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:46,251 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume !(1 == ~main_clk_val~0);~main_clk_neg_edge~0 := 0;~main_clk_pos_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-03-04 16:20:46,251 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:46,251 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 10 times [2025-03-04 16:20:46,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:46,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816092371] [2025-03-04 16:20:46,251 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:20:46,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:46,255 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 89 statements into 2 equivalence classes. [2025-03-04 16:20:46,257 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:46,257 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:20:46,257 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:46,257 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:46,259 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:46,263 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:46,263 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:46,263 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:46,271 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:46,271 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:46,272 INFO L85 PathProgramCache]: Analyzing trace with hash -659352637, now seen corresponding path program 1 times [2025-03-04 16:20:46,272 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:46,272 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1511903191] [2025-03-04 16:20:46,272 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:46,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:46,278 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 183 statements into 1 equivalence classes. [2025-03-04 16:20:46,280 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 183 of 183 statements. [2025-03-04 16:20:46,281 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:46,281 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:46,281 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:20:46,283 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 183 statements into 1 equivalence classes. [2025-03-04 16:20:46,285 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 183 of 183 statements. [2025-03-04 16:20:46,285 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:46,285 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:20:46,295 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:20:46,296 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:46,296 INFO L85 PathProgramCache]: Analyzing trace with hash -1558192825, now seen corresponding path program 1 times [2025-03-04 16:20:46,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:20:46,296 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305669956] [2025-03-04 16:20:46,296 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:20:46,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:20:46,303 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 272 statements into 1 equivalence classes. [2025-03-04 16:20:46,305 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 272 of 272 statements. [2025-03-04 16:20:46,305 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:46,305 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:46,702 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:46,703 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:20:46,703 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1305669956] [2025-03-04 16:20:46,703 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1305669956] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:20:46,703 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:20:46,703 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-04 16:20:46,703 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2048980937] [2025-03-04 16:20:46,703 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:20:47,304 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 16:20:47,305 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 16:20:47,305 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 16:20:47,305 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 16:20:47,305 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-03-04 16:20:47,305 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,305 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 16:20:47,305 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 16:20:47,305 INFO L132 ssoRankerPreferences]: Filename of dumped script: pipeline.cil-1.c_Iteration35_Loop [2025-03-04 16:20:47,305 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 16:20:47,305 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 16:20:47,306 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,310 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,313 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,317 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,318 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,319 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,320 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,324 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,325 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,326 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,328 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,331 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,335 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,337 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,340 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,342 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,344 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,346 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,347 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,351 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,355 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,357 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,359 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,361 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,362 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,363 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,365 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,367 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,368 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,371 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,382 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,384 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,385 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,388 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,389 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,391 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,392 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,394 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,395 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,397 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,399 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,400 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:47,701 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 16:20:47,702 INFO L365 LassoAnalysis]: Checking for nontermination... [2025-03-04 16:20:47,702 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,702 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,703 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,704 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2025-03-04 16:20:47,707 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:47,707 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,724 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:47,724 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_pres_ev~0=-1} Honda state: {~main_pres_ev~0=-1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:47,729 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2025-03-04 16:20:47,729 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,730 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,731 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,732 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2025-03-04 16:20:47,733 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:47,733 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,749 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:47,749 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_in2_ev~0=-8} Honda state: {~main_in2_ev~0=-8} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:47,754 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2025-03-04 16:20:47,755 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,755 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,756 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,757 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2025-03-04 16:20:47,758 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:47,758 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,775 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:47,775 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_clk_neg_edge~0=2} Honda state: {~main_clk_neg_edge~0=2} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:47,780 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Ended with exit code 0 [2025-03-04 16:20:47,781 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,781 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,782 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,784 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2025-03-04 16:20:47,785 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:47,785 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,795 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:47,795 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_eval_#t~nondet5#1=0} Honda state: {ULTIMATE.start_eval_#t~nondet5#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:47,800 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2025-03-04 16:20:47,800 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,800 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,802 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,802 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2025-03-04 16:20:47,803 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:47,803 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,813 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:47,813 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_clk_val_t~0=0} Honda state: {~main_clk_val_t~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:47,818 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Ended with exit code 0 [2025-03-04 16:20:47,819 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,819 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,820 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,821 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2025-03-04 16:20:47,822 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:47,822 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,839 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:47,839 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~D_print_i~0=4} Honda state: {~D_print_i~0=4} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:47,843 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Ended with exit code 0 [2025-03-04 16:20:47,844 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,844 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,845 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,847 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2025-03-04 16:20:47,847 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:47,848 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,864 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:47,865 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_clk_pos_edge~0=2} Honda state: {~main_clk_pos_edge~0=2} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:47,869 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2025-03-04 16:20:47,870 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,870 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,872 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,872 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2025-03-04 16:20:47,873 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:47,873 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,890 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:47,890 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~S1_addsub_i~0=4} Honda state: {~S1_addsub_i~0=4} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:47,894 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2025-03-04 16:20:47,895 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,895 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,896 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,897 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2025-03-04 16:20:47,898 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:47,898 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,908 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:47,908 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_clk_req_up~0=0} Honda state: {~main_clk_req_up~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:47,913 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Ended with exit code 0 [2025-03-04 16:20:47,913 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,913 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,914 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,915 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2025-03-04 16:20:47,916 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:47,916 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,932 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:47,933 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_diff_req_up~0=4} Honda state: {~main_diff_req_up~0=4} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:47,938 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Ended with exit code 0 [2025-03-04 16:20:47,938 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,938 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,940 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,941 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2025-03-04 16:20:47,942 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:47,942 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,957 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2025-03-04 16:20:47,958 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:47,958 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:47,959 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:47,960 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2025-03-04 16:20:47,961 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-03-04 16:20:47,961 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:47,996 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:47,996 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~count~0#1=5} Honda state: {ULTIMATE.start_main_~count~0#1=5} Generalized eigenvectors: [{ULTIMATE.start_main_~count~0#1=0}, {ULTIMATE.start_main_~count~0#1=1}, {ULTIMATE.start_main_~count~0#1=0}] Lambdas: [12, 1, 9] Nus: [0, 1] [2025-03-04 16:20:48,002 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2025-03-04 16:20:48,003 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,003 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,005 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,006 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2025-03-04 16:20:48,008 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:48,008 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:48,027 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:48,028 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_zero_ev~0=-8} Honda state: {~main_zero_ev~0=-8} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:48,033 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2025-03-04 16:20:48,034 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,034 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,035 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,037 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2025-03-04 16:20:48,038 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:48,038 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:48,051 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-03-04 16:20:48,051 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~D_print_st~0=2} Honda state: {~D_print_st~0=2} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-03-04 16:20:48,057 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2025-03-04 16:20:48,058 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,058 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,060 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,061 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2025-03-04 16:20:48,063 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:20:48,063 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:48,082 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Ended with exit code 0 [2025-03-04 16:20:48,082 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,082 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,084 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,084 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2025-03-04 16:20:48,085 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-03-04 16:20:48,085 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:20:48,096 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2025-03-04 16:20:48,101 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Ended with exit code 0 [2025-03-04 16:20:48,101 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 16:20:48,101 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 16:20:48,101 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 16:20:48,102 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 16:20:48,102 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-04 16:20:48,102 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,102 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 16:20:48,102 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 16:20:48,102 INFO L132 ssoRankerPreferences]: Filename of dumped script: pipeline.cil-1.c_Iteration35_Loop [2025-03-04 16:20:48,102 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 16:20:48,102 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 16:20:48,104 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,108 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,111 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,115 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,116 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,118 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,121 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,123 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,124 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,127 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,131 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,132 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,135 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,136 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,137 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,138 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,140 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,142 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,151 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,153 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,157 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,160 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,161 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,162 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,163 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,164 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,166 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,167 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,168 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,171 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,172 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,174 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,175 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,179 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,182 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,183 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,185 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,186 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,187 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,189 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,190 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,191 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:20:48,492 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 16:20:48,492 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-04 16:20:48,492 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,492 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,494 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,495 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2025-03-04 16:20:48,496 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,505 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,505 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,505 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,505 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-03-04 16:20:48,505 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,506 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-03-04 16:20:48,506 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,507 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:48,512 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Ended with exit code 0 [2025-03-04 16:20:48,512 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,512 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,514 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,514 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2025-03-04 16:20:48,515 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,524 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,525 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,525 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,525 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-03-04 16:20:48,525 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,525 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-03-04 16:20:48,525 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,527 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:48,532 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Ended with exit code 0 [2025-03-04 16:20:48,533 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,533 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,534 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,535 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2025-03-04 16:20:48,536 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,546 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,546 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,546 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,546 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-03-04 16:20:48,546 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,547 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-03-04 16:20:48,547 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,549 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:48,554 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Ended with exit code 0 [2025-03-04 16:20:48,555 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,555 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,556 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,558 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2025-03-04 16:20:48,559 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,568 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,568 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,569 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,569 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:20:48,569 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,569 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 16:20:48,569 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,570 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:48,575 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2025-03-04 16:20:48,576 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,576 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,583 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,587 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,588 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2025-03-04 16:20:48,597 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,597 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,597 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,597 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-03-04 16:20:48,597 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,598 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-03-04 16:20:48,598 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,599 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:48,604 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2025-03-04 16:20:48,604 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,604 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,606 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,607 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2025-03-04 16:20:48,608 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,618 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,618 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,619 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,619 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-03-04 16:20:48,619 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,621 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-03-04 16:20:48,621 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,623 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:48,628 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Ended with exit code 0 [2025-03-04 16:20:48,628 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,629 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,631 INFO L229 MonitoredProcess]: Starting monitored process 38 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,631 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2025-03-04 16:20:48,632 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,641 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,641 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,642 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,642 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-03-04 16:20:48,642 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,642 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-03-04 16:20:48,642 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,643 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:48,648 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Ended with exit code 0 [2025-03-04 16:20:48,649 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,649 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,651 INFO L229 MonitoredProcess]: Starting monitored process 39 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,652 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2025-03-04 16:20:48,653 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,662 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,662 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,662 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,662 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-03-04 16:20:48,662 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,663 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-03-04 16:20:48,663 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,664 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:48,669 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Ended with exit code 0 [2025-03-04 16:20:48,670 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,670 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,671 INFO L229 MonitoredProcess]: Starting monitored process 40 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,673 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2025-03-04 16:20:48,674 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,683 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,684 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,684 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,684 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-03-04 16:20:48,684 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,684 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-03-04 16:20:48,685 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,686 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:48,691 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Ended with exit code 0 [2025-03-04 16:20:48,692 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,692 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,694 INFO L229 MonitoredProcess]: Starting monitored process 41 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,694 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2025-03-04 16:20:48,695 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,704 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,704 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,705 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,705 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-03-04 16:20:48,705 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,705 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-03-04 16:20:48,705 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,707 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:48,712 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Ended with exit code 0 [2025-03-04 16:20:48,712 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,712 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,714 INFO L229 MonitoredProcess]: Starting monitored process 42 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,714 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2025-03-04 16:20:48,715 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,724 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,725 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,725 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,725 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:20:48,725 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,725 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 16:20:48,725 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,726 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-04 16:20:48,731 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Ended with exit code 0 [2025-03-04 16:20:48,731 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,731 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,733 INFO L229 MonitoredProcess]: Starting monitored process 43 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,734 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2025-03-04 16:20:48,735 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:20:48,744 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:20:48,744 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:20:48,744 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:20:48,744 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:20:48,744 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:20:48,745 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 16:20:48,745 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:20:48,746 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-04 16:20:48,748 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2025-03-04 16:20:48,748 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 1 variables to zero. [2025-03-04 16:20:48,748 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:20:48,748 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:20:48,750 INFO L229 MonitoredProcess]: Starting monitored process 44 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:20:48,751 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2025-03-04 16:20:48,752 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-04 16:20:48,752 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2025-03-04 16:20:48,752 INFO L474 LassoAnalysis]: Proved termination. [2025-03-04 16:20:48,752 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(~main_clk_val~0) = 1*~main_clk_val~0 Supporting invariants [] [2025-03-04 16:20:48,757 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Ended with exit code 0 [2025-03-04 16:20:48,758 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2025-03-04 16:20:48,765 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:20:48,778 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-03-04 16:20:48,801 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-03-04 16:20:48,802 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:48,802 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:48,803 INFO L256 TraceCheckSpWp]: Trace formula consists of 263 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-04 16:20:48,804 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:20:48,934 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Forceful destruction successful, exit code 0 [2025-03-04 16:20:49,007 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 183 statements into 1 equivalence classes. [2025-03-04 16:20:49,025 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 183 of 183 statements. [2025-03-04 16:20:49,025 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:20:49,025 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:20:49,026 INFO L256 TraceCheckSpWp]: Trace formula consists of 247 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-04 16:20:49,028 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:20:49,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:20:49,416 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 5 loop predicates [2025-03-04 16:20:49,416 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 117247 states and 156589 transitions. cyclomatic complexity: 39344 Second operand has 7 states, 7 states have (on average 38.857142857142854) internal successors, (272), 7 states have internal predecessors, (272), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:50,587 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 117247 states and 156589 transitions. cyclomatic complexity: 39344. Second operand has 7 states, 7 states have (on average 38.857142857142854) internal successors, (272), 7 states have internal predecessors, (272), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 385151 states and 515949 transitions. Complement of second has 17 states. [2025-03-04 16:20:50,587 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 9 states 1 stem states 7 non-accepting loop states 1 accepting loop states [2025-03-04 16:20:50,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 38.857142857142854) internal successors, (272), 7 states have internal predecessors, (272), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:20:50,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 1078 transitions. [2025-03-04 16:20:50,589 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 1078 transitions. Stem has 89 letters. Loop has 183 letters. [2025-03-04 16:20:50,590 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:20:50,590 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 1078 transitions. Stem has 272 letters. Loop has 183 letters. [2025-03-04 16:20:50,591 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:20:50,591 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 1078 transitions. Stem has 89 letters. Loop has 366 letters. [2025-03-04 16:20:50,593 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:20:50,593 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 385151 states and 515949 transitions.