./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/loop-invgen/string_concat-noarr.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/loop-invgen/string_concat-noarr.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 30a4b942034eaa47a8fcc8fdf4549d1d63a9a60d59b585da2a353c9626604750 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 16:04:50,374 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 16:04:50,428 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-04 16:04:50,435 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 16:04:50,435 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 16:04:50,435 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 16:04:50,450 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 16:04:50,451 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 16:04:50,451 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 16:04:50,451 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 16:04:50,451 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 16:04:50,451 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 16:04:50,451 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 16:04:50,451 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 16:04:50,451 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 16:04:50,452 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 16:04:50,452 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 16:04:50,452 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 16:04:50,453 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 16:04:50,453 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 16:04:50,453 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 16:04:50,453 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 16:04:50,453 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 30a4b942034eaa47a8fcc8fdf4549d1d63a9a60d59b585da2a353c9626604750 [2025-03-04 16:04:50,671 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 16:04:50,681 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 16:04:50,685 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 16:04:50,686 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 16:04:50,687 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 16:04:50,687 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2025-03-04 16:04:51,868 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d9d88d569/9186c394ed30470e8908717dc75b35b3/FLAGb2ca39838 [2025-03-04 16:04:52,088 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 16:04:52,088 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2025-03-04 16:04:52,093 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d9d88d569/9186c394ed30470e8908717dc75b35b3/FLAGb2ca39838 [2025-03-04 16:04:52,442 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d9d88d569/9186c394ed30470e8908717dc75b35b3 [2025-03-04 16:04:52,444 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 16:04:52,446 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 16:04:52,447 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 16:04:52,447 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 16:04:52,450 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 16:04:52,451 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,451 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@24bab302 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52, skipping insertion in model container [2025-03-04 16:04:52,454 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,465 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 16:04:52,576 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:04:52,585 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 16:04:52,596 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:04:52,608 INFO L204 MainTranslator]: Completed translation [2025-03-04 16:04:52,609 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52 WrapperNode [2025-03-04 16:04:52,609 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 16:04:52,610 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 16:04:52,610 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 16:04:52,610 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 16:04:52,615 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,620 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,635 INFO L138 Inliner]: procedures = 16, calls = 8, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 52 [2025-03-04 16:04:52,636 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 16:04:52,637 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 16:04:52,637 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 16:04:52,637 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 16:04:52,643 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,644 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,645 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,661 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-04 16:04:52,661 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,661 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,665 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,666 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,667 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,667 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,671 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 16:04:52,672 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 16:04:52,672 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 16:04:52,672 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 16:04:52,672 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (1/1) ... [2025-03-04 16:04:52,677 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:04:52,688 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:52,701 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:04:52,705 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 16:04:52,723 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-04 16:04:52,723 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-04 16:04:52,723 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 16:04:52,723 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 16:04:52,765 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 16:04:52,766 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 16:04:52,851 INFO L? ?]: Removed 9 outVars from TransFormulas that were not future-live. [2025-03-04 16:04:52,852 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 16:04:52,858 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 16:04:52,859 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-04 16:04:52,859 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:04:52 BoogieIcfgContainer [2025-03-04 16:04:52,859 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 16:04:52,860 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 16:04:52,860 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 16:04:52,864 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 16:04:52,864 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:04:52,864 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 04:04:52" (1/3) ... [2025-03-04 16:04:52,865 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4c7dc0da and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:04:52, skipping insertion in model container [2025-03-04 16:04:52,866 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:04:52,866 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:04:52" (2/3) ... [2025-03-04 16:04:52,866 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4c7dc0da and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:04:52, skipping insertion in model container [2025-03-04 16:04:52,866 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:04:52,866 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:04:52" (3/3) ... [2025-03-04 16:04:52,868 INFO L363 chiAutomizerObserver]: Analyzing ICFG string_concat-noarr.i [2025-03-04 16:04:52,909 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 16:04:52,910 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 16:04:52,910 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 16:04:52,910 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 16:04:52,910 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 16:04:52,911 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 16:04:52,911 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 16:04:52,911 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 16:04:52,914 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:52,926 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 5 [2025-03-04 16:04:52,927 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:52,927 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:52,930 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-03-04 16:04:52,930 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 16:04:52,930 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 16:04:52,930 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:52,931 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 5 [2025-03-04 16:04:52,931 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:52,931 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:52,931 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-03-04 16:04:52,931 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-04 16:04:52,937 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" [2025-03-04 16:04:52,938 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" [2025-03-04 16:04:52,941 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:52,942 INFO L85 PathProgramCache]: Analyzing trace with hash 2030719, now seen corresponding path program 1 times [2025-03-04 16:04:52,946 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:52,947 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1172961115] [2025-03-04 16:04:52,947 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:04:52,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:52,993 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-04 16:04:53,002 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-04 16:04:53,002 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,002 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,003 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:53,008 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-04 16:04:53,011 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-04 16:04:53,012 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,012 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,023 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:53,025 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:53,025 INFO L85 PathProgramCache]: Analyzing trace with hash 1952, now seen corresponding path program 1 times [2025-03-04 16:04:53,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:53,025 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019461386] [2025-03-04 16:04:53,025 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:04:53,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:53,031 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 16:04:53,035 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 16:04:53,035 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,035 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,035 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:53,038 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 16:04:53,040 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 16:04:53,040 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,040 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,041 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:53,044 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:53,044 INFO L85 PathProgramCache]: Analyzing trace with hash 1951521950, now seen corresponding path program 1 times [2025-03-04 16:04:53,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:53,044 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [231923558] [2025-03-04 16:04:53,044 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:04:53,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:53,047 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-04 16:04:53,051 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-04 16:04:53,051 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,051 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,051 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:53,053 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-04 16:04:53,056 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-04 16:04:53,057 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,058 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,061 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:53,122 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 16:04:53,123 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 16:04:53,124 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 16:04:53,125 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 16:04:53,125 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-03-04 16:04:53,125 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:04:53,126 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 16:04:53,126 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 16:04:53,126 INFO L132 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2025-03-04 16:04:53,126 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 16:04:53,126 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 16:04:53,137 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:04:53,150 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:04:53,154 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:04:53,194 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 16:04:53,194 INFO L365 LassoAnalysis]: Checking for nontermination... [2025-03-04 16:04:53,197 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:04:53,197 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:53,199 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:04:53,201 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-04 16:04:53,202 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-04 16:04:53,202 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:04:53,222 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2025-03-04 16:04:53,223 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:04:53,223 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:53,227 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:04:53,229 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-04 16:04:53,230 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-03-04 16:04:53,230 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-04 16:04:53,256 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2025-03-04 16:04:53,261 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-03-04 16:04:53,261 INFO L204 LassoAnalysis]: Preferences: [2025-03-04 16:04:53,261 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-04 16:04:53,261 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-04 16:04:53,261 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-04 16:04:53,261 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-04 16:04:53,261 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:04:53,261 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-04 16:04:53,261 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-04 16:04:53,262 INFO L132 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2025-03-04 16:04:53,262 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-04 16:04:53,262 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-04 16:04:53,262 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:04:53,270 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:04:53,273 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-04 16:04:53,299 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-04 16:04:53,302 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-04 16:04:53,303 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:04:53,304 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:53,305 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:04:53,307 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-04 16:04:53,308 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-04 16:04:53,319 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-04 16:04:53,319 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-04 16:04:53,319 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-04 16:04:53,319 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-04 16:04:53,319 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-04 16:04:53,323 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-04 16:04:53,323 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-04 16:04:53,325 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-04 16:04:53,328 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2025-03-04 16:04:53,331 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2025-03-04 16:04:53,332 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:04:53,332 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:53,334 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:04:53,337 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-04 16:04:53,338 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-04 16:04:53,338 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2025-03-04 16:04:53,339 INFO L474 LassoAnalysis]: Proved termination. [2025-03-04 16:04:53,339 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1) = -2*ULTIMATE.start_main_~i~0#1 + 1999999 Supporting invariants [] [2025-03-04 16:04:53,346 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2025-03-04 16:04:53,349 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2025-03-04 16:04:53,376 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:53,382 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-04 16:04:53,386 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-04 16:04:53,386 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,386 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:53,387 INFO L256 TraceCheckSpWp]: Trace formula consists of 21 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-04 16:04:53,388 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:04:53,398 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 16:04:53,399 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 16:04:53,399 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,399 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:53,400 WARN L254 TraceCheckSpWp]: Trace formula consists of 7 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-04 16:04:53,400 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:04:53,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:53,429 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2025-03-04 16:04:53,431 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:53,476 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 45 states and 62 transitions. Complement of second has 6 states. [2025-03-04 16:04:53,477 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-03-04 16:04:53,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:53,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 37 transitions. [2025-03-04 16:04:53,489 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 37 transitions. Stem has 4 letters. Loop has 2 letters. [2025-03-04 16:04:53,489 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:04:53,489 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 37 transitions. Stem has 6 letters. Loop has 2 letters. [2025-03-04 16:04:53,490 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:04:53,490 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 37 transitions. Stem has 4 letters. Loop has 4 letters. [2025-03-04 16:04:53,490 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-04 16:04:53,490 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 62 transitions. [2025-03-04 16:04:53,493 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-03-04 16:04:53,496 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 21 states and 26 transitions. [2025-03-04 16:04:53,496 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2025-03-04 16:04:53,497 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-03-04 16:04:53,497 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 26 transitions. [2025-03-04 16:04:53,497 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:04:53,497 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21 states and 26 transitions. [2025-03-04 16:04:53,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 26 transitions. [2025-03-04 16:04:53,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 19. [2025-03-04 16:04:53,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 18 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:53,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 24 transitions. [2025-03-04 16:04:53,514 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 24 transitions. [2025-03-04 16:04:53,514 INFO L432 stractBuchiCegarLoop]: Abstraction has 19 states and 24 transitions. [2025-03-04 16:04:53,514 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 16:04:53,514 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 24 transitions. [2025-03-04 16:04:53,515 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:53,515 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:53,515 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:53,515 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:04:53,515 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:04:53,517 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-04 16:04:53,517 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:04:53,518 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:53,518 INFO L85 PathProgramCache]: Analyzing trace with hash 367638299, now seen corresponding path program 1 times [2025-03-04 16:04:53,518 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:53,518 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708624305] [2025-03-04 16:04:53,518 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:04:53,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:53,523 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-03-04 16:04:53,526 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-03-04 16:04:53,526 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,526 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:53,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:53,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:04:53,579 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1708624305] [2025-03-04 16:04:53,579 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1708624305] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:04:53,579 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:04:53,580 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-04 16:04:53,580 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1531535057] [2025-03-04 16:04:53,580 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:04:53,581 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:04:53,581 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:53,581 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 1 times [2025-03-04 16:04:53,582 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:53,582 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445635461] [2025-03-04 16:04:53,582 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:04:53,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:53,583 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:53,583 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:53,584 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,584 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,584 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:53,584 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:53,584 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:53,584 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,584 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,584 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:53,587 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:04:53,588 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:04:53,589 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:04:53,590 INFO L87 Difference]: Start difference. First operand 19 states and 24 transitions. cyclomatic complexity: 8 Second operand has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:53,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:04:53,605 INFO L93 Difference]: Finished difference Result 31 states and 37 transitions. [2025-03-04 16:04:53,605 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 37 transitions. [2025-03-04 16:04:53,606 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-03-04 16:04:53,608 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 31 states and 37 transitions. [2025-03-04 16:04:53,608 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2025-03-04 16:04:53,608 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2025-03-04 16:04:53,608 INFO L73 IsDeterministic]: Start isDeterministic. Operand 31 states and 37 transitions. [2025-03-04 16:04:53,608 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:04:53,608 INFO L218 hiAutomatonCegarLoop]: Abstraction has 31 states and 37 transitions. [2025-03-04 16:04:53,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states and 37 transitions. [2025-03-04 16:04:53,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 21. [2025-03-04 16:04:53,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.2380952380952381) internal successors, (26), 20 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:53,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 26 transitions. [2025-03-04 16:04:53,609 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21 states and 26 transitions. [2025-03-04 16:04:53,610 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:04:53,610 INFO L432 stractBuchiCegarLoop]: Abstraction has 21 states and 26 transitions. [2025-03-04 16:04:53,610 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 16:04:53,610 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 26 transitions. [2025-03-04 16:04:53,611 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:53,611 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:53,611 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:53,611 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:04:53,611 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:04:53,611 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-04 16:04:53,611 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:04:53,611 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:53,612 INFO L85 PathProgramCache]: Analyzing trace with hash 1113124508, now seen corresponding path program 1 times [2025-03-04 16:04:53,612 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:53,612 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944701820] [2025-03-04 16:04:53,612 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:04:53,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:53,616 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-03-04 16:04:53,620 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-03-04 16:04:53,620 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,620 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:53,652 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:53,652 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:04:53,653 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944701820] [2025-03-04 16:04:53,653 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [944701820] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:04:53,653 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1035813940] [2025-03-04 16:04:53,653 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:04:53,653 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:04:53,653 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:53,657 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:04:53,658 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-03-04 16:04:53,689 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-03-04 16:04:53,690 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-03-04 16:04:53,699 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-03-04 16:04:53,699 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,699 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:53,699 INFO L256 TraceCheckSpWp]: Trace formula consists of 29 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-03-04 16:04:53,700 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:04:53,721 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:53,721 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:04:53,751 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:53,751 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1035813940] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:04:53,751 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:04:53,752 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-03-04 16:04:53,752 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [136584554] [2025-03-04 16:04:53,752 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:04:53,752 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:04:53,752 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:53,752 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 2 times [2025-03-04 16:04:53,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:53,752 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184437898] [2025-03-04 16:04:53,753 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:04:53,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:53,755 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:53,755 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:53,755 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:04:53,755 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,755 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:53,756 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:53,756 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:53,756 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,756 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,756 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:53,759 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:04:53,760 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:04:53,760 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:04:53,760 INFO L87 Difference]: Start difference. First operand 21 states and 26 transitions. cyclomatic complexity: 8 Second operand has 7 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 7 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:53,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:04:53,811 INFO L93 Difference]: Finished difference Result 69 states and 84 transitions. [2025-03-04 16:04:53,811 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 69 states and 84 transitions. [2025-03-04 16:04:53,812 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 5 [2025-03-04 16:04:53,813 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 69 states to 69 states and 84 transitions. [2025-03-04 16:04:53,813 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 38 [2025-03-04 16:04:53,813 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 38 [2025-03-04 16:04:53,813 INFO L73 IsDeterministic]: Start isDeterministic. Operand 69 states and 84 transitions. [2025-03-04 16:04:53,813 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:04:53,813 INFO L218 hiAutomatonCegarLoop]: Abstraction has 69 states and 84 transitions. [2025-03-04 16:04:53,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states and 84 transitions. [2025-03-04 16:04:53,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 27. [2025-03-04 16:04:53,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.4074074074074074) internal successors, (38), 26 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:53,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 38 transitions. [2025-03-04 16:04:53,815 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 38 transitions. [2025-03-04 16:04:53,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:04:53,815 INFO L432 stractBuchiCegarLoop]: Abstraction has 27 states and 38 transitions. [2025-03-04 16:04:53,815 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 16:04:53,816 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 38 transitions. [2025-03-04 16:04:53,816 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:53,816 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:53,816 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:53,818 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:04:53,819 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:04:53,819 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-04 16:04:53,819 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:04:53,819 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:53,819 INFO L85 PathProgramCache]: Analyzing trace with hash 232306134, now seen corresponding path program 1 times [2025-03-04 16:04:53,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:53,819 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [198376729] [2025-03-04 16:04:53,819 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:04:53,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:53,823 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-03-04 16:04:53,824 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-03-04 16:04:53,829 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,829 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:53,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:53,857 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:04:53,857 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [198376729] [2025-03-04 16:04:53,857 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [198376729] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:04:53,857 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:04:53,857 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-04 16:04:53,857 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1539131286] [2025-03-04 16:04:53,858 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:04:53,858 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:04:53,858 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:53,858 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 3 times [2025-03-04 16:04:53,858 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:53,858 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1758661783] [2025-03-04 16:04:53,858 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:04:53,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:53,861 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:53,861 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:53,861 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:04:53,861 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,861 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:53,862 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:53,862 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:53,862 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,862 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,862 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:53,864 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:04:53,865 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 16:04:53,865 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 16:04:53,865 INFO L87 Difference]: Start difference. First operand 27 states and 38 transitions. cyclomatic complexity: 14 Second operand has 3 states, 2 states have (on average 5.5) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:53,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:04:53,873 INFO L93 Difference]: Finished difference Result 30 states and 40 transitions. [2025-03-04 16:04:53,873 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 40 transitions. [2025-03-04 16:04:53,874 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:53,874 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 24 states and 30 transitions. [2025-03-04 16:04:53,874 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-04 16:04:53,874 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-04 16:04:53,874 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 30 transitions. [2025-03-04 16:04:53,874 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:04:53,874 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 30 transitions. [2025-03-04 16:04:53,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 30 transitions. [2025-03-04 16:04:53,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 23. [2025-03-04 16:04:53,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.2608695652173914) internal successors, (29), 22 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:53,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 29 transitions. [2025-03-04 16:04:53,876 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 29 transitions. [2025-03-04 16:04:53,877 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 16:04:53,877 INFO L432 stractBuchiCegarLoop]: Abstraction has 23 states and 29 transitions. [2025-03-04 16:04:53,878 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 16:04:53,878 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 29 transitions. [2025-03-04 16:04:53,878 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:53,878 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:53,878 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:53,879 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:04:53,879 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:04:53,879 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-04 16:04:53,879 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:04:53,879 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:53,879 INFO L85 PathProgramCache]: Analyzing trace with hash -92067561, now seen corresponding path program 1 times [2025-03-04 16:04:53,879 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:53,880 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [935022599] [2025-03-04 16:04:53,880 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:04:53,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:53,883 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-03-04 16:04:53,885 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-03-04 16:04:53,886 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,886 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:53,927 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:53,927 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:04:53,927 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [935022599] [2025-03-04 16:04:53,927 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [935022599] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:04:53,927 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [343751952] [2025-03-04 16:04:53,927 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:04:53,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:04:53,927 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:53,929 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:04:53,930 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-03-04 16:04:53,952 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-03-04 16:04:53,960 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-03-04 16:04:53,960 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,960 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:53,961 INFO L256 TraceCheckSpWp]: Trace formula consists of 37 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-03-04 16:04:53,961 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:04:53,974 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:53,975 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:04:53,992 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:53,992 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [343751952] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:04:53,992 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:04:53,992 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-03-04 16:04:53,992 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [375139915] [2025-03-04 16:04:53,993 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:04:53,993 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:04:53,993 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:53,993 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 4 times [2025-03-04 16:04:53,993 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:53,993 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1282758212] [2025-03-04 16:04:53,993 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:04:53,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:53,995 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-04 16:04:53,996 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:53,996 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:04:53,996 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,996 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:53,996 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:53,996 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:53,997 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:53,997 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:53,997 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:53,999 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:04:53,999 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:04:53,999 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:04:53,999 INFO L87 Difference]: Start difference. First operand 23 states and 29 transitions. cyclomatic complexity: 9 Second operand has 7 states, 6 states have (on average 4.0) internal successors, (24), 7 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:54,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:04:54,011 INFO L93 Difference]: Finished difference Result 36 states and 42 transitions. [2025-03-04 16:04:54,011 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 36 states and 42 transitions. [2025-03-04 16:04:54,012 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:54,012 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 36 states to 30 states and 36 transitions. [2025-03-04 16:04:54,012 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-04 16:04:54,012 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-04 16:04:54,012 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 36 transitions. [2025-03-04 16:04:54,012 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:04:54,012 INFO L218 hiAutomatonCegarLoop]: Abstraction has 30 states and 36 transitions. [2025-03-04 16:04:54,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 36 transitions. [2025-03-04 16:04:54,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2025-03-04 16:04:54,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.206896551724138) internal successors, (35), 28 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:54,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 35 transitions. [2025-03-04 16:04:54,014 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 35 transitions. [2025-03-04 16:04:54,014 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:04:54,015 INFO L432 stractBuchiCegarLoop]: Abstraction has 29 states and 35 transitions. [2025-03-04 16:04:54,015 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 16:04:54,015 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 35 transitions. [2025-03-04 16:04:54,015 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:54,015 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:54,015 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:54,016 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 1, 1, 1, 1, 1, 1] [2025-03-04 16:04:54,016 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:04:54,016 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-04 16:04:54,016 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:04:54,016 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:54,016 INFO L85 PathProgramCache]: Analyzing trace with hash 1994107807, now seen corresponding path program 2 times [2025-03-04 16:04:54,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:54,016 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816893619] [2025-03-04 16:04:54,016 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:04:54,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:54,019 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 15 statements into 2 equivalence classes. [2025-03-04 16:04:54,023 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 15 of 15 statements. [2025-03-04 16:04:54,023 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 16:04:54,023 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:54,076 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:54,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:04:54,076 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1816893619] [2025-03-04 16:04:54,076 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1816893619] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:04:54,076 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [49361090] [2025-03-04 16:04:54,076 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:04:54,076 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:04:54,076 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:54,078 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:04:54,079 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-03-04 16:04:54,098 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 15 statements into 2 equivalence classes. [2025-03-04 16:04:54,103 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 15 of 15 statements. [2025-03-04 16:04:54,103 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 16:04:54,103 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:54,103 INFO L256 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-04 16:04:54,104 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:04:54,129 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:54,132 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:04:54,204 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:54,205 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [49361090] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:04:54,205 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:04:54,205 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-03-04 16:04:54,205 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1364756770] [2025-03-04 16:04:54,205 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:04:54,205 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:04:54,205 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:54,205 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 5 times [2025-03-04 16:04:54,205 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:54,205 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1512363243] [2025-03-04 16:04:54,205 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:04:54,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:54,207 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:54,210 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:54,210 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:04:54,210 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:54,210 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:54,211 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:54,211 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:54,211 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:54,211 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:54,212 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:54,213 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:04:54,214 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:04:54,214 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:04:54,214 INFO L87 Difference]: Start difference. First operand 29 states and 35 transitions. cyclomatic complexity: 9 Second operand has 13 states, 12 states have (on average 2.6666666666666665) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:54,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:04:54,295 INFO L93 Difference]: Finished difference Result 163 states and 182 transitions. [2025-03-04 16:04:54,295 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 163 states and 182 transitions. [2025-03-04 16:04:54,296 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 7 [2025-03-04 16:04:54,297 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 163 states to 151 states and 170 transitions. [2025-03-04 16:04:54,297 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2025-03-04 16:04:54,297 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2025-03-04 16:04:54,297 INFO L73 IsDeterministic]: Start isDeterministic. Operand 151 states and 170 transitions. [2025-03-04 16:04:54,297 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:04:54,297 INFO L218 hiAutomatonCegarLoop]: Abstraction has 151 states and 170 transitions. [2025-03-04 16:04:54,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states and 170 transitions. [2025-03-04 16:04:54,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 41. [2025-03-04 16:04:54,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:54,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 53 transitions. [2025-03-04 16:04:54,300 INFO L240 hiAutomatonCegarLoop]: Abstraction has 41 states and 53 transitions. [2025-03-04 16:04:54,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-04 16:04:54,300 INFO L432 stractBuchiCegarLoop]: Abstraction has 41 states and 53 transitions. [2025-03-04 16:04:54,300 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 16:04:54,301 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 41 states and 53 transitions. [2025-03-04 16:04:54,301 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:54,301 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:54,301 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:54,301 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:04:54,301 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:04:54,301 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-04 16:04:54,301 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:04:54,302 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:54,302 INFO L85 PathProgramCache]: Analyzing trace with hash 1718090074, now seen corresponding path program 2 times [2025-03-04 16:04:54,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:54,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [801836741] [2025-03-04 16:04:54,302 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:04:54,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:54,304 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 19 statements into 2 equivalence classes. [2025-03-04 16:04:54,310 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 19 of 19 statements. [2025-03-04 16:04:54,312 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 16:04:54,312 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:54,368 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:54,369 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:04:54,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [801836741] [2025-03-04 16:04:54,369 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [801836741] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:04:54,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [197247005] [2025-03-04 16:04:54,369 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:04:54,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:04:54,369 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:54,371 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:04:54,372 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-03-04 16:04:54,391 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 19 statements into 2 equivalence classes. [2025-03-04 16:04:54,397 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 19 of 19 statements. [2025-03-04 16:04:54,397 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-04 16:04:54,397 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:54,398 INFO L256 TraceCheckSpWp]: Trace formula consists of 58 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-04 16:04:54,398 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:04:54,424 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:54,424 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:04:54,490 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:54,490 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [197247005] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:04:54,490 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:04:54,490 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-03-04 16:04:54,490 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1572971018] [2025-03-04 16:04:54,490 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:04:54,491 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:04:54,491 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:54,491 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 6 times [2025-03-04 16:04:54,491 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:54,491 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1485131911] [2025-03-04 16:04:54,491 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:04:54,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:54,493 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:54,493 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:54,493 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:04:54,493 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:54,493 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:54,494 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:54,494 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:54,494 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:54,494 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:54,494 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:54,497 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:04:54,498 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:04:54,498 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:04:54,498 INFO L87 Difference]: Start difference. First operand 41 states and 53 transitions. cyclomatic complexity: 15 Second operand has 13 states, 12 states have (on average 3.0) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:54,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:04:54,515 INFO L93 Difference]: Finished difference Result 66 states and 78 transitions. [2025-03-04 16:04:54,515 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 78 transitions. [2025-03-04 16:04:54,516 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:54,517 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 54 states and 66 transitions. [2025-03-04 16:04:54,517 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-04 16:04:54,517 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-04 16:04:54,517 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54 states and 66 transitions. [2025-03-04 16:04:54,517 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:04:54,517 INFO L218 hiAutomatonCegarLoop]: Abstraction has 54 states and 66 transitions. [2025-03-04 16:04:54,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states and 66 transitions. [2025-03-04 16:04:54,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 53. [2025-03-04 16:04:54,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 53 states have (on average 1.2264150943396226) internal successors, (65), 52 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:54,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 65 transitions. [2025-03-04 16:04:54,519 INFO L240 hiAutomatonCegarLoop]: Abstraction has 53 states and 65 transitions. [2025-03-04 16:04:54,519 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-04 16:04:54,520 INFO L432 stractBuchiCegarLoop]: Abstraction has 53 states and 65 transitions. [2025-03-04 16:04:54,520 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 16:04:54,520 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 53 states and 65 transitions. [2025-03-04 16:04:54,520 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:54,520 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:54,521 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:54,521 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 1, 1, 1, 1, 1, 1] [2025-03-04 16:04:54,521 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:04:54,521 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-04 16:04:54,521 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:04:54,522 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:54,522 INFO L85 PathProgramCache]: Analyzing trace with hash 1663544037, now seen corresponding path program 3 times [2025-03-04 16:04:54,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:54,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1782931574] [2025-03-04 16:04:54,522 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:04:54,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:54,526 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 27 statements into 11 equivalence classes. [2025-03-04 16:04:54,570 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 27 of 27 statements. [2025-03-04 16:04:54,570 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-04 16:04:54,570 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:54,716 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:54,717 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:04:54,717 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1782931574] [2025-03-04 16:04:54,717 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1782931574] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:04:54,717 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1592359944] [2025-03-04 16:04:54,717 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:04:54,717 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:04:54,717 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:54,719 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:04:54,721 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-04 16:04:54,740 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 27 statements into 11 equivalence classes. [2025-03-04 16:04:54,749 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 27 of 27 statements. [2025-03-04 16:04:54,750 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-04 16:04:54,750 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:54,750 INFO L256 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-04 16:04:54,751 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:04:54,787 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:54,787 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:04:54,974 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:54,974 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1592359944] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:04:54,974 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:04:54,975 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-03-04 16:04:54,975 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762824936] [2025-03-04 16:04:54,975 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:04:54,975 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:04:54,975 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:54,975 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 7 times [2025-03-04 16:04:54,975 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:54,975 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2081340158] [2025-03-04 16:04:54,975 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:04:54,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:54,976 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:54,977 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:54,977 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:54,977 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:54,977 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:54,977 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:54,977 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:54,977 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:54,977 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:54,977 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:54,979 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:04:54,979 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-04 16:04:54,979 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-03-04 16:04:54,980 INFO L87 Difference]: Start difference. First operand 53 states and 65 transitions. cyclomatic complexity: 15 Second operand has 25 states, 24 states have (on average 2.3333333333333335) internal successors, (56), 25 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:55,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:04:55,118 INFO L93 Difference]: Finished difference Result 541 states and 578 transitions. [2025-03-04 16:04:55,118 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 541 states and 578 transitions. [2025-03-04 16:04:55,121 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 13 [2025-03-04 16:04:55,128 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 541 states to 517 states and 554 transitions. [2025-03-04 16:04:55,128 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2025-03-04 16:04:55,128 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2025-03-04 16:04:55,129 INFO L73 IsDeterministic]: Start isDeterministic. Operand 517 states and 554 transitions. [2025-03-04 16:04:55,129 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:04:55,129 INFO L218 hiAutomatonCegarLoop]: Abstraction has 517 states and 554 transitions. [2025-03-04 16:04:55,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states and 554 transitions. [2025-03-04 16:04:55,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 77. [2025-03-04 16:04:55,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.3116883116883118) internal successors, (101), 76 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:55,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 101 transitions. [2025-03-04 16:04:55,136 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 101 transitions. [2025-03-04 16:04:55,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-03-04 16:04:55,137 INFO L432 stractBuchiCegarLoop]: Abstraction has 77 states and 101 transitions. [2025-03-04 16:04:55,137 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-04 16:04:55,137 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 101 transitions. [2025-03-04 16:04:55,137 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:55,138 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:55,138 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:55,138 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:04:55,138 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:04:55,138 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-04 16:04:55,138 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:04:55,139 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:55,139 INFO L85 PathProgramCache]: Analyzing trace with hash -685125856, now seen corresponding path program 3 times [2025-03-04 16:04:55,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:55,139 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564999579] [2025-03-04 16:04:55,139 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:04:55,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:55,142 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 31 statements into 11 equivalence classes. [2025-03-04 16:04:55,152 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 31 of 31 statements. [2025-03-04 16:04:55,152 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-04 16:04:55,153 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:55,293 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:55,294 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:04:55,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564999579] [2025-03-04 16:04:55,294 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564999579] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:04:55,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [343492939] [2025-03-04 16:04:55,294 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:04:55,294 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:04:55,294 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:55,296 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:04:55,297 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-03-04 16:04:55,321 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 31 statements into 11 equivalence classes. [2025-03-04 16:04:55,331 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 31 of 31 statements. [2025-03-04 16:04:55,331 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-04 16:04:55,331 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:55,332 INFO L256 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-04 16:04:55,333 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:04:55,369 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:55,369 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:04:55,576 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:55,576 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [343492939] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:04:55,576 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:04:55,576 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-03-04 16:04:55,576 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [31596144] [2025-03-04 16:04:55,577 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:04:55,577 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:04:55,577 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:55,577 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 8 times [2025-03-04 16:04:55,577 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:55,577 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594833942] [2025-03-04 16:04:55,577 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:04:55,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:55,579 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:55,579 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:55,579 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:04:55,579 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:55,579 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:55,580 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:55,580 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:55,580 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:55,580 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:55,580 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:55,582 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:04:55,582 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-04 16:04:55,583 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-03-04 16:04:55,583 INFO L87 Difference]: Start difference. First operand 77 states and 101 transitions. cyclomatic complexity: 27 Second operand has 25 states, 24 states have (on average 2.5) internal successors, (60), 25 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:55,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:04:55,609 INFO L93 Difference]: Finished difference Result 126 states and 150 transitions. [2025-03-04 16:04:55,610 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 126 states and 150 transitions. [2025-03-04 16:04:55,611 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:55,611 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 126 states to 102 states and 126 transitions. [2025-03-04 16:04:55,612 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-04 16:04:55,612 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-04 16:04:55,612 INFO L73 IsDeterministic]: Start isDeterministic. Operand 102 states and 126 transitions. [2025-03-04 16:04:55,612 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:04:55,612 INFO L218 hiAutomatonCegarLoop]: Abstraction has 102 states and 126 transitions. [2025-03-04 16:04:55,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states and 126 transitions. [2025-03-04 16:04:55,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 101. [2025-03-04 16:04:55,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.2376237623762376) internal successors, (125), 100 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:55,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 125 transitions. [2025-03-04 16:04:55,617 INFO L240 hiAutomatonCegarLoop]: Abstraction has 101 states and 125 transitions. [2025-03-04 16:04:55,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-03-04 16:04:55,620 INFO L432 stractBuchiCegarLoop]: Abstraction has 101 states and 125 transitions. [2025-03-04 16:04:55,620 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-04 16:04:55,620 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 125 transitions. [2025-03-04 16:04:55,621 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:55,621 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:55,621 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:55,621 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 1, 1, 1, 1, 1, 1] [2025-03-04 16:04:55,621 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:04:55,621 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-04 16:04:55,621 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:04:55,623 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:55,623 INFO L85 PathProgramCache]: Analyzing trace with hash -1351287183, now seen corresponding path program 4 times [2025-03-04 16:04:55,623 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:55,623 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406014941] [2025-03-04 16:04:55,623 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:04:55,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:55,630 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 51 statements into 2 equivalence classes. [2025-03-04 16:04:55,639 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 51 of 51 statements. [2025-03-04 16:04:55,641 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:04:55,641 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:56,055 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:56,055 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:04:56,055 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406014941] [2025-03-04 16:04:56,055 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [406014941] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:04:56,055 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [557890396] [2025-03-04 16:04:56,055 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:04:56,055 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:04:56,055 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:56,057 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:04:56,059 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-04 16:04:56,083 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 51 statements into 2 equivalence classes. [2025-03-04 16:04:56,099 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 51 of 51 statements. [2025-03-04 16:04:56,099 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:04:56,099 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:56,100 INFO L256 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-04 16:04:56,101 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:04:56,181 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:56,181 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:04:56,862 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:56,862 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [557890396] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:04:56,862 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:04:56,862 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 47 [2025-03-04 16:04:56,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [995674726] [2025-03-04 16:04:56,862 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:04:56,863 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:04:56,863 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:56,863 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 9 times [2025-03-04 16:04:56,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:56,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [526781450] [2025-03-04 16:04:56,863 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:04:56,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:56,865 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:56,865 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:56,865 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:04:56,865 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:56,865 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:56,865 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:56,866 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:56,866 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:56,866 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:56,866 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:56,868 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:04:56,869 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2025-03-04 16:04:56,870 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2025-03-04 16:04:56,870 INFO L87 Difference]: Start difference. First operand 101 states and 125 transitions. cyclomatic complexity: 27 Second operand has 48 states, 47 states have (on average 2.127659574468085) internal successors, (100), 48 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:57,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:04:57,297 INFO L93 Difference]: Finished difference Result 1945 states and 2018 transitions. [2025-03-04 16:04:57,297 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1945 states and 2018 transitions. [2025-03-04 16:04:57,309 INFO L131 ngComponentsAnalysis]: Automaton has 25 accepting balls. 25 [2025-03-04 16:04:57,321 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1945 states to 1897 states and 1970 transitions. [2025-03-04 16:04:57,321 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 82 [2025-03-04 16:04:57,322 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 82 [2025-03-04 16:04:57,322 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1897 states and 1970 transitions. [2025-03-04 16:04:57,322 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:04:57,322 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1897 states and 1970 transitions. [2025-03-04 16:04:57,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1897 states and 1970 transitions. [2025-03-04 16:04:57,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1897 to 149. [2025-03-04 16:04:57,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 149 states, 149 states have (on average 1.3221476510067114) internal successors, (197), 148 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:57,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 197 transitions. [2025-03-04 16:04:57,341 INFO L240 hiAutomatonCegarLoop]: Abstraction has 149 states and 197 transitions. [2025-03-04 16:04:57,342 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-03-04 16:04:57,342 INFO L432 stractBuchiCegarLoop]: Abstraction has 149 states and 197 transitions. [2025-03-04 16:04:57,342 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-04 16:04:57,342 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 149 states and 197 transitions. [2025-03-04 16:04:57,343 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:57,343 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:57,343 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:57,344 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:04:57,344 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:04:57,345 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-04 16:04:57,345 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:04:57,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:57,345 INFO L85 PathProgramCache]: Analyzing trace with hash -1755738196, now seen corresponding path program 4 times [2025-03-04 16:04:57,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:57,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167575444] [2025-03-04 16:04:57,345 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:04:57,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:57,351 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 55 statements into 2 equivalence classes. [2025-03-04 16:04:57,361 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 55 of 55 statements. [2025-03-04 16:04:57,361 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:04:57,361 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:57,728 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:57,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:04:57,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167575444] [2025-03-04 16:04:57,728 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1167575444] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:04:57,729 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1872020536] [2025-03-04 16:04:57,729 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:04:57,729 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:04:57,729 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:57,732 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:04:57,733 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-04 16:04:57,760 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 55 statements into 2 equivalence classes. [2025-03-04 16:04:57,775 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 55 of 55 statements. [2025-03-04 16:04:57,776 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:04:57,776 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:57,776 INFO L256 TraceCheckSpWp]: Trace formula consists of 184 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-04 16:04:57,778 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:04:57,849 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:57,850 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:04:58,429 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:58,429 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1872020536] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:04:58,429 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:04:58,429 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 48 [2025-03-04 16:04:58,430 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [806554293] [2025-03-04 16:04:58,430 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:04:58,430 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:04:58,430 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:58,430 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 10 times [2025-03-04 16:04:58,430 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:58,430 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2045754763] [2025-03-04 16:04:58,430 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:04:58,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:58,435 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-04 16:04:58,435 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:58,436 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:04:58,436 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:58,436 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:04:58,436 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:04:58,436 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:04:58,436 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:04:58,436 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:04:58,436 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:04:58,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:04:58,439 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-03-04 16:04:58,439 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2025-03-04 16:04:58,440 INFO L87 Difference]: Start difference. First operand 149 states and 197 transitions. cyclomatic complexity: 51 Second operand has 49 states, 48 states have (on average 2.25) internal successors, (108), 49 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:58,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:04:58,497 INFO L93 Difference]: Finished difference Result 246 states and 294 transitions. [2025-03-04 16:04:58,497 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 246 states and 294 transitions. [2025-03-04 16:04:58,498 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:58,499 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 246 states to 198 states and 246 transitions. [2025-03-04 16:04:58,499 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-04 16:04:58,499 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-04 16:04:58,499 INFO L73 IsDeterministic]: Start isDeterministic. Operand 198 states and 246 transitions. [2025-03-04 16:04:58,499 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:04:58,499 INFO L218 hiAutomatonCegarLoop]: Abstraction has 198 states and 246 transitions. [2025-03-04 16:04:58,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states and 246 transitions. [2025-03-04 16:04:58,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 197. [2025-03-04 16:04:58,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 197 states, 197 states have (on average 1.2436548223350254) internal successors, (245), 196 states have internal predecessors, (245), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:04:58,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 245 transitions. [2025-03-04 16:04:58,507 INFO L240 hiAutomatonCegarLoop]: Abstraction has 197 states and 245 transitions. [2025-03-04 16:04:58,507 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-03-04 16:04:58,508 INFO L432 stractBuchiCegarLoop]: Abstraction has 197 states and 245 transitions. [2025-03-04 16:04:58,508 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-04 16:04:58,508 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 197 states and 245 transitions. [2025-03-04 16:04:58,509 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:04:58,509 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:04:58,509 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:04:58,510 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 1, 1, 1, 1, 1, 1] [2025-03-04 16:04:58,510 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:04:58,510 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-04 16:04:58,514 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:04:58,514 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:04:58,514 INFO L85 PathProgramCache]: Analyzing trace with hash 312408457, now seen corresponding path program 5 times [2025-03-04 16:04:58,514 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:04:58,514 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1559475781] [2025-03-04 16:04:58,514 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:04:58,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:04:58,520 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 99 statements into 47 equivalence classes. [2025-03-04 16:04:58,556 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 99 of 99 statements. [2025-03-04 16:04:58,556 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-04 16:04:58,557 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:59,593 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:59,593 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:04:59,593 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1559475781] [2025-03-04 16:04:59,593 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1559475781] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:04:59,593 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [188271250] [2025-03-04 16:04:59,593 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:04:59,593 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:04:59,593 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:04:59,599 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:04:59,601 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-04 16:04:59,631 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 99 statements into 47 equivalence classes. [2025-03-04 16:04:59,666 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 99 of 99 statements. [2025-03-04 16:04:59,666 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-04 16:04:59,666 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:04:59,668 INFO L256 TraceCheckSpWp]: Trace formula consists of 254 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-03-04 16:04:59,670 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:04:59,790 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:04:59,790 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:05:01,948 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:05:01,948 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [188271250] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:05:01,948 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:05:01,948 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2025-03-04 16:05:01,948 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76139206] [2025-03-04 16:05:01,948 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:05:01,948 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:05:01,949 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:05:01,949 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 11 times [2025-03-04 16:05:01,949 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:05:01,949 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1227418783] [2025-03-04 16:05:01,949 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:05:01,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:05:01,950 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:05:01,950 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:05:01,950 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:05:01,950 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:01,950 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:05:01,950 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:05:01,950 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:05:01,950 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:01,950 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:01,951 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:05:01,953 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:05:01,954 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-03-04 16:05:01,957 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-03-04 16:05:01,957 INFO L87 Difference]: Start difference. First operand 197 states and 245 transitions. cyclomatic complexity: 51 Second operand has 96 states, 95 states have (on average 2.0631578947368423) internal successors, (196), 96 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:05:03,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:05:03,829 INFO L93 Difference]: Finished difference Result 7345 states and 7490 transitions. [2025-03-04 16:05:03,829 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7345 states and 7490 transitions. [2025-03-04 16:05:03,859 INFO L131 ngComponentsAnalysis]: Automaton has 49 accepting balls. 49 [2025-03-04 16:05:03,883 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7345 states to 7249 states and 7394 transitions. [2025-03-04 16:05:03,883 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 154 [2025-03-04 16:05:03,884 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 154 [2025-03-04 16:05:03,884 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7249 states and 7394 transitions. [2025-03-04 16:05:03,886 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:05:03,886 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7249 states and 7394 transitions. [2025-03-04 16:05:03,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7249 states and 7394 transitions. [2025-03-04 16:05:03,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7249 to 293. [2025-03-04 16:05:03,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 293 states have (on average 1.3276450511945392) internal successors, (389), 292 states have internal predecessors, (389), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:05:03,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 389 transitions. [2025-03-04 16:05:03,913 INFO L240 hiAutomatonCegarLoop]: Abstraction has 293 states and 389 transitions. [2025-03-04 16:05:03,914 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-03-04 16:05:03,914 INFO L432 stractBuchiCegarLoop]: Abstraction has 293 states and 389 transitions. [2025-03-04 16:05:03,914 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-04 16:05:03,914 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 293 states and 389 transitions. [2025-03-04 16:05:03,915 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:05:03,915 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:05:03,915 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:05:03,916 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:05:03,916 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:05:03,916 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-04 16:05:03,918 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:05:03,918 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:05:03,918 INFO L85 PathProgramCache]: Analyzing trace with hash -140286780, now seen corresponding path program 5 times [2025-03-04 16:05:03,918 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:05:03,919 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1426903054] [2025-03-04 16:05:03,919 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:05:03,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:05:03,924 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 103 statements into 47 equivalence classes. [2025-03-04 16:05:03,958 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 103 of 103 statements. [2025-03-04 16:05:03,960 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-04 16:05:03,960 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:05:05,001 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:05:05,001 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:05:05,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1426903054] [2025-03-04 16:05:05,001 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1426903054] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:05:05,001 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [445058424] [2025-03-04 16:05:05,002 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:05:05,002 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:05:05,002 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:05:05,006 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:05:05,007 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-03-04 16:05:05,038 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 103 statements into 47 equivalence classes. [2025-03-04 16:05:05,082 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 103 of 103 statements. [2025-03-04 16:05:05,082 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-04 16:05:05,082 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:05:05,084 INFO L256 TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-03-04 16:05:05,086 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:05:05,209 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:05:05,209 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:05:07,152 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:05:07,152 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [445058424] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:05:07,152 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:05:07,152 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2025-03-04 16:05:07,152 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094955637] [2025-03-04 16:05:07,152 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:05:07,152 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:05:07,153 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:05:07,153 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 12 times [2025-03-04 16:05:07,153 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:05:07,153 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1586516571] [2025-03-04 16:05:07,153 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:05:07,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:05:07,157 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:05:07,158 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:05:07,158 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:05:07,158 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:07,158 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:05:07,158 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:05:07,158 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:05:07,158 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:07,158 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:07,159 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:05:07,163 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:05:07,164 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-03-04 16:05:07,166 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-03-04 16:05:07,166 INFO L87 Difference]: Start difference. First operand 293 states and 389 transitions. cyclomatic complexity: 99 Second operand has 96 states, 95 states have (on average 2.1052631578947367) internal successors, (200), 96 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:05:07,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:05:07,302 INFO L93 Difference]: Finished difference Result 486 states and 582 transitions. [2025-03-04 16:05:07,302 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 486 states and 582 transitions. [2025-03-04 16:05:07,304 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:05:07,308 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 486 states to 390 states and 486 transitions. [2025-03-04 16:05:07,309 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-04 16:05:07,309 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-04 16:05:07,309 INFO L73 IsDeterministic]: Start isDeterministic. Operand 390 states and 486 transitions. [2025-03-04 16:05:07,309 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:05:07,309 INFO L218 hiAutomatonCegarLoop]: Abstraction has 390 states and 486 transitions. [2025-03-04 16:05:07,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states and 486 transitions. [2025-03-04 16:05:07,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 389. [2025-03-04 16:05:07,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 389 states, 389 states have (on average 1.2467866323907455) internal successors, (485), 388 states have internal predecessors, (485), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:05:07,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 485 transitions. [2025-03-04 16:05:07,313 INFO L240 hiAutomatonCegarLoop]: Abstraction has 389 states and 485 transitions. [2025-03-04 16:05:07,314 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-03-04 16:05:07,314 INFO L432 stractBuchiCegarLoop]: Abstraction has 389 states and 485 transitions. [2025-03-04 16:05:07,314 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-03-04 16:05:07,314 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 389 states and 485 transitions. [2025-03-04 16:05:07,315 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:05:07,318 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:05:07,318 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:05:07,320 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 1, 1, 1, 1, 1, 1] [2025-03-04 16:05:07,320 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:05:07,320 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-04 16:05:07,323 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:05:07,323 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:05:07,323 INFO L85 PathProgramCache]: Analyzing trace with hash -822067271, now seen corresponding path program 6 times [2025-03-04 16:05:07,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:05:07,323 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033129140] [2025-03-04 16:05:07,323 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:05:07,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:05:07,331 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 195 statements into 95 equivalence classes. [2025-03-04 16:05:07,389 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 195 of 195 statements. [2025-03-04 16:05:07,390 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-04 16:05:07,390 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:05:10,950 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:05:10,951 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:05:10,951 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1033129140] [2025-03-04 16:05:10,951 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1033129140] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:05:10,951 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [93116631] [2025-03-04 16:05:10,951 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:05:10,951 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:05:10,951 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:05:10,953 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:05:10,954 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-03-04 16:05:10,991 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 195 statements into 95 equivalence classes. [2025-03-04 16:05:11,064 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 195 of 195 statements. [2025-03-04 16:05:11,064 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-04 16:05:11,064 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:05:11,066 INFO L256 TraceCheckSpWp]: Trace formula consists of 494 conjuncts, 96 conjuncts are in the unsatisfiable core [2025-03-04 16:05:11,069 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:05:11,288 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:05:11,288 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:05:14,272 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:05:14,272 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [93116631] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:05:14,272 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:05:14,272 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 102 [2025-03-04 16:05:14,272 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [164119973] [2025-03-04 16:05:14,272 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:05:14,273 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:05:14,273 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:05:14,273 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 13 times [2025-03-04 16:05:14,273 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:05:14,273 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793162795] [2025-03-04 16:05:14,273 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:05:14,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:05:14,274 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:05:14,274 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:05:14,274 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:14,274 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:14,274 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:05:14,275 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:05:14,275 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:05:14,275 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:14,275 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:14,275 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:05:14,278 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:05:14,278 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2025-03-04 16:05:14,280 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5253, Invalid=5253, Unknown=0, NotChecked=0, Total=10506 [2025-03-04 16:05:14,280 INFO L87 Difference]: Start difference. First operand 389 states and 485 transitions. cyclomatic complexity: 99 Second operand has 103 states, 102 states have (on average 2.088235294117647) internal successors, (213), 103 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:05:15,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:05:15,956 INFO L93 Difference]: Finished difference Result 10693 states and 10802 transitions. [2025-03-04 16:05:15,956 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10693 states and 10802 transitions. [2025-03-04 16:05:15,984 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 7 [2025-03-04 16:05:16,016 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10693 states to 10681 states and 10790 transitions. [2025-03-04 16:05:16,016 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2025-03-04 16:05:16,016 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2025-03-04 16:05:16,016 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10681 states and 10790 transitions. [2025-03-04 16:05:16,024 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:05:16,025 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10681 states and 10790 transitions. [2025-03-04 16:05:16,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10681 states and 10790 transitions. [2025-03-04 16:05:16,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10681 to 401. [2025-03-04 16:05:16,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 401 states, 401 states have (on average 1.254364089775561) internal successors, (503), 400 states have internal predecessors, (503), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:05:16,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 401 states to 401 states and 503 transitions. [2025-03-04 16:05:16,067 INFO L240 hiAutomatonCegarLoop]: Abstraction has 401 states and 503 transitions. [2025-03-04 16:05:16,069 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2025-03-04 16:05:16,069 INFO L432 stractBuchiCegarLoop]: Abstraction has 401 states and 503 transitions. [2025-03-04 16:05:16,069 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-03-04 16:05:16,069 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 401 states and 503 transitions. [2025-03-04 16:05:16,070 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:05:16,070 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:05:16,070 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:05:16,071 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:05:16,072 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:05:16,072 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-04 16:05:16,072 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:05:16,073 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:05:16,073 INFO L85 PathProgramCache]: Analyzing trace with hash -810524940, now seen corresponding path program 6 times [2025-03-04 16:05:16,073 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:05:16,073 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1988280382] [2025-03-04 16:05:16,073 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:05:16,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:05:16,080 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 199 statements into 95 equivalence classes. [2025-03-04 16:05:16,154 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 199 of 199 statements. [2025-03-04 16:05:16,155 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-04 16:05:16,155 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:05:19,681 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:05:19,681 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:05:19,681 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1988280382] [2025-03-04 16:05:19,681 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1988280382] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-04 16:05:19,681 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [302329817] [2025-03-04 16:05:19,681 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:05:19,681 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-04 16:05:19,681 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:05:19,683 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-04 16:05:19,684 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2025-03-04 16:05:19,725 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 199 statements into 95 equivalence classes. [2025-03-04 16:05:19,812 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 199 of 199 statements. [2025-03-04 16:05:19,812 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-04 16:05:19,812 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:05:19,815 INFO L256 TraceCheckSpWp]: Trace formula consists of 688 conjuncts, 96 conjuncts are in the unsatisfiable core [2025-03-04 16:05:19,818 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-04 16:05:20,016 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:05:20,016 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-04 16:05:23,318 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:05:23,319 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [302329817] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-04 16:05:23,319 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-04 16:05:23,319 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 102 [2025-03-04 16:05:23,319 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2038977017] [2025-03-04 16:05:23,319 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-04 16:05:23,319 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-04 16:05:23,319 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:05:23,319 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 14 times [2025-03-04 16:05:23,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:05:23,319 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1120453366] [2025-03-04 16:05:23,319 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:05:23,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:05:23,321 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:05:23,321 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:05:23,321 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:05:23,321 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:23,321 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:05:23,321 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:05:23,321 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:05:23,321 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:23,321 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:23,321 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:05:23,323 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:05:23,324 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2025-03-04 16:05:23,326 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5253, Invalid=5253, Unknown=0, NotChecked=0, Total=10506 [2025-03-04 16:05:23,326 INFO L87 Difference]: Start difference. First operand 401 states and 503 transitions. cyclomatic complexity: 105 Second operand has 103 states, 102 states have (on average 2.127450980392157) internal successors, (217), 103 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:05:23,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:05:23,425 INFO L93 Difference]: Finished difference Result 426 states and 528 transitions. [2025-03-04 16:05:23,425 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 426 states and 528 transitions. [2025-03-04 16:05:23,426 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:05:23,427 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 426 states to 414 states and 516 transitions. [2025-03-04 16:05:23,427 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-04 16:05:23,427 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-03-04 16:05:23,427 INFO L73 IsDeterministic]: Start isDeterministic. Operand 414 states and 516 transitions. [2025-03-04 16:05:23,427 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-04 16:05:23,428 INFO L218 hiAutomatonCegarLoop]: Abstraction has 414 states and 516 transitions. [2025-03-04 16:05:23,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 414 states and 516 transitions. [2025-03-04 16:05:23,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 414 to 413. [2025-03-04 16:05:23,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 413 states, 413 states have (on average 1.2469733656174333) internal successors, (515), 412 states have internal predecessors, (515), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:05:23,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 515 transitions. [2025-03-04 16:05:23,432 INFO L240 hiAutomatonCegarLoop]: Abstraction has 413 states and 515 transitions. [2025-03-04 16:05:23,432 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2025-03-04 16:05:23,433 INFO L432 stractBuchiCegarLoop]: Abstraction has 413 states and 515 transitions. [2025-03-04 16:05:23,433 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-03-04 16:05:23,433 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 413 states and 515 transitions. [2025-03-04 16:05:23,434 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-04 16:05:23,434 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:05:23,434 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:05:23,435 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [101, 100, 1, 1, 1, 1, 1, 1] [2025-03-04 16:05:23,435 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-04 16:05:23,435 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-04 16:05:23,435 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-04 16:05:23,435 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:05:23,435 INFO L85 PathProgramCache]: Analyzing trace with hash -1638078465, now seen corresponding path program 7 times [2025-03-04 16:05:23,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:05:23,436 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762321486] [2025-03-04 16:05:23,436 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:05:23,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:05:23,441 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-03-04 16:05:23,457 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-03-04 16:05:23,458 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:23,458 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:23,458 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:05:23,461 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-03-04 16:05:23,486 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-03-04 16:05:23,487 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:23,487 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:23,500 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:05:23,501 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:05:23,501 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 15 times [2025-03-04 16:05:23,501 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:05:23,501 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458426061] [2025-03-04 16:05:23,501 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:05:23,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:05:23,502 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:05:23,502 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:05:23,502 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:05:23,502 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:23,502 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:05:23,503 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-04 16:05:23,503 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-04 16:05:23,503 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:23,503 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:23,503 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:05:23,504 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:05:23,504 INFO L85 PathProgramCache]: Analyzing trace with hash 759175175, now seen corresponding path program 1 times [2025-03-04 16:05:23,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:05:23,504 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262167096] [2025-03-04 16:05:23,504 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:05:23,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:05:23,510 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 208 statements into 1 equivalence classes. [2025-03-04 16:05:23,533 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 208 of 208 statements. [2025-03-04 16:05:23,533 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:23,533 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:23,533 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:05:23,536 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 208 statements into 1 equivalence classes. [2025-03-04 16:05:23,556 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 208 of 208 statements. [2025-03-04 16:05:23,556 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:23,556 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:23,564 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:05:30,852 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-03-04 16:05:30,874 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-03-04 16:05:30,874 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:30,875 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:30,875 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:05:30,894 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-03-04 16:05:30,914 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-03-04 16:05:30,914 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:05:30,914 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:05:31,029 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 04.03 04:05:31 BoogieIcfgContainer [2025-03-04 16:05:31,030 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-04 16:05:31,031 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-04 16:05:31,031 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-04 16:05:31,031 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-04 16:05:31,032 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:04:52" (3/4) ... [2025-03-04 16:05:31,033 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-03-04 16:05:31,082 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-04 16:05:31,082 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-04 16:05:31,083 INFO L158 Benchmark]: Toolchain (without parser) took 38637.44ms. Allocated memory was 142.6MB in the beginning and 1.0GB in the end (delta: 897.6MB). Free memory was 112.8MB in the beginning and 830.9MB in the end (delta: -718.1MB). Peak memory consumption was 178.7MB. Max. memory is 16.1GB. [2025-03-04 16:05:31,083 INFO L158 Benchmark]: CDTParser took 0.66ms. Allocated memory is still 201.3MB. Free memory is still 123.9MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 16:05:31,083 INFO L158 Benchmark]: CACSL2BoogieTranslator took 162.83ms. Allocated memory is still 142.6MB. Free memory was 112.3MB in the beginning and 101.6MB in the end (delta: 10.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 16:05:31,084 INFO L158 Benchmark]: Boogie Procedure Inliner took 26.42ms. Allocated memory is still 142.6MB. Free memory was 101.6MB in the beginning and 100.7MB in the end (delta: 919.7kB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 16:05:31,084 INFO L158 Benchmark]: Boogie Preprocessor took 34.17ms. Allocated memory is still 142.6MB. Free memory was 100.7MB in the beginning and 99.7MB in the end (delta: 924.4kB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 16:05:31,084 INFO L158 Benchmark]: IcfgBuilder took 187.68ms. Allocated memory is still 142.6MB. Free memory was 99.7MB in the beginning and 88.1MB in the end (delta: 11.6MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-04 16:05:31,084 INFO L158 Benchmark]: BuchiAutomizer took 38170.01ms. Allocated memory was 142.6MB in the beginning and 1.0GB in the end (delta: 897.6MB). Free memory was 88.1MB in the beginning and 835.3MB in the end (delta: -747.2MB). Peak memory consumption was 145.2MB. Max. memory is 16.1GB. [2025-03-04 16:05:31,084 INFO L158 Benchmark]: Witness Printer took 52.14ms. Allocated memory is still 1.0GB. Free memory was 835.3MB in the beginning and 830.9MB in the end (delta: 4.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 16:05:31,085 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.66ms. Allocated memory is still 201.3MB. Free memory is still 123.9MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 162.83ms. Allocated memory is still 142.6MB. Free memory was 112.3MB in the beginning and 101.6MB in the end (delta: 10.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 26.42ms. Allocated memory is still 142.6MB. Free memory was 101.6MB in the beginning and 100.7MB in the end (delta: 919.7kB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 34.17ms. Allocated memory is still 142.6MB. Free memory was 100.7MB in the beginning and 99.7MB in the end (delta: 924.4kB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 187.68ms. Allocated memory is still 142.6MB. Free memory was 99.7MB in the beginning and 88.1MB in the end (delta: 11.6MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 38170.01ms. Allocated memory was 142.6MB in the beginning and 1.0GB in the end (delta: 897.6MB). Free memory was 88.1MB in the beginning and 835.3MB in the end (delta: -747.2MB). Peak memory consumption was 145.2MB. Max. memory is 16.1GB. * Witness Printer took 52.14ms. Allocated memory is still 1.0GB. Free memory was 835.3MB in the beginning and 830.9MB in the end (delta: 4.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 15 terminating modules (14 trivial, 1 deterministic, 0 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function (((long long) -2 * i) + 1999999) and consists of 4 locations. 14 modules have a trivial ranking function, the largest among these consists of 103 locations. The remainder module has 413 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 38.0s and 16 iterations. TraceHistogramMax:101. Analysis of lassos took 32.8s. Construction of modules took 1.2s. Büchi inclusion checks took 3.8s. Highest rank in rank-based complementation 3. Minimization of det autom 0. Minimization of nondet autom 15. Automata minimization 0.1s AutomataMinimizationTime, 15 MinimizatonAttempts, 19595 StatesRemovedByMinimization, 15 NontrivialMinimizations. Non-live state removal took 0.1s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [1, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 5177 SdHoareTripleChecker+Valid, 1.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 5176 mSDsluCounter, 1895 SdHoareTripleChecker+Invalid, 1.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1717 mSDsCounter, 1212 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1672 IncrementalHoareTripleChecker+Invalid, 2884 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1212 mSolverCounterUnsat, 178 mSDtfsCounter, 1672 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT1 conc0 concLT0 SILN14 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: Lassos: inital10 mio100 ax100 hnf100 lsp100 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq160 hnf93 smp100 dnf100 smp100 tf113 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: sat Degree: 0 Time: 35ms VariablesStem: 0 VariablesLoop: 2 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 0 MotzkinApplications: 2 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 1 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 24]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L25] int i, j; [L27] i = 0 VAL [i=0] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=1] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=2] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=3] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=4] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=5] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=6] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=7] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=8] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=9] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=10] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=11] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=12] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=13] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=14] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=15] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=16] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=17] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=18] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=19] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=20] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=21] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=22] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=23] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=24] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=25] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=26] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=27] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=28] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=29] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=30] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=31] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=32] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=33] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=34] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=35] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=36] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=37] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=38] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=39] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=40] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=41] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=42] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=43] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=44] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=45] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=46] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=47] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=48] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=49] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=50] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=51] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=52] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=53] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=54] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=55] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=56] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=57] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=58] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=59] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=60] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=61] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=62] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=63] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=64] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=65] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=66] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=67] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=68] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=69] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=70] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=71] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=72] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=73] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=74] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=75] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=76] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=77] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=78] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=79] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=80] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=81] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=82] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=83] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=84] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=85] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=86] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=87] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=88] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=89] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=90] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=91] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=92] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=93] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=94] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=95] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=96] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=97] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=98] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=99] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=100] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND FALSE !(__VERIFIER_nondet_int() && i < 1000000) [L32] COND TRUE i >= 100 Loop: [L39] goto STUCK; End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 24]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L25] int i, j; [L27] i = 0 VAL [i=0] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=1] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=2] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=3] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=4] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=5] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=6] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=7] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=8] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=9] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=10] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=11] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=12] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=13] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=14] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=15] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=16] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=17] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=18] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=19] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=20] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=21] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=22] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=23] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=24] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=25] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=26] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=27] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=28] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=29] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=30] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=31] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=32] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=33] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=34] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=35] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=36] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=37] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=38] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=39] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=40] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=41] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=42] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=43] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=44] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=45] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=46] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=47] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=48] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=49] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=50] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=51] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=52] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=53] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=54] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=55] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=56] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=57] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=58] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=59] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=60] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=61] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=62] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=63] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=64] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=65] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=66] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=67] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=68] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=69] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=70] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=71] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=72] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=73] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=74] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=75] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=76] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=77] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=78] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=79] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=80] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=81] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=82] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=83] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=84] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=85] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=86] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=87] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=88] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=89] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=90] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=91] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=92] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=93] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=94] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=95] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=96] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=97] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=98] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=99] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=100] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND FALSE !(__VERIFIER_nondet_int() && i < 1000000) [L32] COND TRUE i >= 100 Loop: [L39] goto STUCK; End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-03-04 16:05:31,109 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2025-03-04 16:05:31,307 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2025-03-04 16:05:31,507 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2025-03-04 16:05:31,707 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2025-03-04 16:05:31,907 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2025-03-04 16:05:32,107 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2025-03-04 16:05:32,307 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2025-03-04 16:05:32,508 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2025-03-04 16:05:32,708 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2025-03-04 16:05:32,908 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2025-03-04 16:05:33,109 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2025-03-04 16:05:33,311 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2025-03-04 16:05:33,513 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)