./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_12.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_12.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 12c3feea735c5360de013afbcf9aaa3880d39f75cbb7661493cccf003151044d --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 15:46:39,081 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 15:46:39,130 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-04 15:46:39,133 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 15:46:39,133 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 15:46:39,133 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 15:46:39,151 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 15:46:39,151 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 15:46:39,151 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 15:46:39,151 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 15:46:39,152 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 15:46:39,152 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 15:46:39,152 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 15:46:39,152 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 15:46:39,153 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 15:46:39,153 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 15:46:39,153 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 15:46:39,153 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-04 15:46:39,153 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 15:46:39,153 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 15:46:39,153 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 15:46:39,153 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 15:46:39,153 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 15:46:39,153 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 15:46:39,153 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 15:46:39,153 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 15:46:39,153 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 15:46:39,153 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 12c3feea735c5360de013afbcf9aaa3880d39f75cbb7661493cccf003151044d [2025-03-04 15:46:39,371 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 15:46:39,376 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 15:46:39,377 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 15:46:39,378 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 15:46:39,378 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 15:46:39,379 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_12.c [2025-03-04 15:46:40,485 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c2656c8b3/1e319f49e0b74a1084387e88dabaf0c2/FLAG1301074cc [2025-03-04 15:46:40,733 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 15:46:40,734 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/locks/test_locks_12.c [2025-03-04 15:46:40,748 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c2656c8b3/1e319f49e0b74a1084387e88dabaf0c2/FLAG1301074cc [2025-03-04 15:46:40,760 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c2656c8b3/1e319f49e0b74a1084387e88dabaf0c2 [2025-03-04 15:46:40,762 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 15:46:40,764 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 15:46:40,765 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 15:46:40,767 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 15:46:40,771 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 15:46:40,771 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,772 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4e5570f7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40, skipping insertion in model container [2025-03-04 15:46:40,772 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,785 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 15:46:40,898 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:46:40,905 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 15:46:40,919 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:46:40,931 INFO L204 MainTranslator]: Completed translation [2025-03-04 15:46:40,931 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40 WrapperNode [2025-03-04 15:46:40,932 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 15:46:40,932 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 15:46:40,932 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 15:46:40,932 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 15:46:40,937 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,945 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,958 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 157 [2025-03-04 15:46:40,959 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 15:46:40,960 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 15:46:40,960 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 15:46:40,960 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 15:46:40,965 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,965 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,966 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,971 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-04 15:46:40,972 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,972 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,978 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,979 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,980 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,980 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,985 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 15:46:40,986 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 15:46:40,986 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 15:46:40,986 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 15:46:40,986 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (1/1) ... [2025-03-04 15:46:40,991 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:46:41,000 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:46:41,011 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:46:41,014 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 15:46:41,029 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-04 15:46:41,029 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 15:46:41,029 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 15:46:41,029 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-04 15:46:41,072 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 15:46:41,074 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 15:46:41,217 INFO L? ?]: Removed 28 outVars from TransFormulas that were not future-live. [2025-03-04 15:46:41,217 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 15:46:41,227 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 15:46:41,227 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-04 15:46:41,227 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:41 BoogieIcfgContainer [2025-03-04 15:46:41,227 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 15:46:41,228 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 15:46:41,228 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 15:46:41,231 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 15:46:41,232 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:41,232 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 03:46:40" (1/3) ... [2025-03-04 15:46:41,233 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6b07a3b9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:46:41, skipping insertion in model container [2025-03-04 15:46:41,233 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:41,233 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:40" (2/3) ... [2025-03-04 15:46:41,234 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6b07a3b9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:46:41, skipping insertion in model container [2025-03-04 15:46:41,234 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:41,234 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:41" (3/3) ... [2025-03-04 15:46:41,235 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_12.c [2025-03-04 15:46:41,270 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 15:46:41,270 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 15:46:41,270 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 15:46:41,270 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 15:46:41,270 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 15:46:41,271 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 15:46:41,271 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 15:46:41,271 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 15:46:41,276 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 46 states, 45 states have (on average 1.8444444444444446) internal successors, (83), 45 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,290 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 38 [2025-03-04 15:46:41,291 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:41,291 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:41,295 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:41,295 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:41,295 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 15:46:41,295 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 46 states, 45 states have (on average 1.8444444444444446) internal successors, (83), 45 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,297 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 38 [2025-03-04 15:46:41,298 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:41,298 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:41,299 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:41,299 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:41,305 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:41,305 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:41,309 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,309 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 1 times [2025-03-04 15:46:41,314 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,314 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [859114849] [2025-03-04 15:46:41,314 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:41,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,361 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,369 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,369 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,370 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,370 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:41,372 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,374 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,374 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,374 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,388 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:41,389 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,389 INFO L85 PathProgramCache]: Analyzing trace with hash -76830934, now seen corresponding path program 1 times [2025-03-04 15:46:41,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,390 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [417178610] [2025-03-04 15:46:41,390 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:41,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,398 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:41,406 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:41,407 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,407 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:41,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:41,474 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:41,474 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [417178610] [2025-03-04 15:46:41,474 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [417178610] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:41,474 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:41,474 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:41,474 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653092281] [2025-03-04 15:46:41,475 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:41,477 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:41,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:41,492 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:41,492 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:41,493 INFO L87 Difference]: Start difference. First operand has 46 states, 45 states have (on average 1.8444444444444446) internal successors, (83), 45 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:41,518 INFO L93 Difference]: Finished difference Result 85 states and 153 transitions. [2025-03-04 15:46:41,519 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 153 transitions. [2025-03-04 15:46:41,520 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 75 [2025-03-04 15:46:41,524 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 77 states and 123 transitions. [2025-03-04 15:46:41,525 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2025-03-04 15:46:41,525 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2025-03-04 15:46:41,525 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 123 transitions. [2025-03-04 15:46:41,526 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:41,526 INFO L218 hiAutomatonCegarLoop]: Abstraction has 77 states and 123 transitions. [2025-03-04 15:46:41,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 123 transitions. [2025-03-04 15:46:41,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2025-03-04 15:46:41,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.5974025974025974) internal successors, (123), 76 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 123 transitions. [2025-03-04 15:46:41,548 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 123 transitions. [2025-03-04 15:46:41,550 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:41,552 INFO L432 stractBuchiCegarLoop]: Abstraction has 77 states and 123 transitions. [2025-03-04 15:46:41,552 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 15:46:41,553 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 123 transitions. [2025-03-04 15:46:41,553 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 75 [2025-03-04 15:46:41,554 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:41,554 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:41,554 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:41,554 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:41,554 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:41,554 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:41,558 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,559 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 2 times [2025-03-04 15:46:41,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,559 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [600016169] [2025-03-04 15:46:41,559 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:46:41,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,563 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,569 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,569 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:41,569 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,569 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:41,570 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,572 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,572 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,572 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,574 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:41,574 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,574 INFO L85 PathProgramCache]: Analyzing trace with hash -143837687, now seen corresponding path program 1 times [2025-03-04 15:46:41,574 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,574 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1778327972] [2025-03-04 15:46:41,574 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:41,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,579 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:41,584 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:41,585 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,585 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:41,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:41,624 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:41,624 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1778327972] [2025-03-04 15:46:41,624 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1778327972] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:41,624 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:41,624 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:41,624 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1553748427] [2025-03-04 15:46:41,624 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:41,625 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:41,625 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:41,625 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:41,625 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:41,625 INFO L87 Difference]: Start difference. First operand 77 states and 123 transitions. cyclomatic complexity: 48 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:41,642 INFO L93 Difference]: Finished difference Result 150 states and 238 transitions. [2025-03-04 15:46:41,643 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 150 states and 238 transitions. [2025-03-04 15:46:41,644 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 148 [2025-03-04 15:46:41,646 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 150 states to 150 states and 238 transitions. [2025-03-04 15:46:41,646 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 150 [2025-03-04 15:46:41,647 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 150 [2025-03-04 15:46:41,647 INFO L73 IsDeterministic]: Start isDeterministic. Operand 150 states and 238 transitions. [2025-03-04 15:46:41,647 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:41,647 INFO L218 hiAutomatonCegarLoop]: Abstraction has 150 states and 238 transitions. [2025-03-04 15:46:41,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states and 238 transitions. [2025-03-04 15:46:41,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2025-03-04 15:46:41,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 150 states, 150 states have (on average 1.5866666666666667) internal successors, (238), 149 states have internal predecessors, (238), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 238 transitions. [2025-03-04 15:46:41,655 INFO L240 hiAutomatonCegarLoop]: Abstraction has 150 states and 238 transitions. [2025-03-04 15:46:41,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:41,656 INFO L432 stractBuchiCegarLoop]: Abstraction has 150 states and 238 transitions. [2025-03-04 15:46:41,656 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 15:46:41,656 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 150 states and 238 transitions. [2025-03-04 15:46:41,661 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 148 [2025-03-04 15:46:41,661 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:41,661 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:41,661 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:41,661 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:41,661 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:41,661 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:41,661 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,662 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 3 times [2025-03-04 15:46:41,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [427881912] [2025-03-04 15:46:41,662 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:46:41,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,666 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,667 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,667 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:46:41,667 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,667 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:41,668 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,669 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,670 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,670 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,671 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:41,671 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,671 INFO L85 PathProgramCache]: Analyzing trace with hash 1100926794, now seen corresponding path program 1 times [2025-03-04 15:46:41,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,672 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587737849] [2025-03-04 15:46:41,672 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:41,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,677 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:41,684 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:41,684 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,684 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:41,714 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:41,714 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:41,714 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587737849] [2025-03-04 15:46:41,714 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [587737849] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:41,714 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:41,714 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:41,714 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196462195] [2025-03-04 15:46:41,714 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:41,714 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:41,714 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:41,715 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:41,715 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:41,715 INFO L87 Difference]: Start difference. First operand 150 states and 238 transitions. cyclomatic complexity: 92 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:41,732 INFO L93 Difference]: Finished difference Result 294 states and 462 transitions. [2025-03-04 15:46:41,732 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 294 states and 462 transitions. [2025-03-04 15:46:41,735 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 292 [2025-03-04 15:46:41,737 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 294 states to 294 states and 462 transitions. [2025-03-04 15:46:41,737 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 294 [2025-03-04 15:46:41,739 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 294 [2025-03-04 15:46:41,739 INFO L73 IsDeterministic]: Start isDeterministic. Operand 294 states and 462 transitions. [2025-03-04 15:46:41,740 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:41,740 INFO L218 hiAutomatonCegarLoop]: Abstraction has 294 states and 462 transitions. [2025-03-04 15:46:41,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states and 462 transitions. [2025-03-04 15:46:41,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 294. [2025-03-04 15:46:41,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 294 states, 294 states have (on average 1.5714285714285714) internal successors, (462), 293 states have internal predecessors, (462), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 462 transitions. [2025-03-04 15:46:41,755 INFO L240 hiAutomatonCegarLoop]: Abstraction has 294 states and 462 transitions. [2025-03-04 15:46:41,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:41,757 INFO L432 stractBuchiCegarLoop]: Abstraction has 294 states and 462 transitions. [2025-03-04 15:46:41,758 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 15:46:41,758 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 294 states and 462 transitions. [2025-03-04 15:46:41,759 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 292 [2025-03-04 15:46:41,759 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:41,759 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:41,759 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:41,759 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:41,760 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:41,760 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:41,760 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,760 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 4 times [2025-03-04 15:46:41,760 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,760 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658713395] [2025-03-04 15:46:41,760 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:46:41,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,767 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:46:41,768 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,769 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:46:41,769 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,769 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:41,770 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,771 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,771 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,771 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,772 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:41,772 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,772 INFO L85 PathProgramCache]: Analyzing trace with hash -937129495, now seen corresponding path program 1 times [2025-03-04 15:46:41,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,772 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1061416989] [2025-03-04 15:46:41,772 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:41,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,795 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:41,798 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:41,798 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,798 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:41,826 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:41,826 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:41,826 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1061416989] [2025-03-04 15:46:41,826 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1061416989] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:41,826 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:41,826 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:41,826 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1131740655] [2025-03-04 15:46:41,826 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:41,826 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:41,826 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:41,827 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:41,827 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:41,827 INFO L87 Difference]: Start difference. First operand 294 states and 462 transitions. cyclomatic complexity: 176 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:41,850 INFO L93 Difference]: Finished difference Result 578 states and 898 transitions. [2025-03-04 15:46:41,850 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 578 states and 898 transitions. [2025-03-04 15:46:41,853 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 576 [2025-03-04 15:46:41,856 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 578 states to 578 states and 898 transitions. [2025-03-04 15:46:41,856 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 578 [2025-03-04 15:46:41,857 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 578 [2025-03-04 15:46:41,857 INFO L73 IsDeterministic]: Start isDeterministic. Operand 578 states and 898 transitions. [2025-03-04 15:46:41,858 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:41,858 INFO L218 hiAutomatonCegarLoop]: Abstraction has 578 states and 898 transitions. [2025-03-04 15:46:41,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 578 states and 898 transitions. [2025-03-04 15:46:41,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 578 to 578. [2025-03-04 15:46:41,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 578 states, 578 states have (on average 1.5536332179930796) internal successors, (898), 577 states have internal predecessors, (898), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 578 states to 578 states and 898 transitions. [2025-03-04 15:46:41,883 INFO L240 hiAutomatonCegarLoop]: Abstraction has 578 states and 898 transitions. [2025-03-04 15:46:41,884 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:41,884 INFO L432 stractBuchiCegarLoop]: Abstraction has 578 states and 898 transitions. [2025-03-04 15:46:41,885 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 15:46:41,885 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 578 states and 898 transitions. [2025-03-04 15:46:41,887 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 576 [2025-03-04 15:46:41,887 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:41,887 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:41,888 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:41,888 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:41,889 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:41,889 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:41,889 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,889 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 5 times [2025-03-04 15:46:41,889 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,889 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1412146104] [2025-03-04 15:46:41,889 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:46:41,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,893 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,895 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,895 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:41,896 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,896 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:41,897 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,900 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,900 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,900 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,901 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:41,902 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,902 INFO L85 PathProgramCache]: Analyzing trace with hash -725778582, now seen corresponding path program 1 times [2025-03-04 15:46:41,902 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,902 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1637312819] [2025-03-04 15:46:41,902 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:41,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,909 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:41,914 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:41,914 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,915 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:41,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:41,938 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:41,938 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1637312819] [2025-03-04 15:46:41,938 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1637312819] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:41,938 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:41,939 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:41,939 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78976247] [2025-03-04 15:46:41,939 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:41,939 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:41,939 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:41,939 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:41,939 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:41,939 INFO L87 Difference]: Start difference. First operand 578 states and 898 transitions. cyclomatic complexity: 336 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:41,956 INFO L93 Difference]: Finished difference Result 1138 states and 1746 transitions. [2025-03-04 15:46:41,956 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1138 states and 1746 transitions. [2025-03-04 15:46:41,963 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1136 [2025-03-04 15:46:41,967 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1138 states to 1138 states and 1746 transitions. [2025-03-04 15:46:41,967 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1138 [2025-03-04 15:46:41,968 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1138 [2025-03-04 15:46:41,968 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1138 states and 1746 transitions. [2025-03-04 15:46:41,969 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:41,969 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1138 states and 1746 transitions. [2025-03-04 15:46:41,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1138 states and 1746 transitions. [2025-03-04 15:46:41,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1138 to 1138. [2025-03-04 15:46:41,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1138 states, 1138 states have (on average 1.5342706502636203) internal successors, (1746), 1137 states have internal predecessors, (1746), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1138 states to 1138 states and 1746 transitions. [2025-03-04 15:46:41,986 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1138 states and 1746 transitions. [2025-03-04 15:46:41,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:41,987 INFO L432 stractBuchiCegarLoop]: Abstraction has 1138 states and 1746 transitions. [2025-03-04 15:46:41,987 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 15:46:41,987 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1138 states and 1746 transitions. [2025-03-04 15:46:41,992 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1136 [2025-03-04 15:46:41,992 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:41,992 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:41,993 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:41,993 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:41,993 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:41,993 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:41,993 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,993 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 6 times [2025-03-04 15:46:41,993 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,993 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264366037] [2025-03-04 15:46:41,994 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:46:41,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,997 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,998 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,998 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:46:41,998 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,998 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:41,999 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,999 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,999 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,002 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,004 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:42,004 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,004 INFO L85 PathProgramCache]: Analyzing trace with hash -1134602807, now seen corresponding path program 1 times [2025-03-04 15:46:42,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1734151754] [2025-03-04 15:46:42,005 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,010 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:42,012 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:42,012 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,012 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:42,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:42,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:42,033 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1734151754] [2025-03-04 15:46:42,033 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1734151754] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:42,033 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:42,033 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:42,033 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1411861220] [2025-03-04 15:46:42,033 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:42,033 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:42,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:42,033 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:42,033 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:42,033 INFO L87 Difference]: Start difference. First operand 1138 states and 1746 transitions. cyclomatic complexity: 640 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:42,052 INFO L93 Difference]: Finished difference Result 2242 states and 3394 transitions. [2025-03-04 15:46:42,052 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2242 states and 3394 transitions. [2025-03-04 15:46:42,068 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2240 [2025-03-04 15:46:42,076 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2242 states to 2242 states and 3394 transitions. [2025-03-04 15:46:42,077 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2242 [2025-03-04 15:46:42,081 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2242 [2025-03-04 15:46:42,081 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2242 states and 3394 transitions. [2025-03-04 15:46:42,084 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:42,084 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2242 states and 3394 transitions. [2025-03-04 15:46:42,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2242 states and 3394 transitions. [2025-03-04 15:46:42,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2242 to 2242. [2025-03-04 15:46:42,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2242 states, 2242 states have (on average 1.5138269402319358) internal successors, (3394), 2241 states have internal predecessors, (3394), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2242 states to 2242 states and 3394 transitions. [2025-03-04 15:46:42,114 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2242 states and 3394 transitions. [2025-03-04 15:46:42,114 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:42,115 INFO L432 stractBuchiCegarLoop]: Abstraction has 2242 states and 3394 transitions. [2025-03-04 15:46:42,116 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 15:46:42,116 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2242 states and 3394 transitions. [2025-03-04 15:46:42,125 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2240 [2025-03-04 15:46:42,125 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:42,125 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:42,126 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:42,126 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:42,127 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:42,127 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:42,127 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,127 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 7 times [2025-03-04 15:46:42,127 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,127 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599656188] [2025-03-04 15:46:42,127 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:46:42,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,130 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,132 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,132 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,132 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,132 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:42,133 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,134 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,134 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,134 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,135 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:42,135 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,135 INFO L85 PathProgramCache]: Analyzing trace with hash -1979074678, now seen corresponding path program 1 times [2025-03-04 15:46:42,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803060042] [2025-03-04 15:46:42,135 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,140 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:42,141 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:42,141 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,141 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:42,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:42,153 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:42,153 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [803060042] [2025-03-04 15:46:42,153 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [803060042] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:42,153 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:42,153 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:42,153 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1157555059] [2025-03-04 15:46:42,154 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:42,154 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:42,154 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:42,154 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:42,154 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:42,155 INFO L87 Difference]: Start difference. First operand 2242 states and 3394 transitions. cyclomatic complexity: 1216 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:42,194 INFO L93 Difference]: Finished difference Result 4418 states and 6594 transitions. [2025-03-04 15:46:42,194 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4418 states and 6594 transitions. [2025-03-04 15:46:42,211 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 4416 [2025-03-04 15:46:42,225 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4418 states to 4418 states and 6594 transitions. [2025-03-04 15:46:42,225 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4418 [2025-03-04 15:46:42,227 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4418 [2025-03-04 15:46:42,227 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4418 states and 6594 transitions. [2025-03-04 15:46:42,231 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:42,231 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4418 states and 6594 transitions. [2025-03-04 15:46:42,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4418 states and 6594 transitions. [2025-03-04 15:46:42,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4418 to 4418. [2025-03-04 15:46:42,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4418 states, 4418 states have (on average 1.4925305568130376) internal successors, (6594), 4417 states have internal predecessors, (6594), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4418 states to 4418 states and 6594 transitions. [2025-03-04 15:46:42,286 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4418 states and 6594 transitions. [2025-03-04 15:46:42,286 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:42,288 INFO L432 stractBuchiCegarLoop]: Abstraction has 4418 states and 6594 transitions. [2025-03-04 15:46:42,288 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 15:46:42,288 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4418 states and 6594 transitions. [2025-03-04 15:46:42,301 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 4416 [2025-03-04 15:46:42,301 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:42,302 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:42,302 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:42,302 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:42,302 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:42,302 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:42,303 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,303 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 8 times [2025-03-04 15:46:42,303 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,303 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [414438232] [2025-03-04 15:46:42,303 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:46:42,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,305 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,307 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,307 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:42,307 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,307 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:42,308 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,308 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,308 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,308 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,311 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:42,311 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,311 INFO L85 PathProgramCache]: Analyzing trace with hash 1318820265, now seen corresponding path program 1 times [2025-03-04 15:46:42,311 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,311 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1965312689] [2025-03-04 15:46:42,311 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,315 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:42,316 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:42,316 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,316 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:42,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:42,330 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:42,330 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1965312689] [2025-03-04 15:46:42,330 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1965312689] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:42,330 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:42,330 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:42,330 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2145732132] [2025-03-04 15:46:42,331 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:42,331 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:42,331 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:42,331 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:42,331 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:42,331 INFO L87 Difference]: Start difference. First operand 4418 states and 6594 transitions. cyclomatic complexity: 2304 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:42,398 INFO L93 Difference]: Finished difference Result 8706 states and 12802 transitions. [2025-03-04 15:46:42,398 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8706 states and 12802 transitions. [2025-03-04 15:46:42,437 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 8704 [2025-03-04 15:46:42,468 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8706 states to 8706 states and 12802 transitions. [2025-03-04 15:46:42,468 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8706 [2025-03-04 15:46:42,473 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8706 [2025-03-04 15:46:42,473 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8706 states and 12802 transitions. [2025-03-04 15:46:42,482 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:42,482 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8706 states and 12802 transitions. [2025-03-04 15:46:42,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8706 states and 12802 transitions. [2025-03-04 15:46:42,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8706 to 8706. [2025-03-04 15:46:42,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8706 states, 8706 states have (on average 1.4704801286469102) internal successors, (12802), 8705 states have internal predecessors, (12802), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8706 states to 8706 states and 12802 transitions. [2025-03-04 15:46:42,613 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8706 states and 12802 transitions. [2025-03-04 15:46:42,613 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:42,614 INFO L432 stractBuchiCegarLoop]: Abstraction has 8706 states and 12802 transitions. [2025-03-04 15:46:42,614 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-04 15:46:42,614 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8706 states and 12802 transitions. [2025-03-04 15:46:42,643 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 8704 [2025-03-04 15:46:42,643 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:42,643 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:42,645 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:42,645 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:42,645 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:42,645 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:42,645 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,645 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 9 times [2025-03-04 15:46:42,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356065016] [2025-03-04 15:46:42,645 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:46:42,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,647 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,648 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,648 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:46:42,648 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,648 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:42,650 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,652 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,652 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,652 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,655 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:42,655 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,656 INFO L85 PathProgramCache]: Analyzing trace with hash -1622837334, now seen corresponding path program 1 times [2025-03-04 15:46:42,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,656 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846473070] [2025-03-04 15:46:42,656 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,660 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:42,661 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:42,661 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,661 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:42,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:42,678 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:42,678 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [846473070] [2025-03-04 15:46:42,678 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [846473070] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:42,678 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:42,679 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:42,679 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [450298787] [2025-03-04 15:46:42,679 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:42,679 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:42,679 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:42,679 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:42,679 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:42,679 INFO L87 Difference]: Start difference. First operand 8706 states and 12802 transitions. cyclomatic complexity: 4352 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:42,737 INFO L93 Difference]: Finished difference Result 17154 states and 24834 transitions. [2025-03-04 15:46:42,737 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17154 states and 24834 transitions. [2025-03-04 15:46:42,818 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 17152 [2025-03-04 15:46:42,881 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17154 states to 17154 states and 24834 transitions. [2025-03-04 15:46:42,881 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17154 [2025-03-04 15:46:42,892 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17154 [2025-03-04 15:46:42,892 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17154 states and 24834 transitions. [2025-03-04 15:46:42,915 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:42,915 INFO L218 hiAutomatonCegarLoop]: Abstraction has 17154 states and 24834 transitions. [2025-03-04 15:46:42,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17154 states and 24834 transitions. [2025-03-04 15:46:43,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17154 to 17154. [2025-03-04 15:46:43,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17154 states, 17154 states have (on average 1.4477089891570478) internal successors, (24834), 17153 states have internal predecessors, (24834), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17154 states to 17154 states and 24834 transitions. [2025-03-04 15:46:43,201 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17154 states and 24834 transitions. [2025-03-04 15:46:43,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,201 INFO L432 stractBuchiCegarLoop]: Abstraction has 17154 states and 24834 transitions. [2025-03-04 15:46:43,201 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-04 15:46:43,201 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17154 states and 24834 transitions. [2025-03-04 15:46:43,247 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 17152 [2025-03-04 15:46:43,248 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,248 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,248 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,248 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,248 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,249 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:43,249 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,249 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 10 times [2025-03-04 15:46:43,250 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,250 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1136326518] [2025-03-04 15:46:43,250 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:46:43,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,252 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:46:43,254 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,254 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:46:43,254 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,254 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,255 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,257 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,257 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,257 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,258 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,259 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,259 INFO L85 PathProgramCache]: Analyzing trace with hash -2133371511, now seen corresponding path program 1 times [2025-03-04 15:46:43,260 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815193693] [2025-03-04 15:46:43,260 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,262 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:43,264 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:43,265 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,265 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,276 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,276 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [815193693] [2025-03-04 15:46:43,276 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [815193693] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,276 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,276 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,276 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [470420605] [2025-03-04 15:46:43,276 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,276 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,277 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,277 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,277 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,277 INFO L87 Difference]: Start difference. First operand 17154 states and 24834 transitions. cyclomatic complexity: 8192 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,405 INFO L93 Difference]: Finished difference Result 33794 states and 48130 transitions. [2025-03-04 15:46:43,405 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33794 states and 48130 transitions. [2025-03-04 15:46:43,515 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 33792 [2025-03-04 15:46:43,663 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33794 states to 33794 states and 48130 transitions. [2025-03-04 15:46:43,663 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 33794 [2025-03-04 15:46:43,692 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 33794 [2025-03-04 15:46:43,693 INFO L73 IsDeterministic]: Start isDeterministic. Operand 33794 states and 48130 transitions. [2025-03-04 15:46:43,719 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,719 INFO L218 hiAutomatonCegarLoop]: Abstraction has 33794 states and 48130 transitions. [2025-03-04 15:46:43,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33794 states and 48130 transitions. [2025-03-04 15:46:44,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33794 to 33794. [2025-03-04 15:46:44,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33794 states, 33794 states have (on average 1.4242173166834349) internal successors, (48130), 33793 states have internal predecessors, (48130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33794 states to 33794 states and 48130 transitions. [2025-03-04 15:46:44,259 INFO L240 hiAutomatonCegarLoop]: Abstraction has 33794 states and 48130 transitions. [2025-03-04 15:46:44,259 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:44,260 INFO L432 stractBuchiCegarLoop]: Abstraction has 33794 states and 48130 transitions. [2025-03-04 15:46:44,260 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-04 15:46:44,260 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33794 states and 48130 transitions. [2025-03-04 15:46:44,355 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 33792 [2025-03-04 15:46:44,355 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:44,355 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:44,356 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:44,356 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:44,356 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:44,357 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:44,357 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,357 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 11 times [2025-03-04 15:46:44,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,357 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079057776] [2025-03-04 15:46:44,357 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:46:44,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,362 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,364 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,364 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:44,364 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,364 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:44,365 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,366 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,366 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,366 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,367 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:44,367 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,367 INFO L85 PathProgramCache]: Analyzing trace with hash -625819702, now seen corresponding path program 1 times [2025-03-04 15:46:44,367 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,367 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414315516] [2025-03-04 15:46:44,367 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:44,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,372 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:44,373 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:44,373 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,373 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:44,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:44,388 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:44,388 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414315516] [2025-03-04 15:46:44,388 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1414315516] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:44,388 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:44,388 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:44,389 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [291354182] [2025-03-04 15:46:44,389 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:44,389 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:44,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:44,389 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:44,389 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:44,389 INFO L87 Difference]: Start difference. First operand 33794 states and 48130 transitions. cyclomatic complexity: 15360 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:44,635 INFO L93 Difference]: Finished difference Result 66562 states and 93186 transitions. [2025-03-04 15:46:44,635 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66562 states and 93186 transitions. [2025-03-04 15:46:44,822 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 66560 [2025-03-04 15:46:45,062 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66562 states to 66562 states and 93186 transitions. [2025-03-04 15:46:45,063 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 66562 [2025-03-04 15:46:45,080 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 66562 [2025-03-04 15:46:45,080 INFO L73 IsDeterministic]: Start isDeterministic. Operand 66562 states and 93186 transitions. [2025-03-04 15:46:45,099 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:45,099 INFO L218 hiAutomatonCegarLoop]: Abstraction has 66562 states and 93186 transitions. [2025-03-04 15:46:45,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66562 states and 93186 transitions. [2025-03-04 15:46:45,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66562 to 66562. [2025-03-04 15:46:45,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66562 states, 66562 states have (on average 1.3999879811303746) internal successors, (93186), 66561 states have internal predecessors, (93186), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:45,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66562 states to 66562 states and 93186 transitions. [2025-03-04 15:46:45,952 INFO L240 hiAutomatonCegarLoop]: Abstraction has 66562 states and 93186 transitions. [2025-03-04 15:46:45,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:45,953 INFO L432 stractBuchiCegarLoop]: Abstraction has 66562 states and 93186 transitions. [2025-03-04 15:46:45,953 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-04 15:46:45,953 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66562 states and 93186 transitions. [2025-03-04 15:46:46,074 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 66560 [2025-03-04 15:46:46,074 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:46,074 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:46,075 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:46,075 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:46,075 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:46,075 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:46,076 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:46,076 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 12 times [2025-03-04 15:46:46,076 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:46,076 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [423506335] [2025-03-04 15:46:46,076 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:46:46,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:46,079 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:46,080 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:46,080 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:46:46,080 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:46,080 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:46,081 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:46,081 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:46,081 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:46,081 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:46,082 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:46,083 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:46,083 INFO L85 PathProgramCache]: Analyzing trace with hash -1131378327, now seen corresponding path program 1 times [2025-03-04 15:46:46,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:46,083 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057911234] [2025-03-04 15:46:46,083 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:46,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:46,085 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:46,086 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:46,086 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:46,086 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:46,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:46,154 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:46,154 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1057911234] [2025-03-04 15:46:46,154 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1057911234] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:46,154 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:46,155 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-04 15:46:46,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1323498930] [2025-03-04 15:46:46,156 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:46,156 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:46,156 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:46,156 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:46,156 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:46,157 INFO L87 Difference]: Start difference. First operand 66562 states and 93186 transitions. cyclomatic complexity: 28672 Second operand has 3 states, 2 states have (on average 13.0) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:46,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:46,435 INFO L93 Difference]: Finished difference Result 131074 states and 180226 transitions. [2025-03-04 15:46:46,435 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 131074 states and 180226 transitions. [2025-03-04 15:46:47,075 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 131072 [2025-03-04 15:46:47,315 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 131074 states to 131074 states and 180226 transitions. [2025-03-04 15:46:47,316 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 131074 [2025-03-04 15:46:47,378 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 131074 [2025-03-04 15:46:47,378 INFO L73 IsDeterministic]: Start isDeterministic. Operand 131074 states and 180226 transitions. [2025-03-04 15:46:47,456 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:47,456 INFO L218 hiAutomatonCegarLoop]: Abstraction has 131074 states and 180226 transitions. [2025-03-04 15:46:47,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131074 states and 180226 transitions. [2025-03-04 15:46:48,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131074 to 131074. [2025-03-04 15:46:48,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 131074 states, 131074 states have (on average 1.3749942780414117) internal successors, (180226), 131073 states have internal predecessors, (180226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:49,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131074 states to 131074 states and 180226 transitions. [2025-03-04 15:46:49,027 INFO L240 hiAutomatonCegarLoop]: Abstraction has 131074 states and 180226 transitions. [2025-03-04 15:46:49,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:49,028 INFO L432 stractBuchiCegarLoop]: Abstraction has 131074 states and 180226 transitions. [2025-03-04 15:46:49,028 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-04 15:46:49,028 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 131074 states and 180226 transitions. [2025-03-04 15:46:49,457 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 131072 [2025-03-04 15:46:49,457 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:49,457 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:49,459 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:49,459 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:49,459 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:49,459 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" [2025-03-04 15:46:49,459 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:49,459 INFO L85 PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 13 times [2025-03-04 15:46:49,460 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:49,460 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1590921588] [2025-03-04 15:46:49,460 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:46:49,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:49,462 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:49,463 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:49,463 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,463 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,463 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:49,463 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:49,464 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:49,464 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,464 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,468 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:49,468 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:49,468 INFO L85 PathProgramCache]: Analyzing trace with hash -1424781334, now seen corresponding path program 1 times [2025-03-04 15:46:49,468 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:49,468 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1972436793] [2025-03-04 15:46:49,468 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:49,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:49,470 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:49,471 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:49,471 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,471 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,471 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:49,472 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes. [2025-03-04 15:46:49,473 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements. [2025-03-04 15:46:49,473 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,473 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,479 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:49,481 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:49,481 INFO L85 PathProgramCache]: Analyzing trace with hash 1979765289, now seen corresponding path program 1 times [2025-03-04 15:46:49,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:49,481 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847342977] [2025-03-04 15:46:49,481 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:49,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:49,484 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:49,488 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:49,489 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,489 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,489 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:49,490 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:49,495 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:49,495 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,495 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,497 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:49,847 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:49,848 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:49,848 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,848 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,848 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:49,852 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:49,852 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:49,852 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,852 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,882 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 04.03 03:46:49 BoogieIcfgContainer [2025-03-04 15:46:49,883 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-04 15:46:49,884 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-04 15:46:49,884 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-04 15:46:49,884 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-04 15:46:49,885 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:41" (3/4) ... [2025-03-04 15:46:49,886 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-03-04 15:46:49,913 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-04 15:46:49,914 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-04 15:46:49,917 INFO L158 Benchmark]: Toolchain (without parser) took 9151.75ms. Allocated memory was 142.6MB in the beginning and 4.7GB in the end (delta: 4.5GB). Free memory was 106.3MB in the beginning and 3.6GB in the end (delta: -3.5GB). Peak memory consumption was 1.0GB. Max. memory is 16.1GB. [2025-03-04 15:46:49,917 INFO L158 Benchmark]: CDTParser took 0.14ms. Allocated memory is still 201.3MB. Free memory is still 126.1MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:46:49,917 INFO L158 Benchmark]: CACSL2BoogieTranslator took 166.49ms. Allocated memory is still 142.6MB. Free memory was 106.3MB in the beginning and 95.1MB in the end (delta: 11.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 15:46:49,917 INFO L158 Benchmark]: Boogie Procedure Inliner took 26.76ms. Allocated memory is still 142.6MB. Free memory was 95.1MB in the beginning and 93.1MB in the end (delta: 2.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 15:46:49,917 INFO L158 Benchmark]: Boogie Preprocessor took 25.45ms. Allocated memory is still 142.6MB. Free memory was 93.1MB in the beginning and 92.2MB in the end (delta: 977.7kB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:46:49,918 INFO L158 Benchmark]: IcfgBuilder took 241.81ms. Allocated memory is still 142.6MB. Free memory was 92.2MB in the beginning and 77.3MB in the end (delta: 14.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-04 15:46:49,918 INFO L158 Benchmark]: BuchiAutomizer took 8655.56ms. Allocated memory was 142.6MB in the beginning and 4.7GB in the end (delta: 4.5GB). Free memory was 77.3MB in the beginning and 3.6GB in the end (delta: -3.5GB). Peak memory consumption was 1.0GB. Max. memory is 16.1GB. [2025-03-04 15:46:49,919 INFO L158 Benchmark]: Witness Printer took 30.49ms. Allocated memory is still 4.7GB. Free memory was 3.6GB in the beginning and 3.6GB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:46:49,920 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14ms. Allocated memory is still 201.3MB. Free memory is still 126.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 166.49ms. Allocated memory is still 142.6MB. Free memory was 106.3MB in the beginning and 95.1MB in the end (delta: 11.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 26.76ms. Allocated memory is still 142.6MB. Free memory was 95.1MB in the beginning and 93.1MB in the end (delta: 2.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 25.45ms. Allocated memory is still 142.6MB. Free memory was 93.1MB in the beginning and 92.2MB in the end (delta: 977.7kB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 241.81ms. Allocated memory is still 142.6MB. Free memory was 92.2MB in the beginning and 77.3MB in the end (delta: 14.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 8655.56ms. Allocated memory was 142.6MB in the beginning and 4.7GB in the end (delta: 4.5GB). Free memory was 77.3MB in the beginning and 3.6GB in the end (delta: -3.5GB). Peak memory consumption was 1.0GB. Max. memory is 16.1GB. * Witness Printer took 30.49ms. Allocated memory is still 4.7GB. Free memory was 3.6GB in the beginning and 3.6GB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 12 terminating modules (12 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.12 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 131074 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 8.6s and 13 iterations. TraceHistogramMax:1. Analysis of lassos took 1.0s. Construction of modules took 0.0s. Büchi inclusion checks took 6.6s. Highest rank in rank-based complementation 0. Minimization of det autom 12. Minimization of nondet autom 0. Automata minimization 3.5s AutomataMinimizationTime, 12 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 1.8s Buchi closure took 0.1s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 590 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 590 mSDsluCounter, 1850 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 710 mSDsCounter, 24 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 62 IncrementalHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 24 mSolverCounterUnsat, 1140 mSDtfsCounter, 62 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI12 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 47]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L45] int cond; Loop: [L47] COND TRUE 1 [L48] cond = __VERIFIER_nondet_int() [L49] COND FALSE !(cond == 0) [L52] lk1 = 0 [L54] lk2 = 0 [L56] lk3 = 0 [L58] lk4 = 0 [L60] lk5 = 0 [L62] lk6 = 0 [L64] lk7 = 0 [L66] lk8 = 0 [L68] lk9 = 0 [L70] lk10 = 0 [L72] lk11 = 0 [L74] lk12 = 0 [L78] COND FALSE !(p1 != 0) [L82] COND FALSE !(p2 != 0) [L86] COND FALSE !(p3 != 0) [L90] COND FALSE !(p4 != 0) [L94] COND FALSE !(p5 != 0) [L98] COND FALSE !(p6 != 0) [L102] COND FALSE !(p7 != 0) [L106] COND FALSE !(p8 != 0) [L110] COND FALSE !(p9 != 0) [L114] COND FALSE !(p10 != 0) [L118] COND FALSE !(p11 != 0) [L122] COND FALSE !(p12 != 0) [L128] COND FALSE !(p1 != 0) [L133] COND FALSE !(p2 != 0) [L138] COND FALSE !(p3 != 0) [L143] COND FALSE !(p4 != 0) [L148] COND FALSE !(p5 != 0) [L153] COND FALSE !(p6 != 0) [L158] COND FALSE !(p7 != 0) [L163] COND FALSE !(p8 != 0) [L168] COND FALSE !(p9 != 0) [L173] COND FALSE !(p10 != 0) [L178] COND FALSE !(p11 != 0) [L183] COND FALSE !(p12 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 47]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L45] int cond; Loop: [L47] COND TRUE 1 [L48] cond = __VERIFIER_nondet_int() [L49] COND FALSE !(cond == 0) [L52] lk1 = 0 [L54] lk2 = 0 [L56] lk3 = 0 [L58] lk4 = 0 [L60] lk5 = 0 [L62] lk6 = 0 [L64] lk7 = 0 [L66] lk8 = 0 [L68] lk9 = 0 [L70] lk10 = 0 [L72] lk11 = 0 [L74] lk12 = 0 [L78] COND FALSE !(p1 != 0) [L82] COND FALSE !(p2 != 0) [L86] COND FALSE !(p3 != 0) [L90] COND FALSE !(p4 != 0) [L94] COND FALSE !(p5 != 0) [L98] COND FALSE !(p6 != 0) [L102] COND FALSE !(p7 != 0) [L106] COND FALSE !(p8 != 0) [L110] COND FALSE !(p9 != 0) [L114] COND FALSE !(p10 != 0) [L118] COND FALSE !(p11 != 0) [L122] COND FALSE !(p12 != 0) [L128] COND FALSE !(p1 != 0) [L133] COND FALSE !(p2 != 0) [L138] COND FALSE !(p3 != 0) [L143] COND FALSE !(p4 != 0) [L148] COND FALSE !(p5 != 0) [L153] COND FALSE !(p6 != 0) [L158] COND FALSE !(p7 != 0) [L163] COND FALSE !(p8 != 0) [L168] COND FALSE !(p9 != 0) [L173] COND FALSE !(p10 != 0) [L178] COND FALSE !(p11 != 0) [L183] COND FALSE !(p12 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-03-04 15:46:49,936 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)