./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_13.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_13.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8fd6142dd23f608c3bc9ae24389b4aee583128e9e6b549483298584de0c08ecd --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 15:46:39,252 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 15:46:39,314 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-04 15:46:39,318 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 15:46:39,318 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 15:46:39,318 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 15:46:39,338 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 15:46:39,339 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 15:46:39,339 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 15:46:39,339 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 15:46:39,339 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 15:46:39,339 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 15:46:39,340 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 15:46:39,340 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 15:46:39,340 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 15:46:39,340 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 15:46:39,340 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 15:46:39,340 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 15:46:39,340 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 15:46:39,340 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 15:46:39,340 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 15:46:39,340 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 15:46:39,341 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-04 15:46:39,341 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 15:46:39,341 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-04 15:46:39,341 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 15:46:39,341 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 15:46:39,341 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 15:46:39,341 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 15:46:39,341 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 15:46:39,341 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-04 15:46:39,342 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 15:46:39,342 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 15:46:39,342 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 15:46:39,342 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 15:46:39,342 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 15:46:39,342 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 15:46:39,342 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 15:46:39,342 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 15:46:39,343 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 15:46:39,343 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8fd6142dd23f608c3bc9ae24389b4aee583128e9e6b549483298584de0c08ecd [2025-03-04 15:46:39,574 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 15:46:39,581 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 15:46:39,583 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 15:46:39,584 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 15:46:39,584 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 15:46:39,586 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_13.c [2025-03-04 15:46:40,716 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0665653fc/395aa391389d42398831fde2ac2b85a1/FLAG29ddd2457 [2025-03-04 15:46:40,937 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 15:46:40,938 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/locks/test_locks_13.c [2025-03-04 15:46:40,946 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0665653fc/395aa391389d42398831fde2ac2b85a1/FLAG29ddd2457 [2025-03-04 15:46:41,285 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0665653fc/395aa391389d42398831fde2ac2b85a1 [2025-03-04 15:46:41,286 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 15:46:41,287 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 15:46:41,288 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 15:46:41,288 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 15:46:41,291 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 15:46:41,291 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,292 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@63a11529 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41, skipping insertion in model container [2025-03-04 15:46:41,292 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,301 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 15:46:41,405 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:46:41,413 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 15:46:41,432 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:46:41,444 INFO L204 MainTranslator]: Completed translation [2025-03-04 15:46:41,444 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41 WrapperNode [2025-03-04 15:46:41,444 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 15:46:41,445 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 15:46:41,445 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 15:46:41,445 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 15:46:41,449 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,453 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,469 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 168 [2025-03-04 15:46:41,470 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 15:46:41,470 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 15:46:41,470 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 15:46:41,470 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 15:46:41,475 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,475 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,476 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,483 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-04 15:46:41,489 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,490 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,493 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,497 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,499 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,499 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,500 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 15:46:41,503 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 15:46:41,503 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 15:46:41,503 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 15:46:41,504 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (1/1) ... [2025-03-04 15:46:41,509 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:46:41,518 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:46:41,531 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:46:41,533 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 15:46:41,551 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-04 15:46:41,551 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 15:46:41,552 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 15:46:41,552 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-04 15:46:41,600 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 15:46:41,601 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 15:46:41,789 INFO L? ?]: Removed 30 outVars from TransFormulas that were not future-live. [2025-03-04 15:46:41,789 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 15:46:41,797 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 15:46:41,797 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-04 15:46:41,797 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:41 BoogieIcfgContainer [2025-03-04 15:46:41,797 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 15:46:41,798 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 15:46:41,798 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 15:46:41,802 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 15:46:41,803 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:41,803 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 03:46:41" (1/3) ... [2025-03-04 15:46:41,804 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@12ddd2a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:46:41, skipping insertion in model container [2025-03-04 15:46:41,805 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:41,805 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:41" (2/3) ... [2025-03-04 15:46:41,805 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@12ddd2a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:46:41, skipping insertion in model container [2025-03-04 15:46:41,805 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:41,805 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:41" (3/3) ... [2025-03-04 15:46:41,806 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_13.c [2025-03-04 15:46:41,843 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 15:46:41,844 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 15:46:41,844 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 15:46:41,844 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 15:46:41,844 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 15:46:41,845 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 15:46:41,845 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 15:46:41,845 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 15:46:41,849 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,861 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2025-03-04 15:46:41,861 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:41,861 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:41,865 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:41,865 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:41,865 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 15:46:41,866 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:41,868 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2025-03-04 15:46:41,868 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:41,868 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:41,869 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:41,869 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:41,873 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:41,873 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:41,876 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,876 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 1 times [2025-03-04 15:46:41,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,881 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202704303] [2025-03-04 15:46:41,881 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:41,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,920 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,926 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,926 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,927 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,927 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:41,931 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:41,936 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:41,936 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,936 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:41,952 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:41,955 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:41,955 INFO L85 PathProgramCache]: Analyzing trace with hash -1267993302, now seen corresponding path program 1 times [2025-03-04 15:46:41,955 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:41,956 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213837795] [2025-03-04 15:46:41,956 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:41,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:41,964 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:41,979 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:41,979 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:41,979 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:42,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:42,073 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:42,073 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213837795] [2025-03-04 15:46:42,074 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [213837795] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:42,075 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:42,075 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:42,075 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [901566609] [2025-03-04 15:46:42,076 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:42,078 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:42,078 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:42,094 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:42,094 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:42,096 INFO L87 Difference]: Start difference. First operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:42,133 INFO L93 Difference]: Finished difference Result 91 states and 165 transitions. [2025-03-04 15:46:42,134 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 91 states and 165 transitions. [2025-03-04 15:46:42,138 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 81 [2025-03-04 15:46:42,144 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 91 states to 83 states and 133 transitions. [2025-03-04 15:46:42,145 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 83 [2025-03-04 15:46:42,146 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 83 [2025-03-04 15:46:42,146 INFO L73 IsDeterministic]: Start isDeterministic. Operand 83 states and 133 transitions. [2025-03-04 15:46:42,147 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:42,147 INFO L218 hiAutomatonCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-03-04 15:46:42,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states and 133 transitions. [2025-03-04 15:46:42,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2025-03-04 15:46:42,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.6024096385542168) internal successors, (133), 82 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 133 transitions. [2025-03-04 15:46:42,166 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-03-04 15:46:42,166 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:42,168 INFO L432 stractBuchiCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-03-04 15:46:42,168 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 15:46:42,169 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 133 transitions. [2025-03-04 15:46:42,170 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 81 [2025-03-04 15:46:42,170 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:42,170 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:42,170 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:42,170 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:42,170 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:42,171 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:42,171 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,171 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 2 times [2025-03-04 15:46:42,171 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,171 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1814900459] [2025-03-04 15:46:42,171 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:46:42,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,176 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,178 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,179 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:42,179 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,179 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:42,181 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,183 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,185 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,185 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,187 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:42,187 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,187 INFO L85 PathProgramCache]: Analyzing trace with hash -1236973495, now seen corresponding path program 1 times [2025-03-04 15:46:42,187 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,188 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [111748448] [2025-03-04 15:46:42,188 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,194 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:42,200 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:42,200 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,200 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:42,235 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:42,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:42,236 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [111748448] [2025-03-04 15:46:42,236 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [111748448] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:42,237 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:42,237 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:42,237 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1339049565] [2025-03-04 15:46:42,237 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:42,238 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:42,238 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:42,239 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:42,239 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:42,239 INFO L87 Difference]: Start difference. First operand 83 states and 133 transitions. cyclomatic complexity: 52 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:42,258 INFO L93 Difference]: Finished difference Result 162 states and 258 transitions. [2025-03-04 15:46:42,258 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 162 states and 258 transitions. [2025-03-04 15:46:42,259 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 160 [2025-03-04 15:46:42,261 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 162 states to 162 states and 258 transitions. [2025-03-04 15:46:42,261 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 162 [2025-03-04 15:46:42,261 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 162 [2025-03-04 15:46:42,261 INFO L73 IsDeterministic]: Start isDeterministic. Operand 162 states and 258 transitions. [2025-03-04 15:46:42,263 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:42,264 INFO L218 hiAutomatonCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-03-04 15:46:42,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states and 258 transitions. [2025-03-04 15:46:42,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2025-03-04 15:46:42,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 162 states, 162 states have (on average 1.5925925925925926) internal successors, (258), 161 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 258 transitions. [2025-03-04 15:46:42,271 INFO L240 hiAutomatonCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-03-04 15:46:42,271 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:42,272 INFO L432 stractBuchiCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-03-04 15:46:42,272 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 15:46:42,272 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 162 states and 258 transitions. [2025-03-04 15:46:42,273 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 160 [2025-03-04 15:46:42,274 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:42,274 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:42,274 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:42,274 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:42,275 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:42,275 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:42,275 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,276 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 3 times [2025-03-04 15:46:42,276 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,276 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1870309208] [2025-03-04 15:46:42,277 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:46:42,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,280 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,282 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,282 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:46:42,282 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,282 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:42,283 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,284 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,284 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,284 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,285 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:42,286 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,286 INFO L85 PathProgramCache]: Analyzing trace with hash 980784458, now seen corresponding path program 1 times [2025-03-04 15:46:42,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,286 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38188038] [2025-03-04 15:46:42,286 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,291 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:42,298 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:42,298 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,298 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:42,338 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:42,338 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:42,338 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [38188038] [2025-03-04 15:46:42,338 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [38188038] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:42,338 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:42,338 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:42,338 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2076134140] [2025-03-04 15:46:42,338 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:42,339 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:42,339 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:42,339 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:42,339 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:42,339 INFO L87 Difference]: Start difference. First operand 162 states and 258 transitions. cyclomatic complexity: 100 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:42,360 INFO L93 Difference]: Finished difference Result 318 states and 502 transitions. [2025-03-04 15:46:42,360 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 318 states and 502 transitions. [2025-03-04 15:46:42,366 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 316 [2025-03-04 15:46:42,369 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 318 states to 318 states and 502 transitions. [2025-03-04 15:46:42,369 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 318 [2025-03-04 15:46:42,370 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 318 [2025-03-04 15:46:42,370 INFO L73 IsDeterministic]: Start isDeterministic. Operand 318 states and 502 transitions. [2025-03-04 15:46:42,371 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:42,373 INFO L218 hiAutomatonCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-03-04 15:46:42,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 318 states and 502 transitions. [2025-03-04 15:46:42,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 318 to 318. [2025-03-04 15:46:42,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 318 states, 318 states have (on average 1.578616352201258) internal successors, (502), 317 states have internal predecessors, (502), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 318 states to 318 states and 502 transitions. [2025-03-04 15:46:42,383 INFO L240 hiAutomatonCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-03-04 15:46:42,383 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:42,384 INFO L432 stractBuchiCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-03-04 15:46:42,384 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 15:46:42,384 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 318 states and 502 transitions. [2025-03-04 15:46:42,386 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 316 [2025-03-04 15:46:42,386 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:42,386 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:42,386 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:42,386 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:42,386 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:42,387 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:42,387 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,387 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 4 times [2025-03-04 15:46:42,387 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,387 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1714324895] [2025-03-04 15:46:42,387 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:46:42,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,391 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:46:42,393 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,393 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:46:42,393 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,393 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:42,400 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,401 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,401 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,401 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,403 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:42,403 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,403 INFO L85 PathProgramCache]: Analyzing trace with hash 913777705, now seen corresponding path program 1 times [2025-03-04 15:46:42,404 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,404 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [26154915] [2025-03-04 15:46:42,404 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,424 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:42,430 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:42,430 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,430 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:42,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:42,461 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:42,461 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [26154915] [2025-03-04 15:46:42,461 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [26154915] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:42,461 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:42,461 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:42,461 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1947845403] [2025-03-04 15:46:42,461 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:42,462 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:42,462 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:42,462 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:42,462 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:42,462 INFO L87 Difference]: Start difference. First operand 318 states and 502 transitions. cyclomatic complexity: 192 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:42,488 INFO L93 Difference]: Finished difference Result 626 states and 978 transitions. [2025-03-04 15:46:42,488 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 626 states and 978 transitions. [2025-03-04 15:46:42,492 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 624 [2025-03-04 15:46:42,495 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 626 states to 626 states and 978 transitions. [2025-03-04 15:46:42,495 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 626 [2025-03-04 15:46:42,496 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 626 [2025-03-04 15:46:42,497 INFO L73 IsDeterministic]: Start isDeterministic. Operand 626 states and 978 transitions. [2025-03-04 15:46:42,499 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:42,499 INFO L218 hiAutomatonCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-03-04 15:46:42,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 626 states and 978 transitions. [2025-03-04 15:46:42,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 626 to 626. [2025-03-04 15:46:42,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 626 states, 626 states have (on average 1.5623003194888179) internal successors, (978), 625 states have internal predecessors, (978), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 626 states to 626 states and 978 transitions. [2025-03-04 15:46:42,522 INFO L240 hiAutomatonCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-03-04 15:46:42,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:42,523 INFO L432 stractBuchiCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-03-04 15:46:42,523 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 15:46:42,523 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 626 states and 978 transitions. [2025-03-04 15:46:42,526 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 624 [2025-03-04 15:46:42,526 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:42,526 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:42,527 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:42,527 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:42,527 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:42,527 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:42,528 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,528 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 5 times [2025-03-04 15:46:42,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,528 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [898128530] [2025-03-04 15:46:42,528 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:46:42,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,533 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,534 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,534 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:42,534 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,534 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:42,537 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,538 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,539 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,540 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,541 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:42,543 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,543 INFO L85 PathProgramCache]: Analyzing trace with hash -2136425110, now seen corresponding path program 1 times [2025-03-04 15:46:42,543 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,543 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619163052] [2025-03-04 15:46:42,543 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,551 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:42,553 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:42,553 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,553 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:42,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:42,583 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:42,583 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1619163052] [2025-03-04 15:46:42,583 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1619163052] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:42,583 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:42,583 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:42,583 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1028632202] [2025-03-04 15:46:42,583 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:42,584 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:42,584 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:42,584 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:42,584 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:42,585 INFO L87 Difference]: Start difference. First operand 626 states and 978 transitions. cyclomatic complexity: 368 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:42,597 INFO L93 Difference]: Finished difference Result 1234 states and 1906 transitions. [2025-03-04 15:46:42,597 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1234 states and 1906 transitions. [2025-03-04 15:46:42,606 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1232 [2025-03-04 15:46:42,611 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1234 states to 1234 states and 1906 transitions. [2025-03-04 15:46:42,612 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1234 [2025-03-04 15:46:42,613 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1234 [2025-03-04 15:46:42,613 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1234 states and 1906 transitions. [2025-03-04 15:46:42,614 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:42,614 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-03-04 15:46:42,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1234 states and 1906 transitions. [2025-03-04 15:46:42,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1234 to 1234. [2025-03-04 15:46:42,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1234 states, 1234 states have (on average 1.5445705024311183) internal successors, (1906), 1233 states have internal predecessors, (1906), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1234 states to 1234 states and 1906 transitions. [2025-03-04 15:46:42,631 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-03-04 15:46:42,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:42,632 INFO L432 stractBuchiCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-03-04 15:46:42,632 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 15:46:42,632 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1234 states and 1906 transitions. [2025-03-04 15:46:42,638 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1232 [2025-03-04 15:46:42,638 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:42,638 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:42,639 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:42,640 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:42,640 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:42,640 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:42,640 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,641 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 6 times [2025-03-04 15:46:42,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,641 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258425833] [2025-03-04 15:46:42,641 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:46:42,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,644 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,645 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,645 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:46:42,645 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,645 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:42,648 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,649 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,649 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,649 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,650 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:42,651 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,651 INFO L85 PathProgramCache]: Analyzing trace with hash 120485897, now seen corresponding path program 1 times [2025-03-04 15:46:42,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,651 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112960137] [2025-03-04 15:46:42,651 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,655 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:42,657 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:42,657 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,657 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:42,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:42,684 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:42,684 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1112960137] [2025-03-04 15:46:42,684 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1112960137] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:42,684 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:42,684 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:42,684 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808207339] [2025-03-04 15:46:42,685 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:42,685 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:42,685 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:42,688 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:42,688 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:42,688 INFO L87 Difference]: Start difference. First operand 1234 states and 1906 transitions. cyclomatic complexity: 704 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:42,712 INFO L93 Difference]: Finished difference Result 2434 states and 3714 transitions. [2025-03-04 15:46:42,712 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2434 states and 3714 transitions. [2025-03-04 15:46:42,725 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2432 [2025-03-04 15:46:42,734 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2434 states to 2434 states and 3714 transitions. [2025-03-04 15:46:42,734 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2434 [2025-03-04 15:46:42,735 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2434 [2025-03-04 15:46:42,736 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2434 states and 3714 transitions. [2025-03-04 15:46:42,738 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:42,739 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-03-04 15:46:42,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2434 states and 3714 transitions. [2025-03-04 15:46:42,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2434 to 2434. [2025-03-04 15:46:42,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2434 states, 2434 states have (on average 1.5258833196384551) internal successors, (3714), 2433 states have internal predecessors, (3714), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2434 states to 2434 states and 3714 transitions. [2025-03-04 15:46:42,772 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-03-04 15:46:42,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:42,773 INFO L432 stractBuchiCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-03-04 15:46:42,774 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 15:46:42,774 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2434 states and 3714 transitions. [2025-03-04 15:46:42,798 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2432 [2025-03-04 15:46:42,798 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:42,798 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:42,799 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:42,799 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:42,799 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:42,799 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:42,799 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,799 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 7 times [2025-03-04 15:46:42,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,799 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307140383] [2025-03-04 15:46:42,799 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:46:42,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,801 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,804 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,804 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,804 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,804 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:42,806 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,807 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,808 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,809 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,810 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:42,811 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,811 INFO L85 PathProgramCache]: Analyzing trace with hash -288338328, now seen corresponding path program 1 times [2025-03-04 15:46:42,811 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,811 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610223532] [2025-03-04 15:46:42,811 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,814 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:42,819 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:42,819 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,819 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:42,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:42,834 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:42,834 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [610223532] [2025-03-04 15:46:42,834 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [610223532] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:42,834 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:42,834 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:42,834 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [458485580] [2025-03-04 15:46:42,834 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:42,834 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:42,834 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:42,835 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:42,835 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:42,835 INFO L87 Difference]: Start difference. First operand 2434 states and 3714 transitions. cyclomatic complexity: 1344 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:42,857 INFO L93 Difference]: Finished difference Result 4802 states and 7234 transitions. [2025-03-04 15:46:42,857 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4802 states and 7234 transitions. [2025-03-04 15:46:42,879 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 4800 [2025-03-04 15:46:42,894 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4802 states to 4802 states and 7234 transitions. [2025-03-04 15:46:42,894 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4802 [2025-03-04 15:46:42,897 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4802 [2025-03-04 15:46:42,897 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4802 states and 7234 transitions. [2025-03-04 15:46:42,902 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:42,902 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-03-04 15:46:42,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4802 states and 7234 transitions. [2025-03-04 15:46:42,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4802 to 4802. [2025-03-04 15:46:42,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4802 states, 4802 states have (on average 1.5064556434818825) internal successors, (7234), 4801 states have internal predecessors, (7234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4802 states to 4802 states and 7234 transitions. [2025-03-04 15:46:42,968 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-03-04 15:46:42,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:42,969 INFO L432 stractBuchiCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-03-04 15:46:42,970 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 15:46:42,970 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4802 states and 7234 transitions. [2025-03-04 15:46:43,002 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 4800 [2025-03-04 15:46:43,002 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,002 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,003 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,004 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,004 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,004 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:43,004 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,004 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 8 times [2025-03-04 15:46:43,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,004 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957194335] [2025-03-04 15:46:43,005 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:46:43,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,007 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,008 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,008 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:43,008 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,008 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,010 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,010 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,010 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,010 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,012 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,013 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,013 INFO L85 PathProgramCache]: Analyzing trace with hash -1132810199, now seen corresponding path program 1 times [2025-03-04 15:46:43,013 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,013 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217599419] [2025-03-04 15:46:43,013 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,017 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:43,019 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:43,019 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,019 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,037 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,037 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1217599419] [2025-03-04 15:46:43,037 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1217599419] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,037 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,037 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,038 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [866380406] [2025-03-04 15:46:43,038 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,038 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,038 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,039 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,039 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,039 INFO L87 Difference]: Start difference. First operand 4802 states and 7234 transitions. cyclomatic complexity: 2560 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,071 INFO L93 Difference]: Finished difference Result 9474 states and 14082 transitions. [2025-03-04 15:46:43,071 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9474 states and 14082 transitions. [2025-03-04 15:46:43,111 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 9472 [2025-03-04 15:46:43,155 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9474 states to 9474 states and 14082 transitions. [2025-03-04 15:46:43,156 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9474 [2025-03-04 15:46:43,161 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9474 [2025-03-04 15:46:43,162 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9474 states and 14082 transitions. [2025-03-04 15:46:43,174 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,174 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-03-04 15:46:43,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9474 states and 14082 transitions. [2025-03-04 15:46:43,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9474 to 9474. [2025-03-04 15:46:43,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9474 states, 9474 states have (on average 1.486383787207093) internal successors, (14082), 9473 states have internal predecessors, (14082), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9474 states to 9474 states and 14082 transitions. [2025-03-04 15:46:43,332 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-03-04 15:46:43,333 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,333 INFO L432 stractBuchiCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-03-04 15:46:43,333 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-04 15:46:43,333 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9474 states and 14082 transitions. [2025-03-04 15:46:43,362 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 9472 [2025-03-04 15:46:43,362 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,362 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,362 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,362 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,362 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,362 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:43,363 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,363 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 9 times [2025-03-04 15:46:43,363 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,363 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1459363819] [2025-03-04 15:46:43,363 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:46:43,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,365 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,366 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,366 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:46:43,366 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,366 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,367 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,368 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,368 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,368 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,369 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,370 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,370 INFO L85 PathProgramCache]: Analyzing trace with hash -2129882552, now seen corresponding path program 1 times [2025-03-04 15:46:43,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,370 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1911877723] [2025-03-04 15:46:43,370 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,373 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:43,374 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:43,374 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,374 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,388 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,388 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1911877723] [2025-03-04 15:46:43,388 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1911877723] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,388 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,388 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,389 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1487133178] [2025-03-04 15:46:43,389 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,389 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,389 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,389 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,389 INFO L87 Difference]: Start difference. First operand 9474 states and 14082 transitions. cyclomatic complexity: 4864 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,435 INFO L93 Difference]: Finished difference Result 18690 states and 27394 transitions. [2025-03-04 15:46:43,435 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18690 states and 27394 transitions. [2025-03-04 15:46:43,512 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 18688 [2025-03-04 15:46:43,569 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18690 states to 18690 states and 27394 transitions. [2025-03-04 15:46:43,570 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18690 [2025-03-04 15:46:43,584 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18690 [2025-03-04 15:46:43,584 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18690 states and 27394 transitions. [2025-03-04 15:46:43,609 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,609 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-03-04 15:46:43,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18690 states and 27394 transitions. [2025-03-04 15:46:43,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18690 to 18690. [2025-03-04 15:46:43,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18690 states, 18690 states have (on average 1.4657035848047084) internal successors, (27394), 18689 states have internal predecessors, (27394), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18690 states to 18690 states and 27394 transitions. [2025-03-04 15:46:43,926 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-03-04 15:46:43,927 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,927 INFO L432 stractBuchiCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-03-04 15:46:43,927 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-04 15:46:43,927 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18690 states and 27394 transitions. [2025-03-04 15:46:43,972 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 18688 [2025-03-04 15:46:43,972 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,972 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,973 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,973 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,973 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,973 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:43,973 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,973 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 10 times [2025-03-04 15:46:43,973 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,973 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533513397] [2025-03-04 15:46:43,973 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:46:43,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,975 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:46:43,976 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,976 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:46:43,976 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,976 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,977 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,977 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,977 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,977 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,978 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,978 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,978 INFO L85 PathProgramCache]: Analyzing trace with hash -776572855, now seen corresponding path program 1 times [2025-03-04 15:46:43,979 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,979 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259067021] [2025-03-04 15:46:43,979 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,981 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:43,982 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:43,982 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,982 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:44,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:44,058 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:44,058 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259067021] [2025-03-04 15:46:44,058 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [259067021] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:44,058 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:44,058 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:44,058 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [623053380] [2025-03-04 15:46:44,058 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:44,059 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:44,059 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:44,059 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:44,059 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:44,059 INFO L87 Difference]: Start difference. First operand 18690 states and 27394 transitions. cyclomatic complexity: 9216 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:44,124 INFO L93 Difference]: Finished difference Result 36866 states and 53250 transitions. [2025-03-04 15:46:44,124 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 36866 states and 53250 transitions. [2025-03-04 15:46:44,254 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 36864 [2025-03-04 15:46:44,434 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 36866 states to 36866 states and 53250 transitions. [2025-03-04 15:46:44,435 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36866 [2025-03-04 15:46:44,460 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36866 [2025-03-04 15:46:44,461 INFO L73 IsDeterministic]: Start isDeterministic. Operand 36866 states and 53250 transitions. [2025-03-04 15:46:44,479 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:44,480 INFO L218 hiAutomatonCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-03-04 15:46:44,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36866 states and 53250 transitions. [2025-03-04 15:46:44,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36866 to 36866. [2025-03-04 15:46:44,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36866 states, 36866 states have (on average 1.4444203330982477) internal successors, (53250), 36865 states have internal predecessors, (53250), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36866 states to 36866 states and 53250 transitions. [2025-03-04 15:46:44,951 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-03-04 15:46:44,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:44,952 INFO L432 stractBuchiCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-03-04 15:46:44,952 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-04 15:46:44,953 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36866 states and 53250 transitions. [2025-03-04 15:46:45,061 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 36864 [2025-03-04 15:46:45,061 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:45,061 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:45,061 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:45,062 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:45,062 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:45,062 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:45,062 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:45,062 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 11 times [2025-03-04 15:46:45,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:45,062 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2037910749] [2025-03-04 15:46:45,062 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:46:45,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:45,064 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:45,066 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:45,066 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:45,066 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:45,066 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:45,067 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:45,071 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:45,071 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:45,071 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:45,072 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:45,072 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:45,072 INFO L85 PathProgramCache]: Analyzing trace with hash -1287107032, now seen corresponding path program 1 times [2025-03-04 15:46:45,072 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:45,072 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841413301] [2025-03-04 15:46:45,072 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:45,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:45,075 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:45,076 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:45,076 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:45,076 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:45,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:45,090 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:45,090 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1841413301] [2025-03-04 15:46:45,090 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1841413301] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:45,090 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:45,090 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:45,091 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [883902293] [2025-03-04 15:46:45,091 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:45,091 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:45,091 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:45,091 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:45,091 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:45,092 INFO L87 Difference]: Start difference. First operand 36866 states and 53250 transitions. cyclomatic complexity: 17408 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:45,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:45,255 INFO L93 Difference]: Finished difference Result 72706 states and 103426 transitions. [2025-03-04 15:46:45,255 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 72706 states and 103426 transitions. [2025-03-04 15:46:45,668 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 72704 [2025-03-04 15:46:45,802 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 72706 states to 72706 states and 103426 transitions. [2025-03-04 15:46:45,802 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 72706 [2025-03-04 15:46:45,838 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 72706 [2025-03-04 15:46:45,839 INFO L73 IsDeterministic]: Start isDeterministic. Operand 72706 states and 103426 transitions. [2025-03-04 15:46:45,874 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:45,875 INFO L218 hiAutomatonCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-03-04 15:46:45,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72706 states and 103426 transitions. [2025-03-04 15:46:46,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72706 to 72706. [2025-03-04 15:46:46,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72706 states, 72706 states have (on average 1.4225235881495337) internal successors, (103426), 72705 states have internal predecessors, (103426), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:46,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72706 states to 72706 states and 103426 transitions. [2025-03-04 15:46:46,688 INFO L240 hiAutomatonCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-03-04 15:46:46,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:46,689 INFO L432 stractBuchiCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-03-04 15:46:46,689 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-04 15:46:46,689 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 72706 states and 103426 transitions. [2025-03-04 15:46:46,906 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 72704 [2025-03-04 15:46:46,907 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:46,907 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:46,908 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:46,908 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:46,908 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:46,908 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:46,908 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:46,908 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 12 times [2025-03-04 15:46:46,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:46,908 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225373001] [2025-03-04 15:46:46,908 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:46:46,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:46,910 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:46,911 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:46,911 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:46:46,911 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:46,911 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:46,912 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:46,912 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:46,912 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:46,913 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:46,914 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:46,914 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:46,914 INFO L85 PathProgramCache]: Analyzing trace with hash 220444777, now seen corresponding path program 1 times [2025-03-04 15:46:46,914 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:46,914 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275460357] [2025-03-04 15:46:46,914 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:46,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:46,917 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:46,918 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:46,918 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:46,919 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:46,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:46,933 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:46,934 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1275460357] [2025-03-04 15:46:46,934 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1275460357] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:46,934 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:46,934 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-04 15:46:46,934 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1252260368] [2025-03-04 15:46:46,934 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:46,935 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:46,935 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:46,935 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:46,935 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:46,935 INFO L87 Difference]: Start difference. First operand 72706 states and 103426 transitions. cyclomatic complexity: 32768 Second operand has 3 states, 2 states have (on average 14.0) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:47,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:47,523 INFO L93 Difference]: Finished difference Result 143362 states and 200706 transitions. [2025-03-04 15:46:47,523 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 143362 states and 200706 transitions. [2025-03-04 15:46:48,098 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 143360 [2025-03-04 15:46:48,528 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 143362 states to 143362 states and 200706 transitions. [2025-03-04 15:46:48,528 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 143362 [2025-03-04 15:46:48,591 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 143362 [2025-03-04 15:46:48,591 INFO L73 IsDeterministic]: Start isDeterministic. Operand 143362 states and 200706 transitions. [2025-03-04 15:46:48,648 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:48,648 INFO L218 hiAutomatonCegarLoop]: Abstraction has 143362 states and 200706 transitions. [2025-03-04 15:46:48,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143362 states and 200706 transitions. [2025-03-04 15:46:49,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143362 to 143362. [2025-03-04 15:46:49,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143362 states, 143362 states have (on average 1.399994419720707) internal successors, (200706), 143361 states have internal predecessors, (200706), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:50,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143362 states to 143362 states and 200706 transitions. [2025-03-04 15:46:50,127 INFO L240 hiAutomatonCegarLoop]: Abstraction has 143362 states and 200706 transitions. [2025-03-04 15:46:50,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:50,128 INFO L432 stractBuchiCegarLoop]: Abstraction has 143362 states and 200706 transitions. [2025-03-04 15:46:50,128 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-04 15:46:50,128 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 143362 states and 200706 transitions. [2025-03-04 15:46:50,716 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 143360 [2025-03-04 15:46:50,716 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:50,716 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:50,718 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:50,718 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:50,718 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:50,718 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-04 15:46:50,719 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:50,719 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 13 times [2025-03-04 15:46:50,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:50,719 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [850878629] [2025-03-04 15:46:50,719 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:46:50,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:50,721 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:50,721 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:50,722 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:50,722 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:50,722 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:50,722 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:50,723 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:50,723 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:50,723 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:50,724 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:50,724 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:50,724 INFO L85 PathProgramCache]: Analyzing trace with hash -285113848, now seen corresponding path program 1 times [2025-03-04 15:46:50,725 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:50,725 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565390782] [2025-03-04 15:46:50,725 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:50,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:50,727 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:50,731 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:50,731 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:50,731 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:50,731 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:50,732 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-04 15:46:50,733 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-04 15:46:50,733 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:50,733 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:50,737 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:50,738 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:50,738 INFO L85 PathProgramCache]: Analyzing trace with hash 763904423, now seen corresponding path program 1 times [2025-03-04 15:46:50,738 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:50,738 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2100216973] [2025-03-04 15:46:50,738 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:50,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:50,741 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-04 15:46:50,744 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-04 15:46:50,745 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:50,745 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:50,745 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:50,747 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-04 15:46:50,749 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-04 15:46:50,749 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:50,749 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:50,754 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:51,162 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:51,163 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:51,163 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:51,163 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:51,163 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:51,166 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:51,167 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:51,167 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:51,167 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:51,196 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 04.03 03:46:51 BoogieIcfgContainer [2025-03-04 15:46:51,196 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-04 15:46:51,196 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-04 15:46:51,196 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-04 15:46:51,197 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-04 15:46:51,198 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:41" (3/4) ... [2025-03-04 15:46:51,199 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-03-04 15:46:51,224 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-04 15:46:51,225 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-04 15:46:51,226 INFO L158 Benchmark]: Toolchain (without parser) took 9938.68ms. Allocated memory was 142.6MB in the beginning and 7.6GB in the end (delta: 7.5GB). Free memory was 113.0MB in the beginning and 6.3GB in the end (delta: -6.2GB). Peak memory consumption was 1.3GB. Max. memory is 16.1GB. [2025-03-04 15:46:51,226 INFO L158 Benchmark]: CDTParser took 0.60ms. Allocated memory is still 201.3MB. Free memory is still 124.8MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:46:51,226 INFO L158 Benchmark]: CACSL2BoogieTranslator took 156.68ms. Allocated memory is still 142.6MB. Free memory was 112.5MB in the beginning and 101.2MB in the end (delta: 11.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 15:46:51,226 INFO L158 Benchmark]: Boogie Procedure Inliner took 24.73ms. Allocated memory is still 142.6MB. Free memory was 101.2MB in the beginning and 99.7MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:46:51,227 INFO L158 Benchmark]: Boogie Preprocessor took 32.54ms. Allocated memory is still 142.6MB. Free memory was 99.7MB in the beginning and 98.4MB in the end (delta: 1.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 15:46:51,227 INFO L158 Benchmark]: IcfgBuilder took 294.22ms. Allocated memory is still 142.6MB. Free memory was 98.4MB in the beginning and 82.6MB in the end (delta: 15.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 15:46:51,227 INFO L158 Benchmark]: BuchiAutomizer took 9398.09ms. Allocated memory was 142.6MB in the beginning and 7.6GB in the end (delta: 7.5GB). Free memory was 82.6MB in the beginning and 6.3GB in the end (delta: -6.3GB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. [2025-03-04 15:46:51,227 INFO L158 Benchmark]: Witness Printer took 28.96ms. Allocated memory is still 7.6GB. Free memory was 6.3GB in the beginning and 6.3GB in the end (delta: 4.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 15:46:51,228 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.60ms. Allocated memory is still 201.3MB. Free memory is still 124.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 156.68ms. Allocated memory is still 142.6MB. Free memory was 112.5MB in the beginning and 101.2MB in the end (delta: 11.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 24.73ms. Allocated memory is still 142.6MB. Free memory was 101.2MB in the beginning and 99.7MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 32.54ms. Allocated memory is still 142.6MB. Free memory was 99.7MB in the beginning and 98.4MB in the end (delta: 1.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * IcfgBuilder took 294.22ms. Allocated memory is still 142.6MB. Free memory was 98.4MB in the beginning and 82.6MB in the end (delta: 15.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * BuchiAutomizer took 9398.09ms. Allocated memory was 142.6MB in the beginning and 7.6GB in the end (delta: 7.5GB). Free memory was 82.6MB in the beginning and 6.3GB in the end (delta: -6.3GB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. * Witness Printer took 28.96ms. Allocated memory is still 7.6GB. Free memory was 6.3GB in the beginning and 6.3GB in the end (delta: 4.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 12 terminating modules (12 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.12 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 143362 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 9.3s and 13 iterations. TraceHistogramMax:1. Analysis of lassos took 1.2s. Construction of modules took 0.0s. Büchi inclusion checks took 6.9s. Highest rank in rank-based complementation 0. Minimization of det autom 12. Minimization of nondet autom 0. Automata minimization 3.4s AutomataMinimizationTime, 12 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 2.1s Buchi closure took 0.1s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 639 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 639 mSDsluCounter, 2002 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 771 mSDsCounter, 24 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 62 IncrementalHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 24 mSolverCounterUnsat, 1231 mSDtfsCounter, 62 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI12 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 50]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L48] int cond; Loop: [L50] COND TRUE 1 [L51] cond = __VERIFIER_nondet_int() [L52] COND FALSE !(cond == 0) [L55] lk1 = 0 [L57] lk2 = 0 [L59] lk3 = 0 [L61] lk4 = 0 [L63] lk5 = 0 [L65] lk6 = 0 [L67] lk7 = 0 [L69] lk8 = 0 [L71] lk9 = 0 [L73] lk10 = 0 [L75] lk11 = 0 [L77] lk12 = 0 [L79] lk13 = 0 [L83] COND FALSE !(p1 != 0) [L87] COND FALSE !(p2 != 0) [L91] COND FALSE !(p3 != 0) [L95] COND FALSE !(p4 != 0) [L99] COND FALSE !(p5 != 0) [L103] COND FALSE !(p6 != 0) [L107] COND FALSE !(p7 != 0) [L111] COND FALSE !(p8 != 0) [L115] COND FALSE !(p9 != 0) [L119] COND FALSE !(p10 != 0) [L123] COND FALSE !(p11 != 0) [L127] COND FALSE !(p12 != 0) [L131] COND FALSE !(p13 != 0) [L137] COND FALSE !(p1 != 0) [L142] COND FALSE !(p2 != 0) [L147] COND FALSE !(p3 != 0) [L152] COND FALSE !(p4 != 0) [L157] COND FALSE !(p5 != 0) [L162] COND FALSE !(p6 != 0) [L167] COND FALSE !(p7 != 0) [L172] COND FALSE !(p8 != 0) [L177] COND FALSE !(p9 != 0) [L182] COND FALSE !(p10 != 0) [L187] COND FALSE !(p11 != 0) [L192] COND FALSE !(p12 != 0) [L197] COND FALSE !(p13 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 50]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L48] int cond; Loop: [L50] COND TRUE 1 [L51] cond = __VERIFIER_nondet_int() [L52] COND FALSE !(cond == 0) [L55] lk1 = 0 [L57] lk2 = 0 [L59] lk3 = 0 [L61] lk4 = 0 [L63] lk5 = 0 [L65] lk6 = 0 [L67] lk7 = 0 [L69] lk8 = 0 [L71] lk9 = 0 [L73] lk10 = 0 [L75] lk11 = 0 [L77] lk12 = 0 [L79] lk13 = 0 [L83] COND FALSE !(p1 != 0) [L87] COND FALSE !(p2 != 0) [L91] COND FALSE !(p3 != 0) [L95] COND FALSE !(p4 != 0) [L99] COND FALSE !(p5 != 0) [L103] COND FALSE !(p6 != 0) [L107] COND FALSE !(p7 != 0) [L111] COND FALSE !(p8 != 0) [L115] COND FALSE !(p9 != 0) [L119] COND FALSE !(p10 != 0) [L123] COND FALSE !(p11 != 0) [L127] COND FALSE !(p12 != 0) [L131] COND FALSE !(p13 != 0) [L137] COND FALSE !(p1 != 0) [L142] COND FALSE !(p2 != 0) [L147] COND FALSE !(p3 != 0) [L152] COND FALSE !(p4 != 0) [L157] COND FALSE !(p5 != 0) [L162] COND FALSE !(p6 != 0) [L167] COND FALSE !(p7 != 0) [L172] COND FALSE !(p8 != 0) [L177] COND FALSE !(p9 != 0) [L182] COND FALSE !(p10 != 0) [L187] COND FALSE !(p11 != 0) [L192] COND FALSE !(p12 != 0) [L197] COND FALSE !(p13 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-03-04 15:46:51,242 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)