./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_15-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_15-1.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 11a9c91fdf6b42598924d9a4ae5a3db9994a05118a3b564c2bd29b9bad4177b0 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 15:46:40,180 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 15:46:40,225 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-04 15:46:40,231 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 15:46:40,233 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 15:46:40,233 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 15:46:40,249 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 15:46:40,251 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 15:46:40,251 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 15:46:40,251 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 15:46:40,252 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 15:46:40,253 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 15:46:40,253 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 15:46:40,253 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 15:46:40,253 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 15:46:40,253 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 15:46:40,253 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 15:46:40,253 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 15:46:40,253 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 15:46:40,253 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 15:46:40,254 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 15:46:40,254 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 15:46:40,254 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-04 15:46:40,254 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 15:46:40,254 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-04 15:46:40,254 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 15:46:40,254 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 15:46:40,254 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 15:46:40,254 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 15:46:40,254 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 15:46:40,255 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-04 15:46:40,255 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 15:46:40,255 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 15:46:40,255 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 15:46:40,255 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 15:46:40,255 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 15:46:40,255 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 15:46:40,255 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 15:46:40,255 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 15:46:40,256 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 15:46:40,256 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 11a9c91fdf6b42598924d9a4ae5a3db9994a05118a3b564c2bd29b9bad4177b0 [2025-03-04 15:46:40,495 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 15:46:40,501 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 15:46:40,502 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 15:46:40,503 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 15:46:40,503 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 15:46:40,504 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_15-1.c [2025-03-04 15:46:41,641 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b38db7525/bd981fcbf9c744b6bf3823ca343ada57/FLAG2e1ef2193 [2025-03-04 15:46:41,858 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 15:46:41,860 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/locks/test_locks_15-1.c [2025-03-04 15:46:41,868 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b38db7525/bd981fcbf9c744b6bf3823ca343ada57/FLAG2e1ef2193 [2025-03-04 15:46:42,190 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b38db7525/bd981fcbf9c744b6bf3823ca343ada57 [2025-03-04 15:46:42,192 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 15:46:42,193 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 15:46:42,194 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 15:46:42,194 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 15:46:42,197 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 15:46:42,197 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,198 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@58fc6326 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42, skipping insertion in model container [2025-03-04 15:46:42,199 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,209 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 15:46:42,335 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:46:42,348 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 15:46:42,375 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:46:42,389 INFO L204 MainTranslator]: Completed translation [2025-03-04 15:46:42,389 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42 WrapperNode [2025-03-04 15:46:42,389 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 15:46:42,390 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 15:46:42,390 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 15:46:42,391 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 15:46:42,395 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,400 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,418 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 192 [2025-03-04 15:46:42,419 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 15:46:42,419 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 15:46:42,419 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 15:46:42,422 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 15:46:42,428 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,428 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,430 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,438 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-04 15:46:42,442 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,444 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,446 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,448 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,449 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,449 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,452 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 15:46:42,453 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 15:46:42,454 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 15:46:42,454 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 15:46:42,454 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,461 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:46:42,472 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:46:42,487 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:46:42,493 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 15:46:42,510 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-04 15:46:42,510 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 15:46:42,510 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 15:46:42,510 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-04 15:46:42,562 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 15:46:42,563 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 15:46:42,754 INFO L? ?]: Removed 36 outVars from TransFormulas that were not future-live. [2025-03-04 15:46:42,754 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 15:46:42,764 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 15:46:42,764 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-04 15:46:42,764 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:42 BoogieIcfgContainer [2025-03-04 15:46:42,765 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 15:46:42,765 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 15:46:42,765 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 15:46:42,769 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 15:46:42,770 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:42,770 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 03:46:42" (1/3) ... [2025-03-04 15:46:42,770 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@40e42112 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:46:42, skipping insertion in model container [2025-03-04 15:46:42,770 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:42,770 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (2/3) ... [2025-03-04 15:46:42,771 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@40e42112 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:46:42, skipping insertion in model container [2025-03-04 15:46:42,771 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:42,771 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:42" (3/3) ... [2025-03-04 15:46:42,772 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_15-1.c [2025-03-04 15:46:42,811 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 15:46:42,811 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 15:46:42,811 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 15:46:42,812 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 15:46:42,812 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 15:46:42,812 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 15:46:42,812 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 15:46:42,812 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 15:46:42,817 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,830 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2025-03-04 15:46:42,831 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:42,831 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:42,836 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:42,836 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:42,836 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 15:46:42,837 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:42,838 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2025-03-04 15:46:42,838 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:42,838 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:42,839 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:42,839 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:42,844 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:42,844 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:42,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,848 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 1 times [2025-03-04 15:46:42,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,852 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1152171515] [2025-03-04 15:46:42,853 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,895 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,902 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,902 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,902 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,902 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:42,905 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:42,906 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:42,906 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,907 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:42,919 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:42,922 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:42,922 INFO L85 PathProgramCache]: Analyzing trace with hash 1132856352, now seen corresponding path program 1 times [2025-03-04 15:46:42,922 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:42,923 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1798883053] [2025-03-04 15:46:42,923 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:42,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:42,933 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:42,948 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:42,948 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:42,949 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,050 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,051 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1798883053] [2025-03-04 15:46:43,052 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1798883053] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,052 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,053 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,053 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [281778018] [2025-03-04 15:46:43,054 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,057 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,058 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,078 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,079 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,081 INFO L87 Difference]: Start difference. First operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,119 INFO L93 Difference]: Finished difference Result 103 states and 189 transitions. [2025-03-04 15:46:43,120 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 103 states and 189 transitions. [2025-03-04 15:46:43,125 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 93 [2025-03-04 15:46:43,132 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 103 states to 95 states and 149 transitions. [2025-03-04 15:46:43,132 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2025-03-04 15:46:43,133 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2025-03-04 15:46:43,133 INFO L73 IsDeterministic]: Start isDeterministic. Operand 95 states and 149 transitions. [2025-03-04 15:46:43,135 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,135 INFO L218 hiAutomatonCegarLoop]: Abstraction has 95 states and 149 transitions. [2025-03-04 15:46:43,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states and 149 transitions. [2025-03-04 15:46:43,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 95. [2025-03-04 15:46:43,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.568421052631579) internal successors, (149), 94 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 149 transitions. [2025-03-04 15:46:43,158 INFO L240 hiAutomatonCegarLoop]: Abstraction has 95 states and 149 transitions. [2025-03-04 15:46:43,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,163 INFO L432 stractBuchiCegarLoop]: Abstraction has 95 states and 149 transitions. [2025-03-04 15:46:43,163 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 15:46:43,163 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 149 transitions. [2025-03-04 15:46:43,164 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 93 [2025-03-04 15:46:43,164 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,164 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,164 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,164 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,167 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,167 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,168 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,168 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 2 times [2025-03-04 15:46:43,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [685292503] [2025-03-04 15:46:43,168 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:46:43,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,174 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,176 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,176 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:43,176 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,176 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,184 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,186 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,186 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,187 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,188 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,188 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,189 INFO L85 PathProgramCache]: Analyzing trace with hash -877247489, now seen corresponding path program 1 times [2025-03-04 15:46:43,189 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,189 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1981379508] [2025-03-04 15:46:43,189 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,201 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:43,208 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:43,208 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,208 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,246 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,246 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1981379508] [2025-03-04 15:46:43,246 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1981379508] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,246 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,246 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,247 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1171791715] [2025-03-04 15:46:43,247 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,247 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,247 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,247 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,247 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,248 INFO L87 Difference]: Start difference. First operand 95 states and 149 transitions. cyclomatic complexity: 56 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,263 INFO L93 Difference]: Finished difference Result 186 states and 290 transitions. [2025-03-04 15:46:43,263 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 186 states and 290 transitions. [2025-03-04 15:46:43,266 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 184 [2025-03-04 15:46:43,267 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 186 states to 186 states and 290 transitions. [2025-03-04 15:46:43,267 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 186 [2025-03-04 15:46:43,268 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 186 [2025-03-04 15:46:43,268 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 290 transitions. [2025-03-04 15:46:43,268 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,268 INFO L218 hiAutomatonCegarLoop]: Abstraction has 186 states and 290 transitions. [2025-03-04 15:46:43,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 290 transitions. [2025-03-04 15:46:43,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2025-03-04 15:46:43,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 186 states, 186 states have (on average 1.5591397849462365) internal successors, (290), 185 states have internal predecessors, (290), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 290 transitions. [2025-03-04 15:46:43,278 INFO L240 hiAutomatonCegarLoop]: Abstraction has 186 states and 290 transitions. [2025-03-04 15:46:43,279 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,279 INFO L432 stractBuchiCegarLoop]: Abstraction has 186 states and 290 transitions. [2025-03-04 15:46:43,279 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 15:46:43,279 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 186 states and 290 transitions. [2025-03-04 15:46:43,281 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 184 [2025-03-04 15:46:43,281 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,281 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,281 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,281 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,281 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,281 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,282 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,282 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 3 times [2025-03-04 15:46:43,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1827344034] [2025-03-04 15:46:43,282 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:46:43,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,285 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,286 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,286 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:46:43,286 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,287 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,288 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,288 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,289 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,289 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,290 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,290 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,290 INFO L85 PathProgramCache]: Analyzing trace with hash -865931362, now seen corresponding path program 1 times [2025-03-04 15:46:43,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,291 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263953478] [2025-03-04 15:46:43,291 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,297 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:43,304 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:43,305 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,305 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,349 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,350 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1263953478] [2025-03-04 15:46:43,350 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1263953478] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,350 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,350 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,350 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805813250] [2025-03-04 15:46:43,350 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,350 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,350 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,350 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,350 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,351 INFO L87 Difference]: Start difference. First operand 186 states and 290 transitions. cyclomatic complexity: 108 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,374 INFO L93 Difference]: Finished difference Result 366 states and 566 transitions. [2025-03-04 15:46:43,374 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 366 states and 566 transitions. [2025-03-04 15:46:43,380 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 364 [2025-03-04 15:46:43,382 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 366 states to 366 states and 566 transitions. [2025-03-04 15:46:43,382 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 366 [2025-03-04 15:46:43,383 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 366 [2025-03-04 15:46:43,383 INFO L73 IsDeterministic]: Start isDeterministic. Operand 366 states and 566 transitions. [2025-03-04 15:46:43,384 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,384 INFO L218 hiAutomatonCegarLoop]: Abstraction has 366 states and 566 transitions. [2025-03-04 15:46:43,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states and 566 transitions. [2025-03-04 15:46:43,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 366. [2025-03-04 15:46:43,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 366 states, 366 states have (on average 1.546448087431694) internal successors, (566), 365 states have internal predecessors, (566), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 566 transitions. [2025-03-04 15:46:43,406 INFO L240 hiAutomatonCegarLoop]: Abstraction has 366 states and 566 transitions. [2025-03-04 15:46:43,408 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,409 INFO L432 stractBuchiCegarLoop]: Abstraction has 366 states and 566 transitions. [2025-03-04 15:46:43,409 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 15:46:43,409 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 366 states and 566 transitions. [2025-03-04 15:46:43,411 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 364 [2025-03-04 15:46:43,411 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,411 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,412 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,412 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,412 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,412 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,413 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,413 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 4 times [2025-03-04 15:46:43,413 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,413 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538603020] [2025-03-04 15:46:43,413 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:46:43,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,418 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:46:43,421 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,421 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:46:43,421 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,421 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,424 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,425 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,425 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,425 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,429 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,429 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,429 INFO L85 PathProgramCache]: Analyzing trace with hash -172829665, now seen corresponding path program 1 times [2025-03-04 15:46:43,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,430 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006229272] [2025-03-04 15:46:43,430 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,436 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:43,439 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:43,440 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,440 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,468 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,468 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006229272] [2025-03-04 15:46:43,468 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2006229272] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,469 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,469 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,469 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1273680449] [2025-03-04 15:46:43,469 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,469 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,469 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,469 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,470 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,470 INFO L87 Difference]: Start difference. First operand 366 states and 566 transitions. cyclomatic complexity: 208 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,488 INFO L93 Difference]: Finished difference Result 722 states and 1106 transitions. [2025-03-04 15:46:43,489 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 722 states and 1106 transitions. [2025-03-04 15:46:43,492 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 720 [2025-03-04 15:46:43,496 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 722 states to 722 states and 1106 transitions. [2025-03-04 15:46:43,496 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 722 [2025-03-04 15:46:43,497 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 722 [2025-03-04 15:46:43,498 INFO L73 IsDeterministic]: Start isDeterministic. Operand 722 states and 1106 transitions. [2025-03-04 15:46:43,501 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,501 INFO L218 hiAutomatonCegarLoop]: Abstraction has 722 states and 1106 transitions. [2025-03-04 15:46:43,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 722 states and 1106 transitions. [2025-03-04 15:46:43,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 722 to 722. [2025-03-04 15:46:43,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 722 states, 722 states have (on average 1.5318559556786704) internal successors, (1106), 721 states have internal predecessors, (1106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 722 states to 722 states and 1106 transitions. [2025-03-04 15:46:43,521 INFO L240 hiAutomatonCegarLoop]: Abstraction has 722 states and 1106 transitions. [2025-03-04 15:46:43,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,522 INFO L432 stractBuchiCegarLoop]: Abstraction has 722 states and 1106 transitions. [2025-03-04 15:46:43,522 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 15:46:43,522 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 722 states and 1106 transitions. [2025-03-04 15:46:43,525 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 720 [2025-03-04 15:46:43,525 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,525 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,527 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,527 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,528 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,528 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,528 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,528 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 5 times [2025-03-04 15:46:43,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,528 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158720322] [2025-03-04 15:46:43,528 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:46:43,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,533 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,535 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,535 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:43,535 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,535 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,536 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,539 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,539 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,539 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,542 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,543 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,543 INFO L85 PathProgramCache]: Analyzing trace with hash -427566210, now seen corresponding path program 1 times [2025-03-04 15:46:43,543 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,543 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [573602279] [2025-03-04 15:46:43,543 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,549 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:43,551 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:43,551 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,551 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,587 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,587 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [573602279] [2025-03-04 15:46:43,587 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [573602279] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,587 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,587 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,587 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [865194403] [2025-03-04 15:46:43,587 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,587 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,587 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,587 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,588 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,588 INFO L87 Difference]: Start difference. First operand 722 states and 1106 transitions. cyclomatic complexity: 400 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,611 INFO L93 Difference]: Finished difference Result 1426 states and 2162 transitions. [2025-03-04 15:46:43,611 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1426 states and 2162 transitions. [2025-03-04 15:46:43,623 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1424 [2025-03-04 15:46:43,630 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1426 states to 1426 states and 2162 transitions. [2025-03-04 15:46:43,631 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1426 [2025-03-04 15:46:43,632 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1426 [2025-03-04 15:46:43,632 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1426 states and 2162 transitions. [2025-03-04 15:46:43,636 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,636 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1426 states and 2162 transitions. [2025-03-04 15:46:43,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1426 states and 2162 transitions. [2025-03-04 15:46:43,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1426 to 1426. [2025-03-04 15:46:43,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1426 states, 1426 states have (on average 1.5161290322580645) internal successors, (2162), 1425 states have internal predecessors, (2162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1426 states to 1426 states and 2162 transitions. [2025-03-04 15:46:43,678 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1426 states and 2162 transitions. [2025-03-04 15:46:43,678 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,679 INFO L432 stractBuchiCegarLoop]: Abstraction has 1426 states and 2162 transitions. [2025-03-04 15:46:43,679 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 15:46:43,679 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1426 states and 2162 transitions. [2025-03-04 15:46:43,686 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1424 [2025-03-04 15:46:43,686 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,686 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,687 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,687 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,687 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,687 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,688 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,688 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 6 times [2025-03-04 15:46:43,688 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,688 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150896063] [2025-03-04 15:46:43,688 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:46:43,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,693 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,694 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,695 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:46:43,695 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,695 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,696 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,696 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,696 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,698 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,702 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,703 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,703 INFO L85 PathProgramCache]: Analyzing trace with hash 534047807, now seen corresponding path program 1 times [2025-03-04 15:46:43,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,703 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1609192558] [2025-03-04 15:46:43,703 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,711 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:43,713 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:43,713 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,718 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,734 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,734 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1609192558] [2025-03-04 15:46:43,734 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1609192558] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,734 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,734 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979843868] [2025-03-04 15:46:43,735 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,735 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,735 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,735 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,735 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,735 INFO L87 Difference]: Start difference. First operand 1426 states and 2162 transitions. cyclomatic complexity: 768 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,757 INFO L93 Difference]: Finished difference Result 2818 states and 4226 transitions. [2025-03-04 15:46:43,757 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2818 states and 4226 transitions. [2025-03-04 15:46:43,776 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2816 [2025-03-04 15:46:43,789 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2818 states to 2818 states and 4226 transitions. [2025-03-04 15:46:43,789 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2818 [2025-03-04 15:46:43,792 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2818 [2025-03-04 15:46:43,792 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2818 states and 4226 transitions. [2025-03-04 15:46:43,797 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,798 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2818 states and 4226 transitions. [2025-03-04 15:46:43,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2818 states and 4226 transitions. [2025-03-04 15:46:43,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2818 to 2818. [2025-03-04 15:46:43,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2818 states, 2818 states have (on average 1.4996451383960256) internal successors, (4226), 2817 states have internal predecessors, (4226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2818 states to 2818 states and 4226 transitions. [2025-03-04 15:46:43,846 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2818 states and 4226 transitions. [2025-03-04 15:46:43,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,847 INFO L432 stractBuchiCegarLoop]: Abstraction has 2818 states and 4226 transitions. [2025-03-04 15:46:43,849 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 15:46:43,849 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2818 states and 4226 transitions. [2025-03-04 15:46:43,860 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2816 [2025-03-04 15:46:43,860 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,861 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,862 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,863 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,863 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,863 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,863 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,864 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 7 times [2025-03-04 15:46:43,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,864 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725158929] [2025-03-04 15:46:43,864 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:46:43,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,867 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,869 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,869 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,869 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,870 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,871 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,872 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,873 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,873 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,875 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,875 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,875 INFO L85 PathProgramCache]: Analyzing trace with hash 565067614, now seen corresponding path program 1 times [2025-03-04 15:46:43,875 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,875 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98796389] [2025-03-04 15:46:43,875 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,882 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:43,885 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:43,886 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,886 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,908 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,910 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,911 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98796389] [2025-03-04 15:46:43,911 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [98796389] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,911 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,911 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,911 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [822862100] [2025-03-04 15:46:43,911 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,911 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,911 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,911 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,911 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,912 INFO L87 Difference]: Start difference. First operand 2818 states and 4226 transitions. cyclomatic complexity: 1472 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,945 INFO L93 Difference]: Finished difference Result 5570 states and 8258 transitions. [2025-03-04 15:46:43,945 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5570 states and 8258 transitions. [2025-03-04 15:46:43,975 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5568 [2025-03-04 15:46:43,997 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5570 states to 5570 states and 8258 transitions. [2025-03-04 15:46:43,998 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5570 [2025-03-04 15:46:44,001 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5570 [2025-03-04 15:46:44,002 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5570 states and 8258 transitions. [2025-03-04 15:46:44,009 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:44,010 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5570 states and 8258 transitions. [2025-03-04 15:46:44,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5570 states and 8258 transitions. [2025-03-04 15:46:44,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5570 to 5570. [2025-03-04 15:46:44,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5570 states, 5570 states have (on average 1.4825852782764812) internal successors, (8258), 5569 states have internal predecessors, (8258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5570 states to 5570 states and 8258 transitions. [2025-03-04 15:46:44,125 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5570 states and 8258 transitions. [2025-03-04 15:46:44,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:44,127 INFO L432 stractBuchiCegarLoop]: Abstraction has 5570 states and 8258 transitions. [2025-03-04 15:46:44,128 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 15:46:44,128 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5570 states and 8258 transitions. [2025-03-04 15:46:44,148 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5568 [2025-03-04 15:46:44,149 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:44,149 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:44,150 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:44,150 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:44,150 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:44,150 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:44,150 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,151 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 8 times [2025-03-04 15:46:44,151 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,151 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [492601832] [2025-03-04 15:46:44,151 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:46:44,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,153 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,153 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,154 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:44,154 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,154 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:44,154 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,157 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,157 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,157 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,158 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:44,159 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,159 INFO L85 PathProgramCache]: Analyzing trace with hash 498060861, now seen corresponding path program 1 times [2025-03-04 15:46:44,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,159 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [234998163] [2025-03-04 15:46:44,159 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:44,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,163 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:44,165 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:44,165 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,165 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:44,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:44,183 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:44,183 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [234998163] [2025-03-04 15:46:44,183 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [234998163] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:44,183 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:44,183 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:44,183 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1390198231] [2025-03-04 15:46:44,183 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:44,184 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:44,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:44,184 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:44,184 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:44,184 INFO L87 Difference]: Start difference. First operand 5570 states and 8258 transitions. cyclomatic complexity: 2816 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:44,226 INFO L93 Difference]: Finished difference Result 11010 states and 16130 transitions. [2025-03-04 15:46:44,226 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11010 states and 16130 transitions. [2025-03-04 15:46:44,272 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 11008 [2025-03-04 15:46:44,308 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11010 states to 11010 states and 16130 transitions. [2025-03-04 15:46:44,308 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11010 [2025-03-04 15:46:44,314 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11010 [2025-03-04 15:46:44,314 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11010 states and 16130 transitions. [2025-03-04 15:46:44,325 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:44,325 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11010 states and 16130 transitions. [2025-03-04 15:46:44,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11010 states and 16130 transitions. [2025-03-04 15:46:44,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11010 to 11010. [2025-03-04 15:46:44,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11010 states, 11010 states have (on average 1.4650317892824705) internal successors, (16130), 11009 states have internal predecessors, (16130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11010 states to 11010 states and 16130 transitions. [2025-03-04 15:46:44,504 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11010 states and 16130 transitions. [2025-03-04 15:46:44,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:44,506 INFO L432 stractBuchiCegarLoop]: Abstraction has 11010 states and 16130 transitions. [2025-03-04 15:46:44,506 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-04 15:46:44,506 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11010 states and 16130 transitions. [2025-03-04 15:46:44,539 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 11008 [2025-03-04 15:46:44,540 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:44,540 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:44,540 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:44,540 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:44,540 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:44,540 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:44,540 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,540 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 9 times [2025-03-04 15:46:44,541 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,541 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064831530] [2025-03-04 15:46:44,541 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:46:44,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,544 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,545 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,545 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:46:44,545 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,545 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:44,546 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,547 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,547 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,547 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,548 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:44,548 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,548 INFO L85 PathProgramCache]: Analyzing trace with hash 1742825342, now seen corresponding path program 1 times [2025-03-04 15:46:44,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,548 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327648482] [2025-03-04 15:46:44,548 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:44,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,551 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:44,552 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:44,552 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,552 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:44,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:44,564 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:44,564 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [327648482] [2025-03-04 15:46:44,564 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [327648482] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:44,564 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:44,564 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:44,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2082364524] [2025-03-04 15:46:44,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:44,564 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:44,564 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:44,565 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:44,565 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:44,565 INFO L87 Difference]: Start difference. First operand 11010 states and 16130 transitions. cyclomatic complexity: 5376 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:44,671 INFO L93 Difference]: Finished difference Result 21762 states and 31490 transitions. [2025-03-04 15:46:44,671 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21762 states and 31490 transitions. [2025-03-04 15:46:44,752 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 21760 [2025-03-04 15:46:44,849 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21762 states to 21762 states and 31490 transitions. [2025-03-04 15:46:44,849 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21762 [2025-03-04 15:46:44,861 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21762 [2025-03-04 15:46:44,861 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21762 states and 31490 transitions. [2025-03-04 15:46:44,879 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:44,879 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21762 states and 31490 transitions. [2025-03-04 15:46:44,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21762 states and 31490 transitions. [2025-03-04 15:46:45,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21762 to 21762. [2025-03-04 15:46:45,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21762 states, 21762 states have (on average 1.447017737340318) internal successors, (31490), 21761 states have internal predecessors, (31490), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:45,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21762 states to 21762 states and 31490 transitions. [2025-03-04 15:46:45,267 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21762 states and 31490 transitions. [2025-03-04 15:46:45,267 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:45,268 INFO L432 stractBuchiCegarLoop]: Abstraction has 21762 states and 31490 transitions. [2025-03-04 15:46:45,268 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-04 15:46:45,268 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21762 states and 31490 transitions. [2025-03-04 15:46:45,333 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 21760 [2025-03-04 15:46:45,334 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:45,334 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:45,334 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:45,334 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:45,334 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:45,335 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:45,335 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:45,335 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 10 times [2025-03-04 15:46:45,335 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:45,335 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375497955] [2025-03-04 15:46:45,335 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:46:45,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:45,338 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:46:45,339 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:45,340 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:46:45,340 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:45,340 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:45,341 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:45,341 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:45,341 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:45,341 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:45,347 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:45,347 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:45,347 INFO L85 PathProgramCache]: Analyzing trace with hash -295230947, now seen corresponding path program 1 times [2025-03-04 15:46:45,347 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:45,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [132383845] [2025-03-04 15:46:45,347 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:45,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:45,352 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:45,354 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:45,354 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:45,354 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:45,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:45,374 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:45,374 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [132383845] [2025-03-04 15:46:45,374 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [132383845] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:45,374 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:45,375 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:45,375 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570769744] [2025-03-04 15:46:45,375 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:45,375 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:45,375 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:45,375 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:45,375 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:45,376 INFO L87 Difference]: Start difference. First operand 21762 states and 31490 transitions. cyclomatic complexity: 10240 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:45,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:45,504 INFO L93 Difference]: Finished difference Result 43010 states and 61442 transitions. [2025-03-04 15:46:45,504 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43010 states and 61442 transitions. [2025-03-04 15:46:45,651 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 43008 [2025-03-04 15:46:45,887 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43010 states to 43010 states and 61442 transitions. [2025-03-04 15:46:45,888 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43010 [2025-03-04 15:46:45,910 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43010 [2025-03-04 15:46:45,911 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43010 states and 61442 transitions. [2025-03-04 15:46:45,932 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:45,932 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43010 states and 61442 transitions. [2025-03-04 15:46:45,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43010 states and 61442 transitions. [2025-03-04 15:46:46,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43010 to 43010. [2025-03-04 15:46:46,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43010 states, 43010 states have (on average 1.4285514996512438) internal successors, (61442), 43009 states have internal predecessors, (61442), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:46,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43010 states to 43010 states and 61442 transitions. [2025-03-04 15:46:46,655 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43010 states and 61442 transitions. [2025-03-04 15:46:46,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:46,656 INFO L432 stractBuchiCegarLoop]: Abstraction has 43010 states and 61442 transitions. [2025-03-04 15:46:46,656 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-04 15:46:46,656 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43010 states and 61442 transitions. [2025-03-04 15:46:46,827 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 43008 [2025-03-04 15:46:46,828 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:46,828 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:46,828 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:46,828 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:46,829 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:46,829 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:46,830 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:46,830 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 11 times [2025-03-04 15:46:46,830 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:46,830 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [395263187] [2025-03-04 15:46:46,830 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:46:46,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:46,834 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:46,835 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:46,835 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:46,835 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:46,835 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:46,836 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:46,836 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:46,836 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:46,836 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:46,839 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:46,841 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:46,841 INFO L85 PathProgramCache]: Analyzing trace with hash -83880034, now seen corresponding path program 1 times [2025-03-04 15:46:46,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:46,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928558639] [2025-03-04 15:46:46,842 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:46,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:46,847 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:46,848 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:46,849 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:46,849 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:46,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:46,868 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:46,868 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928558639] [2025-03-04 15:46:46,869 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [928558639] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:46,869 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:46,869 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:46,869 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [400563866] [2025-03-04 15:46:46,869 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:46,869 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:46,871 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:46,871 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:46,871 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:46,872 INFO L87 Difference]: Start difference. First operand 43010 states and 61442 transitions. cyclomatic complexity: 19456 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:47,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:47,094 INFO L93 Difference]: Finished difference Result 84994 states and 119810 transitions. [2025-03-04 15:46:47,094 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 84994 states and 119810 transitions. [2025-03-04 15:46:47,440 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 84992 [2025-03-04 15:46:47,857 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 84994 states to 84994 states and 119810 transitions. [2025-03-04 15:46:47,857 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84994 [2025-03-04 15:46:47,892 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84994 [2025-03-04 15:46:47,893 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84994 states and 119810 transitions. [2025-03-04 15:46:47,929 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:47,930 INFO L218 hiAutomatonCegarLoop]: Abstraction has 84994 states and 119810 transitions. [2025-03-04 15:46:47,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84994 states and 119810 transitions. [2025-03-04 15:46:48,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84994 to 84994. [2025-03-04 15:46:48,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84994 states, 84994 states have (on average 1.409628914982234) internal successors, (119810), 84993 states have internal predecessors, (119810), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:48,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84994 states to 84994 states and 119810 transitions. [2025-03-04 15:46:48,761 INFO L240 hiAutomatonCegarLoop]: Abstraction has 84994 states and 119810 transitions. [2025-03-04 15:46:48,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:48,762 INFO L432 stractBuchiCegarLoop]: Abstraction has 84994 states and 119810 transitions. [2025-03-04 15:46:48,762 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-04 15:46:48,762 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 84994 states and 119810 transitions. [2025-03-04 15:46:49,169 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 84992 [2025-03-04 15:46:49,170 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:49,170 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:49,171 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:49,171 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:49,171 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:49,171 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:49,172 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:49,172 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 12 times [2025-03-04 15:46:49,172 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:49,172 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1402309872] [2025-03-04 15:46:49,172 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:46:49,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:49,175 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:49,175 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:49,175 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:46:49,175 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,176 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:49,177 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:49,177 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:49,177 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,177 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,179 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:49,179 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:49,179 INFO L85 PathProgramCache]: Analyzing trace with hash -492704259, now seen corresponding path program 1 times [2025-03-04 15:46:49,179 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:49,179 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2129489495] [2025-03-04 15:46:49,179 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:49,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:49,183 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:49,184 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:49,184 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,184 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:49,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:49,205 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:49,205 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2129489495] [2025-03-04 15:46:49,205 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2129489495] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:49,205 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:49,205 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-04 15:46:49,205 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1116837084] [2025-03-04 15:46:49,205 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:49,205 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:49,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:49,205 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:49,205 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:49,206 INFO L87 Difference]: Start difference. First operand 84994 states and 119810 transitions. cyclomatic complexity: 36864 Second operand has 3 states, 2 states have (on average 17.0) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:49,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:49,734 INFO L93 Difference]: Finished difference Result 167938 states and 233474 transitions. [2025-03-04 15:46:49,734 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167938 states and 233474 transitions. [2025-03-04 15:46:50,361 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 167936 [2025-03-04 15:46:50,753 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167938 states to 167938 states and 233474 transitions. [2025-03-04 15:46:50,753 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 167938 [2025-03-04 15:46:50,814 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 167938 [2025-03-04 15:46:50,814 INFO L73 IsDeterministic]: Start isDeterministic. Operand 167938 states and 233474 transitions. [2025-03-04 15:46:50,901 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:50,901 INFO L218 hiAutomatonCegarLoop]: Abstraction has 167938 states and 233474 transitions. [2025-03-04 15:46:50,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167938 states and 233474 transitions. [2025-03-04 15:46:52,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167938 to 167938. [2025-03-04 15:46:52,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 167938 states, 167938 states have (on average 1.3902392549631413) internal successors, (233474), 167937 states have internal predecessors, (233474), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:52,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167938 states to 167938 states and 233474 transitions. [2025-03-04 15:46:52,720 INFO L240 hiAutomatonCegarLoop]: Abstraction has 167938 states and 233474 transitions. [2025-03-04 15:46:52,720 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:52,720 INFO L432 stractBuchiCegarLoop]: Abstraction has 167938 states and 233474 transitions. [2025-03-04 15:46:52,721 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-04 15:46:52,721 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 167938 states and 233474 transitions. [2025-03-04 15:46:53,549 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 167936 [2025-03-04 15:46:53,550 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:53,550 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:53,551 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:53,551 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:53,552 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:53,552 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:53,552 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:53,552 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 13 times [2025-03-04 15:46:53,552 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:53,552 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1312722721] [2025-03-04 15:46:53,552 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:46:53,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:53,554 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:53,555 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:53,555 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:53,555 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:53,555 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:53,556 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:53,556 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:53,556 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:53,556 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:53,557 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:53,557 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:53,557 INFO L85 PathProgramCache]: Analyzing trace with hash -1489776612, now seen corresponding path program 1 times [2025-03-04 15:46:53,557 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:53,557 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [167011426] [2025-03-04 15:46:53,557 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:53,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:53,560 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:53,561 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:53,561 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:53,561 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:53,561 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:53,562 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:46:53,563 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:46:53,563 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:53,563 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:53,568 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:53,569 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:53,569 INFO L85 PathProgramCache]: Analyzing trace with hash 676167419, now seen corresponding path program 1 times [2025-03-04 15:46:53,569 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:53,569 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112945843] [2025-03-04 15:46:53,569 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:53,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:53,572 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 36 statements into 1 equivalence classes. [2025-03-04 15:46:53,574 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 36 of 36 statements. [2025-03-04 15:46:53,574 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:53,574 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:53,574 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:53,579 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 36 statements into 1 equivalence classes. [2025-03-04 15:46:53,580 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 36 of 36 statements. [2025-03-04 15:46:53,580 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:53,580 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:53,587 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:54,070 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:54,071 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:54,071 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:54,071 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:54,071 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:54,075 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:54,077 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:54,077 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:54,077 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:54,106 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 04.03 03:46:54 BoogieIcfgContainer [2025-03-04 15:46:54,106 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-04 15:46:54,106 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-04 15:46:54,106 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-04 15:46:54,107 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-04 15:46:54,107 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:42" (3/4) ... [2025-03-04 15:46:54,108 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-03-04 15:46:54,145 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-04 15:46:54,146 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-04 15:46:54,146 INFO L158 Benchmark]: Toolchain (without parser) took 11953.31ms. Allocated memory was 201.3MB in the beginning and 7.6GB in the end (delta: 7.4GB). Free memory was 154.4MB in the beginning and 6.2GB in the end (delta: -6.1GB). Peak memory consumption was 1.4GB. Max. memory is 16.1GB. [2025-03-04 15:46:54,146 INFO L158 Benchmark]: CDTParser took 0.25ms. Allocated memory is still 201.3MB. Free memory is still 117.9MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:46:54,146 INFO L158 Benchmark]: CACSL2BoogieTranslator took 196.12ms. Allocated memory is still 201.3MB. Free memory was 154.0MB in the beginning and 142.3MB in the end (delta: 11.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 15:46:54,146 INFO L158 Benchmark]: Boogie Procedure Inliner took 28.36ms. Allocated memory is still 201.3MB. Free memory was 142.3MB in the beginning and 141.0MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:46:54,147 INFO L158 Benchmark]: Boogie Preprocessor took 33.16ms. Allocated memory is still 201.3MB. Free memory was 140.7MB in the beginning and 139.5MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:46:54,147 INFO L158 Benchmark]: IcfgBuilder took 311.57ms. Allocated memory is still 201.3MB. Free memory was 139.5MB in the beginning and 122.1MB in the end (delta: 17.5MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-04 15:46:54,147 INFO L158 Benchmark]: BuchiAutomizer took 11340.48ms. Allocated memory was 201.3MB in the beginning and 7.6GB in the end (delta: 7.4GB). Free memory was 122.1MB in the beginning and 6.2GB in the end (delta: -6.1GB). Peak memory consumption was 1.3GB. Max. memory is 16.1GB. [2025-03-04 15:46:54,147 INFO L158 Benchmark]: Witness Printer took 39.11ms. Allocated memory is still 7.6GB. Free memory was 6.2GB in the beginning and 6.2GB in the end (delta: 253.7kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 15:46:54,150 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25ms. Allocated memory is still 201.3MB. Free memory is still 117.9MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 196.12ms. Allocated memory is still 201.3MB. Free memory was 154.0MB in the beginning and 142.3MB in the end (delta: 11.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 28.36ms. Allocated memory is still 201.3MB. Free memory was 142.3MB in the beginning and 141.0MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 33.16ms. Allocated memory is still 201.3MB. Free memory was 140.7MB in the beginning and 139.5MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 311.57ms. Allocated memory is still 201.3MB. Free memory was 139.5MB in the beginning and 122.1MB in the end (delta: 17.5MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 11340.48ms. Allocated memory was 201.3MB in the beginning and 7.6GB in the end (delta: 7.4GB). Free memory was 122.1MB in the beginning and 6.2GB in the end (delta: -6.1GB). Peak memory consumption was 1.3GB. Max. memory is 16.1GB. * Witness Printer took 39.11ms. Allocated memory is still 7.6GB. Free memory was 6.2GB in the beginning and 6.2GB in the end (delta: 253.7kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 12 terminating modules (12 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.12 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 167938 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 11.2s and 13 iterations. TraceHistogramMax:1. Analysis of lassos took 1.2s. Construction of modules took 0.0s. Büchi inclusion checks took 8.2s. Highest rank in rank-based complementation 0. Minimization of det autom 12. Minimization of nondet autom 0. Automata minimization 4.2s AutomataMinimizationTime, 12 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 2.5s Buchi closure took 0.1s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 703 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 703 mSDsluCounter, 2255 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 871 mSDsCounter, 24 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 62 IncrementalHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 24 mSolverCounterUnsat, 1384 mSDtfsCounter, 62 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI12 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 56]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L50] int p15 = __VERIFIER_nondet_int(); [L51] int lk15; [L54] int cond; Loop: [L56] COND TRUE 1 [L57] cond = __VERIFIER_nondet_int() [L58] COND FALSE !(cond == 0) [L61] lk1 = 0 [L63] lk2 = 0 [L65] lk3 = 0 [L67] lk4 = 0 [L69] lk5 = 0 [L71] lk6 = 0 [L73] lk7 = 0 [L75] lk8 = 0 [L77] lk9 = 0 [L79] lk10 = 0 [L81] lk11 = 0 [L83] lk12 = 0 [L85] lk13 = 0 [L87] lk14 = 0 [L89] lk15 = 0 [L93] COND FALSE !(p1 != 0) [L97] COND TRUE p2 != 0 [L98] lk2 = 1 [L101] COND FALSE !(p3 != 0) [L105] COND FALSE !(p4 != 0) [L109] COND FALSE !(p5 != 0) [L113] COND FALSE !(p6 != 0) [L117] COND FALSE !(p7 != 0) [L121] COND FALSE !(p8 != 0) [L125] COND FALSE !(p9 != 0) [L129] COND FALSE !(p10 != 0) [L133] COND FALSE !(p11 != 0) [L137] COND FALSE !(p12 != 0) [L141] COND FALSE !(p13 != 0) [L145] COND TRUE p14 != 0 [L146] lk14 = 1 [L149] COND FALSE !(p15 != 0) [L155] COND FALSE !(p1 != 0) [L160] COND TRUE p2 != 0 [L161] COND FALSE !(lk2 != 1) [L162] lk2 = 0 [L165] COND FALSE !(p3 != 0) [L170] COND FALSE !(p4 != 0) [L175] COND FALSE !(p5 != 0) [L180] COND FALSE !(p6 != 0) [L185] COND FALSE !(p7 != 0) [L190] COND FALSE !(p8 != 0) [L195] COND FALSE !(p9 != 0) [L200] COND FALSE !(p10 != 0) [L205] COND FALSE !(p11 != 0) [L210] COND FALSE !(p12 != 0) [L215] COND FALSE !(p13 != 0) [L220] COND TRUE p14 != 0 [L221] COND FALSE !(lk14 != 1) [L222] lk14 = 0 [L225] COND FALSE !(p15 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 56]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L50] int p15 = __VERIFIER_nondet_int(); [L51] int lk15; [L54] int cond; Loop: [L56] COND TRUE 1 [L57] cond = __VERIFIER_nondet_int() [L58] COND FALSE !(cond == 0) [L61] lk1 = 0 [L63] lk2 = 0 [L65] lk3 = 0 [L67] lk4 = 0 [L69] lk5 = 0 [L71] lk6 = 0 [L73] lk7 = 0 [L75] lk8 = 0 [L77] lk9 = 0 [L79] lk10 = 0 [L81] lk11 = 0 [L83] lk12 = 0 [L85] lk13 = 0 [L87] lk14 = 0 [L89] lk15 = 0 [L93] COND FALSE !(p1 != 0) [L97] COND TRUE p2 != 0 [L98] lk2 = 1 [L101] COND FALSE !(p3 != 0) [L105] COND FALSE !(p4 != 0) [L109] COND FALSE !(p5 != 0) [L113] COND FALSE !(p6 != 0) [L117] COND FALSE !(p7 != 0) [L121] COND FALSE !(p8 != 0) [L125] COND FALSE !(p9 != 0) [L129] COND FALSE !(p10 != 0) [L133] COND FALSE !(p11 != 0) [L137] COND FALSE !(p12 != 0) [L141] COND FALSE !(p13 != 0) [L145] COND TRUE p14 != 0 [L146] lk14 = 1 [L149] COND FALSE !(p15 != 0) [L155] COND FALSE !(p1 != 0) [L160] COND TRUE p2 != 0 [L161] COND FALSE !(lk2 != 1) [L162] lk2 = 0 [L165] COND FALSE !(p3 != 0) [L170] COND FALSE !(p4 != 0) [L175] COND FALSE !(p5 != 0) [L180] COND FALSE !(p6 != 0) [L185] COND FALSE !(p7 != 0) [L190] COND FALSE !(p8 != 0) [L195] COND FALSE !(p9 != 0) [L200] COND FALSE !(p10 != 0) [L205] COND FALSE !(p11 != 0) [L210] COND FALSE !(p12 != 0) [L215] COND FALSE !(p13 != 0) [L220] COND TRUE p14 != 0 [L221] COND FALSE !(lk14 != 1) [L222] lk14 = 0 [L225] COND FALSE !(p15 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-03-04 15:46:54,166 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)