./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_15-2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_15-2.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ad13fcacd201ae20f6800b42387b8ec1153fb1bf63cee7a12ec23f4a302be7c7 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 15:46:40,767 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 15:46:40,827 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-04 15:46:40,832 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 15:46:40,832 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 15:46:40,832 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 15:46:40,850 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 15:46:40,852 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 15:46:40,852 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 15:46:40,852 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 15:46:40,853 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 15:46:40,853 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 15:46:40,853 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 15:46:40,853 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 15:46:40,853 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 15:46:40,854 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 15:46:40,854 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 15:46:40,854 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 15:46:40,854 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 15:46:40,854 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 15:46:40,854 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 15:46:40,854 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 15:46:40,854 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-04 15:46:40,854 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 15:46:40,854 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-04 15:46:40,854 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 15:46:40,854 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 15:46:40,855 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 15:46:40,855 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 15:46:40,855 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 15:46:40,855 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-04 15:46:40,855 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 15:46:40,855 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 15:46:40,855 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 15:46:40,855 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 15:46:40,856 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 15:46:40,856 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 15:46:40,856 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 15:46:40,856 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 15:46:40,856 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 15:46:40,856 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ad13fcacd201ae20f6800b42387b8ec1153fb1bf63cee7a12ec23f4a302be7c7 [2025-03-04 15:46:41,066 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 15:46:41,073 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 15:46:41,074 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 15:46:41,075 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 15:46:41,075 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 15:46:41,076 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_15-2.c [2025-03-04 15:46:42,207 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/944e5fe06/1e7a5754589d4d7c96f89b2708211870/FLAG1a883b9db [2025-03-04 15:46:42,456 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 15:46:42,459 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/locks/test_locks_15-2.c [2025-03-04 15:46:42,471 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/944e5fe06/1e7a5754589d4d7c96f89b2708211870/FLAG1a883b9db [2025-03-04 15:46:42,490 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/944e5fe06/1e7a5754589d4d7c96f89b2708211870 [2025-03-04 15:46:42,492 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 15:46:42,493 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 15:46:42,494 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 15:46:42,494 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 15:46:42,497 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 15:46:42,497 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,498 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5540f65f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42, skipping insertion in model container [2025-03-04 15:46:42,498 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,511 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 15:46:42,628 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:46:42,637 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 15:46:42,658 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 15:46:42,666 INFO L204 MainTranslator]: Completed translation [2025-03-04 15:46:42,667 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42 WrapperNode [2025-03-04 15:46:42,667 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 15:46:42,668 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 15:46:42,668 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 15:46:42,668 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 15:46:42,672 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,676 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,691 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 190 [2025-03-04 15:46:42,695 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 15:46:42,696 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 15:46:42,696 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 15:46:42,697 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 15:46:42,703 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,704 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,705 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,717 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-04 15:46:42,722 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,722 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,724 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,728 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,729 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,730 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,731 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 15:46:42,735 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 15:46:42,735 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 15:46:42,735 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 15:46:42,736 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (1/1) ... [2025-03-04 15:46:42,741 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 15:46:42,752 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 15:46:42,764 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 15:46:42,767 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 15:46:42,786 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-04 15:46:42,786 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 15:46:42,786 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 15:46:42,786 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-04 15:46:42,841 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 15:46:42,842 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 15:46:43,083 INFO L? ?]: Removed 34 outVars from TransFormulas that were not future-live. [2025-03-04 15:46:43,083 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 15:46:43,090 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 15:46:43,090 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-04 15:46:43,090 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:43 BoogieIcfgContainer [2025-03-04 15:46:43,090 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 15:46:43,091 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 15:46:43,091 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 15:46:43,095 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 15:46:43,095 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:43,095 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 03:46:42" (1/3) ... [2025-03-04 15:46:43,096 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5722d4a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:46:43, skipping insertion in model container [2025-03-04 15:46:43,096 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:43,096 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 03:46:42" (2/3) ... [2025-03-04 15:46:43,096 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5722d4a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 03:46:43, skipping insertion in model container [2025-03-04 15:46:43,096 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 15:46:43,097 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:43" (3/3) ... [2025-03-04 15:46:43,097 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_15-2.c [2025-03-04 15:46:43,128 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 15:46:43,128 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 15:46:43,128 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 15:46:43,128 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 15:46:43,129 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 15:46:43,129 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 15:46:43,129 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 15:46:43,129 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 15:46:43,132 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,142 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2025-03-04 15:46:43,142 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,142 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,145 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,146 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,146 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 15:46:43,146 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,148 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2025-03-04 15:46:43,148 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,148 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,148 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,148 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,153 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,153 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,157 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 1 times [2025-03-04 15:46:43,162 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,162 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179068712] [2025-03-04 15:46:43,162 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,208 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,216 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,217 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,217 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,217 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,221 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,227 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,227 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,227 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,242 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,245 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,245 INFO L85 PathProgramCache]: Analyzing trace with hash 1587644894, now seen corresponding path program 1 times [2025-03-04 15:46:43,245 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,245 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [982619330] [2025-03-04 15:46:43,245 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,252 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:43,260 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:43,261 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,261 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,365 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,366 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,366 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [982619330] [2025-03-04 15:46:43,367 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [982619330] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,368 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,368 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,368 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [77261385] [2025-03-04 15:46:43,369 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,371 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,372 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,390 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,390 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,393 INFO L87 Difference]: Start difference. First operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,427 INFO L93 Difference]: Finished difference Result 103 states and 189 transitions. [2025-03-04 15:46:43,428 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 103 states and 189 transitions. [2025-03-04 15:46:43,430 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 93 [2025-03-04 15:46:43,435 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 103 states to 95 states and 153 transitions. [2025-03-04 15:46:43,436 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2025-03-04 15:46:43,436 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2025-03-04 15:46:43,439 INFO L73 IsDeterministic]: Start isDeterministic. Operand 95 states and 153 transitions. [2025-03-04 15:46:43,439 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,439 INFO L218 hiAutomatonCegarLoop]: Abstraction has 95 states and 153 transitions. [2025-03-04 15:46:43,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states and 153 transitions. [2025-03-04 15:46:43,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 95. [2025-03-04 15:46:43,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.6105263157894736) internal successors, (153), 94 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 153 transitions. [2025-03-04 15:46:43,466 INFO L240 hiAutomatonCegarLoop]: Abstraction has 95 states and 153 transitions. [2025-03-04 15:46:43,467 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,471 INFO L432 stractBuchiCegarLoop]: Abstraction has 95 states and 153 transitions. [2025-03-04 15:46:43,471 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 15:46:43,471 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 153 transitions. [2025-03-04 15:46:43,475 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 93 [2025-03-04 15:46:43,475 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,475 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,475 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,475 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,475 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,476 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,476 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,476 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 2 times [2025-03-04 15:46:43,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,476 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1262045312] [2025-03-04 15:46:43,476 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:46:43,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,480 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,481 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,482 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:43,482 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,482 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,483 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,484 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,484 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,484 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,486 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,486 INFO L85 PathProgramCache]: Analyzing trace with hash 1598961021, now seen corresponding path program 1 times [2025-03-04 15:46:43,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648940310] [2025-03-04 15:46:43,486 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,495 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:43,506 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:43,507 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,507 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,543 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,543 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648940310] [2025-03-04 15:46:43,543 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [648940310] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,543 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,543 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,543 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [14387534] [2025-03-04 15:46:43,543 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,544 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,544 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,544 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,544 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,544 INFO L87 Difference]: Start difference. First operand 95 states and 153 transitions. cyclomatic complexity: 60 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,566 INFO L93 Difference]: Finished difference Result 186 states and 298 transitions. [2025-03-04 15:46:43,566 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 186 states and 298 transitions. [2025-03-04 15:46:43,571 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 184 [2025-03-04 15:46:43,572 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 186 states to 186 states and 298 transitions. [2025-03-04 15:46:43,572 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 186 [2025-03-04 15:46:43,572 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 186 [2025-03-04 15:46:43,572 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 298 transitions. [2025-03-04 15:46:43,573 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,573 INFO L218 hiAutomatonCegarLoop]: Abstraction has 186 states and 298 transitions. [2025-03-04 15:46:43,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 298 transitions. [2025-03-04 15:46:43,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2025-03-04 15:46:43,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 186 states, 186 states have (on average 1.6021505376344085) internal successors, (298), 185 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 298 transitions. [2025-03-04 15:46:43,581 INFO L240 hiAutomatonCegarLoop]: Abstraction has 186 states and 298 transitions. [2025-03-04 15:46:43,581 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,581 INFO L432 stractBuchiCegarLoop]: Abstraction has 186 states and 298 transitions. [2025-03-04 15:46:43,582 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 15:46:43,582 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 186 states and 298 transitions. [2025-03-04 15:46:43,583 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 184 [2025-03-04 15:46:43,583 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,583 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,584 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,584 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,584 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,584 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,584 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,584 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 3 times [2025-03-04 15:46:43,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,585 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095107180] [2025-03-04 15:46:43,585 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:46:43,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,590 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,594 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,595 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:46:43,595 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,595 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,599 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,600 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,602 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,602 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,604 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,606 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,606 INFO L85 PathProgramCache]: Analyzing trace with hash -2002904578, now seen corresponding path program 1 times [2025-03-04 15:46:43,606 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,606 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [958763200] [2025-03-04 15:46:43,606 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,611 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:43,615 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:43,619 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,620 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,665 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,665 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [958763200] [2025-03-04 15:46:43,665 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [958763200] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,666 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,666 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [464680206] [2025-03-04 15:46:43,666 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,667 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,667 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,667 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,667 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,667 INFO L87 Difference]: Start difference. First operand 186 states and 298 transitions. cyclomatic complexity: 116 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,687 INFO L93 Difference]: Finished difference Result 366 states and 582 transitions. [2025-03-04 15:46:43,687 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 366 states and 582 transitions. [2025-03-04 15:46:43,689 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 364 [2025-03-04 15:46:43,694 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 366 states to 366 states and 582 transitions. [2025-03-04 15:46:43,695 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 366 [2025-03-04 15:46:43,695 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 366 [2025-03-04 15:46:43,697 INFO L73 IsDeterministic]: Start isDeterministic. Operand 366 states and 582 transitions. [2025-03-04 15:46:43,698 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,698 INFO L218 hiAutomatonCegarLoop]: Abstraction has 366 states and 582 transitions. [2025-03-04 15:46:43,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states and 582 transitions. [2025-03-04 15:46:43,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 366. [2025-03-04 15:46:43,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 366 states, 366 states have (on average 1.5901639344262295) internal successors, (582), 365 states have internal predecessors, (582), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 582 transitions. [2025-03-04 15:46:43,718 INFO L240 hiAutomatonCegarLoop]: Abstraction has 366 states and 582 transitions. [2025-03-04 15:46:43,719 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,722 INFO L432 stractBuchiCegarLoop]: Abstraction has 366 states and 582 transitions. [2025-03-04 15:46:43,723 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 15:46:43,723 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 366 states and 582 transitions. [2025-03-04 15:46:43,725 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 364 [2025-03-04 15:46:43,725 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,725 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,725 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,725 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,725 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,725 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,726 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,726 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 4 times [2025-03-04 15:46:43,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,726 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1917089286] [2025-03-04 15:46:43,726 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:46:43,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,730 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:46:43,731 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,732 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:46:43,732 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,732 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,733 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,734 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,734 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,734 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,735 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,736 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,736 INFO L85 PathProgramCache]: Analyzing trace with hash 2037326173, now seen corresponding path program 1 times [2025-03-04 15:46:43,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97351900] [2025-03-04 15:46:43,736 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,740 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:43,743 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:43,744 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,744 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,770 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,770 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97351900] [2025-03-04 15:46:43,770 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [97351900] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,770 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,770 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [717610554] [2025-03-04 15:46:43,770 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,770 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,770 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,771 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,771 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,771 INFO L87 Difference]: Start difference. First operand 366 states and 582 transitions. cyclomatic complexity: 224 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,785 INFO L93 Difference]: Finished difference Result 722 states and 1138 transitions. [2025-03-04 15:46:43,785 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 722 states and 1138 transitions. [2025-03-04 15:46:43,789 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 720 [2025-03-04 15:46:43,793 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 722 states to 722 states and 1138 transitions. [2025-03-04 15:46:43,793 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 722 [2025-03-04 15:46:43,794 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 722 [2025-03-04 15:46:43,794 INFO L73 IsDeterministic]: Start isDeterministic. Operand 722 states and 1138 transitions. [2025-03-04 15:46:43,795 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,795 INFO L218 hiAutomatonCegarLoop]: Abstraction has 722 states and 1138 transitions. [2025-03-04 15:46:43,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 722 states and 1138 transitions. [2025-03-04 15:46:43,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 722 to 722. [2025-03-04 15:46:43,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 722 states, 722 states have (on average 1.5761772853185596) internal successors, (1138), 721 states have internal predecessors, (1138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 722 states to 722 states and 1138 transitions. [2025-03-04 15:46:43,828 INFO L240 hiAutomatonCegarLoop]: Abstraction has 722 states and 1138 transitions. [2025-03-04 15:46:43,828 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,829 INFO L432 stractBuchiCegarLoop]: Abstraction has 722 states and 1138 transitions. [2025-03-04 15:46:43,829 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 15:46:43,829 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 722 states and 1138 transitions. [2025-03-04 15:46:43,831 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 720 [2025-03-04 15:46:43,832 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,832 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,832 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,832 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,832 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,832 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,833 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,833 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 5 times [2025-03-04 15:46:43,833 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,833 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [269860785] [2025-03-04 15:46:43,833 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:46:43,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,836 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,837 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,838 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:43,838 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,838 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,839 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,840 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,840 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,840 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,841 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,841 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,842 INFO L85 PathProgramCache]: Analyzing trace with hash -1296027106, now seen corresponding path program 1 times [2025-03-04 15:46:43,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,842 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054419301] [2025-03-04 15:46:43,842 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,846 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:43,847 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:43,848 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,848 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,864 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,864 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054419301] [2025-03-04 15:46:43,864 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1054419301] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,864 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,864 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,864 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1772718651] [2025-03-04 15:46:43,865 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,865 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,865 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,865 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,865 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,865 INFO L87 Difference]: Start difference. First operand 722 states and 1138 transitions. cyclomatic complexity: 432 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,881 INFO L93 Difference]: Finished difference Result 1426 states and 2226 transitions. [2025-03-04 15:46:43,881 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1426 states and 2226 transitions. [2025-03-04 15:46:43,889 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1424 [2025-03-04 15:46:43,895 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1426 states to 1426 states and 2226 transitions. [2025-03-04 15:46:43,895 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1426 [2025-03-04 15:46:43,896 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1426 [2025-03-04 15:46:43,896 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1426 states and 2226 transitions. [2025-03-04 15:46:43,898 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:43,898 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1426 states and 2226 transitions. [2025-03-04 15:46:43,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1426 states and 2226 transitions. [2025-03-04 15:46:43,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1426 to 1426. [2025-03-04 15:46:43,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1426 states, 1426 states have (on average 1.5610098176718092) internal successors, (2226), 1425 states have internal predecessors, (2226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1426 states to 1426 states and 2226 transitions. [2025-03-04 15:46:43,918 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1426 states and 2226 transitions. [2025-03-04 15:46:43,918 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:43,919 INFO L432 stractBuchiCegarLoop]: Abstraction has 1426 states and 2226 transitions. [2025-03-04 15:46:43,919 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 15:46:43,919 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1426 states and 2226 transitions. [2025-03-04 15:46:43,924 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1424 [2025-03-04 15:46:43,924 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:43,924 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:43,924 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:43,924 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:43,925 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:43,925 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:43,925 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,925 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 6 times [2025-03-04 15:46:43,925 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,926 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801931812] [2025-03-04 15:46:43,926 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:46:43,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,928 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,930 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,930 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:46:43,930 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,930 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:43,931 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:43,932 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:43,932 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,932 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:43,933 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:43,933 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:43,933 INFO L85 PathProgramCache]: Analyzing trace with hash -1265007299, now seen corresponding path program 1 times [2025-03-04 15:46:43,933 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:43,933 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369333919] [2025-03-04 15:46:43,933 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:43,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:43,938 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:43,942 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:43,942 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:43,942 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:43,973 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:43,974 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:43,974 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369333919] [2025-03-04 15:46:43,974 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1369333919] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:43,974 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:43,974 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:43,975 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1670016616] [2025-03-04 15:46:43,975 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:43,975 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:43,975 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:43,975 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:43,975 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:43,975 INFO L87 Difference]: Start difference. First operand 1426 states and 2226 transitions. cyclomatic complexity: 832 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:43,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:43,997 INFO L93 Difference]: Finished difference Result 2818 states and 4354 transitions. [2025-03-04 15:46:43,997 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2818 states and 4354 transitions. [2025-03-04 15:46:44,013 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2816 [2025-03-04 15:46:44,026 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2818 states to 2818 states and 4354 transitions. [2025-03-04 15:46:44,027 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2818 [2025-03-04 15:46:44,031 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2818 [2025-03-04 15:46:44,031 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2818 states and 4354 transitions. [2025-03-04 15:46:44,035 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:44,035 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2818 states and 4354 transitions. [2025-03-04 15:46:44,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2818 states and 4354 transitions. [2025-03-04 15:46:44,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2818 to 2818. [2025-03-04 15:46:44,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2818 states, 2818 states have (on average 1.5450674237047552) internal successors, (4354), 2817 states have internal predecessors, (4354), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2818 states to 2818 states and 4354 transitions. [2025-03-04 15:46:44,078 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2818 states and 4354 transitions. [2025-03-04 15:46:44,079 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:44,081 INFO L432 stractBuchiCegarLoop]: Abstraction has 2818 states and 4354 transitions. [2025-03-04 15:46:44,081 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 15:46:44,081 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2818 states and 4354 transitions. [2025-03-04 15:46:44,092 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2816 [2025-03-04 15:46:44,093 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:44,093 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:44,094 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:44,094 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:44,094 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:44,095 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:44,095 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,095 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 7 times [2025-03-04 15:46:44,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,096 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2084024500] [2025-03-04 15:46:44,096 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:46:44,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,099 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,101 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,101 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,101 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,101 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:44,102 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,125 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,126 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,126 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,127 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:44,128 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,128 INFO L85 PathProgramCache]: Analyzing trace with hash 952750654, now seen corresponding path program 1 times [2025-03-04 15:46:44,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,128 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514919853] [2025-03-04 15:46:44,128 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:44,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,131 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:44,132 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:44,132 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,132 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:44,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:44,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:44,145 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [514919853] [2025-03-04 15:46:44,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [514919853] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:44,145 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:44,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:44,145 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1666117323] [2025-03-04 15:46:44,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:44,145 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:44,146 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:44,146 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:44,146 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:44,146 INFO L87 Difference]: Start difference. First operand 2818 states and 4354 transitions. cyclomatic complexity: 1600 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:44,171 INFO L93 Difference]: Finished difference Result 5570 states and 8514 transitions. [2025-03-04 15:46:44,171 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5570 states and 8514 transitions. [2025-03-04 15:46:44,195 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5568 [2025-03-04 15:46:44,211 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5570 states to 5570 states and 8514 transitions. [2025-03-04 15:46:44,211 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5570 [2025-03-04 15:46:44,214 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5570 [2025-03-04 15:46:44,214 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5570 states and 8514 transitions. [2025-03-04 15:46:44,219 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:44,219 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5570 states and 8514 transitions. [2025-03-04 15:46:44,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5570 states and 8514 transitions. [2025-03-04 15:46:44,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5570 to 5570. [2025-03-04 15:46:44,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5570 states, 5570 states have (on average 1.5285457809694794) internal successors, (8514), 5569 states have internal predecessors, (8514), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5570 states to 5570 states and 8514 transitions. [2025-03-04 15:46:44,289 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5570 states and 8514 transitions. [2025-03-04 15:46:44,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:44,290 INFO L432 stractBuchiCegarLoop]: Abstraction has 5570 states and 8514 transitions. [2025-03-04 15:46:44,291 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 15:46:44,291 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5570 states and 8514 transitions. [2025-03-04 15:46:44,305 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5568 [2025-03-04 15:46:44,305 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:44,305 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:44,306 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:44,307 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:44,307 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:44,307 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:44,307 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,308 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 8 times [2025-03-04 15:46:44,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,308 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1459864890] [2025-03-04 15:46:44,308 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:46:44,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,311 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,313 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,313 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:44,313 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,316 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:44,317 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,318 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,318 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,318 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,319 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:44,320 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,320 INFO L85 PathProgramCache]: Analyzing trace with hash -2097452161, now seen corresponding path program 1 times [2025-03-04 15:46:44,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,320 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [349790347] [2025-03-04 15:46:44,320 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:44,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,323 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:44,325 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:44,325 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,325 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:44,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:44,360 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:44,360 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [349790347] [2025-03-04 15:46:44,360 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [349790347] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:44,360 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:44,360 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:44,360 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [132082492] [2025-03-04 15:46:44,360 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:44,361 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:44,361 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:44,361 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:44,361 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:44,361 INFO L87 Difference]: Start difference. First operand 5570 states and 8514 transitions. cyclomatic complexity: 3072 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:44,404 INFO L93 Difference]: Finished difference Result 11010 states and 16642 transitions. [2025-03-04 15:46:44,405 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11010 states and 16642 transitions. [2025-03-04 15:46:44,453 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 11008 [2025-03-04 15:46:44,496 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11010 states to 11010 states and 16642 transitions. [2025-03-04 15:46:44,497 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11010 [2025-03-04 15:46:44,502 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11010 [2025-03-04 15:46:44,502 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11010 states and 16642 transitions. [2025-03-04 15:46:44,515 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:44,515 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11010 states and 16642 transitions. [2025-03-04 15:46:44,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11010 states and 16642 transitions. [2025-03-04 15:46:44,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11010 to 11010. [2025-03-04 15:46:44,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11010 states, 11010 states have (on average 1.5115349682107175) internal successors, (16642), 11009 states have internal predecessors, (16642), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11010 states to 11010 states and 16642 transitions. [2025-03-04 15:46:44,675 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11010 states and 16642 transitions. [2025-03-04 15:46:44,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:44,677 INFO L432 stractBuchiCegarLoop]: Abstraction has 11010 states and 16642 transitions. [2025-03-04 15:46:44,677 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-04 15:46:44,677 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11010 states and 16642 transitions. [2025-03-04 15:46:44,707 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 11008 [2025-03-04 15:46:44,708 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:44,708 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:44,709 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:44,709 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:44,709 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:44,709 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:44,710 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,710 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 9 times [2025-03-04 15:46:44,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,710 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016203816] [2025-03-04 15:46:44,710 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 15:46:44,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,714 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,715 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,715 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 15:46:44,715 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,715 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:44,716 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:44,717 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:44,717 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,717 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:44,718 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:44,719 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:44,719 INFO L85 PathProgramCache]: Analyzing trace with hash 159458846, now seen corresponding path program 1 times [2025-03-04 15:46:44,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:44,720 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [817632517] [2025-03-04 15:46:44,720 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:44,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:44,727 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:44,728 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:44,728 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:44,728 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:44,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:44,743 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:44,743 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [817632517] [2025-03-04 15:46:44,743 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [817632517] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:44,743 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:44,743 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:44,743 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816912304] [2025-03-04 15:46:44,744 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:44,744 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:44,744 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:44,744 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:44,744 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:44,744 INFO L87 Difference]: Start difference. First operand 11010 states and 16642 transitions. cyclomatic complexity: 5888 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:44,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:44,837 INFO L93 Difference]: Finished difference Result 21762 states and 32514 transitions. [2025-03-04 15:46:44,837 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21762 states and 32514 transitions. [2025-03-04 15:46:44,947 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 21760 [2025-03-04 15:46:45,004 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21762 states to 21762 states and 32514 transitions. [2025-03-04 15:46:45,004 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21762 [2025-03-04 15:46:45,017 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21762 [2025-03-04 15:46:45,017 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21762 states and 32514 transitions. [2025-03-04 15:46:45,041 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:45,041 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21762 states and 32514 transitions. [2025-03-04 15:46:45,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21762 states and 32514 transitions. [2025-03-04 15:46:45,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21762 to 21762. [2025-03-04 15:46:45,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21762 states, 21762 states have (on average 1.4940722360077199) internal successors, (32514), 21761 states have internal predecessors, (32514), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:45,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21762 states to 21762 states and 32514 transitions. [2025-03-04 15:46:45,350 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21762 states and 32514 transitions. [2025-03-04 15:46:45,351 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:45,351 INFO L432 stractBuchiCegarLoop]: Abstraction has 21762 states and 32514 transitions. [2025-03-04 15:46:45,352 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-04 15:46:45,352 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21762 states and 32514 transitions. [2025-03-04 15:46:45,408 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 21760 [2025-03-04 15:46:45,408 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:45,408 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:45,409 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:45,409 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:45,409 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:45,409 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:45,409 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:45,409 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 10 times [2025-03-04 15:46:45,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:45,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [370203438] [2025-03-04 15:46:45,410 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 15:46:45,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:45,412 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-04 15:46:45,413 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:45,414 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 15:46:45,414 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:45,414 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:45,415 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:45,416 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:45,416 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:45,416 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:45,419 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:45,420 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:45,420 INFO L85 PathProgramCache]: Analyzing trace with hash 370809759, now seen corresponding path program 1 times [2025-03-04 15:46:45,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:45,420 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730985960] [2025-03-04 15:46:45,420 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:45,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:45,424 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:45,426 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:45,426 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:45,426 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:45,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:45,443 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:45,443 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730985960] [2025-03-04 15:46:45,443 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1730985960] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:45,443 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:45,443 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:45,443 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1500439161] [2025-03-04 15:46:45,444 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:45,444 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:45,444 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:45,444 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:45,445 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:45,445 INFO L87 Difference]: Start difference. First operand 21762 states and 32514 transitions. cyclomatic complexity: 11264 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:45,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:45,599 INFO L93 Difference]: Finished difference Result 43010 states and 63490 transitions. [2025-03-04 15:46:45,599 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43010 states and 63490 transitions. [2025-03-04 15:46:45,857 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 43008 [2025-03-04 15:46:46,132 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43010 states to 43010 states and 63490 transitions. [2025-03-04 15:46:46,133 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43010 [2025-03-04 15:46:46,166 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43010 [2025-03-04 15:46:46,166 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43010 states and 63490 transitions. [2025-03-04 15:46:46,205 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:46,205 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43010 states and 63490 transitions. [2025-03-04 15:46:46,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43010 states and 63490 transitions. [2025-03-04 15:46:46,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43010 to 43010. [2025-03-04 15:46:46,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43010 states, 43010 states have (on average 1.4761683329458266) internal successors, (63490), 43009 states have internal predecessors, (63490), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:46,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43010 states to 43010 states and 63490 transitions. [2025-03-04 15:46:46,796 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43010 states and 63490 transitions. [2025-03-04 15:46:46,797 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:46,797 INFO L432 stractBuchiCegarLoop]: Abstraction has 43010 states and 63490 transitions. [2025-03-04 15:46:46,797 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-04 15:46:46,797 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43010 states and 63490 transitions. [2025-03-04 15:46:46,923 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 43008 [2025-03-04 15:46:46,923 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:46,923 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:46,924 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:46,924 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:46,924 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:46,924 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:46,925 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:46,925 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 11 times [2025-03-04 15:46:46,925 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:46,925 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441181034] [2025-03-04 15:46:46,925 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 15:46:46,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:46,928 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:46,929 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:46,929 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:46:46,929 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:46,929 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:46,930 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:46,931 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:46,931 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:46,931 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:46,933 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:46,933 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:46,933 INFO L85 PathProgramCache]: Analyzing trace with hash -38014466, now seen corresponding path program 1 times [2025-03-04 15:46:46,933 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:46,936 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296928748] [2025-03-04 15:46:46,937 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:46,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:46,943 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:46,945 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:46,945 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:46,945 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:46,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:46,962 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:46,962 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [296928748] [2025-03-04 15:46:46,962 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [296928748] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:46,962 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:46,962 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:46,962 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [610548210] [2025-03-04 15:46:46,962 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:46,962 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:46,963 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:46,963 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:46,963 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:46,963 INFO L87 Difference]: Start difference. First operand 43010 states and 63490 transitions. cyclomatic complexity: 21504 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:47,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:47,261 INFO L93 Difference]: Finished difference Result 84994 states and 123906 transitions. [2025-03-04 15:46:47,261 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 84994 states and 123906 transitions. [2025-03-04 15:46:47,686 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 84992 [2025-03-04 15:46:47,971 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 84994 states to 84994 states and 123906 transitions. [2025-03-04 15:46:47,972 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84994 [2025-03-04 15:46:48,021 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84994 [2025-03-04 15:46:48,021 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84994 states and 123906 transitions. [2025-03-04 15:46:48,054 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:48,054 INFO L218 hiAutomatonCegarLoop]: Abstraction has 84994 states and 123906 transitions. [2025-03-04 15:46:48,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84994 states and 123906 transitions. [2025-03-04 15:46:48,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84994 to 84994. [2025-03-04 15:46:48,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84994 states, 84994 states have (on average 1.4578205520389675) internal successors, (123906), 84993 states have internal predecessors, (123906), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:49,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84994 states to 84994 states and 123906 transitions. [2025-03-04 15:46:49,119 INFO L240 hiAutomatonCegarLoop]: Abstraction has 84994 states and 123906 transitions. [2025-03-04 15:46:49,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:49,120 INFO L432 stractBuchiCegarLoop]: Abstraction has 84994 states and 123906 transitions. [2025-03-04 15:46:49,120 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-04 15:46:49,120 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 84994 states and 123906 transitions. [2025-03-04 15:46:49,323 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 84992 [2025-03-04 15:46:49,324 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:49,324 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:49,325 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:49,325 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:49,325 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:49,325 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:49,325 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:49,325 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 12 times [2025-03-04 15:46:49,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:49,326 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104289350] [2025-03-04 15:46:49,326 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 15:46:49,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:49,329 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:49,330 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:49,330 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 15:46:49,330 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,330 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:49,330 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:49,331 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:49,331 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,331 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:49,332 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:49,333 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:49,333 INFO L85 PathProgramCache]: Analyzing trace with hash -882486337, now seen corresponding path program 1 times [2025-03-04 15:46:49,333 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:49,333 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737308787] [2025-03-04 15:46:49,333 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:49,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:49,335 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:49,337 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:49,337 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:49,337 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:49,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:49,349 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:49,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [737308787] [2025-03-04 15:46:49,349 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [737308787] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:49,349 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:49,349 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:49,349 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1126301664] [2025-03-04 15:46:49,349 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:49,349 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:49,349 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:49,350 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:49,350 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:49,350 INFO L87 Difference]: Start difference. First operand 84994 states and 123906 transitions. cyclomatic complexity: 40960 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:49,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:49,788 INFO L93 Difference]: Finished difference Result 167938 states and 241666 transitions. [2025-03-04 15:46:49,788 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167938 states and 241666 transitions. [2025-03-04 15:46:50,712 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 167936 [2025-03-04 15:46:51,216 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167938 states to 167938 states and 241666 transitions. [2025-03-04 15:46:51,216 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 167938 [2025-03-04 15:46:51,276 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 167938 [2025-03-04 15:46:51,277 INFO L73 IsDeterministic]: Start isDeterministic. Operand 167938 states and 241666 transitions. [2025-03-04 15:46:51,342 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:51,342 INFO L218 hiAutomatonCegarLoop]: Abstraction has 167938 states and 241666 transitions. [2025-03-04 15:46:51,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167938 states and 241666 transitions. [2025-03-04 15:46:52,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167938 to 167938. [2025-03-04 15:46:52,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 167938 states, 167938 states have (on average 1.4390191618335337) internal successors, (241666), 167937 states have internal predecessors, (241666), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:53,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167938 states to 167938 states and 241666 transitions. [2025-03-04 15:46:53,093 INFO L240 hiAutomatonCegarLoop]: Abstraction has 167938 states and 241666 transitions. [2025-03-04 15:46:53,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:46:53,444 INFO L432 stractBuchiCegarLoop]: Abstraction has 167938 states and 241666 transitions. [2025-03-04 15:46:53,444 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-04 15:46:53,445 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 167938 states and 241666 transitions. [2025-03-04 15:46:53,755 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 167936 [2025-03-04 15:46:53,755 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:46:53,755 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:46:53,757 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:46:53,757 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:46:53,757 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:46:53,757 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:46:53,757 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:53,757 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 13 times [2025-03-04 15:46:53,757 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:53,757 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857289499] [2025-03-04 15:46:53,757 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 15:46:53,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:53,760 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:53,760 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:53,761 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:53,761 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:53,761 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:46:53,761 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:46:53,762 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:46:53,762 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:53,762 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:46:53,763 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:46:53,763 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:46:53,763 INFO L85 PathProgramCache]: Analyzing trace with hash -1879558690, now seen corresponding path program 1 times [2025-03-04 15:46:53,763 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:46:53,763 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197343314] [2025-03-04 15:46:53,763 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:46:53,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:46:53,765 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:46:53,766 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:46:53,767 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:46:53,767 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 15:46:53,779 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 15:46:53,779 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 15:46:53,779 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197343314] [2025-03-04 15:46:53,779 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1197343314] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 15:46:53,779 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 15:46:53,779 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-04 15:46:53,779 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1050576505] [2025-03-04 15:46:53,779 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 15:46:53,780 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 15:46:53,780 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 15:46:53,780 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-04 15:46:53,780 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-04 15:46:53,780 INFO L87 Difference]: Start difference. First operand 167938 states and 241666 transitions. cyclomatic complexity: 77824 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:46:54,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 15:46:54,774 INFO L93 Difference]: Finished difference Result 331778 states and 471042 transitions. [2025-03-04 15:46:54,774 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 331778 states and 471042 transitions. [2025-03-04 15:46:56,211 INFO L131 ngComponentsAnalysis]: Automaton has 8192 accepting balls. 331776 [2025-03-04 15:46:56,985 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 331778 states to 331778 states and 471042 transitions. [2025-03-04 15:46:56,985 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 331778 [2025-03-04 15:46:57,095 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 331778 [2025-03-04 15:46:57,095 INFO L73 IsDeterministic]: Start isDeterministic. Operand 331778 states and 471042 transitions. [2025-03-04 15:46:57,188 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 15:46:57,188 INFO L218 hiAutomatonCegarLoop]: Abstraction has 331778 states and 471042 transitions. [2025-03-04 15:46:57,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331778 states and 471042 transitions. [2025-03-04 15:47:00,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331778 to 331778. [2025-03-04 15:47:00,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 331778 states, 331778 states have (on average 1.419750556094738) internal successors, (471042), 331777 states have internal predecessors, (471042), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 15:47:01,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331778 states to 331778 states and 471042 transitions. [2025-03-04 15:47:01,037 INFO L240 hiAutomatonCegarLoop]: Abstraction has 331778 states and 471042 transitions. [2025-03-04 15:47:01,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-04 15:47:01,037 INFO L432 stractBuchiCegarLoop]: Abstraction has 331778 states and 471042 transitions. [2025-03-04 15:47:01,038 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-03-04 15:47:01,038 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 331778 states and 471042 transitions. [2025-03-04 15:47:02,161 INFO L131 ngComponentsAnalysis]: Automaton has 8192 accepting balls. 331776 [2025-03-04 15:47:02,162 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 15:47:02,162 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 15:47:02,165 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-04 15:47:02,166 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 15:47:02,166 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-04 15:47:02,166 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p15~0#1);" [2025-03-04 15:47:02,166 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:47:02,166 INFO L85 PathProgramCache]: Analyzing trace with hash 5728, now seen corresponding path program 14 times [2025-03-04 15:47:02,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:47:02,166 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977818941] [2025-03-04 15:47:02,167 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 15:47:02,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:47:02,169 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:47:02,171 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:47:02,171 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 15:47:02,171 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:47:02,171 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:47:02,172 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:47:02,172 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:47:02,173 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:47:02,173 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:47:02,174 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:47:02,177 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:47:02,177 INFO L85 PathProgramCache]: Analyzing trace with hash -526248993, now seen corresponding path program 1 times [2025-03-04 15:47:02,177 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:47:02,177 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [484714977] [2025-03-04 15:47:02,177 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:47:02,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:47:02,179 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:47:02,187 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:47:02,187 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:47:02,187 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:47:02,188 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:47:02,188 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-04 15:47:02,189 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-04 15:47:02,189 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:47:02,189 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:47:02,197 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:47:02,198 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 15:47:02,198 INFO L85 PathProgramCache]: Analyzing trace with hash 500756030, now seen corresponding path program 1 times [2025-03-04 15:47:02,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 15:47:02,198 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005862480] [2025-03-04 15:47:02,198 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 15:47:02,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 15:47:02,201 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:47:02,206 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:47:02,206 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:47:02,206 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:47:02,206 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:47:02,208 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-04 15:47:02,209 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-04 15:47:02,209 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:47:02,212 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:47:02,216 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 15:47:02,730 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:47:02,731 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:47:02,731 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:47:02,731 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:47:02,731 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 15:47:02,735 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-04 15:47:02,736 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-04 15:47:02,736 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 15:47:02,736 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 15:47:02,779 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 04.03 03:47:02 BoogieIcfgContainer [2025-03-04 15:47:02,779 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-04 15:47:02,780 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-04 15:47:02,780 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-04 15:47:02,780 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-04 15:47:02,781 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 03:46:43" (3/4) ... [2025-03-04 15:47:02,782 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-03-04 15:47:02,807 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-04 15:47:02,807 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-04 15:47:02,807 INFO L158 Benchmark]: Toolchain (without parser) took 20314.98ms. Allocated memory was 167.8MB in the beginning and 10.3GB in the end (delta: 10.2GB). Free memory was 122.4MB in the beginning and 7.7GB in the end (delta: -7.5GB). Peak memory consumption was 2.6GB. Max. memory is 16.1GB. [2025-03-04 15:47:02,808 INFO L158 Benchmark]: CDTParser took 0.18ms. Allocated memory is still 201.3MB. Free memory is still 119.0MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:47:02,808 INFO L158 Benchmark]: CACSL2BoogieTranslator took 173.59ms. Allocated memory is still 167.8MB. Free memory was 122.4MB in the beginning and 110.6MB in the end (delta: 11.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 15:47:02,808 INFO L158 Benchmark]: Boogie Procedure Inliner took 27.06ms. Allocated memory is still 167.8MB. Free memory was 110.6MB in the beginning and 109.2MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:47:02,808 INFO L158 Benchmark]: Boogie Preprocessor took 38.21ms. Allocated memory is still 167.8MB. Free memory was 109.2MB in the beginning and 107.9MB in the end (delta: 1.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-04 15:47:02,808 INFO L158 Benchmark]: IcfgBuilder took 355.95ms. Allocated memory is still 167.8MB. Free memory was 107.9MB in the beginning and 91.1MB in the end (delta: 16.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-04 15:47:02,808 INFO L158 Benchmark]: BuchiAutomizer took 19688.37ms. Allocated memory was 167.8MB in the beginning and 10.3GB in the end (delta: 10.2GB). Free memory was 91.1MB in the beginning and 7.7GB in the end (delta: -7.6GB). Peak memory consumption was 2.6GB. Max. memory is 16.1GB. [2025-03-04 15:47:02,809 INFO L158 Benchmark]: Witness Printer took 26.73ms. Allocated memory is still 10.3GB. Free memory was 7.7GB in the beginning and 7.7GB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-04 15:47:02,810 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18ms. Allocated memory is still 201.3MB. Free memory is still 119.0MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 173.59ms. Allocated memory is still 167.8MB. Free memory was 122.4MB in the beginning and 110.6MB in the end (delta: 11.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 27.06ms. Allocated memory is still 167.8MB. Free memory was 110.6MB in the beginning and 109.2MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 38.21ms. Allocated memory is still 167.8MB. Free memory was 109.2MB in the beginning and 107.9MB in the end (delta: 1.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * IcfgBuilder took 355.95ms. Allocated memory is still 167.8MB. Free memory was 107.9MB in the beginning and 91.1MB in the end (delta: 16.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 19688.37ms. Allocated memory was 167.8MB in the beginning and 10.3GB in the end (delta: 10.2GB). Free memory was 91.1MB in the beginning and 7.7GB in the end (delta: -7.6GB). Peak memory consumption was 2.6GB. Max. memory is 16.1GB. * Witness Printer took 26.73ms. Allocated memory is still 10.3GB. Free memory was 7.7GB in the beginning and 7.7GB in the end (delta: 4.0MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 13 terminating modules (13 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.13 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 331778 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 19.6s and 14 iterations. TraceHistogramMax:1. Analysis of lassos took 1.3s. Construction of modules took 0.1s. Büchi inclusion checks took 16.2s. Highest rank in rank-based complementation 0. Minimization of det autom 13. Minimization of nondet autom 0. Automata minimization 7.9s AutomataMinimizationTime, 13 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 5.2s Buchi closure took 0.2s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 797 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 797 mSDsluCounter, 2503 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 966 mSDsCounter, 26 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 67 IncrementalHoareTripleChecker+Invalid, 93 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 26 mSolverCounterUnsat, 1537 mSDtfsCounter, 67 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI13 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 56]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L50] int p15 = __VERIFIER_nondet_int(); [L51] int lk15; [L54] int cond; Loop: [L56] COND TRUE 1 [L57] cond = __VERIFIER_nondet_int() [L58] COND FALSE !(cond == 0) [L61] lk1 = 0 [L63] lk2 = 0 [L65] lk3 = 0 [L67] lk4 = 0 [L69] lk5 = 0 [L71] lk6 = 0 [L73] lk7 = 0 [L75] lk8 = 0 [L77] lk9 = 0 [L79] lk10 = 0 [L81] lk11 = 0 [L83] lk12 = 0 [L85] lk13 = 0 [L87] lk14 = 0 [L89] lk15 = 0 [L93] COND FALSE !(p1 != 0) [L97] COND FALSE !(p2 != 0) [L101] COND FALSE !(p3 != 0) [L105] COND FALSE !(p4 != 0) [L109] COND FALSE !(p5 != 0) [L113] COND FALSE !(p6 != 0) [L117] COND FALSE !(p7 != 0) [L121] COND FALSE !(p8 != 0) [L125] COND FALSE !(p9 != 0) [L129] COND FALSE !(p10 != 0) [L133] COND FALSE !(p11 != 0) [L137] COND FALSE !(p12 != 0) [L141] COND FALSE !(p13 != 0) [L145] COND FALSE !(p14 != 0) [L149] COND FALSE !(p15 != 0) [L155] COND FALSE !(p1 != 0) [L160] COND FALSE !(p2 != 0) [L165] COND FALSE !(p3 != 0) [L170] COND FALSE !(p4 != 0) [L175] COND FALSE !(p5 != 0) [L180] COND FALSE !(p6 != 0) [L185] COND FALSE !(p7 != 0) [L190] COND FALSE !(p8 != 0) [L195] COND FALSE !(p9 != 0) [L200] COND FALSE !(p10 != 0) [L205] COND FALSE !(p11 != 0) [L210] COND FALSE !(p12 != 0) [L215] COND FALSE !(p13 != 0) [L220] COND FALSE !(p14 != 0) [L225] COND FALSE !(p15 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 56]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L50] int p15 = __VERIFIER_nondet_int(); [L51] int lk15; [L54] int cond; Loop: [L56] COND TRUE 1 [L57] cond = __VERIFIER_nondet_int() [L58] COND FALSE !(cond == 0) [L61] lk1 = 0 [L63] lk2 = 0 [L65] lk3 = 0 [L67] lk4 = 0 [L69] lk5 = 0 [L71] lk6 = 0 [L73] lk7 = 0 [L75] lk8 = 0 [L77] lk9 = 0 [L79] lk10 = 0 [L81] lk11 = 0 [L83] lk12 = 0 [L85] lk13 = 0 [L87] lk14 = 0 [L89] lk15 = 0 [L93] COND FALSE !(p1 != 0) [L97] COND FALSE !(p2 != 0) [L101] COND FALSE !(p3 != 0) [L105] COND FALSE !(p4 != 0) [L109] COND FALSE !(p5 != 0) [L113] COND FALSE !(p6 != 0) [L117] COND FALSE !(p7 != 0) [L121] COND FALSE !(p8 != 0) [L125] COND FALSE !(p9 != 0) [L129] COND FALSE !(p10 != 0) [L133] COND FALSE !(p11 != 0) [L137] COND FALSE !(p12 != 0) [L141] COND FALSE !(p13 != 0) [L145] COND FALSE !(p14 != 0) [L149] COND FALSE !(p15 != 0) [L155] COND FALSE !(p1 != 0) [L160] COND FALSE !(p2 != 0) [L165] COND FALSE !(p3 != 0) [L170] COND FALSE !(p4 != 0) [L175] COND FALSE !(p5 != 0) [L180] COND FALSE !(p6 != 0) [L185] COND FALSE !(p7 != 0) [L190] COND FALSE !(p8 != 0) [L195] COND FALSE !(p9 != 0) [L200] COND FALSE !(p10 != 0) [L205] COND FALSE !(p11 != 0) [L210] COND FALSE !(p12 != 0) [L215] COND FALSE !(p13 != 0) [L220] COND FALSE !(p14 != 0) [L225] COND FALSE !(p15 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-03-04 15:47:02,826 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)