./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test4-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test4-2.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6c763f0e5b490114d32e3c1ec14f736caee058b985a7ee61f4d14ad6758e2996 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-04 16:46:17,593 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-04 16:46:17,628 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-04 16:46:17,630 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-04 16:46:17,631 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-04 16:46:17,631 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-04 16:46:17,654 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-04 16:46:17,655 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-04 16:46:17,655 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-04 16:46:17,655 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-04 16:46:17,655 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-04 16:46:17,655 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-04 16:46:17,655 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-04 16:46:17,655 INFO L153 SettingsManager]: * Use SBE=true [2025-03-04 16:46:17,655 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-04 16:46:17,655 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-04 16:46:17,656 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-04 16:46:17,656 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-04 16:46:17,657 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-04 16:46:17,657 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-04 16:46:17,657 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-04 16:46:17,657 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-04 16:46:17,657 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-04 16:46:17,657 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-04 16:46:17,657 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-04 16:46:17,657 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-04 16:46:17,657 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-04 16:46:17,657 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-04 16:46:17,658 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-04 16:46:17,658 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-04 16:46:17,658 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-04 16:46:17,658 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-04 16:46:17,658 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-04 16:46:17,658 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-04 16:46:17,658 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-04 16:46:17,658 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-04 16:46:17,658 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-04 16:46:17,659 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-04 16:46:17,659 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-04 16:46:17,659 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-04 16:46:17,659 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6c763f0e5b490114d32e3c1ec14f736caee058b985a7ee61f4d14ad6758e2996 [2025-03-04 16:46:17,852 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-04 16:46:17,858 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-04 16:46:17,860 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-04 16:46:17,861 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-04 16:46:17,861 INFO L274 PluginConnector]: CDTParser initialized [2025-03-04 16:46:17,861 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test4-2.i [2025-03-04 16:46:18,927 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b3848891/d7d5d7dc210346d4b9303d390ec608f3/FLAG2445012ee [2025-03-04 16:46:19,254 INFO L384 CDTParser]: Found 1 translation units. [2025-03-04 16:46:19,255 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_nondet_test4-2.i [2025-03-04 16:46:19,271 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b3848891/d7d5d7dc210346d4b9303d390ec608f3/FLAG2445012ee [2025-03-04 16:46:19,496 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b3848891/d7d5d7dc210346d4b9303d390ec608f3 [2025-03-04 16:46:19,497 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-04 16:46:19,498 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-04 16:46:19,499 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-04 16:46:19,499 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-04 16:46:19,502 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-04 16:46:19,502 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:46:19" (1/1) ... [2025-03-04 16:46:19,503 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6a72c02b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:19, skipping insertion in model container [2025-03-04 16:46:19,503 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.03 04:46:19" (1/1) ... [2025-03-04 16:46:19,533 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-04 16:46:19,887 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:46:19,898 INFO L200 MainTranslator]: Completed pre-run [2025-03-04 16:46:19,989 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-04 16:46:20,020 INFO L204 MainTranslator]: Completed translation [2025-03-04 16:46:20,021 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20 WrapperNode [2025-03-04 16:46:20,021 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-04 16:46:20,022 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-04 16:46:20,022 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-04 16:46:20,022 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-04 16:46:20,025 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,047 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,095 INFO L138 Inliner]: procedures = 176, calls = 377, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 1666 [2025-03-04 16:46:20,095 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-04 16:46:20,096 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-04 16:46:20,096 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-04 16:46:20,096 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-04 16:46:20,102 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,102 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,114 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,196 INFO L175 MemorySlicer]: Split 357 memory accesses to 2 slices as follows [2, 355]. 99 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 90 writes are split as follows [0, 90]. [2025-03-04 16:46:20,196 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,196 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,232 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,237 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,240 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,247 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,255 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-04 16:46:20,259 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-04 16:46:20,260 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-04 16:46:20,260 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-04 16:46:20,261 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (1/1) ... [2025-03-04 16:46:20,264 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-04 16:46:20,272 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-04 16:46:20,281 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-04 16:46:20,283 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-04 16:46:20,298 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-04 16:46:20,298 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-03-04 16:46:20,298 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-04 16:46:20,298 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-03-04 16:46:20,298 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2025-03-04 16:46:20,298 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2025-03-04 16:46:20,298 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2025-03-04 16:46:20,298 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2025-03-04 16:46:20,298 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2025-03-04 16:46:20,298 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-04 16:46:20,299 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2025-03-04 16:46:20,299 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2025-03-04 16:46:20,299 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2025-03-04 16:46:20,299 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2025-03-04 16:46:20,299 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-04 16:46:20,299 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-04 16:46:20,299 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-03-04 16:46:20,299 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-04 16:46:20,299 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-04 16:46:20,446 INFO L256 CfgBuilder]: Building ICFG [2025-03-04 16:46:20,447 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-04 16:46:21,768 INFO L? ?]: Removed 403 outVars from TransFormulas that were not future-live. [2025-03-04 16:46:21,768 INFO L307 CfgBuilder]: Performing block encoding [2025-03-04 16:46:21,803 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-04 16:46:21,803 INFO L336 CfgBuilder]: Removed 2 assume(true) statements. [2025-03-04 16:46:21,803 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:46:21 BoogieIcfgContainer [2025-03-04 16:46:21,803 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-04 16:46:21,804 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-04 16:46:21,804 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-04 16:46:21,807 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-04 16:46:21,808 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:46:21,808 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 04.03 04:46:19" (1/3) ... [2025-03-04 16:46:21,808 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@70fb57de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:46:21, skipping insertion in model container [2025-03-04 16:46:21,809 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:46:21,809 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.03 04:46:20" (2/3) ... [2025-03-04 16:46:21,809 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@70fb57de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 04.03 04:46:21, skipping insertion in model container [2025-03-04 16:46:21,809 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-04 16:46:21,809 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 04.03 04:46:21" (3/3) ... [2025-03-04 16:46:21,811 INFO L363 chiAutomizerObserver]: Analyzing ICFG uthash_SAX_nondet_test4-2.i [2025-03-04 16:46:21,846 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-04 16:46:21,846 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-04 16:46:21,846 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-04 16:46:21,847 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-04 16:46:21,847 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-04 16:46:21,847 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-04 16:46:21,847 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-04 16:46:21,847 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-04 16:46:21,852 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 429 states, 421 states have (on average 1.6104513064133017) internal successors, (678), 421 states have internal predecessors, (678), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:21,884 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 417 [2025-03-04 16:46:21,884 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:21,884 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:21,889 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:21,890 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2025-03-04 16:46:21,890 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-04 16:46:21,891 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 429 states, 421 states have (on average 1.6104513064133017) internal successors, (678), 421 states have internal predecessors, (678), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:21,904 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 417 [2025-03-04 16:46:21,904 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:21,904 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:21,904 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:21,905 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2025-03-04 16:46:21,909 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:21,910 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false;" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume !true;" "assume !true;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:21,913 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:21,913 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 1 times [2025-03-04 16:46:21,918 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:21,918 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1964555339] [2025-03-04 16:46:21,919 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:21,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:21,972 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:21,980 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:21,980 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:21,980 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:21,980 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:21,988 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:21,991 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:21,991 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:21,991 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:22,008 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:22,009 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:22,009 INFO L85 PathProgramCache]: Analyzing trace with hash 1095389337, now seen corresponding path program 1 times [2025-03-04 16:46:22,009 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:22,009 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [925554473] [2025-03-04 16:46:22,010 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:22,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:22,017 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-04 16:46:22,019 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-04 16:46:22,019 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:22,019 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:22,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:22,051 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:22,051 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [925554473] [2025-03-04 16:46:22,051 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [925554473] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:22,051 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:22,052 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-04 16:46:22,052 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [399914221] [2025-03-04 16:46:22,052 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:22,059 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:22,059 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:22,075 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-03-04 16:46:22,075 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-03-04 16:46:22,077 INFO L87 Difference]: Start difference. First operand has 429 states, 421 states have (on average 1.6104513064133017) internal successors, (678), 421 states have internal predecessors, (678), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:22,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:22,167 INFO L93 Difference]: Finished difference Result 428 states and 618 transitions. [2025-03-04 16:46:22,168 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 428 states and 618 transitions. [2025-03-04 16:46:22,174 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 415 [2025-03-04 16:46:22,182 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 428 states to 424 states and 613 transitions. [2025-03-04 16:46:22,185 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 424 [2025-03-04 16:46:22,187 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 424 [2025-03-04 16:46:22,188 INFO L73 IsDeterministic]: Start isDeterministic. Operand 424 states and 613 transitions. [2025-03-04 16:46:22,190 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:22,190 INFO L218 hiAutomatonCegarLoop]: Abstraction has 424 states and 613 transitions. [2025-03-04 16:46:22,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states and 613 transitions. [2025-03-04 16:46:22,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 424. [2025-03-04 16:46:22,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 424 states, 417 states have (on average 1.4412470023980815) internal successors, (601), 416 states have internal predecessors, (601), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:22,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 613 transitions. [2025-03-04 16:46:22,226 INFO L240 hiAutomatonCegarLoop]: Abstraction has 424 states and 613 transitions. [2025-03-04 16:46:22,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-03-04 16:46:22,234 INFO L432 stractBuchiCegarLoop]: Abstraction has 424 states and 613 transitions. [2025-03-04 16:46:22,234 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-04 16:46:22,234 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 424 states and 613 transitions. [2025-03-04 16:46:22,236 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 415 [2025-03-04 16:46:22,236 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:22,236 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:22,238 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:22,238 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:22,238 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:22,240 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem28#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem28#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem29#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem29#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem30#1 := read~int#1(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem30#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem31#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem31#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem33#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem33#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem34#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem34#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem34#1 % 256 % 4294967296 else main_#t~mem34#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem177#1 := read~int#1(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem177#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem178#1 := read~int#1(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem178#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem179#1 := read~int#1(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem179#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem180#1 := read~int#1(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem180#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem181#1 := read~int#1(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem181#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem182#1 := read~int#1(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem182#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem183#1 := read~int#1(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + (if main_#t~mem183#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem183#1 % 256 % 4294967296 else main_#t~mem183#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:22,240 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:22,241 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 2 times [2025-03-04 16:46:22,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:22,241 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [151419649] [2025-03-04 16:46:22,241 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:46:22,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:22,249 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:22,252 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:22,252 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:22,252 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:22,252 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:22,256 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:22,260 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:22,260 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:22,260 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:22,273 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:22,273 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:22,274 INFO L85 PathProgramCache]: Analyzing trace with hash -1619480487, now seen corresponding path program 1 times [2025-03-04 16:46:22,274 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:22,274 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2001783252] [2025-03-04 16:46:22,274 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:22,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:22,365 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-03-04 16:46:22,381 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-03-04 16:46:22,381 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:22,381 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:22,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:22,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:22,853 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2001783252] [2025-03-04 16:46:22,853 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2001783252] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:22,855 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:22,855 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:46:22,855 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2005373864] [2025-03-04 16:46:22,855 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:22,855 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:22,855 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:22,856 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:46:22,856 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:46:22,856 INFO L87 Difference]: Start difference. First operand 424 states and 613 transitions. cyclomatic complexity: 193 Second operand has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:23,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:23,057 INFO L93 Difference]: Finished difference Result 427 states and 609 transitions. [2025-03-04 16:46:23,057 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 427 states and 609 transitions. [2025-03-04 16:46:23,067 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 418 [2025-03-04 16:46:23,070 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 427 states to 427 states and 609 transitions. [2025-03-04 16:46:23,070 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 427 [2025-03-04 16:46:23,071 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 427 [2025-03-04 16:46:23,071 INFO L73 IsDeterministic]: Start isDeterministic. Operand 427 states and 609 transitions. [2025-03-04 16:46:23,072 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:23,072 INFO L218 hiAutomatonCegarLoop]: Abstraction has 427 states and 609 transitions. [2025-03-04 16:46:23,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 427 states and 609 transitions. [2025-03-04 16:46:23,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 427 to 424. [2025-03-04 16:46:23,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 424 states, 417 states have (on average 1.4244604316546763) internal successors, (594), 416 states have internal predecessors, (594), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:23,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 606 transitions. [2025-03-04 16:46:23,087 INFO L240 hiAutomatonCegarLoop]: Abstraction has 424 states and 606 transitions. [2025-03-04 16:46:23,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:46:23,092 INFO L432 stractBuchiCegarLoop]: Abstraction has 424 states and 606 transitions. [2025-03-04 16:46:23,092 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-04 16:46:23,092 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 424 states and 606 transitions. [2025-03-04 16:46:23,094 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 415 [2025-03-04 16:46:23,094 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:23,094 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:23,095 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:23,095 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:23,095 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:23,097 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem177#1 := read~int#1(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem177#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem178#1 := read~int#1(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem178#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem179#1 := read~int#1(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem179#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem180#1 := read~int#1(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem180#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem181#1 := read~int#1(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem181#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem182#1 := read~int#1(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem182#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem183#1 := read~int#1(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + (if main_#t~mem183#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem183#1 % 256 % 4294967296 else main_#t~mem183#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:23,098 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:23,098 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 3 times [2025-03-04 16:46:23,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:23,098 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948539603] [2025-03-04 16:46:23,100 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:46:23,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:23,116 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:23,118 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:23,118 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:46:23,118 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:23,118 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:23,125 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:23,127 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:23,127 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:23,127 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:23,137 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:23,137 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:23,137 INFO L85 PathProgramCache]: Analyzing trace with hash 668906835, now seen corresponding path program 1 times [2025-03-04 16:46:23,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:23,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330637336] [2025-03-04 16:46:23,138 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:23,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:23,191 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-03-04 16:46:23,240 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-03-04 16:46:23,241 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:23,241 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:23,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:23,534 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:23,534 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1330637336] [2025-03-04 16:46:23,534 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1330637336] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:23,535 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:23,535 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:46:23,535 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1348592484] [2025-03-04 16:46:23,535 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:23,535 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:23,535 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:23,535 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:46:23,535 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:46:23,536 INFO L87 Difference]: Start difference. First operand 424 states and 606 transitions. cyclomatic complexity: 186 Second operand has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:23,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:23,671 INFO L93 Difference]: Finished difference Result 382 states and 529 transitions. [2025-03-04 16:46:23,671 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 382 states and 529 transitions. [2025-03-04 16:46:23,673 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 373 [2025-03-04 16:46:23,677 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 382 states to 382 states and 529 transitions. [2025-03-04 16:46:23,677 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 382 [2025-03-04 16:46:23,677 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 382 [2025-03-04 16:46:23,678 INFO L73 IsDeterministic]: Start isDeterministic. Operand 382 states and 529 transitions. [2025-03-04 16:46:23,678 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:23,679 INFO L218 hiAutomatonCegarLoop]: Abstraction has 382 states and 529 transitions. [2025-03-04 16:46:23,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states and 529 transitions. [2025-03-04 16:46:23,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 382. [2025-03-04 16:46:23,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 382 states, 375 states have (on average 1.3786666666666667) internal successors, (517), 374 states have internal predecessors, (517), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:23,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 529 transitions. [2025-03-04 16:46:23,688 INFO L240 hiAutomatonCegarLoop]: Abstraction has 382 states and 529 transitions. [2025-03-04 16:46:23,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-04 16:46:23,689 INFO L432 stractBuchiCegarLoop]: Abstraction has 382 states and 529 transitions. [2025-03-04 16:46:23,689 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-04 16:46:23,689 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 382 states and 529 transitions. [2025-03-04 16:46:23,691 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 373 [2025-03-04 16:46:23,691 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:23,691 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:23,692 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:23,693 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:23,694 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:23,694 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:23,695 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:23,695 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 4 times [2025-03-04 16:46:23,695 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:23,695 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2128565934] [2025-03-04 16:46:23,695 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:46:23,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:23,702 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:46:23,704 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:23,704 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:46:23,704 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:23,704 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:23,707 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:23,708 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:23,708 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:23,708 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:23,712 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:23,713 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:23,713 INFO L85 PathProgramCache]: Analyzing trace with hash 1594030298, now seen corresponding path program 1 times [2025-03-04 16:46:23,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:23,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1732281804] [2025-03-04 16:46:23,713 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:23,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:23,784 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-03-04 16:46:24,187 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-03-04 16:46:24,190 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:24,190 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:24,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:24,641 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:24,641 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1732281804] [2025-03-04 16:46:24,641 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1732281804] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:24,641 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:24,641 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:46:24,644 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [527260541] [2025-03-04 16:46:24,644 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:24,645 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:24,645 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:24,645 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:46:24,645 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:46:24,645 INFO L87 Difference]: Start difference. First operand 382 states and 529 transitions. cyclomatic complexity: 151 Second operand has 6 states, 6 states have (on average 23.666666666666668) internal successors, (142), 6 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:25,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:25,256 INFO L93 Difference]: Finished difference Result 416 states and 573 transitions. [2025-03-04 16:46:25,256 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 416 states and 573 transitions. [2025-03-04 16:46:25,258 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 407 [2025-03-04 16:46:25,260 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 416 states to 416 states and 573 transitions. [2025-03-04 16:46:25,260 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 416 [2025-03-04 16:46:25,261 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 416 [2025-03-04 16:46:25,261 INFO L73 IsDeterministic]: Start isDeterministic. Operand 416 states and 573 transitions. [2025-03-04 16:46:25,262 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:25,262 INFO L218 hiAutomatonCegarLoop]: Abstraction has 416 states and 573 transitions. [2025-03-04 16:46:25,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states and 573 transitions. [2025-03-04 16:46:25,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 409. [2025-03-04 16:46:25,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 409 states, 402 states have (on average 1.3681592039800996) internal successors, (550), 401 states have internal predecessors, (550), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:25,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 562 transitions. [2025-03-04 16:46:25,268 INFO L240 hiAutomatonCegarLoop]: Abstraction has 409 states and 562 transitions. [2025-03-04 16:46:25,269 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:46:25,269 INFO L432 stractBuchiCegarLoop]: Abstraction has 409 states and 562 transitions. [2025-03-04 16:46:25,270 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-04 16:46:25,270 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 409 states and 562 transitions. [2025-03-04 16:46:25,271 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 400 [2025-03-04 16:46:25,271 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:25,271 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:25,272 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:25,272 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:25,272 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:25,273 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:25,273 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:25,274 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 5 times [2025-03-04 16:46:25,274 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:25,274 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [23303184] [2025-03-04 16:46:25,274 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:46:25,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:25,281 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:25,282 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:25,282 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:25,282 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:25,282 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:25,284 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:25,285 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:25,285 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:25,285 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:25,292 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:25,294 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:25,294 INFO L85 PathProgramCache]: Analyzing trace with hash 982187058, now seen corresponding path program 1 times [2025-03-04 16:46:25,294 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:25,294 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111680030] [2025-03-04 16:46:25,294 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:25,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:25,336 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-03-04 16:46:25,361 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-03-04 16:46:25,361 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:25,362 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:25,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:25,508 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:25,508 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2111680030] [2025-03-04 16:46:25,509 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2111680030] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:25,509 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:25,509 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:46:25,509 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [466899027] [2025-03-04 16:46:25,509 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:25,509 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:25,509 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:25,509 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:46:25,509 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:46:25,509 INFO L87 Difference]: Start difference. First operand 409 states and 562 transitions. cyclomatic complexity: 157 Second operand has 4 states, 4 states have (on average 35.75) internal successors, (143), 4 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:25,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:25,615 INFO L93 Difference]: Finished difference Result 403 states and 552 transitions. [2025-03-04 16:46:25,615 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 403 states and 552 transitions. [2025-03-04 16:46:25,617 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 394 [2025-03-04 16:46:25,619 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 403 states to 403 states and 552 transitions. [2025-03-04 16:46:25,619 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 403 [2025-03-04 16:46:25,619 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 403 [2025-03-04 16:46:25,619 INFO L73 IsDeterministic]: Start isDeterministic. Operand 403 states and 552 transitions. [2025-03-04 16:46:25,620 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:25,620 INFO L218 hiAutomatonCegarLoop]: Abstraction has 403 states and 552 transitions. [2025-03-04 16:46:25,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 403 states and 552 transitions. [2025-03-04 16:46:25,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 403 to 403. [2025-03-04 16:46:25,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 403 states, 396 states have (on average 1.3636363636363635) internal successors, (540), 395 states have internal predecessors, (540), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:25,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 403 states to 403 states and 552 transitions. [2025-03-04 16:46:25,625 INFO L240 hiAutomatonCegarLoop]: Abstraction has 403 states and 552 transitions. [2025-03-04 16:46:25,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-04 16:46:25,626 INFO L432 stractBuchiCegarLoop]: Abstraction has 403 states and 552 transitions. [2025-03-04 16:46:25,626 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-04 16:46:25,626 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 403 states and 552 transitions. [2025-03-04 16:46:25,627 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 394 [2025-03-04 16:46:25,627 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:25,627 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:25,628 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:25,628 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:25,628 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:25,628 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:25,629 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:25,629 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 6 times [2025-03-04 16:46:25,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:25,629 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1357123493] [2025-03-04 16:46:25,629 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:46:25,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:25,635 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:25,635 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:25,635 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:46:25,636 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:25,636 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:25,638 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:25,638 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:25,638 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:25,638 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:25,643 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:25,643 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:25,643 INFO L85 PathProgramCache]: Analyzing trace with hash 755661365, now seen corresponding path program 1 times [2025-03-04 16:46:25,643 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:25,643 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016964813] [2025-03-04 16:46:25,643 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:25,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:25,683 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-03-04 16:46:25,722 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-03-04 16:46:25,723 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:25,723 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:26,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:26,011 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:26,011 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2016964813] [2025-03-04 16:46:26,011 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2016964813] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:26,011 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:26,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:46:26,011 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1874428160] [2025-03-04 16:46:26,011 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:26,011 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:26,011 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:26,012 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:46:26,012 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:46:26,012 INFO L87 Difference]: Start difference. First operand 403 states and 552 transitions. cyclomatic complexity: 153 Second operand has 7 states, 7 states have (on average 20.428571428571427) internal successors, (143), 7 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:26,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:26,567 INFO L93 Difference]: Finished difference Result 416 states and 571 transitions. [2025-03-04 16:46:26,567 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 416 states and 571 transitions. [2025-03-04 16:46:26,569 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 407 [2025-03-04 16:46:26,572 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 416 states to 416 states and 571 transitions. [2025-03-04 16:46:26,572 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 416 [2025-03-04 16:46:26,573 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 416 [2025-03-04 16:46:26,573 INFO L73 IsDeterministic]: Start isDeterministic. Operand 416 states and 571 transitions. [2025-03-04 16:46:26,573 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:26,575 INFO L218 hiAutomatonCegarLoop]: Abstraction has 416 states and 571 transitions. [2025-03-04 16:46:26,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states and 571 transitions. [2025-03-04 16:46:26,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 413. [2025-03-04 16:46:26,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 413 states, 406 states have (on average 1.3669950738916257) internal successors, (555), 405 states have internal predecessors, (555), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:26,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 567 transitions. [2025-03-04 16:46:26,583 INFO L240 hiAutomatonCegarLoop]: Abstraction has 413 states and 567 transitions. [2025-03-04 16:46:26,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:46:26,584 INFO L432 stractBuchiCegarLoop]: Abstraction has 413 states and 567 transitions. [2025-03-04 16:46:26,585 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-04 16:46:26,585 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 413 states and 567 transitions. [2025-03-04 16:46:26,587 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 404 [2025-03-04 16:46:26,587 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:26,587 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:26,587 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:26,587 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:26,587 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:26,588 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:26,588 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:26,588 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 7 times [2025-03-04 16:46:26,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:26,588 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [194212857] [2025-03-04 16:46:26,588 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:46:26,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:26,595 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:26,595 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:26,596 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:26,596 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:26,596 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:26,598 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:26,599 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:26,599 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:26,599 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:26,604 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:26,604 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:26,604 INFO L85 PathProgramCache]: Analyzing trace with hash -188650322, now seen corresponding path program 1 times [2025-03-04 16:46:26,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:26,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [916601643] [2025-03-04 16:46:26,605 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:26,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:26,662 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-03-04 16:46:26,807 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-03-04 16:46:26,808 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:26,808 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:27,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:27,094 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:27,094 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [916601643] [2025-03-04 16:46:27,094 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [916601643] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:27,094 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:27,094 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:46:27,094 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1969038026] [2025-03-04 16:46:27,094 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:27,095 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:27,095 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:27,095 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:46:27,095 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:46:27,095 INFO L87 Difference]: Start difference. First operand 413 states and 567 transitions. cyclomatic complexity: 158 Second operand has 4 states, 4 states have (on average 35.75) internal successors, (143), 4 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:27,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:27,324 INFO L93 Difference]: Finished difference Result 416 states and 570 transitions. [2025-03-04 16:46:27,324 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 416 states and 570 transitions. [2025-03-04 16:46:27,326 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 407 [2025-03-04 16:46:27,328 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 416 states to 416 states and 570 transitions. [2025-03-04 16:46:27,328 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 416 [2025-03-04 16:46:27,329 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 416 [2025-03-04 16:46:27,329 INFO L73 IsDeterministic]: Start isDeterministic. Operand 416 states and 570 transitions. [2025-03-04 16:46:27,329 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:27,329 INFO L218 hiAutomatonCegarLoop]: Abstraction has 416 states and 570 transitions. [2025-03-04 16:46:27,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states and 570 transitions. [2025-03-04 16:46:27,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 413. [2025-03-04 16:46:27,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 413 states, 406 states have (on average 1.3645320197044335) internal successors, (554), 405 states have internal predecessors, (554), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:27,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 566 transitions. [2025-03-04 16:46:27,339 INFO L240 hiAutomatonCegarLoop]: Abstraction has 413 states and 566 transitions. [2025-03-04 16:46:27,339 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:46:27,340 INFO L432 stractBuchiCegarLoop]: Abstraction has 413 states and 566 transitions. [2025-03-04 16:46:27,340 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-04 16:46:27,340 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 413 states and 566 transitions. [2025-03-04 16:46:27,341 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 404 [2025-03-04 16:46:27,341 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:27,341 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:27,342 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:27,342 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:27,342 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:27,342 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:27,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:27,343 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 8 times [2025-03-04 16:46:27,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:27,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095352001] [2025-03-04 16:46:27,343 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:46:27,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:27,348 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:27,349 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:27,349 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:27,349 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:27,349 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:27,351 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:27,352 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:27,352 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:27,352 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:27,356 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:27,356 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:27,357 INFO L85 PathProgramCache]: Analyzing trace with hash -1067456639, now seen corresponding path program 1 times [2025-03-04 16:46:27,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:27,357 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1319179991] [2025-03-04 16:46:27,357 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:27,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:27,396 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 144 statements into 1 equivalence classes. [2025-03-04 16:46:27,426 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 144 of 144 statements. [2025-03-04 16:46:27,426 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:27,426 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:27,808 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:27,808 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:27,809 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1319179991] [2025-03-04 16:46:27,809 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1319179991] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:27,809 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:27,809 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:46:27,809 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1125816058] [2025-03-04 16:46:27,809 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:27,809 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:27,809 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:27,809 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:46:27,810 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:46:27,810 INFO L87 Difference]: Start difference. First operand 413 states and 566 transitions. cyclomatic complexity: 157 Second operand has 9 states, 9 states have (on average 16.0) internal successors, (144), 9 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:28,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:28,630 INFO L93 Difference]: Finished difference Result 429 states and 588 transitions. [2025-03-04 16:46:28,630 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 429 states and 588 transitions. [2025-03-04 16:46:28,632 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 420 [2025-03-04 16:46:28,634 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 429 states to 429 states and 588 transitions. [2025-03-04 16:46:28,634 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 429 [2025-03-04 16:46:28,635 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 429 [2025-03-04 16:46:28,635 INFO L73 IsDeterministic]: Start isDeterministic. Operand 429 states and 588 transitions. [2025-03-04 16:46:28,635 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:28,635 INFO L218 hiAutomatonCegarLoop]: Abstraction has 429 states and 588 transitions. [2025-03-04 16:46:28,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states and 588 transitions. [2025-03-04 16:46:28,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 423. [2025-03-04 16:46:28,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 423 states, 416 states have (on average 1.3653846153846154) internal successors, (568), 415 states have internal predecessors, (568), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:28,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 580 transitions. [2025-03-04 16:46:28,641 INFO L240 hiAutomatonCegarLoop]: Abstraction has 423 states and 580 transitions. [2025-03-04 16:46:28,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-04 16:46:28,642 INFO L432 stractBuchiCegarLoop]: Abstraction has 423 states and 580 transitions. [2025-03-04 16:46:28,642 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-04 16:46:28,642 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 423 states and 580 transitions. [2025-03-04 16:46:28,643 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 414 [2025-03-04 16:46:28,643 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:28,644 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:28,644 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:28,644 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:28,644 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:28,645 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:28,645 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:28,645 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 9 times [2025-03-04 16:46:28,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:28,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1499608745] [2025-03-04 16:46:28,645 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:46:28,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:28,651 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:28,651 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:28,651 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:46:28,652 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:28,652 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:28,653 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:28,654 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:28,654 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:28,654 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:28,658 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:28,658 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:28,659 INFO L85 PathProgramCache]: Analyzing trace with hash -759009603, now seen corresponding path program 1 times [2025-03-04 16:46:28,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:28,659 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1653083368] [2025-03-04 16:46:28,659 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:28,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:28,700 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 144 statements into 1 equivalence classes. [2025-03-04 16:46:29,224 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 144 of 144 statements. [2025-03-04 16:46:29,224 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:29,224 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:29,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:29,497 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:29,497 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1653083368] [2025-03-04 16:46:29,497 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1653083368] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:29,497 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:29,497 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:46:29,497 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371969688] [2025-03-04 16:46:29,497 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:29,497 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:29,497 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:29,497 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:46:29,498 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:46:29,498 INFO L87 Difference]: Start difference. First operand 423 states and 580 transitions. cyclomatic complexity: 161 Second operand has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:29,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:29,844 INFO L93 Difference]: Finished difference Result 428 states and 586 transitions. [2025-03-04 16:46:29,844 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 428 states and 586 transitions. [2025-03-04 16:46:29,846 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 419 [2025-03-04 16:46:29,848 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 428 states to 428 states and 586 transitions. [2025-03-04 16:46:29,848 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 428 [2025-03-04 16:46:29,848 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 428 [2025-03-04 16:46:29,848 INFO L73 IsDeterministic]: Start isDeterministic. Operand 428 states and 586 transitions. [2025-03-04 16:46:29,849 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:29,849 INFO L218 hiAutomatonCegarLoop]: Abstraction has 428 states and 586 transitions. [2025-03-04 16:46:29,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 428 states and 586 transitions. [2025-03-04 16:46:29,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 428 to 427. [2025-03-04 16:46:29,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 420 states have (on average 1.3642857142857143) internal successors, (573), 419 states have internal predecessors, (573), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:29,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 585 transitions. [2025-03-04 16:46:29,854 INFO L240 hiAutomatonCegarLoop]: Abstraction has 427 states and 585 transitions. [2025-03-04 16:46:29,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:46:29,855 INFO L432 stractBuchiCegarLoop]: Abstraction has 427 states and 585 transitions. [2025-03-04 16:46:29,855 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-04 16:46:29,855 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 427 states and 585 transitions. [2025-03-04 16:46:29,857 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 418 [2025-03-04 16:46:29,857 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:29,857 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:29,857 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:29,857 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:29,857 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:29,858 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:29,858 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:29,858 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 10 times [2025-03-04 16:46:29,858 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:29,858 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1320547178] [2025-03-04 16:46:29,858 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:46:29,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:29,864 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:46:29,864 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:29,864 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:46:29,864 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:29,864 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:29,866 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:29,866 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:29,867 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:29,867 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:29,871 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:29,871 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:29,871 INFO L85 PathProgramCache]: Analyzing trace with hash 837588444, now seen corresponding path program 1 times [2025-03-04 16:46:29,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:29,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113570117] [2025-03-04 16:46:29,871 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:29,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:29,908 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 145 statements into 1 equivalence classes. [2025-03-04 16:46:29,931 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 145 of 145 statements. [2025-03-04 16:46:29,931 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:29,932 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:30,155 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:30,155 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:30,155 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [113570117] [2025-03-04 16:46:30,155 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [113570117] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:30,155 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:30,155 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:46:30,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1759214751] [2025-03-04 16:46:30,156 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:30,156 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:30,157 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:30,157 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:46:30,157 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:46:30,157 INFO L87 Difference]: Start difference. First operand 427 states and 585 transitions. cyclomatic complexity: 162 Second operand has 6 states, 6 states have (on average 24.166666666666668) internal successors, (145), 6 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:30,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:30,523 INFO L93 Difference]: Finished difference Result 430 states and 588 transitions. [2025-03-04 16:46:30,523 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 430 states and 588 transitions. [2025-03-04 16:46:30,525 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 421 [2025-03-04 16:46:30,527 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 430 states to 430 states and 588 transitions. [2025-03-04 16:46:30,527 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 430 [2025-03-04 16:46:30,527 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 430 [2025-03-04 16:46:30,527 INFO L73 IsDeterministic]: Start isDeterministic. Operand 430 states and 588 transitions. [2025-03-04 16:46:30,528 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:30,528 INFO L218 hiAutomatonCegarLoop]: Abstraction has 430 states and 588 transitions. [2025-03-04 16:46:30,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states and 588 transitions. [2025-03-04 16:46:30,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 430. [2025-03-04 16:46:30,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 423 states have (on average 1.3617021276595744) internal successors, (576), 422 states have internal predecessors, (576), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:30,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 588 transitions. [2025-03-04 16:46:30,535 INFO L240 hiAutomatonCegarLoop]: Abstraction has 430 states and 588 transitions. [2025-03-04 16:46:30,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:46:30,536 INFO L432 stractBuchiCegarLoop]: Abstraction has 430 states and 588 transitions. [2025-03-04 16:46:30,536 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-04 16:46:30,536 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 430 states and 588 transitions. [2025-03-04 16:46:30,537 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 421 [2025-03-04 16:46:30,537 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:30,537 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:30,537 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:30,537 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:30,537 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:30,538 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:30,538 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:30,539 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 11 times [2025-03-04 16:46:30,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:30,539 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699569898] [2025-03-04 16:46:30,539 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:46:30,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:30,544 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:30,545 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:30,545 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:30,545 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:30,545 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:30,548 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:30,548 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:30,548 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:30,548 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:30,553 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:30,553 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:30,553 INFO L85 PathProgramCache]: Analyzing trace with hash -1419049924, now seen corresponding path program 1 times [2025-03-04 16:46:30,553 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:30,553 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587937097] [2025-03-04 16:46:30,554 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:30,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:30,590 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 145 statements into 1 equivalence classes. [2025-03-04 16:46:30,843 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 145 of 145 statements. [2025-03-04 16:46:30,844 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:30,844 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:31,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:31,081 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:31,081 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587937097] [2025-03-04 16:46:31,081 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [587937097] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:31,081 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:31,081 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-04 16:46:31,081 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [639986180] [2025-03-04 16:46:31,081 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:31,081 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:31,081 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:31,082 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-04 16:46:31,082 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-04 16:46:31,082 INFO L87 Difference]: Start difference. First operand 430 states and 588 transitions. cyclomatic complexity: 162 Second operand has 4 states, 4 states have (on average 36.25) internal successors, (145), 4 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:31,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:31,226 INFO L93 Difference]: Finished difference Result 430 states and 587 transitions. [2025-03-04 16:46:31,226 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 430 states and 587 transitions. [2025-03-04 16:46:31,228 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 421 [2025-03-04 16:46:31,230 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 430 states to 430 states and 587 transitions. [2025-03-04 16:46:31,230 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 430 [2025-03-04 16:46:31,230 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 430 [2025-03-04 16:46:31,230 INFO L73 IsDeterministic]: Start isDeterministic. Operand 430 states and 587 transitions. [2025-03-04 16:46:31,231 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:31,231 INFO L218 hiAutomatonCegarLoop]: Abstraction has 430 states and 587 transitions. [2025-03-04 16:46:31,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states and 587 transitions. [2025-03-04 16:46:31,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 430. [2025-03-04 16:46:31,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 423 states have (on average 1.3593380614657211) internal successors, (575), 422 states have internal predecessors, (575), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:31,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 587 transitions. [2025-03-04 16:46:31,236 INFO L240 hiAutomatonCegarLoop]: Abstraction has 430 states and 587 transitions. [2025-03-04 16:46:31,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-04 16:46:31,237 INFO L432 stractBuchiCegarLoop]: Abstraction has 430 states and 587 transitions. [2025-03-04 16:46:31,237 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-04 16:46:31,237 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 430 states and 587 transitions. [2025-03-04 16:46:31,238 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 421 [2025-03-04 16:46:31,238 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:31,238 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:31,239 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:31,239 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:31,239 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:31,239 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:31,240 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:31,240 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 12 times [2025-03-04 16:46:31,240 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:31,240 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1113422115] [2025-03-04 16:46:31,240 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:46:31,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:31,246 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:31,247 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:31,247 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:46:31,247 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:31,247 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:31,249 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:31,250 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:31,250 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:31,250 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:31,255 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:31,255 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:31,256 INFO L85 PathProgramCache]: Analyzing trace with hash 223389269, now seen corresponding path program 1 times [2025-03-04 16:46:31,256 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:31,256 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [551456405] [2025-03-04 16:46:31,256 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:31,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:31,291 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 145 statements into 1 equivalence classes. [2025-03-04 16:46:31,312 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 145 of 145 statements. [2025-03-04 16:46:31,312 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:31,312 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:31,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:31,501 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:31,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [551456405] [2025-03-04 16:46:31,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [551456405] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:31,501 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:31,501 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:46:31,501 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1911139247] [2025-03-04 16:46:31,501 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:31,502 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:31,502 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:31,502 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:46:31,502 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:46:31,502 INFO L87 Difference]: Start difference. First operand 430 states and 587 transitions. cyclomatic complexity: 161 Second operand has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:31,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:31,854 INFO L93 Difference]: Finished difference Result 435 states and 593 transitions. [2025-03-04 16:46:31,854 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 435 states and 593 transitions. [2025-03-04 16:46:31,856 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 426 [2025-03-04 16:46:31,858 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 435 states to 435 states and 593 transitions. [2025-03-04 16:46:31,858 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 435 [2025-03-04 16:46:31,858 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 435 [2025-03-04 16:46:31,858 INFO L73 IsDeterministic]: Start isDeterministic. Operand 435 states and 593 transitions. [2025-03-04 16:46:31,859 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:31,859 INFO L218 hiAutomatonCegarLoop]: Abstraction has 435 states and 593 transitions. [2025-03-04 16:46:31,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 435 states and 593 transitions. [2025-03-04 16:46:31,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 435 to 434. [2025-03-04 16:46:31,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 434 states, 427 states have (on average 1.3583138173302107) internal successors, (580), 426 states have internal predecessors, (580), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:31,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 434 states to 434 states and 592 transitions. [2025-03-04 16:46:31,865 INFO L240 hiAutomatonCegarLoop]: Abstraction has 434 states and 592 transitions. [2025-03-04 16:46:31,866 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:46:31,867 INFO L432 stractBuchiCegarLoop]: Abstraction has 434 states and 592 transitions. [2025-03-04 16:46:31,867 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-04 16:46:31,867 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 434 states and 592 transitions. [2025-03-04 16:46:31,868 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 425 [2025-03-04 16:46:31,868 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:31,869 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:31,869 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:31,869 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:31,869 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:31,870 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:31,870 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:31,870 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 13 times [2025-03-04 16:46:31,870 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:31,870 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193972435] [2025-03-04 16:46:31,870 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:46:31,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:31,876 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:31,877 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:31,877 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:31,877 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:31,877 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:31,879 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:31,879 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:31,879 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:31,879 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:31,884 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:31,885 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:31,885 INFO L85 PathProgramCache]: Analyzing trace with hash -1686981098, now seen corresponding path program 1 times [2025-03-04 16:46:31,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:31,885 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148092994] [2025-03-04 16:46:31,885 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:31,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:31,924 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 146 statements into 1 equivalence classes. [2025-03-04 16:46:31,947 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 146 of 146 statements. [2025-03-04 16:46:31,947 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:31,947 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:32,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:32,264 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:32,265 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [148092994] [2025-03-04 16:46:32,265 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [148092994] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:32,265 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:32,265 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:46:32,265 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [406843084] [2025-03-04 16:46:32,265 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:32,265 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:32,265 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:32,265 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:46:32,265 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:46:32,266 INFO L87 Difference]: Start difference. First operand 434 states and 592 transitions. cyclomatic complexity: 162 Second operand has 9 states, 9 states have (on average 16.22222222222222) internal successors, (146), 9 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:32,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:32,809 INFO L93 Difference]: Finished difference Result 445 states and 606 transitions. [2025-03-04 16:46:32,809 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 445 states and 606 transitions. [2025-03-04 16:46:32,811 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:46:32,814 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 445 states to 445 states and 606 transitions. [2025-03-04 16:46:32,814 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 445 [2025-03-04 16:46:32,814 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 445 [2025-03-04 16:46:32,814 INFO L73 IsDeterministic]: Start isDeterministic. Operand 445 states and 606 transitions. [2025-03-04 16:46:32,815 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:32,815 INFO L218 hiAutomatonCegarLoop]: Abstraction has 445 states and 606 transitions. [2025-03-04 16:46:32,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 445 states and 606 transitions. [2025-03-04 16:46:32,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 445 to 442. [2025-03-04 16:46:32,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 442 states, 435 states have (on average 1.3563218390804597) internal successors, (590), 434 states have internal predecessors, (590), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:32,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 442 states to 442 states and 602 transitions. [2025-03-04 16:46:32,820 INFO L240 hiAutomatonCegarLoop]: Abstraction has 442 states and 602 transitions. [2025-03-04 16:46:32,821 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-04 16:46:32,821 INFO L432 stractBuchiCegarLoop]: Abstraction has 442 states and 602 transitions. [2025-03-04 16:46:32,822 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-03-04 16:46:32,822 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 442 states and 602 transitions. [2025-03-04 16:46:32,823 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 433 [2025-03-04 16:46:32,823 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:32,823 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:32,823 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:32,824 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:32,824 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:32,824 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:32,824 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:32,824 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 14 times [2025-03-04 16:46:32,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:32,825 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [61418948] [2025-03-04 16:46:32,825 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:46:32,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:32,830 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:32,831 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:32,831 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:32,831 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:32,831 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:32,833 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:32,833 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:32,833 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:32,833 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:32,837 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:32,839 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:32,839 INFO L85 PathProgramCache]: Analyzing trace with hash 1971323642, now seen corresponding path program 1 times [2025-03-04 16:46:32,839 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:32,839 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219727229] [2025-03-04 16:46:32,839 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:32,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:32,880 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 146 statements into 1 equivalence classes. [2025-03-04 16:46:32,903 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 146 of 146 statements. [2025-03-04 16:46:32,903 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:32,903 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:33,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:33,107 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:33,107 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [219727229] [2025-03-04 16:46:33,107 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [219727229] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:33,107 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:33,107 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:46:33,107 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1144770706] [2025-03-04 16:46:33,107 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:33,108 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:33,108 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:33,108 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:46:33,108 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:46:33,108 INFO L87 Difference]: Start difference. First operand 442 states and 602 transitions. cyclomatic complexity: 164 Second operand has 6 states, 6 states have (on average 24.333333333333332) internal successors, (146), 6 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:33,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:33,393 INFO L93 Difference]: Finished difference Result 445 states and 605 transitions. [2025-03-04 16:46:33,393 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 445 states and 605 transitions. [2025-03-04 16:46:33,394 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:46:33,397 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 445 states to 445 states and 605 transitions. [2025-03-04 16:46:33,397 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 445 [2025-03-04 16:46:33,398 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 445 [2025-03-04 16:46:33,398 INFO L73 IsDeterministic]: Start isDeterministic. Operand 445 states and 605 transitions. [2025-03-04 16:46:33,399 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:33,399 INFO L218 hiAutomatonCegarLoop]: Abstraction has 445 states and 605 transitions. [2025-03-04 16:46:33,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 445 states and 605 transitions. [2025-03-04 16:46:33,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 445 to 445. [2025-03-04 16:46:33,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 438 states have (on average 1.3538812785388128) internal successors, (593), 437 states have internal predecessors, (593), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:33,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 605 transitions. [2025-03-04 16:46:33,404 INFO L240 hiAutomatonCegarLoop]: Abstraction has 445 states and 605 transitions. [2025-03-04 16:46:33,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:46:33,405 INFO L432 stractBuchiCegarLoop]: Abstraction has 445 states and 605 transitions. [2025-03-04 16:46:33,405 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-03-04 16:46:33,405 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 605 transitions. [2025-03-04 16:46:33,406 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:46:33,406 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:33,406 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:33,408 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:33,408 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:33,408 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:33,408 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:33,409 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:33,409 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 15 times [2025-03-04 16:46:33,409 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:33,409 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446177040] [2025-03-04 16:46:33,409 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:46:33,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:33,416 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:33,417 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:33,417 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:46:33,417 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:33,417 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:33,421 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:33,422 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:33,422 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:33,422 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:33,427 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:33,428 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:33,428 INFO L85 PathProgramCache]: Analyzing trace with hash -2048233602, now seen corresponding path program 1 times [2025-03-04 16:46:33,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:33,428 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1236221832] [2025-03-04 16:46:33,428 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:33,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:33,467 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 147 statements into 1 equivalence classes. [2025-03-04 16:46:33,584 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 147 of 147 statements. [2025-03-04 16:46:33,585 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:33,585 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:33,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:33,867 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:33,867 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1236221832] [2025-03-04 16:46:33,867 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1236221832] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:33,867 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:33,868 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:46:33,868 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [849908744] [2025-03-04 16:46:33,868 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:33,868 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:33,868 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:33,868 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:46:33,869 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:46:33,869 INFO L87 Difference]: Start difference. First operand 445 states and 605 transitions. cyclomatic complexity: 164 Second operand has 7 states, 7 states have (on average 21.0) internal successors, (147), 7 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:34,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:34,268 INFO L93 Difference]: Finished difference Result 450 states and 611 transitions. [2025-03-04 16:46:34,268 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 450 states and 611 transitions. [2025-03-04 16:46:34,270 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 441 [2025-03-04 16:46:34,272 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 450 states to 450 states and 611 transitions. [2025-03-04 16:46:34,273 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 450 [2025-03-04 16:46:34,273 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 450 [2025-03-04 16:46:34,273 INFO L73 IsDeterministic]: Start isDeterministic. Operand 450 states and 611 transitions. [2025-03-04 16:46:34,274 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:34,274 INFO L218 hiAutomatonCegarLoop]: Abstraction has 450 states and 611 transitions. [2025-03-04 16:46:34,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 450 states and 611 transitions. [2025-03-04 16:46:34,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 450 to 445. [2025-03-04 16:46:34,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 438 states have (on average 1.3538812785388128) internal successors, (593), 437 states have internal predecessors, (593), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:34,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 605 transitions. [2025-03-04 16:46:34,281 INFO L240 hiAutomatonCegarLoop]: Abstraction has 445 states and 605 transitions. [2025-03-04 16:46:34,281 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:46:34,281 INFO L432 stractBuchiCegarLoop]: Abstraction has 445 states and 605 transitions. [2025-03-04 16:46:34,281 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-03-04 16:46:34,281 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 605 transitions. [2025-03-04 16:46:34,283 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:46:34,283 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:34,283 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:34,283 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:34,283 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:34,284 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:34,285 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:34,285 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:34,285 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 16 times [2025-03-04 16:46:34,285 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:34,285 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683998948] [2025-03-04 16:46:34,285 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:46:34,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:34,294 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:46:34,294 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:34,294 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:46:34,294 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:34,295 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:34,298 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:34,300 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:34,300 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:34,300 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:34,306 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:34,307 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:34,307 INFO L85 PathProgramCache]: Analyzing trace with hash -1372636177, now seen corresponding path program 1 times [2025-03-04 16:46:34,307 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:34,307 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137248368] [2025-03-04 16:46:34,307 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:34,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:34,368 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 147 statements into 1 equivalence classes. [2025-03-04 16:46:34,564 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 147 of 147 statements. [2025-03-04 16:46:34,564 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:34,564 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:34,910 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:34,911 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:34,911 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1137248368] [2025-03-04 16:46:34,911 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1137248368] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:34,911 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:34,911 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-04 16:46:34,911 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [951072261] [2025-03-04 16:46:34,911 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:34,911 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:34,911 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:34,911 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-04 16:46:34,911 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2025-03-04 16:46:34,911 INFO L87 Difference]: Start difference. First operand 445 states and 605 transitions. cyclomatic complexity: 164 Second operand has 8 states, 8 states have (on average 18.375) internal successors, (147), 8 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:35,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:35,570 INFO L93 Difference]: Finished difference Result 451 states and 612 transitions. [2025-03-04 16:46:35,571 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 451 states and 612 transitions. [2025-03-04 16:46:35,572 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 442 [2025-03-04 16:46:35,574 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 451 states to 451 states and 612 transitions. [2025-03-04 16:46:35,574 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 451 [2025-03-04 16:46:35,574 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 451 [2025-03-04 16:46:35,574 INFO L73 IsDeterministic]: Start isDeterministic. Operand 451 states and 612 transitions. [2025-03-04 16:46:35,574 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:35,574 INFO L218 hiAutomatonCegarLoop]: Abstraction has 451 states and 612 transitions. [2025-03-04 16:46:35,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 451 states and 612 transitions. [2025-03-04 16:46:35,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 451 to 448. [2025-03-04 16:46:35,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 448 states, 441 states have (on average 1.3514739229024944) internal successors, (596), 440 states have internal predecessors, (596), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:35,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 448 states to 448 states and 608 transitions. [2025-03-04 16:46:35,579 INFO L240 hiAutomatonCegarLoop]: Abstraction has 448 states and 608 transitions. [2025-03-04 16:46:35,580 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-04 16:46:35,580 INFO L432 stractBuchiCegarLoop]: Abstraction has 448 states and 608 transitions. [2025-03-04 16:46:35,580 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-03-04 16:46:35,580 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 448 states and 608 transitions. [2025-03-04 16:46:35,581 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 439 [2025-03-04 16:46:35,581 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:35,581 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:35,581 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:35,581 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:35,582 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:35,582 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:35,582 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:35,582 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 17 times [2025-03-04 16:46:35,582 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:35,582 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1573190091] [2025-03-04 16:46:35,582 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:46:35,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:35,587 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:35,588 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:35,588 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:35,588 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:35,588 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:35,589 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:35,590 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:35,590 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:35,590 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:35,595 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:35,595 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:35,595 INFO L85 PathProgramCache]: Analyzing trace with hash -2065062083, now seen corresponding path program 1 times [2025-03-04 16:46:35,595 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:35,595 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285939869] [2025-03-04 16:46:35,595 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:35,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:35,634 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 148 statements into 1 equivalence classes. [2025-03-04 16:46:35,980 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 148 of 148 statements. [2025-03-04 16:46:35,980 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:35,980 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:36,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:36,506 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:36,506 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285939869] [2025-03-04 16:46:36,506 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1285939869] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:36,506 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:36,506 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-04 16:46:36,506 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1722569485] [2025-03-04 16:46:36,506 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:36,507 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:36,507 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:36,507 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:46:36,507 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:46:36,507 INFO L87 Difference]: Start difference. First operand 448 states and 608 transitions. cyclomatic complexity: 164 Second operand has 13 states, 13 states have (on average 11.384615384615385) internal successors, (148), 13 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:37,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:37,817 INFO L93 Difference]: Finished difference Result 546 states and 748 transitions. [2025-03-04 16:46:37,817 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 546 states and 748 transitions. [2025-03-04 16:46:37,819 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 537 [2025-03-04 16:46:37,826 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 546 states to 546 states and 748 transitions. [2025-03-04 16:46:37,826 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 546 [2025-03-04 16:46:37,826 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 546 [2025-03-04 16:46:37,826 INFO L73 IsDeterministic]: Start isDeterministic. Operand 546 states and 748 transitions. [2025-03-04 16:46:37,827 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:37,827 INFO L218 hiAutomatonCegarLoop]: Abstraction has 546 states and 748 transitions. [2025-03-04 16:46:37,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states and 748 transitions. [2025-03-04 16:46:37,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 454. [2025-03-04 16:46:37,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 454 states, 447 states have (on average 1.3512304250559284) internal successors, (604), 446 states have internal predecessors, (604), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:37,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 454 states to 454 states and 616 transitions. [2025-03-04 16:46:37,837 INFO L240 hiAutomatonCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:46:37,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-04 16:46:37,837 INFO L432 stractBuchiCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:46:37,837 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-03-04 16:46:37,838 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 454 states and 616 transitions. [2025-03-04 16:46:37,839 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 445 [2025-03-04 16:46:37,839 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:37,839 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:37,839 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:37,839 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:37,840 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:37,842 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:37,843 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:37,843 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 18 times [2025-03-04 16:46:37,843 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:37,843 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1720191383] [2025-03-04 16:46:37,843 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:46:37,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:37,850 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:37,851 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:37,851 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:46:37,851 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:37,851 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:37,853 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:37,853 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:37,853 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:37,853 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:37,862 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:37,863 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:37,863 INFO L85 PathProgramCache]: Analyzing trace with hash 1494827819, now seen corresponding path program 1 times [2025-03-04 16:46:37,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:37,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1926820600] [2025-03-04 16:46:37,863 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:37,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:37,913 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 148 statements into 1 equivalence classes. [2025-03-04 16:46:38,328 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 148 of 148 statements. [2025-03-04 16:46:38,328 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:38,328 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:38,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:38,519 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:38,519 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1926820600] [2025-03-04 16:46:38,519 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1926820600] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:38,519 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:38,519 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:46:38,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1451953831] [2025-03-04 16:46:38,520 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:38,520 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:38,520 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:38,521 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:46:38,521 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:46:38,521 INFO L87 Difference]: Start difference. First operand 454 states and 616 transitions. cyclomatic complexity: 166 Second operand has 7 states, 7 states have (on average 21.142857142857142) internal successors, (148), 7 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:39,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:39,061 INFO L93 Difference]: Finished difference Result 461 states and 625 transitions. [2025-03-04 16:46:39,061 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 461 states and 625 transitions. [2025-03-04 16:46:39,062 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 452 [2025-03-04 16:46:39,063 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 461 states to 461 states and 625 transitions. [2025-03-04 16:46:39,063 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 461 [2025-03-04 16:46:39,064 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 461 [2025-03-04 16:46:39,064 INFO L73 IsDeterministic]: Start isDeterministic. Operand 461 states and 625 transitions. [2025-03-04 16:46:39,064 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:39,064 INFO L218 hiAutomatonCegarLoop]: Abstraction has 461 states and 625 transitions. [2025-03-04 16:46:39,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 461 states and 625 transitions. [2025-03-04 16:46:39,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 461 to 454. [2025-03-04 16:46:39,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 454 states, 447 states have (on average 1.3512304250559284) internal successors, (604), 446 states have internal predecessors, (604), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:39,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 454 states to 454 states and 616 transitions. [2025-03-04 16:46:39,069 INFO L240 hiAutomatonCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:46:39,069 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:46:39,070 INFO L432 stractBuchiCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:46:39,070 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-03-04 16:46:39,070 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 454 states and 616 transitions. [2025-03-04 16:46:39,071 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 445 [2025-03-04 16:46:39,071 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:39,071 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:39,072 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:39,072 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:39,072 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:39,072 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:39,073 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:39,073 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 19 times [2025-03-04 16:46:39,073 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:39,073 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1992441728] [2025-03-04 16:46:39,073 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:46:39,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:39,079 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:39,080 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:39,080 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:39,080 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:39,080 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:39,082 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:39,082 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:39,082 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:39,082 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:39,086 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:39,087 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:39,087 INFO L85 PathProgramCache]: Analyzing trace with hash -831168952, now seen corresponding path program 1 times [2025-03-04 16:46:39,087 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:39,087 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89849941] [2025-03-04 16:46:39,087 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:39,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:39,126 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 149 statements into 1 equivalence classes. [2025-03-04 16:46:39,145 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 149 of 149 statements. [2025-03-04 16:46:39,146 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:39,146 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:39,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:39,407 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:39,407 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [89849941] [2025-03-04 16:46:39,407 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [89849941] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:39,407 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:39,407 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:46:39,407 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932641792] [2025-03-04 16:46:39,407 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:39,407 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:39,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:39,407 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:46:39,407 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:46:39,407 INFO L87 Difference]: Start difference. First operand 454 states and 616 transitions. cyclomatic complexity: 166 Second operand has 9 states, 9 states have (on average 16.555555555555557) internal successors, (149), 9 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:39,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:39,984 INFO L93 Difference]: Finished difference Result 467 states and 632 transitions. [2025-03-04 16:46:39,984 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 467 states and 632 transitions. [2025-03-04 16:46:39,985 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 458 [2025-03-04 16:46:39,986 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 467 states to 467 states and 632 transitions. [2025-03-04 16:46:39,986 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 467 [2025-03-04 16:46:39,987 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 467 [2025-03-04 16:46:39,987 INFO L73 IsDeterministic]: Start isDeterministic. Operand 467 states and 632 transitions. [2025-03-04 16:46:39,987 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:39,987 INFO L218 hiAutomatonCegarLoop]: Abstraction has 467 states and 632 transitions. [2025-03-04 16:46:39,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 467 states and 632 transitions. [2025-03-04 16:46:39,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 467 to 457. [2025-03-04 16:46:39,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 457 states, 450 states have (on average 1.3511111111111112) internal successors, (608), 449 states have internal predecessors, (608), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:39,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 457 states to 457 states and 620 transitions. [2025-03-04 16:46:39,993 INFO L240 hiAutomatonCegarLoop]: Abstraction has 457 states and 620 transitions. [2025-03-04 16:46:39,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-04 16:46:39,993 INFO L432 stractBuchiCegarLoop]: Abstraction has 457 states and 620 transitions. [2025-03-04 16:46:39,993 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-03-04 16:46:39,994 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 457 states and 620 transitions. [2025-03-04 16:46:39,994 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 448 [2025-03-04 16:46:39,995 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:39,995 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:39,995 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:39,995 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:39,995 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:39,996 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:39,996 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:39,996 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 20 times [2025-03-04 16:46:39,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:39,996 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832608662] [2025-03-04 16:46:39,996 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:46:39,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:40,002 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:40,002 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:40,002 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:40,003 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:40,003 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:40,004 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:40,004 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:40,004 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:40,005 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:40,008 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:40,009 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:40,009 INFO L85 PathProgramCache]: Analyzing trace with hash 599591432, now seen corresponding path program 1 times [2025-03-04 16:46:40,009 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:40,009 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1631434102] [2025-03-04 16:46:40,009 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:40,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:40,048 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 149 statements into 1 equivalence classes. [2025-03-04 16:46:40,154 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 149 of 149 statements. [2025-03-04 16:46:40,154 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:40,154 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:40,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:40,475 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:40,475 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1631434102] [2025-03-04 16:46:40,475 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1631434102] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:40,475 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:40,475 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-04 16:46:40,475 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [240335624] [2025-03-04 16:46:40,475 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:40,476 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:40,476 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:40,476 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-04 16:46:40,476 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-04 16:46:40,476 INFO L87 Difference]: Start difference. First operand 457 states and 620 transitions. cyclomatic complexity: 167 Second operand has 6 states, 6 states have (on average 24.833333333333332) internal successors, (149), 6 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:40,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:40,930 INFO L93 Difference]: Finished difference Result 454 states and 616 transitions. [2025-03-04 16:46:40,930 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 454 states and 616 transitions. [2025-03-04 16:46:40,931 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 445 [2025-03-04 16:46:40,933 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 454 states to 454 states and 616 transitions. [2025-03-04 16:46:40,933 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 454 [2025-03-04 16:46:40,933 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 454 [2025-03-04 16:46:40,933 INFO L73 IsDeterministic]: Start isDeterministic. Operand 454 states and 616 transitions. [2025-03-04 16:46:40,933 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:40,933 INFO L218 hiAutomatonCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:46:40,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 454 states and 616 transitions. [2025-03-04 16:46:40,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 454 to 454. [2025-03-04 16:46:40,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 454 states, 447 states have (on average 1.3512304250559284) internal successors, (604), 446 states have internal predecessors, (604), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:40,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 454 states to 454 states and 616 transitions. [2025-03-04 16:46:40,938 INFO L240 hiAutomatonCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:46:40,938 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-04 16:46:40,939 INFO L432 stractBuchiCegarLoop]: Abstraction has 454 states and 616 transitions. [2025-03-04 16:46:40,939 INFO L338 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2025-03-04 16:46:40,939 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 454 states and 616 transitions. [2025-03-04 16:46:40,940 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 445 [2025-03-04 16:46:40,940 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:40,940 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:40,941 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:40,941 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:40,941 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:40,942 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:40,943 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:40,943 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 21 times [2025-03-04 16:46:40,943 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:40,943 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1237896112] [2025-03-04 16:46:40,943 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:46:40,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:40,949 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:40,950 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:40,950 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:46:40,950 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:40,950 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:40,953 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:40,953 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:40,953 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:40,953 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:40,957 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:40,957 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:40,958 INFO L85 PathProgramCache]: Analyzing trace with hash 204534078, now seen corresponding path program 1 times [2025-03-04 16:46:40,958 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:40,958 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2073553314] [2025-03-04 16:46:40,958 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:40,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:40,996 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 149 statements into 1 equivalence classes. [2025-03-04 16:46:41,284 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 149 of 149 statements. [2025-03-04 16:46:41,285 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:41,285 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:41,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:41,738 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:41,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2073553314] [2025-03-04 16:46:41,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2073553314] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:41,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:41,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-03-04 16:46:41,738 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [266819423] [2025-03-04 16:46:41,738 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:41,739 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:41,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:41,739 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-04 16:46:41,739 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2025-03-04 16:46:41,739 INFO L87 Difference]: Start difference. First operand 454 states and 616 transitions. cyclomatic complexity: 166 Second operand has 11 states, 11 states have (on average 13.545454545454545) internal successors, (149), 11 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:42,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:42,810 INFO L93 Difference]: Finished difference Result 526 states and 714 transitions. [2025-03-04 16:46:42,810 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 526 states and 714 transitions. [2025-03-04 16:46:42,812 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 517 [2025-03-04 16:46:42,813 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 526 states to 526 states and 714 transitions. [2025-03-04 16:46:42,813 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 526 [2025-03-04 16:46:42,814 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 526 [2025-03-04 16:46:42,814 INFO L73 IsDeterministic]: Start isDeterministic. Operand 526 states and 714 transitions. [2025-03-04 16:46:42,814 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:42,814 INFO L218 hiAutomatonCegarLoop]: Abstraction has 526 states and 714 transitions. [2025-03-04 16:46:42,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 526 states and 714 transitions. [2025-03-04 16:46:42,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 526 to 457. [2025-03-04 16:46:42,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 457 states, 450 states have (on average 1.3511111111111112) internal successors, (608), 449 states have internal predecessors, (608), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:42,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 457 states to 457 states and 620 transitions. [2025-03-04 16:46:42,820 INFO L240 hiAutomatonCegarLoop]: Abstraction has 457 states and 620 transitions. [2025-03-04 16:46:42,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-04 16:46:42,821 INFO L432 stractBuchiCegarLoop]: Abstraction has 457 states and 620 transitions. [2025-03-04 16:46:42,821 INFO L338 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2025-03-04 16:46:42,821 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 457 states and 620 transitions. [2025-03-04 16:46:42,822 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 448 [2025-03-04 16:46:42,822 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:42,822 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:42,822 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:42,822 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:42,823 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:42,823 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:42,823 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:42,823 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 22 times [2025-03-04 16:46:42,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:42,824 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006050595] [2025-03-04 16:46:42,824 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:46:42,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:42,830 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:46:42,831 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:42,831 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:46:42,831 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:42,831 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:42,833 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:42,833 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:42,833 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:42,833 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:42,837 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:42,838 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:42,838 INFO L85 PathProgramCache]: Analyzing trace with hash 1116963632, now seen corresponding path program 1 times [2025-03-04 16:46:42,838 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:42,838 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1955573899] [2025-03-04 16:46:42,838 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:42,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:42,876 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 149 statements into 1 equivalence classes. [2025-03-04 16:46:43,062 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 149 of 149 statements. [2025-03-04 16:46:43,063 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:43,063 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:43,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:43,685 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:43,685 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1955573899] [2025-03-04 16:46:43,685 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1955573899] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:43,685 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:43,685 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:46:43,686 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1225727726] [2025-03-04 16:46:43,686 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:43,686 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:43,687 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:43,687 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:46:43,687 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:46:43,688 INFO L87 Difference]: Start difference. First operand 457 states and 620 transitions. cyclomatic complexity: 167 Second operand has 9 states, 9 states have (on average 16.555555555555557) internal successors, (149), 9 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:44,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:44,406 INFO L93 Difference]: Finished difference Result 450 states and 609 transitions. [2025-03-04 16:46:44,406 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 450 states and 609 transitions. [2025-03-04 16:46:44,408 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 441 [2025-03-04 16:46:44,409 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 450 states to 450 states and 609 transitions. [2025-03-04 16:46:44,409 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 450 [2025-03-04 16:46:44,409 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 450 [2025-03-04 16:46:44,409 INFO L73 IsDeterministic]: Start isDeterministic. Operand 450 states and 609 transitions. [2025-03-04 16:46:44,410 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:44,410 INFO L218 hiAutomatonCegarLoop]: Abstraction has 450 states and 609 transitions. [2025-03-04 16:46:44,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 450 states and 609 transitions. [2025-03-04 16:46:44,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 450 to 445. [2025-03-04 16:46:44,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 438 states have (on average 1.3493150684931507) internal successors, (591), 437 states have internal predecessors, (591), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:44,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 603 transitions. [2025-03-04 16:46:44,416 INFO L240 hiAutomatonCegarLoop]: Abstraction has 445 states and 603 transitions. [2025-03-04 16:46:44,420 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-04 16:46:44,420 INFO L432 stractBuchiCegarLoop]: Abstraction has 445 states and 603 transitions. [2025-03-04 16:46:44,420 INFO L338 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2025-03-04 16:46:44,421 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 603 transitions. [2025-03-04 16:46:44,422 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:46:44,422 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:44,422 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:44,423 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:44,423 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:44,423 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:44,424 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:44,424 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:44,425 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 23 times [2025-03-04 16:46:44,425 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:44,425 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725091583] [2025-03-04 16:46:44,425 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:46:44,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:44,435 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:44,436 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:44,437 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:44,437 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:44,437 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:44,439 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:44,441 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:44,441 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:44,441 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:44,447 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:44,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:44,448 INFO L85 PathProgramCache]: Analyzing trace with hash 1355361655, now seen corresponding path program 1 times [2025-03-04 16:46:44,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:44,448 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457155637] [2025-03-04 16:46:44,448 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:44,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:44,488 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 149 statements into 1 equivalence classes. [2025-03-04 16:46:44,553 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 149 of 149 statements. [2025-03-04 16:46:44,553 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:44,553 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:44,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:44,766 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:44,766 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1457155637] [2025-03-04 16:46:44,766 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1457155637] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:44,766 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:44,766 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:46:44,766 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1767316095] [2025-03-04 16:46:44,766 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:44,766 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:44,766 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:44,767 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:46:44,767 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:46:44,767 INFO L87 Difference]: Start difference. First operand 445 states and 603 transitions. cyclomatic complexity: 162 Second operand has 9 states, 9 states have (on average 16.555555555555557) internal successors, (149), 9 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:45,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:45,394 INFO L93 Difference]: Finished difference Result 465 states and 629 transitions. [2025-03-04 16:46:45,395 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 465 states and 629 transitions. [2025-03-04 16:46:45,396 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 456 [2025-03-04 16:46:45,397 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 465 states to 465 states and 629 transitions. [2025-03-04 16:46:45,397 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 465 [2025-03-04 16:46:45,397 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 465 [2025-03-04 16:46:45,397 INFO L73 IsDeterministic]: Start isDeterministic. Operand 465 states and 629 transitions. [2025-03-04 16:46:45,402 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:45,402 INFO L218 hiAutomatonCegarLoop]: Abstraction has 465 states and 629 transitions. [2025-03-04 16:46:45,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 465 states and 629 transitions. [2025-03-04 16:46:45,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 465 to 445. [2025-03-04 16:46:45,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 438 states have (on average 1.3493150684931507) internal successors, (591), 437 states have internal predecessors, (591), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:45,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 603 transitions. [2025-03-04 16:46:45,406 INFO L240 hiAutomatonCegarLoop]: Abstraction has 445 states and 603 transitions. [2025-03-04 16:46:45,406 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:46:45,406 INFO L432 stractBuchiCegarLoop]: Abstraction has 445 states and 603 transitions. [2025-03-04 16:46:45,406 INFO L338 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2025-03-04 16:46:45,406 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 603 transitions. [2025-03-04 16:46:45,407 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 436 [2025-03-04 16:46:45,407 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:45,407 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:45,408 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:45,408 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:45,408 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:45,408 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:45,408 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:45,409 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 24 times [2025-03-04 16:46:45,409 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:45,409 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698891611] [2025-03-04 16:46:45,409 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:46:45,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:45,415 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:45,416 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:45,417 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:46:45,417 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:45,417 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:45,418 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:45,419 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:45,419 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:45,419 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:45,423 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:45,423 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:45,424 INFO L85 PathProgramCache]: Analyzing trace with hash 898226646, now seen corresponding path program 1 times [2025-03-04 16:46:45,424 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:45,424 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [859122528] [2025-03-04 16:46:45,424 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:45,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:45,459 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-04 16:46:45,745 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-04 16:46:45,746 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:45,746 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:46,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:46,236 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:46,237 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [859122528] [2025-03-04 16:46:46,237 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [859122528] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:46,237 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:46,237 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:46:46,237 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [392905083] [2025-03-04 16:46:46,237 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:46,237 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:46,237 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:46,237 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:46:46,237 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:46:46,238 INFO L87 Difference]: Start difference. First operand 445 states and 603 transitions. cyclomatic complexity: 162 Second operand has 9 states, 9 states have (on average 16.666666666666668) internal successors, (150), 9 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:47,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:47,033 INFO L93 Difference]: Finished difference Result 459 states and 619 transitions. [2025-03-04 16:46:47,033 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 459 states and 619 transitions. [2025-03-04 16:46:47,034 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 450 [2025-03-04 16:46:47,035 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 459 states to 459 states and 619 transitions. [2025-03-04 16:46:47,035 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 459 [2025-03-04 16:46:47,036 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 459 [2025-03-04 16:46:47,036 INFO L73 IsDeterministic]: Start isDeterministic. Operand 459 states and 619 transitions. [2025-03-04 16:46:47,036 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:47,036 INFO L218 hiAutomatonCegarLoop]: Abstraction has 459 states and 619 transitions. [2025-03-04 16:46:47,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 459 states and 619 transitions. [2025-03-04 16:46:47,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 459 to 451. [2025-03-04 16:46:47,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 451 states, 444 states have (on average 1.3468468468468469) internal successors, (598), 443 states have internal predecessors, (598), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:47,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 451 states to 451 states and 610 transitions. [2025-03-04 16:46:47,041 INFO L240 hiAutomatonCegarLoop]: Abstraction has 451 states and 610 transitions. [2025-03-04 16:46:47,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:46:47,042 INFO L432 stractBuchiCegarLoop]: Abstraction has 451 states and 610 transitions. [2025-03-04 16:46:47,042 INFO L338 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2025-03-04 16:46:47,042 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 451 states and 610 transitions. [2025-03-04 16:46:47,043 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 442 [2025-03-04 16:46:47,043 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:47,043 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:47,043 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:47,044 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:47,044 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:47,044 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:47,044 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:47,044 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 25 times [2025-03-04 16:46:47,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:47,045 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865329891] [2025-03-04 16:46:47,045 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:46:47,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:47,050 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:47,050 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:47,051 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:47,051 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:47,051 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:47,052 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:47,052 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:47,052 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:47,052 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:47,057 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:47,057 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:47,057 INFO L85 PathProgramCache]: Analyzing trace with hash -1136512444, now seen corresponding path program 1 times [2025-03-04 16:46:47,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:47,057 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [628440221] [2025-03-04 16:46:47,057 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:47,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:47,093 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-04 16:46:47,172 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-04 16:46:47,172 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:47,172 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:47,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:47,419 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:47,419 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [628440221] [2025-03-04 16:46:47,421 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [628440221] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:47,421 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:47,421 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:46:47,421 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1009230005] [2025-03-04 16:46:47,421 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:47,421 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:47,421 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:47,421 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:46:47,422 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:46:47,422 INFO L87 Difference]: Start difference. First operand 451 states and 610 transitions. cyclomatic complexity: 163 Second operand has 10 states, 10 states have (on average 15.0) internal successors, (150), 10 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:48,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:48,090 INFO L93 Difference]: Finished difference Result 472 states and 639 transitions. [2025-03-04 16:46:48,090 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 472 states and 639 transitions. [2025-03-04 16:46:48,091 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 463 [2025-03-04 16:46:48,092 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 472 states to 472 states and 639 transitions. [2025-03-04 16:46:48,092 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 472 [2025-03-04 16:46:48,092 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 472 [2025-03-04 16:46:48,092 INFO L73 IsDeterministic]: Start isDeterministic. Operand 472 states and 639 transitions. [2025-03-04 16:46:48,093 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:48,093 INFO L218 hiAutomatonCegarLoop]: Abstraction has 472 states and 639 transitions. [2025-03-04 16:46:48,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 472 states and 639 transitions. [2025-03-04 16:46:48,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 472 to 464. [2025-03-04 16:46:48,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 464 states, 457 states have (on average 1.3457330415754925) internal successors, (615), 456 states have internal predecessors, (615), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:48,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 464 states to 464 states and 627 transitions. [2025-03-04 16:46:48,097 INFO L240 hiAutomatonCegarLoop]: Abstraction has 464 states and 627 transitions. [2025-03-04 16:46:48,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:46:48,097 INFO L432 stractBuchiCegarLoop]: Abstraction has 464 states and 627 transitions. [2025-03-04 16:46:48,097 INFO L338 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2025-03-04 16:46:48,098 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 464 states and 627 transitions. [2025-03-04 16:46:48,099 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 455 [2025-03-04 16:46:48,099 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:48,099 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:48,099 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:48,099 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:48,100 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:48,100 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:48,101 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:48,101 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 26 times [2025-03-04 16:46:48,101 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:48,101 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [109062917] [2025-03-04 16:46:48,101 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:46:48,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:48,107 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:48,107 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:48,107 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:48,107 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:48,107 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:48,109 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:48,109 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:48,109 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:48,109 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:48,114 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:48,114 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:48,115 INFO L85 PathProgramCache]: Analyzing trace with hash 2092049448, now seen corresponding path program 1 times [2025-03-04 16:46:48,115 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:48,115 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229706812] [2025-03-04 16:46:48,115 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:48,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:48,149 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-04 16:46:48,302 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-04 16:46:48,303 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:48,303 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:48,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:48,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:48,481 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1229706812] [2025-03-04 16:46:48,481 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1229706812] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:48,481 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:48,481 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:46:48,481 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1814813897] [2025-03-04 16:46:48,481 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:48,481 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:48,481 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:48,482 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:46:48,482 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:46:48,482 INFO L87 Difference]: Start difference. First operand 464 states and 627 transitions. cyclomatic complexity: 167 Second operand has 7 states, 7 states have (on average 21.428571428571427) internal successors, (150), 7 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:48,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:48,969 INFO L93 Difference]: Finished difference Result 469 states and 633 transitions. [2025-03-04 16:46:48,969 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 469 states and 633 transitions. [2025-03-04 16:46:48,970 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 460 [2025-03-04 16:46:48,972 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 469 states to 469 states and 633 transitions. [2025-03-04 16:46:48,972 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 469 [2025-03-04 16:46:48,972 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 469 [2025-03-04 16:46:48,972 INFO L73 IsDeterministic]: Start isDeterministic. Operand 469 states and 633 transitions. [2025-03-04 16:46:48,972 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:48,972 INFO L218 hiAutomatonCegarLoop]: Abstraction has 469 states and 633 transitions. [2025-03-04 16:46:48,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 469 states and 633 transitions. [2025-03-04 16:46:48,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 469 to 468. [2025-03-04 16:46:48,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 468 states, 461 states have (on average 1.3449023861171367) internal successors, (620), 460 states have internal predecessors, (620), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:48,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 468 states to 468 states and 632 transitions. [2025-03-04 16:46:48,977 INFO L240 hiAutomatonCegarLoop]: Abstraction has 468 states and 632 transitions. [2025-03-04 16:46:48,978 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:46:48,979 INFO L432 stractBuchiCegarLoop]: Abstraction has 468 states and 632 transitions. [2025-03-04 16:46:48,979 INFO L338 stractBuchiCegarLoop]: ======== Iteration 27 ============ [2025-03-04 16:46:48,979 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 468 states and 632 transitions. [2025-03-04 16:46:48,980 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 459 [2025-03-04 16:46:48,980 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:48,980 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:48,981 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:48,981 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:48,981 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:48,981 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:48,982 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:48,982 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 27 times [2025-03-04 16:46:48,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:48,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97309956] [2025-03-04 16:46:48,982 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:46:48,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:48,989 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:48,990 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:48,990 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:46:48,990 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:48,990 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:48,991 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:48,991 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:48,992 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:48,992 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:48,997 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:48,998 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:48,998 INFO L85 PathProgramCache]: Analyzing trace with hash -199484525, now seen corresponding path program 1 times [2025-03-04 16:46:48,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:48,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1385486340] [2025-03-04 16:46:48,999 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:48,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:49,037 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-04 16:46:49,061 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-04 16:46:49,061 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:49,061 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:49,402 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:49,402 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:49,402 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1385486340] [2025-03-04 16:46:49,402 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1385486340] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:49,402 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:49,402 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:46:49,402 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1423955618] [2025-03-04 16:46:49,402 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:49,402 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:49,402 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:49,402 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:46:49,402 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:46:49,402 INFO L87 Difference]: Start difference. First operand 468 states and 632 transitions. cyclomatic complexity: 168 Second operand has 10 states, 10 states have (on average 15.0) internal successors, (150), 10 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:50,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:50,106 INFO L93 Difference]: Finished difference Result 478 states and 645 transitions. [2025-03-04 16:46:50,106 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 478 states and 645 transitions. [2025-03-04 16:46:50,107 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 469 [2025-03-04 16:46:50,109 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 478 states to 478 states and 645 transitions. [2025-03-04 16:46:50,109 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 478 [2025-03-04 16:46:50,109 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 478 [2025-03-04 16:46:50,109 INFO L73 IsDeterministic]: Start isDeterministic. Operand 478 states and 645 transitions. [2025-03-04 16:46:50,109 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:50,109 INFO L218 hiAutomatonCegarLoop]: Abstraction has 478 states and 645 transitions. [2025-03-04 16:46:50,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 478 states and 645 transitions. [2025-03-04 16:46:50,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 478 to 465. [2025-03-04 16:46:50,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 465 states, 458 states have (on average 1.3427947598253276) internal successors, (615), 457 states have internal predecessors, (615), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:50,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 465 states to 465 states and 627 transitions. [2025-03-04 16:46:50,114 INFO L240 hiAutomatonCegarLoop]: Abstraction has 465 states and 627 transitions. [2025-03-04 16:46:50,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:46:50,116 INFO L432 stractBuchiCegarLoop]: Abstraction has 465 states and 627 transitions. [2025-03-04 16:46:50,116 INFO L338 stractBuchiCegarLoop]: ======== Iteration 28 ============ [2025-03-04 16:46:50,116 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 465 states and 627 transitions. [2025-03-04 16:46:50,116 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 456 [2025-03-04 16:46:50,117 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:50,117 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:50,117 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:50,117 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:50,117 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:50,118 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:50,118 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:50,118 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 28 times [2025-03-04 16:46:50,118 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:50,118 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1174387280] [2025-03-04 16:46:50,118 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:46:50,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:50,124 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:46:50,125 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:50,125 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:46:50,125 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:50,125 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:50,126 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:50,126 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:50,127 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:50,127 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:50,131 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:50,131 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:50,131 INFO L85 PathProgramCache]: Analyzing trace with hash 81446116, now seen corresponding path program 1 times [2025-03-04 16:46:50,131 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:50,131 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852713522] [2025-03-04 16:46:50,131 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:50,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:50,166 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 150 statements into 1 equivalence classes. [2025-03-04 16:46:50,306 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 150 of 150 statements. [2025-03-04 16:46:50,307 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:50,307 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:50,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:50,568 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:50,568 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852713522] [2025-03-04 16:46:50,568 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1852713522] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:50,569 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:50,569 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:46:50,569 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019728635] [2025-03-04 16:46:50,569 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:50,569 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:50,569 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:50,569 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:46:50,569 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:46:50,569 INFO L87 Difference]: Start difference. First operand 465 states and 627 transitions. cyclomatic complexity: 166 Second operand has 7 states, 7 states have (on average 21.428571428571427) internal successors, (150), 7 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:51,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:51,018 INFO L93 Difference]: Finished difference Result 472 states and 633 transitions. [2025-03-04 16:46:51,018 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 472 states and 633 transitions. [2025-03-04 16:46:51,019 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 463 [2025-03-04 16:46:51,020 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 472 states to 472 states and 633 transitions. [2025-03-04 16:46:51,020 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 472 [2025-03-04 16:46:51,021 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 472 [2025-03-04 16:46:51,021 INFO L73 IsDeterministic]: Start isDeterministic. Operand 472 states and 633 transitions. [2025-03-04 16:46:51,021 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:51,021 INFO L218 hiAutomatonCegarLoop]: Abstraction has 472 states and 633 transitions. [2025-03-04 16:46:51,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 472 states and 633 transitions. [2025-03-04 16:46:51,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 472 to 465. [2025-03-04 16:46:51,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 465 states, 458 states have (on average 1.3406113537117903) internal successors, (614), 457 states have internal predecessors, (614), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:51,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 465 states to 465 states and 626 transitions. [2025-03-04 16:46:51,025 INFO L240 hiAutomatonCegarLoop]: Abstraction has 465 states and 626 transitions. [2025-03-04 16:46:51,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:46:51,025 INFO L432 stractBuchiCegarLoop]: Abstraction has 465 states and 626 transitions. [2025-03-04 16:46:51,025 INFO L338 stractBuchiCegarLoop]: ======== Iteration 29 ============ [2025-03-04 16:46:51,026 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 465 states and 626 transitions. [2025-03-04 16:46:51,026 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 456 [2025-03-04 16:46:51,026 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:51,026 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:51,027 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:51,027 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:51,027 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:51,027 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise42#1 := main_~_hj_i~0#1;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:51,028 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:51,028 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 29 times [2025-03-04 16:46:51,028 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:51,028 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1166692167] [2025-03-04 16:46:51,028 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:46:51,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:51,034 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:51,034 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:51,034 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:51,034 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:51,034 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:51,036 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:51,037 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:51,037 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:51,037 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:51,041 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:51,042 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:51,042 INFO L85 PathProgramCache]: Analyzing trace with hash 2059665136, now seen corresponding path program 1 times [2025-03-04 16:46:51,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:51,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1292452767] [2025-03-04 16:46:51,043 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:51,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:51,077 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 151 statements into 1 equivalence classes. [2025-03-04 16:46:51,162 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 151 of 151 statements. [2025-03-04 16:46:51,162 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:51,162 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:51,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:51,429 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:51,429 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1292452767] [2025-03-04 16:46:51,429 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1292452767] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:51,429 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:51,429 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-03-04 16:46:51,429 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1470430270] [2025-03-04 16:46:51,429 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:51,430 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:51,430 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:51,430 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-04 16:46:51,431 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2025-03-04 16:46:51,431 INFO L87 Difference]: Start difference. First operand 465 states and 626 transitions. cyclomatic complexity: 165 Second operand has 11 states, 11 states have (on average 13.727272727272727) internal successors, (151), 11 states have internal predecessors, (151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:52,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:52,104 INFO L93 Difference]: Finished difference Result 481 states and 646 transitions. [2025-03-04 16:46:52,104 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 481 states and 646 transitions. [2025-03-04 16:46:52,105 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 472 [2025-03-04 16:46:52,106 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 481 states to 481 states and 646 transitions. [2025-03-04 16:46:52,106 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 481 [2025-03-04 16:46:52,106 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 481 [2025-03-04 16:46:52,106 INFO L73 IsDeterministic]: Start isDeterministic. Operand 481 states and 646 transitions. [2025-03-04 16:46:52,107 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:52,107 INFO L218 hiAutomatonCegarLoop]: Abstraction has 481 states and 646 transitions. [2025-03-04 16:46:52,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 481 states and 646 transitions. [2025-03-04 16:46:52,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 481 to 468. [2025-03-04 16:46:52,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 468 states, 461 states have (on average 1.3383947939262473) internal successors, (617), 460 states have internal predecessors, (617), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:52,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 468 states to 468 states and 629 transitions. [2025-03-04 16:46:52,111 INFO L240 hiAutomatonCegarLoop]: Abstraction has 468 states and 629 transitions. [2025-03-04 16:46:52,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:46:52,112 INFO L432 stractBuchiCegarLoop]: Abstraction has 468 states and 629 transitions. [2025-03-04 16:46:52,112 INFO L338 stractBuchiCegarLoop]: ======== Iteration 30 ============ [2025-03-04 16:46:52,112 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 468 states and 629 transitions. [2025-03-04 16:46:52,113 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 459 [2025-03-04 16:46:52,113 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:52,113 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:52,114 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:52,115 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:52,116 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:52,116 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise39#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:52,117 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:52,117 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 30 times [2025-03-04 16:46:52,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:52,117 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1955629199] [2025-03-04 16:46:52,117 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:46:52,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:52,125 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:52,126 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:52,126 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:46:52,126 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:52,126 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:52,128 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:52,128 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:52,129 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:52,129 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:52,133 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:52,133 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:52,133 INFO L85 PathProgramCache]: Analyzing trace with hash -717608569, now seen corresponding path program 1 times [2025-03-04 16:46:52,133 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:52,134 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1080800447] [2025-03-04 16:46:52,134 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:52,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:52,171 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 151 statements into 1 equivalence classes. [2025-03-04 16:46:52,462 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 151 of 151 statements. [2025-03-04 16:46:52,462 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:52,462 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:52,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:52,799 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:52,799 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1080800447] [2025-03-04 16:46:52,799 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1080800447] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:52,799 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:52,799 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:46:52,799 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [545427038] [2025-03-04 16:46:52,799 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:52,800 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:52,800 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:52,800 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:46:52,800 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:46:52,800 INFO L87 Difference]: Start difference. First operand 468 states and 629 transitions. cyclomatic complexity: 165 Second operand has 10 states, 10 states have (on average 15.1) internal successors, (151), 10 states have internal predecessors, (151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:53,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:53,539 INFO L93 Difference]: Finished difference Result 480 states and 646 transitions. [2025-03-04 16:46:53,539 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 480 states and 646 transitions. [2025-03-04 16:46:53,541 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 471 [2025-03-04 16:46:53,542 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 480 states to 480 states and 646 transitions. [2025-03-04 16:46:53,542 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 480 [2025-03-04 16:46:53,543 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 480 [2025-03-04 16:46:53,543 INFO L73 IsDeterministic]: Start isDeterministic. Operand 480 states and 646 transitions. [2025-03-04 16:46:53,543 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:53,543 INFO L218 hiAutomatonCegarLoop]: Abstraction has 480 states and 646 transitions. [2025-03-04 16:46:53,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 480 states and 646 transitions. [2025-03-04 16:46:53,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 480 to 472. [2025-03-04 16:46:53,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 472 states, 465 states have (on average 1.3376344086021505) internal successors, (622), 464 states have internal predecessors, (622), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:53,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 472 states to 472 states and 634 transitions. [2025-03-04 16:46:53,548 INFO L240 hiAutomatonCegarLoop]: Abstraction has 472 states and 634 transitions. [2025-03-04 16:46:53,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:46:53,548 INFO L432 stractBuchiCegarLoop]: Abstraction has 472 states and 634 transitions. [2025-03-04 16:46:53,548 INFO L338 stractBuchiCegarLoop]: ======== Iteration 31 ============ [2025-03-04 16:46:53,548 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 472 states and 634 transitions. [2025-03-04 16:46:53,549 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 463 [2025-03-04 16:46:53,549 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:53,549 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:53,550 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:53,550 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:53,550 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:53,551 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:53,551 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:53,551 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 31 times [2025-03-04 16:46:53,551 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:53,551 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1423795359] [2025-03-04 16:46:53,551 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:46:53,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:53,560 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:53,561 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:53,561 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:53,561 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:53,561 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:53,563 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:53,563 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:53,563 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:53,563 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:53,568 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:53,569 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:53,569 INFO L85 PathProgramCache]: Analyzing trace with hash -1048300636, now seen corresponding path program 1 times [2025-03-04 16:46:53,569 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:53,569 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1562185774] [2025-03-04 16:46:53,569 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:53,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:53,619 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 151 statements into 1 equivalence classes. [2025-03-04 16:46:53,975 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 151 of 151 statements. [2025-03-04 16:46:53,975 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:53,975 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:54,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:54,453 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:54,453 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1562185774] [2025-03-04 16:46:54,453 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1562185774] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:54,453 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:54,453 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-04 16:46:54,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1394525945] [2025-03-04 16:46:54,453 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:54,453 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:54,453 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:54,454 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:46:54,454 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:46:54,454 INFO L87 Difference]: Start difference. First operand 472 states and 634 transitions. cyclomatic complexity: 166 Second operand has 13 states, 13 states have (on average 11.615384615384615) internal successors, (151), 13 states have internal predecessors, (151), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:55,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:55,544 INFO L93 Difference]: Finished difference Result 543 states and 734 transitions. [2025-03-04 16:46:55,544 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 543 states and 734 transitions. [2025-03-04 16:46:55,545 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 534 [2025-03-04 16:46:55,547 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 543 states to 543 states and 734 transitions. [2025-03-04 16:46:55,547 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 543 [2025-03-04 16:46:55,547 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 543 [2025-03-04 16:46:55,547 INFO L73 IsDeterministic]: Start isDeterministic. Operand 543 states and 734 transitions. [2025-03-04 16:46:55,547 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:55,547 INFO L218 hiAutomatonCegarLoop]: Abstraction has 543 states and 734 transitions. [2025-03-04 16:46:55,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states and 734 transitions. [2025-03-04 16:46:55,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 478. [2025-03-04 16:46:55,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 478 states, 471 states have (on average 1.3375796178343948) internal successors, (630), 470 states have internal predecessors, (630), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:55,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 478 states to 478 states and 642 transitions. [2025-03-04 16:46:55,551 INFO L240 hiAutomatonCegarLoop]: Abstraction has 478 states and 642 transitions. [2025-03-04 16:46:55,555 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-04 16:46:55,556 INFO L432 stractBuchiCegarLoop]: Abstraction has 478 states and 642 transitions. [2025-03-04 16:46:55,556 INFO L338 stractBuchiCegarLoop]: ======== Iteration 32 ============ [2025-03-04 16:46:55,556 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 478 states and 642 transitions. [2025-03-04 16:46:55,556 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 469 [2025-03-04 16:46:55,557 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:55,557 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:55,557 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:55,557 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:55,557 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:55,559 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise192#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:55,559 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:55,559 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 32 times [2025-03-04 16:46:55,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:55,560 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1189594699] [2025-03-04 16:46:55,560 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:46:55,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:55,566 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:55,566 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:55,566 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:55,567 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:55,567 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:55,568 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:55,568 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:55,568 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:55,568 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:55,573 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:55,573 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:55,574 INFO L85 PathProgramCache]: Analyzing trace with hash -1638870503, now seen corresponding path program 1 times [2025-03-04 16:46:55,574 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:55,574 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1596258785] [2025-03-04 16:46:55,574 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:55,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:55,611 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 152 statements into 1 equivalence classes. [2025-03-04 16:46:55,857 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 152 of 152 statements. [2025-03-04 16:46:55,858 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:55,858 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:56,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:56,251 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:56,251 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1596258785] [2025-03-04 16:46:56,252 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1596258785] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:56,252 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:56,252 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-04 16:46:56,252 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1049108032] [2025-03-04 16:46:56,252 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:56,252 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:56,252 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:56,252 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:46:56,252 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:46:56,253 INFO L87 Difference]: Start difference. First operand 478 states and 642 transitions. cyclomatic complexity: 168 Second operand has 13 states, 13 states have (on average 11.692307692307692) internal successors, (152), 13 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:56,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:56,957 INFO L93 Difference]: Finished difference Result 545 states and 736 transitions. [2025-03-04 16:46:56,957 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 545 states and 736 transitions. [2025-03-04 16:46:56,958 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 536 [2025-03-04 16:46:56,959 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 545 states to 545 states and 736 transitions. [2025-03-04 16:46:56,959 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 545 [2025-03-04 16:46:56,960 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 545 [2025-03-04 16:46:56,960 INFO L73 IsDeterministic]: Start isDeterministic. Operand 545 states and 736 transitions. [2025-03-04 16:46:56,960 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:56,960 INFO L218 hiAutomatonCegarLoop]: Abstraction has 545 states and 736 transitions. [2025-03-04 16:46:56,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states and 736 transitions. [2025-03-04 16:46:56,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 479. [2025-03-04 16:46:56,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 479 states, 472 states have (on average 1.3389830508474576) internal successors, (632), 471 states have internal predecessors, (632), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:56,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 479 states to 479 states and 644 transitions. [2025-03-04 16:46:56,964 INFO L240 hiAutomatonCegarLoop]: Abstraction has 479 states and 644 transitions. [2025-03-04 16:46:56,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-04 16:46:56,964 INFO L432 stractBuchiCegarLoop]: Abstraction has 479 states and 644 transitions. [2025-03-04 16:46:56,964 INFO L338 stractBuchiCegarLoop]: ======== Iteration 33 ============ [2025-03-04 16:46:56,964 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 479 states and 644 transitions. [2025-03-04 16:46:56,965 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 470 [2025-03-04 16:46:56,965 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:56,965 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:56,965 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:56,965 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:56,966 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:56,966 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:56,966 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:56,966 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 33 times [2025-03-04 16:46:56,966 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:56,966 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644131745] [2025-03-04 16:46:56,967 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:46:56,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:56,973 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:56,973 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:56,973 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:46:56,973 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:56,973 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:56,975 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:56,975 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:56,975 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:56,975 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:56,979 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:56,980 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:56,980 INFO L85 PathProgramCache]: Analyzing trace with hash -1771429140, now seen corresponding path program 1 times [2025-03-04 16:46:56,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:56,980 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1395967409] [2025-03-04 16:46:56,980 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:56,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:57,016 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 152 statements into 1 equivalence classes. [2025-03-04 16:46:57,034 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 152 of 152 statements. [2025-03-04 16:46:57,034 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:57,034 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:57,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:57,265 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:57,265 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1395967409] [2025-03-04 16:46:57,265 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1395967409] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:57,265 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:57,266 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:46:57,266 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2087075647] [2025-03-04 16:46:57,266 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:57,266 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:57,266 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:57,266 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:46:57,266 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:46:57,266 INFO L87 Difference]: Start difference. First operand 479 states and 644 transitions. cyclomatic complexity: 169 Second operand has 9 states, 9 states have (on average 16.88888888888889) internal successors, (152), 9 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:57,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:57,538 INFO L93 Difference]: Finished difference Result 489 states and 656 transitions. [2025-03-04 16:46:57,538 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 489 states and 656 transitions. [2025-03-04 16:46:57,539 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 480 [2025-03-04 16:46:57,540 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 489 states to 489 states and 656 transitions. [2025-03-04 16:46:57,540 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 489 [2025-03-04 16:46:57,540 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 489 [2025-03-04 16:46:57,540 INFO L73 IsDeterministic]: Start isDeterministic. Operand 489 states and 656 transitions. [2025-03-04 16:46:57,541 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:57,541 INFO L218 hiAutomatonCegarLoop]: Abstraction has 489 states and 656 transitions. [2025-03-04 16:46:57,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 489 states and 656 transitions. [2025-03-04 16:46:57,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 489 to 482. [2025-03-04 16:46:57,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 482 states, 475 states have (on average 1.3389473684210527) internal successors, (636), 474 states have internal predecessors, (636), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:57,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 482 states to 482 states and 648 transitions. [2025-03-04 16:46:57,544 INFO L240 hiAutomatonCegarLoop]: Abstraction has 482 states and 648 transitions. [2025-03-04 16:46:57,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-04 16:46:57,544 INFO L432 stractBuchiCegarLoop]: Abstraction has 482 states and 648 transitions. [2025-03-04 16:46:57,544 INFO L338 stractBuchiCegarLoop]: ======== Iteration 34 ============ [2025-03-04 16:46:57,544 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 482 states and 648 transitions. [2025-03-04 16:46:57,545 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 473 [2025-03-04 16:46:57,545 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:57,545 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:57,546 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:57,546 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:57,546 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:57,546 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:57,547 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:57,547 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 34 times [2025-03-04 16:46:57,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:57,547 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469700965] [2025-03-04 16:46:57,547 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:46:57,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:57,554 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:46:57,554 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:57,554 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:46:57,554 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:57,554 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:57,556 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:57,556 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:57,556 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:57,556 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:57,562 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:57,562 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:57,563 INFO L85 PathProgramCache]: Analyzing trace with hash 2137352512, now seen corresponding path program 1 times [2025-03-04 16:46:57,563 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:57,563 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1378615536] [2025-03-04 16:46:57,563 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:57,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:57,600 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 152 statements into 1 equivalence classes. [2025-03-04 16:46:57,781 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 152 of 152 statements. [2025-03-04 16:46:57,782 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:57,782 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:58,240 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:58,240 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:58,241 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1378615536] [2025-03-04 16:46:58,241 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1378615536] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:58,241 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:58,241 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-03-04 16:46:58,241 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [870780223] [2025-03-04 16:46:58,241 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:58,241 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:58,241 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:58,241 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-04 16:46:58,242 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2025-03-04 16:46:58,242 INFO L87 Difference]: Start difference. First operand 482 states and 648 transitions. cyclomatic complexity: 170 Second operand has 11 states, 11 states have (on average 13.818181818181818) internal successors, (152), 11 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:46:58,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:46:58,958 INFO L93 Difference]: Finished difference Result 507 states and 684 transitions. [2025-03-04 16:46:58,958 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 507 states and 684 transitions. [2025-03-04 16:46:58,960 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 498 [2025-03-04 16:46:58,961 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 507 states to 507 states and 684 transitions. [2025-03-04 16:46:58,961 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 507 [2025-03-04 16:46:58,961 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 507 [2025-03-04 16:46:58,961 INFO L73 IsDeterministic]: Start isDeterministic. Operand 507 states and 684 transitions. [2025-03-04 16:46:58,962 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:46:58,962 INFO L218 hiAutomatonCegarLoop]: Abstraction has 507 states and 684 transitions. [2025-03-04 16:46:58,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 507 states and 684 transitions. [2025-03-04 16:46:58,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 507 to 485. [2025-03-04 16:46:58,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 485 states, 478 states have (on average 1.3389121338912133) internal successors, (640), 477 states have internal predecessors, (640), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:46:58,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 485 states to 485 states and 652 transitions. [2025-03-04 16:46:58,967 INFO L240 hiAutomatonCegarLoop]: Abstraction has 485 states and 652 transitions. [2025-03-04 16:46:58,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-04 16:46:58,968 INFO L432 stractBuchiCegarLoop]: Abstraction has 485 states and 652 transitions. [2025-03-04 16:46:58,968 INFO L338 stractBuchiCegarLoop]: ======== Iteration 35 ============ [2025-03-04 16:46:58,968 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 485 states and 652 transitions. [2025-03-04 16:46:58,969 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 476 [2025-03-04 16:46:58,969 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:46:58,969 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:46:58,970 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:46:58,970 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:46:58,970 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:46:58,971 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:46:58,971 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:58,971 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 35 times [2025-03-04 16:46:58,971 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:58,972 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1782673572] [2025-03-04 16:46:58,972 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:46:58,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:58,982 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:58,983 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:58,983 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:46:58,983 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:58,983 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:46:58,985 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:46:58,985 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:46:58,985 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:58,985 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:46:58,991 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:46:58,992 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:46:58,992 INFO L85 PathProgramCache]: Analyzing trace with hash 42114354, now seen corresponding path program 1 times [2025-03-04 16:46:58,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:46:58,992 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1975630653] [2025-03-04 16:46:58,992 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:46:58,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:46:59,039 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 152 statements into 1 equivalence classes. [2025-03-04 16:46:59,288 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 152 of 152 statements. [2025-03-04 16:46:59,288 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:46:59,288 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:46:59,771 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:46:59,771 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:46:59,771 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1975630653] [2025-03-04 16:46:59,771 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1975630653] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:46:59,771 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:46:59,771 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:46:59,771 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1415628437] [2025-03-04 16:46:59,771 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:46:59,771 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:46:59,771 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:46:59,772 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:46:59,772 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:46:59,772 INFO L87 Difference]: Start difference. First operand 485 states and 652 transitions. cyclomatic complexity: 171 Second operand has 9 states, 9 states have (on average 16.88888888888889) internal successors, (152), 9 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:00,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:00,064 INFO L93 Difference]: Finished difference Result 477 states and 640 transitions. [2025-03-04 16:47:00,064 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 477 states and 640 transitions. [2025-03-04 16:47:00,065 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 468 [2025-03-04 16:47:00,066 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 477 states to 477 states and 640 transitions. [2025-03-04 16:47:00,066 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 477 [2025-03-04 16:47:00,066 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 477 [2025-03-04 16:47:00,066 INFO L73 IsDeterministic]: Start isDeterministic. Operand 477 states and 640 transitions. [2025-03-04 16:47:00,067 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:00,067 INFO L218 hiAutomatonCegarLoop]: Abstraction has 477 states and 640 transitions. [2025-03-04 16:47:00,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 477 states and 640 transitions. [2025-03-04 16:47:00,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 477 to 475. [2025-03-04 16:47:00,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 475 states, 468 states have (on average 1.3354700854700854) internal successors, (625), 467 states have internal predecessors, (625), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:00,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 475 states to 475 states and 637 transitions. [2025-03-04 16:47:00,070 INFO L240 hiAutomatonCegarLoop]: Abstraction has 475 states and 637 transitions. [2025-03-04 16:47:00,070 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-04 16:47:00,070 INFO L432 stractBuchiCegarLoop]: Abstraction has 475 states and 637 transitions. [2025-03-04 16:47:00,070 INFO L338 stractBuchiCegarLoop]: ======== Iteration 36 ============ [2025-03-04 16:47:00,070 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 475 states and 637 transitions. [2025-03-04 16:47:00,071 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 466 [2025-03-04 16:47:00,071 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:00,071 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:00,071 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:00,072 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:00,072 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:00,072 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:00,072 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:00,072 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 36 times [2025-03-04 16:47:00,072 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:00,072 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1542837359] [2025-03-04 16:47:00,072 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:47:00,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:00,079 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:00,079 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:00,079 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:47:00,079 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:00,079 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:00,080 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:00,080 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:00,081 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:00,081 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:00,084 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:00,084 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:00,085 INFO L85 PathProgramCache]: Analyzing trace with hash -1923346184, now seen corresponding path program 1 times [2025-03-04 16:47:00,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:00,085 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773000218] [2025-03-04 16:47:00,085 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:00,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:00,118 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 152 statements into 1 equivalence classes. [2025-03-04 16:47:00,223 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 152 of 152 statements. [2025-03-04 16:47:00,223 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:00,223 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:00,452 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:00,452 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:00,452 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773000218] [2025-03-04 16:47:00,452 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [773000218] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:00,453 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:00,453 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:47:00,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [383627891] [2025-03-04 16:47:00,453 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:00,453 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:00,453 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:00,453 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:47:00,453 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:47:00,453 INFO L87 Difference]: Start difference. First operand 475 states and 637 transitions. cyclomatic complexity: 166 Second operand has 9 states, 9 states have (on average 16.88888888888889) internal successors, (152), 9 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:00,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:00,891 INFO L93 Difference]: Finished difference Result 485 states and 649 transitions. [2025-03-04 16:47:00,892 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 485 states and 649 transitions. [2025-03-04 16:47:00,892 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 476 [2025-03-04 16:47:00,894 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 485 states to 485 states and 649 transitions. [2025-03-04 16:47:00,894 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 485 [2025-03-04 16:47:00,894 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 485 [2025-03-04 16:47:00,894 INFO L73 IsDeterministic]: Start isDeterministic. Operand 485 states and 649 transitions. [2025-03-04 16:47:00,894 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:00,894 INFO L218 hiAutomatonCegarLoop]: Abstraction has 485 states and 649 transitions. [2025-03-04 16:47:00,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 485 states and 649 transitions. [2025-03-04 16:47:00,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 485 to 475. [2025-03-04 16:47:00,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 475 states, 468 states have (on average 1.3354700854700854) internal successors, (625), 467 states have internal predecessors, (625), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:00,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 475 states to 475 states and 637 transitions. [2025-03-04 16:47:00,897 INFO L240 hiAutomatonCegarLoop]: Abstraction has 475 states and 637 transitions. [2025-03-04 16:47:00,898 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:47:00,898 INFO L432 stractBuchiCegarLoop]: Abstraction has 475 states and 637 transitions. [2025-03-04 16:47:00,898 INFO L338 stractBuchiCegarLoop]: ======== Iteration 37 ============ [2025-03-04 16:47:00,898 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 475 states and 637 transitions. [2025-03-04 16:47:00,898 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 466 [2025-03-04 16:47:00,898 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:00,898 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:00,899 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:00,899 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:00,899 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:00,899 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:00,899 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:00,900 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 37 times [2025-03-04 16:47:00,900 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:00,900 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071456666] [2025-03-04 16:47:00,900 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:47:00,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:00,906 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:00,906 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:00,906 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:00,906 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:00,906 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:00,907 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:00,908 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:00,908 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:00,908 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:00,912 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:00,912 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:00,912 INFO L85 PathProgramCache]: Analyzing trace with hash -2064273695, now seen corresponding path program 1 times [2025-03-04 16:47:00,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:00,912 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1215281223] [2025-03-04 16:47:00,912 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:00,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:00,944 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:47:01,247 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:47:01,248 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:01,248 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:01,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:01,730 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:01,730 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1215281223] [2025-03-04 16:47:01,731 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1215281223] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:01,731 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:01,731 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-04 16:47:01,731 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766137984] [2025-03-04 16:47:01,731 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:01,731 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:01,731 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:01,731 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:47:01,731 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:47:01,731 INFO L87 Difference]: Start difference. First operand 475 states and 637 transitions. cyclomatic complexity: 166 Second operand has 13 states, 13 states have (on average 11.76923076923077) internal successors, (153), 13 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:02,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:02,243 INFO L93 Difference]: Finished difference Result 504 states and 679 transitions. [2025-03-04 16:47:02,244 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 504 states and 679 transitions. [2025-03-04 16:47:02,245 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 495 [2025-03-04 16:47:02,246 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 504 states to 504 states and 679 transitions. [2025-03-04 16:47:02,246 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 504 [2025-03-04 16:47:02,246 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 504 [2025-03-04 16:47:02,246 INFO L73 IsDeterministic]: Start isDeterministic. Operand 504 states and 679 transitions. [2025-03-04 16:47:02,247 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:02,247 INFO L218 hiAutomatonCegarLoop]: Abstraction has 504 states and 679 transitions. [2025-03-04 16:47:02,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 504 states and 679 transitions. [2025-03-04 16:47:02,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 504 to 483. [2025-03-04 16:47:02,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 483 states, 476 states have (on average 1.3361344537815125) internal successors, (636), 475 states have internal predecessors, (636), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:02,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 483 states to 483 states and 648 transitions. [2025-03-04 16:47:02,250 INFO L240 hiAutomatonCegarLoop]: Abstraction has 483 states and 648 transitions. [2025-03-04 16:47:02,251 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-04 16:47:02,251 INFO L432 stractBuchiCegarLoop]: Abstraction has 483 states and 648 transitions. [2025-03-04 16:47:02,251 INFO L338 stractBuchiCegarLoop]: ======== Iteration 38 ============ [2025-03-04 16:47:02,251 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 483 states and 648 transitions. [2025-03-04 16:47:02,252 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 474 [2025-03-04 16:47:02,252 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:02,252 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:02,252 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:02,252 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:02,252 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:02,256 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:02,257 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:02,257 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 38 times [2025-03-04 16:47:02,257 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:02,257 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [174961869] [2025-03-04 16:47:02,257 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:47:02,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:02,264 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:02,264 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:02,264 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:47:02,265 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:02,265 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:02,266 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:02,266 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:02,266 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:02,266 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:02,271 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:02,271 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:02,271 INFO L85 PathProgramCache]: Analyzing trace with hash 1489808029, now seen corresponding path program 1 times [2025-03-04 16:47:02,271 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:02,272 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345746621] [2025-03-04 16:47:02,272 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:02,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:02,309 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:47:02,539 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:47:02,539 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:02,539 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:03,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:03,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:03,032 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1345746621] [2025-03-04 16:47:03,032 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1345746621] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:03,032 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:03,032 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:47:03,032 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [477683269] [2025-03-04 16:47:03,032 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:03,032 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:03,032 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:03,033 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:47:03,033 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:47:03,033 INFO L87 Difference]: Start difference. First operand 483 states and 648 transitions. cyclomatic complexity: 169 Second operand has 9 states, 9 states have (on average 17.0) internal successors, (153), 9 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:03,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:03,633 INFO L93 Difference]: Finished difference Result 490 states and 655 transitions. [2025-03-04 16:47:03,633 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 490 states and 655 transitions. [2025-03-04 16:47:03,634 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 481 [2025-03-04 16:47:03,636 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 490 states to 490 states and 655 transitions. [2025-03-04 16:47:03,636 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 490 [2025-03-04 16:47:03,636 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 490 [2025-03-04 16:47:03,636 INFO L73 IsDeterministic]: Start isDeterministic. Operand 490 states and 655 transitions. [2025-03-04 16:47:03,636 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:03,637 INFO L218 hiAutomatonCegarLoop]: Abstraction has 490 states and 655 transitions. [2025-03-04 16:47:03,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 490 states and 655 transitions. [2025-03-04 16:47:03,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 490 to 486. [2025-03-04 16:47:03,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 486 states, 479 states have (on average 1.3340292275574113) internal successors, (639), 478 states have internal predecessors, (639), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:03,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 486 states to 486 states and 651 transitions. [2025-03-04 16:47:03,642 INFO L240 hiAutomatonCegarLoop]: Abstraction has 486 states and 651 transitions. [2025-03-04 16:47:03,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:47:03,643 INFO L432 stractBuchiCegarLoop]: Abstraction has 486 states and 651 transitions. [2025-03-04 16:47:03,643 INFO L338 stractBuchiCegarLoop]: ======== Iteration 39 ============ [2025-03-04 16:47:03,643 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 486 states and 651 transitions. [2025-03-04 16:47:03,644 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 477 [2025-03-04 16:47:03,644 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:03,644 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:03,644 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:03,644 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:03,645 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:03,645 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:03,646 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:03,646 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 39 times [2025-03-04 16:47:03,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:03,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853022470] [2025-03-04 16:47:03,646 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:47:03,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:03,656 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:03,657 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:03,657 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:47:03,657 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:03,657 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:03,659 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:03,659 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:03,660 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:03,660 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:03,666 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:03,667 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:03,667 INFO L85 PathProgramCache]: Analyzing trace with hash 1195205368, now seen corresponding path program 1 times [2025-03-04 16:47:03,667 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:03,667 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1580933317] [2025-03-04 16:47:03,667 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:03,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:03,721 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:47:03,758 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:47:03,758 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:03,758 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:04,038 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:04,038 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:04,038 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1580933317] [2025-03-04 16:47:04,038 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1580933317] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:04,038 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:04,038 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:47:04,039 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1957038410] [2025-03-04 16:47:04,039 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:04,039 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:04,039 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:04,039 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:47:04,039 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:47:04,039 INFO L87 Difference]: Start difference. First operand 486 states and 651 transitions. cyclomatic complexity: 169 Second operand has 10 states, 10 states have (on average 15.3) internal successors, (153), 10 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:04,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:04,425 INFO L93 Difference]: Finished difference Result 502 states and 672 transitions. [2025-03-04 16:47:04,425 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 502 states and 672 transitions. [2025-03-04 16:47:04,426 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 493 [2025-03-04 16:47:04,428 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 502 states to 502 states and 672 transitions. [2025-03-04 16:47:04,428 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 502 [2025-03-04 16:47:04,428 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 502 [2025-03-04 16:47:04,428 INFO L73 IsDeterministic]: Start isDeterministic. Operand 502 states and 672 transitions. [2025-03-04 16:47:04,428 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:04,428 INFO L218 hiAutomatonCegarLoop]: Abstraction has 502 states and 672 transitions. [2025-03-04 16:47:04,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 502 states and 672 transitions. [2025-03-04 16:47:04,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 502 to 496. [2025-03-04 16:47:04,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 496 states, 489 states have (on average 1.3312883435582823) internal successors, (651), 488 states have internal predecessors, (651), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:04,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 663 transitions. [2025-03-04 16:47:04,433 INFO L240 hiAutomatonCegarLoop]: Abstraction has 496 states and 663 transitions. [2025-03-04 16:47:04,433 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:47:04,433 INFO L432 stractBuchiCegarLoop]: Abstraction has 496 states and 663 transitions. [2025-03-04 16:47:04,433 INFO L338 stractBuchiCegarLoop]: ======== Iteration 40 ============ [2025-03-04 16:47:04,433 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 496 states and 663 transitions. [2025-03-04 16:47:04,434 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 487 [2025-03-04 16:47:04,434 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:04,434 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:04,434 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:04,435 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:04,435 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:04,436 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:04,436 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:04,436 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 40 times [2025-03-04 16:47:04,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:04,436 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202060266] [2025-03-04 16:47:04,436 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:47:04,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:04,444 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:47:04,444 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:04,444 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:47:04,444 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:04,444 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:04,446 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:04,446 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:04,446 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:04,446 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:04,451 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:04,452 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:04,452 INFO L85 PathProgramCache]: Analyzing trace with hash -1258037442, now seen corresponding path program 1 times [2025-03-04 16:47:04,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:04,452 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1659375552] [2025-03-04 16:47:04,452 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:04,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:04,488 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:47:04,572 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:47:04,572 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:04,572 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:04,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:04,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:04,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1659375552] [2025-03-04 16:47:04,805 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1659375552] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:04,805 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:04,805 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:47:04,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037559130] [2025-03-04 16:47:04,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:04,805 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:04,805 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:04,806 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:47:04,806 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:47:04,806 INFO L87 Difference]: Start difference. First operand 496 states and 663 transitions. cyclomatic complexity: 171 Second operand has 10 states, 10 states have (on average 15.3) internal successors, (153), 10 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:05,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:05,257 INFO L93 Difference]: Finished difference Result 509 states and 681 transitions. [2025-03-04 16:47:05,257 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 509 states and 681 transitions. [2025-03-04 16:47:05,258 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 500 [2025-03-04 16:47:05,259 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 509 states to 509 states and 681 transitions. [2025-03-04 16:47:05,259 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 509 [2025-03-04 16:47:05,260 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 509 [2025-03-04 16:47:05,260 INFO L73 IsDeterministic]: Start isDeterministic. Operand 509 states and 681 transitions. [2025-03-04 16:47:05,260 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:05,260 INFO L218 hiAutomatonCegarLoop]: Abstraction has 509 states and 681 transitions. [2025-03-04 16:47:05,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 509 states and 681 transitions. [2025-03-04 16:47:05,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 509 to 496. [2025-03-04 16:47:05,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 496 states, 489 states have (on average 1.3312883435582823) internal successors, (651), 488 states have internal predecessors, (651), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:05,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 663 transitions. [2025-03-04 16:47:05,264 INFO L240 hiAutomatonCegarLoop]: Abstraction has 496 states and 663 transitions. [2025-03-04 16:47:05,264 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:47:05,264 INFO L432 stractBuchiCegarLoop]: Abstraction has 496 states and 663 transitions. [2025-03-04 16:47:05,264 INFO L338 stractBuchiCegarLoop]: ======== Iteration 41 ============ [2025-03-04 16:47:05,264 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 496 states and 663 transitions. [2025-03-04 16:47:05,265 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 487 [2025-03-04 16:47:05,265 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:05,265 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:05,266 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:05,266 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:05,266 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:05,266 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:05,266 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:05,266 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 41 times [2025-03-04 16:47:05,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:05,266 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1009535943] [2025-03-04 16:47:05,266 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:47:05,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:05,273 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:05,274 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:05,274 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:47:05,274 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:05,274 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:05,275 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:05,276 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:05,276 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:05,276 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:05,280 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:05,280 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:05,280 INFO L85 PathProgramCache]: Analyzing trace with hash -1231853300, now seen corresponding path program 1 times [2025-03-04 16:47:05,280 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:05,280 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803852781] [2025-03-04 16:47:05,280 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:05,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:05,314 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:47:05,588 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:47:05,589 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:05,589 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:05,826 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:05,826 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:05,826 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [803852781] [2025-03-04 16:47:05,826 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [803852781] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:05,826 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:05,826 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:47:05,826 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [614973772] [2025-03-04 16:47:05,826 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:05,826 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:05,827 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:05,827 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:47:05,827 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:47:05,827 INFO L87 Difference]: Start difference. First operand 496 states and 663 transitions. cyclomatic complexity: 171 Second operand has 7 states, 7 states have (on average 21.857142857142858) internal successors, (153), 7 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:06,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:06,099 INFO L93 Difference]: Finished difference Result 501 states and 667 transitions. [2025-03-04 16:47:06,099 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 501 states and 667 transitions. [2025-03-04 16:47:06,100 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 492 [2025-03-04 16:47:06,101 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 501 states to 501 states and 667 transitions. [2025-03-04 16:47:06,101 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 501 [2025-03-04 16:47:06,102 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 501 [2025-03-04 16:47:06,102 INFO L73 IsDeterministic]: Start isDeterministic. Operand 501 states and 667 transitions. [2025-03-04 16:47:06,102 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:06,102 INFO L218 hiAutomatonCegarLoop]: Abstraction has 501 states and 667 transitions. [2025-03-04 16:47:06,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 501 states and 667 transitions. [2025-03-04 16:47:06,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 501 to 496. [2025-03-04 16:47:06,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 496 states, 489 states have (on average 1.329243353783231) internal successors, (650), 488 states have internal predecessors, (650), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:06,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 662 transitions. [2025-03-04 16:47:06,105 INFO L240 hiAutomatonCegarLoop]: Abstraction has 496 states and 662 transitions. [2025-03-04 16:47:06,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:47:06,106 INFO L432 stractBuchiCegarLoop]: Abstraction has 496 states and 662 transitions. [2025-03-04 16:47:06,106 INFO L338 stractBuchiCegarLoop]: ======== Iteration 42 ============ [2025-03-04 16:47:06,106 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 496 states and 662 transitions. [2025-03-04 16:47:06,107 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 487 [2025-03-04 16:47:06,107 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:06,107 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:06,107 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:06,107 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:06,107 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:06,108 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := 0;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:06,108 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:06,108 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 42 times [2025-03-04 16:47:06,108 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:06,108 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [181611729] [2025-03-04 16:47:06,108 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:47:06,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:06,115 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:06,116 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:06,116 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:47:06,116 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:06,116 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:06,117 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:06,117 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:06,118 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:06,118 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:06,122 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:06,122 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:06,122 INFO L85 PathProgramCache]: Analyzing trace with hash 50795810, now seen corresponding path program 1 times [2025-03-04 16:47:06,122 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:06,123 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [975443448] [2025-03-04 16:47:06,123 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:06,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:06,159 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 153 statements into 1 equivalence classes. [2025-03-04 16:47:06,338 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 153 of 153 statements. [2025-03-04 16:47:06,338 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:06,338 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:06,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:06,547 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:06,547 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [975443448] [2025-03-04 16:47:06,548 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [975443448] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:06,548 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:06,548 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-04 16:47:06,548 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490817772] [2025-03-04 16:47:06,548 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:06,548 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:06,548 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:06,548 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-04 16:47:06,548 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-04 16:47:06,548 INFO L87 Difference]: Start difference. First operand 496 states and 662 transitions. cyclomatic complexity: 170 Second operand has 7 states, 7 states have (on average 21.857142857142858) internal successors, (153), 7 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:06,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:06,840 INFO L93 Difference]: Finished difference Result 499 states and 665 transitions. [2025-03-04 16:47:06,840 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 499 states and 665 transitions. [2025-03-04 16:47:06,841 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 490 [2025-03-04 16:47:06,842 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 499 states to 499 states and 665 transitions. [2025-03-04 16:47:06,842 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 499 [2025-03-04 16:47:06,842 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 499 [2025-03-04 16:47:06,842 INFO L73 IsDeterministic]: Start isDeterministic. Operand 499 states and 665 transitions. [2025-03-04 16:47:06,843 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:06,843 INFO L218 hiAutomatonCegarLoop]: Abstraction has 499 states and 665 transitions. [2025-03-04 16:47:06,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states and 665 transitions. [2025-03-04 16:47:06,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 499. [2025-03-04 16:47:06,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 499 states, 492 states have (on average 1.3272357723577235) internal successors, (653), 491 states have internal predecessors, (653), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:06,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 665 transitions. [2025-03-04 16:47:06,846 INFO L240 hiAutomatonCegarLoop]: Abstraction has 499 states and 665 transitions. [2025-03-04 16:47:06,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-04 16:47:06,847 INFO L432 stractBuchiCegarLoop]: Abstraction has 499 states and 665 transitions. [2025-03-04 16:47:06,847 INFO L338 stractBuchiCegarLoop]: ======== Iteration 43 ============ [2025-03-04 16:47:06,847 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 499 states and 665 transitions. [2025-03-04 16:47:06,848 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 490 [2025-03-04 16:47:06,848 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:06,848 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:06,848 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:06,848 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:06,848 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:06,849 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise192#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:06,849 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:06,849 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 43 times [2025-03-04 16:47:06,849 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:06,849 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763472592] [2025-03-04 16:47:06,849 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:47:06,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:06,857 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:06,857 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:06,857 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:06,857 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:06,857 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:06,858 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:06,859 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:06,859 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:06,859 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:06,863 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:06,864 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:06,864 INFO L85 PathProgramCache]: Analyzing trace with hash -773052335, now seen corresponding path program 1 times [2025-03-04 16:47:06,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:06,864 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1319825228] [2025-03-04 16:47:06,864 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:06,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:06,898 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:47:07,070 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:47:07,070 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:07,070 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:07,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:07,359 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:07,359 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1319825228] [2025-03-04 16:47:07,359 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1319825228] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:07,359 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:07,359 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-03-04 16:47:07,359 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1840610298] [2025-03-04 16:47:07,359 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:07,360 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:07,360 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:07,360 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-04 16:47:07,360 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2025-03-04 16:47:07,360 INFO L87 Difference]: Start difference. First operand 499 states and 665 transitions. cyclomatic complexity: 170 Second operand has 11 states, 11 states have (on average 14.0) internal successors, (154), 11 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:07,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:07,839 INFO L93 Difference]: Finished difference Result 514 states and 684 transitions. [2025-03-04 16:47:07,839 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 514 states and 684 transitions. [2025-03-04 16:47:07,840 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 505 [2025-03-04 16:47:07,841 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 514 states to 514 states and 684 transitions. [2025-03-04 16:47:07,841 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 514 [2025-03-04 16:47:07,841 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 514 [2025-03-04 16:47:07,841 INFO L73 IsDeterministic]: Start isDeterministic. Operand 514 states and 684 transitions. [2025-03-04 16:47:07,842 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:07,842 INFO L218 hiAutomatonCegarLoop]: Abstraction has 514 states and 684 transitions. [2025-03-04 16:47:07,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 514 states and 684 transitions. [2025-03-04 16:47:07,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 514 to 502. [2025-03-04 16:47:07,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 502 states, 495 states have (on average 1.3252525252525253) internal successors, (656), 494 states have internal predecessors, (656), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:07,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 502 states to 502 states and 668 transitions. [2025-03-04 16:47:07,845 INFO L240 hiAutomatonCegarLoop]: Abstraction has 502 states and 668 transitions. [2025-03-04 16:47:07,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:47:07,846 INFO L432 stractBuchiCegarLoop]: Abstraction has 502 states and 668 transitions. [2025-03-04 16:47:07,846 INFO L338 stractBuchiCegarLoop]: ======== Iteration 44 ============ [2025-03-04 16:47:07,846 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 502 states and 668 transitions. [2025-03-04 16:47:07,847 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 493 [2025-03-04 16:47:07,847 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:07,847 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:07,847 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:07,847 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:07,847 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:07,847 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise188#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise190#1;assume main_#t~bitwise190#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:07,848 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:07,848 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 44 times [2025-03-04 16:47:07,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:07,848 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1291717981] [2025-03-04 16:47:07,848 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:47:07,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:07,855 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:07,856 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:07,856 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:47:07,856 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:07,856 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:07,857 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:07,857 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:07,857 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:07,857 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:07,862 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:07,863 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:07,863 INFO L85 PathProgramCache]: Analyzing trace with hash 1845190494, now seen corresponding path program 1 times [2025-03-04 16:47:07,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:07,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787966172] [2025-03-04 16:47:07,863 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:07,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:07,897 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:47:08,193 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:47:08,193 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:08,193 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:08,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:08,533 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:08,533 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787966172] [2025-03-04 16:47:08,533 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [787966172] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:08,533 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:08,533 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:47:08,533 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1248962484] [2025-03-04 16:47:08,533 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:08,533 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:08,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:08,533 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:47:08,533 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:47:08,533 INFO L87 Difference]: Start difference. First operand 502 states and 668 transitions. cyclomatic complexity: 170 Second operand has 10 states, 10 states have (on average 15.4) internal successors, (154), 10 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:09,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:09,242 INFO L93 Difference]: Finished difference Result 514 states and 685 transitions. [2025-03-04 16:47:09,243 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 514 states and 685 transitions. [2025-03-04 16:47:09,244 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 505 [2025-03-04 16:47:09,245 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 514 states to 514 states and 685 transitions. [2025-03-04 16:47:09,245 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 514 [2025-03-04 16:47:09,245 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 514 [2025-03-04 16:47:09,245 INFO L73 IsDeterministic]: Start isDeterministic. Operand 514 states and 685 transitions. [2025-03-04 16:47:09,245 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:09,245 INFO L218 hiAutomatonCegarLoop]: Abstraction has 514 states and 685 transitions. [2025-03-04 16:47:09,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 514 states and 685 transitions. [2025-03-04 16:47:09,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 514 to 506. [2025-03-04 16:47:09,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 506 states, 499 states have (on average 1.3246492985971945) internal successors, (661), 498 states have internal predecessors, (661), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:09,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 673 transitions. [2025-03-04 16:47:09,249 INFO L240 hiAutomatonCegarLoop]: Abstraction has 506 states and 673 transitions. [2025-03-04 16:47:09,249 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:47:09,249 INFO L432 stractBuchiCegarLoop]: Abstraction has 506 states and 673 transitions. [2025-03-04 16:47:09,249 INFO L338 stractBuchiCegarLoop]: ======== Iteration 45 ============ [2025-03-04 16:47:09,252 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 506 states and 673 transitions. [2025-03-04 16:47:09,253 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 497 [2025-03-04 16:47:09,253 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:09,253 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:09,253 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:09,253 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:09,253 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:09,254 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise192#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:09,254 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:09,254 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 45 times [2025-03-04 16:47:09,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:09,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780473384] [2025-03-04 16:47:09,254 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:47:09,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:09,263 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:09,263 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:09,263 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:47:09,263 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:09,263 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:09,265 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:09,265 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:09,265 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:09,265 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:09,270 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:09,271 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:09,271 INFO L85 PathProgramCache]: Analyzing trace with hash 1225703036, now seen corresponding path program 1 times [2025-03-04 16:47:09,271 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:09,271 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [836836875] [2025-03-04 16:47:09,271 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:09,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:09,309 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:47:09,677 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:47:09,678 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:09,678 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:10,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:10,201 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:10,201 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [836836875] [2025-03-04 16:47:10,201 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [836836875] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:10,202 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:10,202 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-04 16:47:10,202 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1049726462] [2025-03-04 16:47:10,202 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:10,202 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:10,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:10,202 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-04 16:47:10,202 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-03-04 16:47:10,202 INFO L87 Difference]: Start difference. First operand 506 states and 673 transitions. cyclomatic complexity: 171 Second operand has 13 states, 13 states have (on average 11.846153846153847) internal successors, (154), 13 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:10,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:10,639 INFO L93 Difference]: Finished difference Result 516 states and 686 transitions. [2025-03-04 16:47:10,639 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 516 states and 686 transitions. [2025-03-04 16:47:10,640 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 507 [2025-03-04 16:47:10,641 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 516 states to 516 states and 686 transitions. [2025-03-04 16:47:10,641 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 516 [2025-03-04 16:47:10,642 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 516 [2025-03-04 16:47:10,642 INFO L73 IsDeterministic]: Start isDeterministic. Operand 516 states and 686 transitions. [2025-03-04 16:47:10,642 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:10,642 INFO L218 hiAutomatonCegarLoop]: Abstraction has 516 states and 686 transitions. [2025-03-04 16:47:10,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 516 states and 686 transitions. [2025-03-04 16:47:10,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 516 to 511. [2025-03-04 16:47:10,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 511 states, 504 states have (on average 1.3253968253968254) internal successors, (668), 503 states have internal predecessors, (668), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:10,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 511 states to 511 states and 680 transitions. [2025-03-04 16:47:10,646 INFO L240 hiAutomatonCegarLoop]: Abstraction has 511 states and 680 transitions. [2025-03-04 16:47:10,646 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-04 16:47:10,646 INFO L432 stractBuchiCegarLoop]: Abstraction has 511 states and 680 transitions. [2025-03-04 16:47:10,646 INFO L338 stractBuchiCegarLoop]: ======== Iteration 46 ============ [2025-03-04 16:47:10,647 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 511 states and 680 transitions. [2025-03-04 16:47:10,647 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 502 [2025-03-04 16:47:10,647 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:10,647 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:10,648 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:10,648 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:10,648 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:10,648 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:10,649 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:10,649 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 46 times [2025-03-04 16:47:10,649 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:10,649 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923872888] [2025-03-04 16:47:10,649 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:47:10,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:10,657 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:47:10,657 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:10,658 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:47:10,658 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:10,658 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:10,659 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:10,660 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:10,660 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:10,660 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:10,665 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:10,665 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:10,665 INFO L85 PathProgramCache]: Analyzing trace with hash 321058143, now seen corresponding path program 1 times [2025-03-04 16:47:10,665 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:10,665 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209138891] [2025-03-04 16:47:10,665 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:10,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:10,702 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:47:10,833 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:47:10,833 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:10,833 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:11,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:11,021 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:11,021 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209138891] [2025-03-04 16:47:11,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1209138891] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:11,021 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:11,021 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:47:11,021 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1310452514] [2025-03-04 16:47:11,021 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:11,021 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:11,021 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:11,021 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:47:11,021 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:47:11,021 INFO L87 Difference]: Start difference. First operand 511 states and 680 transitions. cyclomatic complexity: 173 Second operand has 9 states, 9 states have (on average 17.11111111111111) internal successors, (154), 9 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:11,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:11,698 INFO L93 Difference]: Finished difference Result 525 states and 698 transitions. [2025-03-04 16:47:11,698 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 525 states and 698 transitions. [2025-03-04 16:47:11,700 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 516 [2025-03-04 16:47:11,701 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 525 states to 525 states and 698 transitions. [2025-03-04 16:47:11,701 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 525 [2025-03-04 16:47:11,701 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 525 [2025-03-04 16:47:11,701 INFO L73 IsDeterministic]: Start isDeterministic. Operand 525 states and 698 transitions. [2025-03-04 16:47:11,701 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:11,701 INFO L218 hiAutomatonCegarLoop]: Abstraction has 525 states and 698 transitions. [2025-03-04 16:47:11,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 525 states and 698 transitions. [2025-03-04 16:47:11,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 525 to 514. [2025-03-04 16:47:11,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 514 states, 507 states have (on average 1.3254437869822486) internal successors, (672), 506 states have internal predecessors, (672), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:11,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 514 states to 514 states and 684 transitions. [2025-03-04 16:47:11,705 INFO L240 hiAutomatonCegarLoop]: Abstraction has 514 states and 684 transitions. [2025-03-04 16:47:11,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:47:11,706 INFO L432 stractBuchiCegarLoop]: Abstraction has 514 states and 684 transitions. [2025-03-04 16:47:11,706 INFO L338 stractBuchiCegarLoop]: ======== Iteration 47 ============ [2025-03-04 16:47:11,706 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 514 states and 684 transitions. [2025-03-04 16:47:11,707 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 505 [2025-03-04 16:47:11,707 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:11,707 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:11,707 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:11,707 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:11,708 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:11,708 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise191#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:11,708 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:11,708 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 47 times [2025-03-04 16:47:11,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:11,708 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1402578102] [2025-03-04 16:47:11,708 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-04 16:47:11,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:11,717 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:11,717 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:11,717 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:47:11,717 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:11,717 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:11,719 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:11,719 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:11,719 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:11,719 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:11,724 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:11,725 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:11,725 INFO L85 PathProgramCache]: Analyzing trace with hash 706958755, now seen corresponding path program 1 times [2025-03-04 16:47:11,725 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:11,725 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [817376246] [2025-03-04 16:47:11,725 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:11,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:11,765 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:47:12,134 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:47:12,135 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:12,135 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:12,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:12,351 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:12,351 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [817376246] [2025-03-04 16:47:12,351 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [817376246] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:12,351 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:12,351 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-04 16:47:12,351 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1641291116] [2025-03-04 16:47:12,351 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:12,351 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:12,351 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:12,351 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-04 16:47:12,352 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2025-03-04 16:47:12,352 INFO L87 Difference]: Start difference. First operand 514 states and 684 transitions. cyclomatic complexity: 174 Second operand has 8 states, 8 states have (on average 19.25) internal successors, (154), 8 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:24,468 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-03-04 16:47:24,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:24,564 INFO L93 Difference]: Finished difference Result 586 states and 784 transitions. [2025-03-04 16:47:24,564 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 586 states and 784 transitions. [2025-03-04 16:47:24,566 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 577 [2025-03-04 16:47:24,567 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 586 states to 586 states and 784 transitions. [2025-03-04 16:47:24,567 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 586 [2025-03-04 16:47:24,567 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 586 [2025-03-04 16:47:24,567 INFO L73 IsDeterministic]: Start isDeterministic. Operand 586 states and 784 transitions. [2025-03-04 16:47:24,568 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:24,568 INFO L218 hiAutomatonCegarLoop]: Abstraction has 586 states and 784 transitions. [2025-03-04 16:47:24,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 586 states and 784 transitions. [2025-03-04 16:47:24,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 586 to 518. [2025-03-04 16:47:24,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 518 states, 511 states have (on average 1.3268101761252447) internal successors, (678), 510 states have internal predecessors, (678), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:24,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 518 states to 518 states and 690 transitions. [2025-03-04 16:47:24,572 INFO L240 hiAutomatonCegarLoop]: Abstraction has 518 states and 690 transitions. [2025-03-04 16:47:24,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-04 16:47:24,572 INFO L432 stractBuchiCegarLoop]: Abstraction has 518 states and 690 transitions. [2025-03-04 16:47:24,572 INFO L338 stractBuchiCegarLoop]: ======== Iteration 48 ============ [2025-03-04 16:47:24,573 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 518 states and 690 transitions. [2025-03-04 16:47:24,573 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 509 [2025-03-04 16:47:24,573 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:24,573 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:24,574 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:24,574 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:24,574 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:24,574 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise40#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise190#1;assume main_#t~bitwise190#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:24,575 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:24,575 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 48 times [2025-03-04 16:47:24,575 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:24,575 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881952956] [2025-03-04 16:47:24,575 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-04 16:47:24,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:24,584 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:24,584 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:24,584 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-04 16:47:24,584 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:24,584 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:24,586 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:24,587 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:24,587 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:24,587 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:24,592 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:24,593 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:24,593 INFO L85 PathProgramCache]: Analyzing trace with hash -1190892584, now seen corresponding path program 1 times [2025-03-04 16:47:24,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:24,593 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386342445] [2025-03-04 16:47:24,593 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:24,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:24,633 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:47:24,788 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:47:24,789 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:24,789 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:25,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:25,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:25,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [386342445] [2025-03-04 16:47:25,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [386342445] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:25,228 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:25,228 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:47:25,229 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1134273126] [2025-03-04 16:47:25,229 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:25,229 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:25,229 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:25,230 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:47:25,230 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:47:25,230 INFO L87 Difference]: Start difference. First operand 518 states and 690 transitions. cyclomatic complexity: 176 Second operand has 10 states, 10 states have (on average 15.4) internal successors, (154), 10 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:32,246 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 6.39s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-03-04 16:47:32,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:32,773 INFO L93 Difference]: Finished difference Result 531 states and 706 transitions. [2025-03-04 16:47:32,774 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 531 states and 706 transitions. [2025-03-04 16:47:32,775 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 522 [2025-03-04 16:47:32,776 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 531 states to 531 states and 706 transitions. [2025-03-04 16:47:32,776 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 531 [2025-03-04 16:47:32,776 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 531 [2025-03-04 16:47:32,776 INFO L73 IsDeterministic]: Start isDeterministic. Operand 531 states and 706 transitions. [2025-03-04 16:47:32,776 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:32,776 INFO L218 hiAutomatonCegarLoop]: Abstraction has 531 states and 706 transitions. [2025-03-04 16:47:32,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 531 states and 706 transitions. [2025-03-04 16:47:32,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 531 to 519. [2025-03-04 16:47:32,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 519 states, 512 states have (on average 1.326171875) internal successors, (679), 511 states have internal predecessors, (679), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:32,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 519 states to 519 states and 691 transitions. [2025-03-04 16:47:32,780 INFO L240 hiAutomatonCegarLoop]: Abstraction has 519 states and 691 transitions. [2025-03-04 16:47:32,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:47:32,781 INFO L432 stractBuchiCegarLoop]: Abstraction has 519 states and 691 transitions. [2025-03-04 16:47:32,781 INFO L338 stractBuchiCegarLoop]: ======== Iteration 49 ============ [2025-03-04 16:47:32,781 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 519 states and 691 transitions. [2025-03-04 16:47:32,782 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 510 [2025-03-04 16:47:32,782 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:32,782 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:32,782 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:32,782 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:32,782 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:32,783 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise39#1;assume main_#t~bitwise39#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise189#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise190#1;assume main_#t~bitwise190#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:32,784 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:32,784 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 49 times [2025-03-04 16:47:32,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:32,784 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [674450866] [2025-03-04 16:47:32,784 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-04 16:47:32,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:32,792 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:32,793 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:32,793 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:32,793 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:32,793 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:32,794 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:32,795 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:32,795 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:32,795 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:32,800 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:32,800 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:32,801 INFO L85 PathProgramCache]: Analyzing trace with hash 1898141674, now seen corresponding path program 1 times [2025-03-04 16:47:32,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:32,801 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [976723849] [2025-03-04 16:47:32,801 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:32,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:32,840 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:47:33,040 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:47:33,040 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:33,040 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:33,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:33,434 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:33,434 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [976723849] [2025-03-04 16:47:33,434 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [976723849] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:33,435 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:33,435 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-04 16:47:33,435 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [199519488] [2025-03-04 16:47:33,435 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:33,435 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:33,435 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:33,435 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-04 16:47:33,435 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-03-04 16:47:33,436 INFO L87 Difference]: Start difference. First operand 519 states and 691 transitions. cyclomatic complexity: 176 Second operand has 10 states, 10 states have (on average 15.4) internal successors, (154), 10 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:36,298 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.54s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-03-04 16:47:36,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:36,646 INFO L93 Difference]: Finished difference Result 524 states and 696 transitions. [2025-03-04 16:47:36,646 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 524 states and 696 transitions. [2025-03-04 16:47:36,647 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 515 [2025-03-04 16:47:36,648 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 524 states to 524 states and 696 transitions. [2025-03-04 16:47:36,648 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 524 [2025-03-04 16:47:36,649 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 524 [2025-03-04 16:47:36,649 INFO L73 IsDeterministic]: Start isDeterministic. Operand 524 states and 696 transitions. [2025-03-04 16:47:36,649 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:36,649 INFO L218 hiAutomatonCegarLoop]: Abstraction has 524 states and 696 transitions. [2025-03-04 16:47:36,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 524 states and 696 transitions. [2025-03-04 16:47:36,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 524 to 520. [2025-03-04 16:47:36,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 520 states, 513 states have (on average 1.3255360623781676) internal successors, (680), 512 states have internal predecessors, (680), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:36,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 520 states to 520 states and 692 transitions. [2025-03-04 16:47:36,652 INFO L240 hiAutomatonCegarLoop]: Abstraction has 520 states and 692 transitions. [2025-03-04 16:47:36,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:47:36,653 INFO L432 stractBuchiCegarLoop]: Abstraction has 520 states and 692 transitions. [2025-03-04 16:47:36,653 INFO L338 stractBuchiCegarLoop]: ======== Iteration 50 ============ [2025-03-04 16:47:36,653 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 520 states and 692 transitions. [2025-03-04 16:47:36,654 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 511 [2025-03-04 16:47:36,654 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:36,654 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:36,654 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:36,654 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:36,654 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:36,654 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise189#1 := 0;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:36,655 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:36,655 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 50 times [2025-03-04 16:47:36,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:36,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591791094] [2025-03-04 16:47:36,655 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-04 16:47:36,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:36,663 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:36,664 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:36,664 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-04 16:47:36,664 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:36,664 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:36,665 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:36,665 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:36,665 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:36,665 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:36,670 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:36,671 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:36,671 INFO L85 PathProgramCache]: Analyzing trace with hash 330280827, now seen corresponding path program 1 times [2025-03-04 16:47:36,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:36,671 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1424812237] [2025-03-04 16:47:36,671 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:36,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:36,706 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:47:36,915 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:47:36,915 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:36,915 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:37,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:37,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:37,113 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1424812237] [2025-03-04 16:47:37,113 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1424812237] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:37,113 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:37,113 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-04 16:47:37,113 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [143445328] [2025-03-04 16:47:37,113 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:37,113 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:37,113 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:37,113 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-04 16:47:37,113 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-03-04 16:47:37,114 INFO L87 Difference]: Start difference. First operand 520 states and 692 transitions. cyclomatic complexity: 176 Second operand has 9 states, 9 states have (on average 17.11111111111111) internal successors, (154), 9 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:37,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:37,649 INFO L93 Difference]: Finished difference Result 525 states and 698 transitions. [2025-03-04 16:47:37,649 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 525 states and 698 transitions. [2025-03-04 16:47:37,650 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 516 [2025-03-04 16:47:37,651 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 525 states to 525 states and 698 transitions. [2025-03-04 16:47:37,651 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 525 [2025-03-04 16:47:37,651 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 525 [2025-03-04 16:47:37,651 INFO L73 IsDeterministic]: Start isDeterministic. Operand 525 states and 698 transitions. [2025-03-04 16:47:37,652 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:37,652 INFO L218 hiAutomatonCegarLoop]: Abstraction has 525 states and 698 transitions. [2025-03-04 16:47:37,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 525 states and 698 transitions. [2025-03-04 16:47:37,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 525 to 523. [2025-03-04 16:47:37,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 523 states, 516 states have (on average 1.3255813953488371) internal successors, (684), 515 states have internal predecessors, (684), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:37,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 523 states to 523 states and 696 transitions. [2025-03-04 16:47:37,655 INFO L240 hiAutomatonCegarLoop]: Abstraction has 523 states and 696 transitions. [2025-03-04 16:47:37,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-04 16:47:37,655 INFO L432 stractBuchiCegarLoop]: Abstraction has 523 states and 696 transitions. [2025-03-04 16:47:37,655 INFO L338 stractBuchiCegarLoop]: ======== Iteration 51 ============ [2025-03-04 16:47:37,656 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 523 states and 696 transitions. [2025-03-04 16:47:37,656 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 514 [2025-03-04 16:47:37,656 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:37,656 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:37,657 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:37,657 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:37,657 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:37,657 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise188#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise190#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:37,657 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:37,657 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 51 times [2025-03-04 16:47:37,657 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:37,657 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [733920467] [2025-03-04 16:47:37,657 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-04 16:47:37,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:37,666 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:37,666 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:37,666 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-04 16:47:37,666 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:37,666 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:37,667 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:37,668 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:37,668 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:37,668 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:37,673 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:37,673 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:37,673 INFO L85 PathProgramCache]: Analyzing trace with hash -1388279403, now seen corresponding path program 1 times [2025-03-04 16:47:37,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:37,673 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846967567] [2025-03-04 16:47:37,673 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:37,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:37,709 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:47:38,064 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:47:38,064 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:38,064 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-04 16:47:38,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-04 16:47:38,711 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-04 16:47:38,711 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [846967567] [2025-03-04 16:47:38,711 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [846967567] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-04 16:47:38,711 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-04 16:47:38,711 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2025-03-04 16:47:38,711 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1606301848] [2025-03-04 16:47:38,711 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-04 16:47:38,711 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-04 16:47:38,711 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-04 16:47:38,712 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-03-04 16:47:38,712 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2025-03-04 16:47:38,712 INFO L87 Difference]: Start difference. First operand 523 states and 696 transitions. cyclomatic complexity: 177 Second operand has 17 states, 17 states have (on average 9.058823529411764) internal successors, (154), 17 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-04 16:47:39,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-04 16:47:39,677 INFO L93 Difference]: Finished difference Result 543 states and 724 transitions. [2025-03-04 16:47:39,677 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 543 states and 724 transitions. [2025-03-04 16:47:39,678 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 534 [2025-03-04 16:47:39,679 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 543 states to 543 states and 724 transitions. [2025-03-04 16:47:39,679 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 543 [2025-03-04 16:47:39,679 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 543 [2025-03-04 16:47:39,679 INFO L73 IsDeterministic]: Start isDeterministic. Operand 543 states and 724 transitions. [2025-03-04 16:47:39,679 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-04 16:47:39,679 INFO L218 hiAutomatonCegarLoop]: Abstraction has 543 states and 724 transitions. [2025-03-04 16:47:39,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states and 724 transitions. [2025-03-04 16:47:39,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 530. [2025-03-04 16:47:39,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 530 states, 523 states have (on average 1.3250478011472275) internal successors, (693), 522 states have internal predecessors, (693), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-03-04 16:47:39,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 530 states to 530 states and 705 transitions. [2025-03-04 16:47:39,683 INFO L240 hiAutomatonCegarLoop]: Abstraction has 530 states and 705 transitions. [2025-03-04 16:47:39,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-03-04 16:47:39,683 INFO L432 stractBuchiCegarLoop]: Abstraction has 530 states and 705 transitions. [2025-03-04 16:47:39,683 INFO L338 stractBuchiCegarLoop]: ======== Iteration 52 ============ [2025-03-04 16:47:39,683 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 530 states and 705 transitions. [2025-03-04 16:47:39,684 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 521 [2025-03-04 16:47:39,684 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-04 16:47:39,684 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-04 16:47:39,684 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-04 16:47:39,684 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-04 16:47:39,685 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem7#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem11#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~bitwise18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~switch27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~bitwise39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc48#1.base, main_#t~malloc48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~memset~res51#1.base, main_#t~memset~res51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~malloc57#1.base, main_#t~malloc57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~memset~res64#1.base, main_#t~memset~res64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~post75#1, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1, main_#t~bitwise78#1, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~post82#1, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem87#1, main_#t~mem86#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~short90#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~malloc93#1.base, main_#t~malloc93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~memset~res96#1.base, main_#t~memset~res96#1.offset, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem101#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~bitwise102#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem117#1, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1, main_#t~bitwise118#1, main_#t~mem119#1, main_#t~pre120#1, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~post125#1, main_#t~mem129#1, main_#t~mem127#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem128#1, main_#t~mem130#1, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~post135#1, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~post142#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem148#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~ite151#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1, main_#t~mem152#1.base, main_#t~mem152#1.offset, main_#t~mem153#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem156#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem158#1, main_#t~mem160#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem164#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~bitwise167#1, main_#t~bitwise168#1, main_#t~bitwise169#1, main_#t~bitwise170#1, main_#t~bitwise171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~switch176#1, main_#t~mem177#1, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~bitwise188#1, main_#t~bitwise189#1, main_#t~bitwise190#1, main_#t~bitwise191#1, main_#t~bitwise192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc197#1.base, main_#t~malloc197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_#t~memset~res200#1.base, main_#t~memset~res200#1.offset, main_#t~mem201#1.base, main_#t~mem201#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~memset~res213#1.base, main_#t~memset~res213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~mem218#1, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~post224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1, main_#t~bitwise227#1, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1, main_#t~post231#1, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem236#1, main_#t~mem235#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1, main_#t~short239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1, main_#t~malloc242#1.base, main_#t~malloc242#1.offset, main_#t~mem243#1.base, main_#t~mem243#1.offset, main_#t~mem244#1, main_#t~memset~res245#1.base, main_#t~memset~res245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem250#1, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~bitwise251#1, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem266#1, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1, main_#t~bitwise267#1, main_#t~mem268#1, main_#t~pre269#1, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem271#1, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_#t~mem273#1, main_#t~post274#1, main_#t~mem278#1, main_#t~mem276#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem277#1, main_#t~mem279#1, main_#t~post280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~post284#1, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1, main_#t~post291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem297#1, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1, main_#t~ite300#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1, main_#t~mem301#1.base, main_#t~mem301#1.offset, main_#t~mem302#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~post304#1, main_#t~mem305#1, main_#t~mem306#1, main_#t~short307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~ite310#1.base, main_#t~ite310#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~short313#1, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1.base, main_#t~mem315#1.offset, main_#t~mem316#1.base, main_#t~mem316#1.offset, main_#t~mem317#1.base, main_#t~mem317#1.offset, main_#t~mem318#1.base, main_#t~mem318#1.offset, main_#t~mem319#1.base, main_#t~mem319#1.offset, main_#t~mem320#1.base, main_#t~mem320#1.offset, main_#t~mem321#1.base, main_#t~mem321#1.offset, main_#t~mem322#1, main_#t~mem323#1.base, main_#t~mem323#1.offset, main_#t~mem324#1.base, main_#t~mem324#1.offset, main_#t~mem325#1.base, main_#t~mem325#1.offset, main_#t~mem326#1, main_#t~mem327#1.base, main_#t~mem327#1.offset, main_#t~mem328#1.base, main_#t~mem328#1.offset, main_#t~mem329#1.base, main_#t~mem329#1.offset, main_#t~mem330#1.base, main_#t~mem330#1.offset, main_#t~mem331#1.base, main_#t~mem331#1.offset, main_#t~mem332#1, main_#t~mem333#1.base, main_#t~mem333#1.offset, main_#t~mem336#1, main_#t~mem334#1.base, main_#t~mem334#1.offset, main_#t~mem335#1, main_#t~bitwise337#1, main_#t~mem338#1.base, main_#t~mem338#1.offset, main_#t~mem339#1.base, main_#t~mem339#1.offset, main_#t~mem340#1, main_#t~post341#1, main_#t~mem342#1.base, main_#t~mem342#1.offset, main_#t~mem343#1.base, main_#t~mem343#1.offset, main_#t~mem344#1.base, main_#t~mem344#1.offset, main_#t~mem345#1.base, main_#t~mem345#1.offset, main_#t~mem346#1.base, main_#t~mem346#1.offset, main_#t~mem347#1.base, main_#t~mem347#1.offset, main_#t~mem348#1.base, main_#t~mem348#1.offset, main_#t~mem349#1.base, main_#t~mem349#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem350#1.base, main_#t~mem350#1.offset, main_#t~mem351#1, main_#t~post352#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite354#1.base, main_#t~ite354#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~bound~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;havoc main_#t~nondet4#1;main_~bound~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;" "assume !(main_~bound~0#1 % 4294967296 > 10000);main_~i~0#1 := 0;" [2025-03-04 16:47:39,685 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 % 4294967296 < main_~bound~0#1 % 4294967296;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);call write~int#1(main_~i~0#1 * main_~i~0#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);" "assume true;havoc main_~_ha_hashv~0#1;" "assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch27#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch27#1;" "main_#t~switch27#1 := main_#t~switch27#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem35#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch27#1 := main_#t~switch27#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch27#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem38#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem38#1 % 256 % 4294967296 else main_#t~mem38#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~switch27#1;havoc main_#t~mem28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;" "assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise39#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise39#1;havoc main_#t~bitwise39#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise43#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise46#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;" "assume !false;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem65#1.base, main_#t~mem65#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem65#1.base, main_#t~mem65#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem65#1.base, main_#t~mem65#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_#t~mem66#1.base, 16 + main_#t~mem66#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1 := read~int#1(main_#t~mem68#1.base, 20 + main_#t~mem68#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset - main_#t~mem69#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_#t~mem70#1.base, 16 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem71#1.base, 8 + main_#t~mem71#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem74#1 := read~int#1(main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);main_#t~post75#1 := main_#t~mem74#1;call write~int#1(1 + main_#t~post75#1, main_#t~mem73#1.base, 12 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;havoc main_#t~mem74#1;havoc main_#t~post75#1;" "assume true;call main_#t~mem76#1.base, main_#t~mem76#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem77#1 := read~int#1(main_#t~mem76#1.base, 4 + main_#t~mem76#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem77#1 - 1) % 4294967296;main_#t~bitwise78#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise78#1;havoc main_#t~mem76#1.base, main_#t~mem76#1.offset;havoc main_#t~mem77#1;havoc main_#t~bitwise78#1;" "assume !false;" "assume true;call main_#t~mem79#1.base, main_#t~mem79#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_#t~mem79#1.base, main_#t~mem79#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem80#1.base, main_#t~mem80#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem79#1.base, main_#t~mem79#1.offset;havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;call main_#t~mem81#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post82#1 := main_#t~mem81#1;call write~int#1(1 + main_#t~post82#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem81#1;havoc main_#t~post82#1;call main_#t~mem83#1.base, main_#t~mem83#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem83#1.base, main_#t~mem83#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem83#1.base, main_#t~mem83#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem84#1.base != 0 || main_#t~mem84#1.offset != 0;havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem85#1.base, 12 + main_#t~mem85#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem86#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short90#1 := main_#t~mem87#1 % 4294967296 >= 10 * (1 + main_#t~mem86#1) % 4294967296;" "assume main_#t~short90#1;call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_#t~mem88#1.base, 36 + main_#t~mem88#1.offset, 4);main_#t~short90#1 := 0 == main_#t~mem89#1 % 4294967296;" "assume !main_#t~short90#1;havoc main_#t~mem87#1;havoc main_#t~mem86#1;havoc main_#t~mem88#1.base, main_#t~mem88#1.offset;havoc main_#t~mem89#1;havoc main_#t~short90#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "assume !false;" "havoc main_~_ha_bkt~0#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~0#1;" "assume !false;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, 4 + main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch176#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch176#1;" "main_#t~switch176#1 := main_#t~switch176#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch176#1 := main_#t~switch176#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch176#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem187#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem187#1 % 256 % 4294967296 else main_#t~mem187#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~switch176#1;havoc main_#t~mem177#1;havoc main_#t~mem178#1;havoc main_#t~mem179#1;havoc main_#t~mem180#1;havoc main_#t~mem181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise188#1;assume main_#t~bitwise188#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise188#1;havoc main_#t~bitwise188#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise189#1;assume main_#t~bitwise189#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise189#1;havoc main_#t~bitwise189#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise190#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise190#1;havoc main_#t~bitwise190#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise191#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise191#1;havoc main_#t~bitwise191#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise192#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise192#1;havoc main_#t~bitwise192#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise194#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise195#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem214#1.base, main_#t~mem214#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem214#1.base, main_#t~mem214#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem214#1.base, main_#t~mem214#1.offset;" "assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem215#1.base, main_#t~mem215#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem216#1.base, main_#t~mem216#1.offset := read~$Pointer$#1(main_#t~mem215#1.base, 16 + main_#t~mem215#1.offset, 4);call main_#t~mem217#1.base, main_#t~mem217#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem218#1 := read~int#1(main_#t~mem217#1.base, 20 + main_#t~mem217#1.offset, 4);call write~$Pointer$#1(main_#t~mem216#1.base, main_#t~mem216#1.offset - main_#t~mem218#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem215#1.base, main_#t~mem215#1.offset;havoc main_#t~mem216#1.base, main_#t~mem216#1.offset;havoc main_#t~mem217#1.base, main_#t~mem217#1.offset;havoc main_#t~mem218#1;call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_#t~mem219#1.base, 16 + main_#t~mem219#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem220#1.base, 8 + main_#t~mem220#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem221#1.base, 16 + main_#t~mem221#1.offset, 4);havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);main_#t~post224#1 := main_#t~mem223#1;call write~int#1(1 + main_#t~post224#1, main_#t~mem222#1.base, 12 + main_#t~mem222#1.offset, 4);havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;havoc main_#t~post224#1;" "assume true;call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem226#1 := read~int#1(main_#t~mem225#1.base, 4 + main_#t~mem225#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem226#1 - 1) % 4294967296;main_#t~bitwise227#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise227#1;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;havoc main_#t~mem226#1;havoc main_#t~bitwise227#1;" "assume !false;" "assume true;call main_#t~mem228#1.base, main_#t~mem228#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem229#1.base, main_#t~mem229#1.offset := read~$Pointer$#1(main_#t~mem228#1.base, main_#t~mem228#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem229#1.base, main_#t~mem229#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem228#1.base, main_#t~mem228#1.offset;havoc main_#t~mem229#1.base, main_#t~mem229#1.offset;call main_#t~mem230#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post231#1 := main_#t~mem230#1;call write~int#1(1 + main_#t~post231#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem230#1;havoc main_#t~post231#1;call main_#t~mem232#1.base, main_#t~mem232#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem232#1.base, main_#t~mem232#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem232#1.base, main_#t~mem232#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem233#1.base != 0 || main_#t~mem233#1.offset != 0;havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem234#1.base, 12 + main_#t~mem234#1.offset, 4);havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem236#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short239#1 := main_#t~mem236#1 % 4294967296 >= 10 * (1 + main_#t~mem235#1) % 4294967296;" "assume main_#t~short239#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem238#1 := read~int#1(main_#t~mem237#1.base, 36 + main_#t~mem237#1.offset, 4);main_#t~short239#1 := 0 == main_#t~mem238#1 % 4294967296;" "assume !main_#t~short239#1;havoc main_#t~mem236#1;havoc main_#t~mem235#1;havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;havoc main_#t~mem238#1;havoc main_#t~short239#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "main_#t~post304#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post304#1;havoc main_#t~post304#1;" [2025-03-04 16:47:39,685 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:39,685 INFO L85 PathProgramCache]: Analyzing trace with hash 764578, now seen corresponding path program 52 times [2025-03-04 16:47:39,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:39,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258086536] [2025-03-04 16:47:39,685 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-04 16:47:39,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:39,693 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-03-04 16:47:39,693 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:39,693 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-04 16:47:39,693 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:39,693 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-04 16:47:39,694 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-04 16:47:39,695 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-04 16:47:39,695 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:39,695 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-04 16:47:39,700 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-04 16:47:39,700 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-04 16:47:39,700 INFO L85 PathProgramCache]: Analyzing trace with hash -148576327, now seen corresponding path program 1 times [2025-03-04 16:47:39,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-04 16:47:39,700 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682474839] [2025-03-04 16:47:39,700 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-04 16:47:39,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-04 16:47:39,734 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-03-04 16:47:40,068 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-03-04 16:47:40,068 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-04 16:47:40,068 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat