./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 56b29f9d5660210a85c24688e6471450833c85f52fe4e28968dbf3dd7aaa100e --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-03 16:49:12,278 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-03 16:49:12,336 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2025-03-03 16:49:12,339 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-03 16:49:12,340 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-03 16:49:12,360 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-03 16:49:12,362 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-03 16:49:12,362 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-03 16:49:12,362 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-03 16:49:12,362 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-03 16:49:12,363 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-03 16:49:12,363 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-03 16:49:12,363 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-03 16:49:12,363 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-03 16:49:12,364 INFO L153 SettingsManager]: * Use SBE=true [2025-03-03 16:49:12,364 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-03 16:49:12,364 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-03 16:49:12,364 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-03 16:49:12,364 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-03 16:49:12,364 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-03 16:49:12,364 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-03 16:49:12,365 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-03 16:49:12,365 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-03 16:49:12,365 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-03 16:49:12,365 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-03 16:49:12,365 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-03 16:49:12,365 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-03 16:49:12,365 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-03 16:49:12,365 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-03 16:49:12,365 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 16:49:12,366 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-03 16:49:12,366 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-03 16:49:12,366 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-03 16:49:12,366 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-03 16:49:12,366 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-03 16:49:12,366 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-03 16:49:12,366 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-03 16:49:12,366 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-03 16:49:12,366 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-03 16:49:12,366 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-03 16:49:12,366 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 56b29f9d5660210a85c24688e6471450833c85f52fe4e28968dbf3dd7aaa100e [2025-03-03 16:49:12,559 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-03 16:49:12,568 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-03 16:49:12,570 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-03 16:49:12,570 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-03 16:49:12,570 INFO L274 PluginConnector]: CDTParser initialized [2025-03-03 16:49:12,571 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c [2025-03-03 16:49:13,737 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/99f345722/4b9e38b0e39143aaad532fedf3b8e1f1/FLAGe0c226396 [2025-03-03 16:49:14,109 INFO L384 CDTParser]: Found 1 translation units. [2025-03-03 16:49:14,110 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c [2025-03-03 16:49:14,130 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/99f345722/4b9e38b0e39143aaad532fedf3b8e1f1/FLAGe0c226396 [2025-03-03 16:49:14,149 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/99f345722/4b9e38b0e39143aaad532fedf3b8e1f1 [2025-03-03 16:49:14,150 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-03 16:49:14,151 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-03 16:49:14,153 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-03 16:49:14,154 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-03 16:49:14,158 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-03 16:49:14,159 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:14,160 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@778905a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14, skipping insertion in model container [2025-03-03 16:49:14,160 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:14,201 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-03 16:49:14,320 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c[1259,1272] [2025-03-03 16:49:14,539 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 16:49:14,547 INFO L200 MainTranslator]: Completed pre-run [2025-03-03 16:49:14,554 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c[1259,1272] [2025-03-03 16:49:14,664 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 16:49:14,674 INFO L204 MainTranslator]: Completed translation [2025-03-03 16:49:14,674 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14 WrapperNode [2025-03-03 16:49:14,675 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-03 16:49:14,675 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-03 16:49:14,675 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-03 16:49:14,676 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-03 16:49:14,679 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:14,709 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:14,987 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 3827 [2025-03-03 16:49:14,988 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-03 16:49:14,988 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-03 16:49:14,988 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-03 16:49:14,989 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-03 16:49:14,995 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:14,996 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:15,052 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:15,209 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-03 16:49:15,210 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:15,210 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:15,293 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:15,305 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:15,322 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:15,341 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:15,415 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-03 16:49:15,419 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-03 16:49:15,419 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-03 16:49:15,419 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-03 16:49:15,420 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (1/1) ... [2025-03-03 16:49:15,428 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 16:49:15,444 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 16:49:15,461 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-03 16:49:15,464 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-03 16:49:15,491 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-03 16:49:15,492 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-03 16:49:15,492 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-03 16:49:15,492 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-03 16:49:15,813 INFO L256 CfgBuilder]: Building ICFG [2025-03-03 16:49:15,814 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-03 16:49:18,509 INFO L? ?]: Removed 2503 outVars from TransFormulas that were not future-live. [2025-03-03 16:49:18,509 INFO L307 CfgBuilder]: Performing block encoding [2025-03-03 16:49:18,648 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-03 16:49:18,652 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-03 16:49:18,653 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 04:49:18 BoogieIcfgContainer [2025-03-03 16:49:18,653 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-03 16:49:18,655 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-03 16:49:18,655 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-03 16:49:18,659 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-03 16:49:18,659 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.03 04:49:14" (1/3) ... [2025-03-03 16:49:18,660 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@794c29e9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 04:49:18, skipping insertion in model container [2025-03-03 16:49:18,660 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:49:14" (2/3) ... [2025-03-03 16:49:18,660 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@794c29e9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 04:49:18, skipping insertion in model container [2025-03-03 16:49:18,661 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 04:49:18" (3/3) ... [2025-03-03 16:49:18,661 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.cache_coherence_two.c [2025-03-03 16:49:18,674 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-03 16:49:18,675 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.cache_coherence_two.c that has 1 procedures, 926 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-03-03 16:49:18,743 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-03 16:49:18,751 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@24e761ef, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-03 16:49:18,752 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-03 16:49:18,759 INFO L276 IsEmpty]: Start isEmpty. Operand has 926 states, 924 states have (on average 1.498917748917749) internal successors, (1385), 925 states have internal predecessors, (1385), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:18,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2025-03-03 16:49:18,770 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:18,771 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:18,771 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:18,776 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:18,776 INFO L85 PathProgramCache]: Analyzing trace with hash 1137868781, now seen corresponding path program 1 times [2025-03-03 16:49:18,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:18,782 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [407726096] [2025-03-03 16:49:18,783 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:18,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:18,910 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 157 statements into 1 equivalence classes. [2025-03-03 16:49:19,342 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 157 of 157 statements. [2025-03-03 16:49:19,342 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:19,342 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:20,371 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:20,373 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:20,373 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [407726096] [2025-03-03 16:49:20,373 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [407726096] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:20,374 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:20,374 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 16:49:20,375 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037856668] [2025-03-03 16:49:20,375 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:20,379 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 16:49:20,380 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:20,395 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 16:49:20,396 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:49:20,399 INFO L87 Difference]: Start difference. First operand has 926 states, 924 states have (on average 1.498917748917749) internal successors, (1385), 925 states have internal predecessors, (1385), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:21,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:21,115 INFO L93 Difference]: Finished difference Result 1976 states and 2959 transitions. [2025-03-03 16:49:21,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:49:21,116 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 157 [2025-03-03 16:49:21,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:21,131 INFO L225 Difference]: With dead ends: 1976 [2025-03-03 16:49:21,131 INFO L226 Difference]: Without dead ends: 1168 [2025-03-03 16:49:21,138 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:49:21,141 INFO L435 NwaCegarLoop]: 1129 mSDtfsCounter, 2019 mSDsluCounter, 2257 mSDsCounter, 0 mSdLazyCounter, 757 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2019 SdHoareTripleChecker+Valid, 3386 SdHoareTripleChecker+Invalid, 758 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 757 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:21,142 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2019 Valid, 3386 Invalid, 758 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 757 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-03 16:49:21,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1168 states. [2025-03-03 16:49:21,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1168 to 986. [2025-03-03 16:49:21,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 986 states, 985 states have (on average 1.4964467005076143) internal successors, (1474), 985 states have internal predecessors, (1474), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:21,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 986 states to 986 states and 1474 transitions. [2025-03-03 16:49:21,224 INFO L78 Accepts]: Start accepts. Automaton has 986 states and 1474 transitions. Word has length 157 [2025-03-03 16:49:21,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:21,226 INFO L471 AbstractCegarLoop]: Abstraction has 986 states and 1474 transitions. [2025-03-03 16:49:21,226 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:21,227 INFO L276 IsEmpty]: Start isEmpty. Operand 986 states and 1474 transitions. [2025-03-03 16:49:21,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2025-03-03 16:49:21,229 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:21,229 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:21,230 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-03 16:49:21,230 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:21,231 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:21,231 INFO L85 PathProgramCache]: Analyzing trace with hash -1822239470, now seen corresponding path program 1 times [2025-03-03 16:49:21,231 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:21,231 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [82348157] [2025-03-03 16:49:21,231 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:21,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:21,282 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 159 statements into 1 equivalence classes. [2025-03-03 16:49:21,329 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 159 of 159 statements. [2025-03-03 16:49:21,330 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:21,330 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:21,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:21,880 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:21,880 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [82348157] [2025-03-03 16:49:21,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [82348157] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:21,881 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:21,881 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 16:49:21,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1161261343] [2025-03-03 16:49:21,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:21,882 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 16:49:21,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:21,882 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 16:49:21,882 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:21,883 INFO L87 Difference]: Start difference. First operand 986 states and 1474 transitions. Second operand has 4 states, 4 states have (on average 39.75) internal successors, (159), 4 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:22,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:22,252 INFO L93 Difference]: Finished difference Result 990 states and 1478 transitions. [2025-03-03 16:49:22,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 16:49:22,253 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.75) internal successors, (159), 4 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 159 [2025-03-03 16:49:22,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:22,256 INFO L225 Difference]: With dead ends: 990 [2025-03-03 16:49:22,256 INFO L226 Difference]: Without dead ends: 988 [2025-03-03 16:49:22,260 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:22,261 INFO L435 NwaCegarLoop]: 1150 mSDtfsCounter, 0 mSDsluCounter, 2295 mSDsCounter, 0 mSdLazyCounter, 697 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3445 SdHoareTripleChecker+Invalid, 697 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 697 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:22,261 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3445 Invalid, 697 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 697 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-03 16:49:22,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 988 states. [2025-03-03 16:49:22,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 988 to 988. [2025-03-03 16:49:22,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 988 states, 987 states have (on average 1.4954407294832828) internal successors, (1476), 987 states have internal predecessors, (1476), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:22,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 988 states to 988 states and 1476 transitions. [2025-03-03 16:49:22,291 INFO L78 Accepts]: Start accepts. Automaton has 988 states and 1476 transitions. Word has length 159 [2025-03-03 16:49:22,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:22,292 INFO L471 AbstractCegarLoop]: Abstraction has 988 states and 1476 transitions. [2025-03-03 16:49:22,292 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.75) internal successors, (159), 4 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:22,292 INFO L276 IsEmpty]: Start isEmpty. Operand 988 states and 1476 transitions. [2025-03-03 16:49:22,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2025-03-03 16:49:22,297 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:22,297 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:22,297 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-03 16:49:22,297 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:22,298 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:22,298 INFO L85 PathProgramCache]: Analyzing trace with hash -650168506, now seen corresponding path program 1 times [2025-03-03 16:49:22,298 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:22,298 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107707464] [2025-03-03 16:49:22,298 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:22,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:22,356 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 160 statements into 1 equivalence classes. [2025-03-03 16:49:22,396 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 160 of 160 statements. [2025-03-03 16:49:22,396 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:22,396 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:22,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:22,713 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:22,713 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [107707464] [2025-03-03 16:49:22,713 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [107707464] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:22,713 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:22,713 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 16:49:22,714 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [227086388] [2025-03-03 16:49:22,714 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:22,714 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 16:49:22,714 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:22,715 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 16:49:22,715 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:22,715 INFO L87 Difference]: Start difference. First operand 988 states and 1476 transitions. Second operand has 4 states, 4 states have (on average 40.0) internal successors, (160), 4 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:23,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:23,063 INFO L93 Difference]: Finished difference Result 1797 states and 2686 transitions. [2025-03-03 16:49:23,064 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 16:49:23,064 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 40.0) internal successors, (160), 4 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 160 [2025-03-03 16:49:23,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:23,069 INFO L225 Difference]: With dead ends: 1797 [2025-03-03 16:49:23,069 INFO L226 Difference]: Without dead ends: 990 [2025-03-03 16:49:23,070 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:23,072 INFO L435 NwaCegarLoop]: 1150 mSDtfsCounter, 0 mSDsluCounter, 2292 mSDsCounter, 0 mSdLazyCounter, 700 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3442 SdHoareTripleChecker+Invalid, 700 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 700 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:23,072 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3442 Invalid, 700 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 700 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-03 16:49:23,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 990 states. [2025-03-03 16:49:23,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 990 to 990. [2025-03-03 16:49:23,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 990 states, 989 states have (on average 1.4944388270980788) internal successors, (1478), 989 states have internal predecessors, (1478), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:23,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 990 states to 990 states and 1478 transitions. [2025-03-03 16:49:23,105 INFO L78 Accepts]: Start accepts. Automaton has 990 states and 1478 transitions. Word has length 160 [2025-03-03 16:49:23,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:23,105 INFO L471 AbstractCegarLoop]: Abstraction has 990 states and 1478 transitions. [2025-03-03 16:49:23,105 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 40.0) internal successors, (160), 4 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:23,105 INFO L276 IsEmpty]: Start isEmpty. Operand 990 states and 1478 transitions. [2025-03-03 16:49:23,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2025-03-03 16:49:23,108 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:23,108 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:23,108 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-03 16:49:23,108 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:23,109 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:23,109 INFO L85 PathProgramCache]: Analyzing trace with hash -1043844211, now seen corresponding path program 1 times [2025-03-03 16:49:23,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:23,109 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977666663] [2025-03-03 16:49:23,110 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:23,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:23,152 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 161 statements into 1 equivalence classes. [2025-03-03 16:49:23,327 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 161 of 161 statements. [2025-03-03 16:49:23,327 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:23,327 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:23,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:23,908 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:23,908 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977666663] [2025-03-03 16:49:23,908 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1977666663] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:23,908 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:23,908 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-03 16:49:23,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [354975123] [2025-03-03 16:49:23,908 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:23,909 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-03 16:49:23,909 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:23,909 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-03 16:49:23,909 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:49:23,909 INFO L87 Difference]: Start difference. First operand 990 states and 1478 transitions. Second operand has 6 states, 6 states have (on average 26.833333333333332) internal successors, (161), 6 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:24,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:24,385 INFO L93 Difference]: Finished difference Result 1891 states and 2825 transitions. [2025-03-03 16:49:24,385 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-03 16:49:24,385 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 26.833333333333332) internal successors, (161), 6 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 161 [2025-03-03 16:49:24,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:24,390 INFO L225 Difference]: With dead ends: 1891 [2025-03-03 16:49:24,390 INFO L226 Difference]: Without dead ends: 1082 [2025-03-03 16:49:24,391 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:49:24,391 INFO L435 NwaCegarLoop]: 1148 mSDtfsCounter, 89 mSDsluCounter, 3542 mSDsCounter, 0 mSdLazyCounter, 965 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 89 SdHoareTripleChecker+Valid, 4690 SdHoareTripleChecker+Invalid, 966 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 965 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:24,392 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [89 Valid, 4690 Invalid, 966 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 965 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-03 16:49:24,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1082 states. [2025-03-03 16:49:24,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1082 to 1079. [2025-03-03 16:49:24,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1079 states, 1078 states have (on average 1.4935064935064934) internal successors, (1610), 1078 states have internal predecessors, (1610), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:24,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1079 states to 1079 states and 1610 transitions. [2025-03-03 16:49:24,410 INFO L78 Accepts]: Start accepts. Automaton has 1079 states and 1610 transitions. Word has length 161 [2025-03-03 16:49:24,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:24,410 INFO L471 AbstractCegarLoop]: Abstraction has 1079 states and 1610 transitions. [2025-03-03 16:49:24,410 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 26.833333333333332) internal successors, (161), 6 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:24,410 INFO L276 IsEmpty]: Start isEmpty. Operand 1079 states and 1610 transitions. [2025-03-03 16:49:24,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2025-03-03 16:49:24,411 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:24,412 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:24,412 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-03 16:49:24,412 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:24,412 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:24,412 INFO L85 PathProgramCache]: Analyzing trace with hash 1946611395, now seen corresponding path program 1 times [2025-03-03 16:49:24,412 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:24,412 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913964895] [2025-03-03 16:49:24,412 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:24,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:24,456 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 162 statements into 1 equivalence classes. [2025-03-03 16:49:24,493 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 162 of 162 statements. [2025-03-03 16:49:24,493 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:24,493 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:24,871 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:24,875 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:24,876 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913964895] [2025-03-03 16:49:24,876 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1913964895] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:24,876 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:24,876 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 16:49:24,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281827048] [2025-03-03 16:49:24,876 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:24,876 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 16:49:24,876 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:24,877 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 16:49:24,877 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:24,877 INFO L87 Difference]: Start difference. First operand 1079 states and 1610 transitions. Second operand has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:25,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:25,229 INFO L93 Difference]: Finished difference Result 1979 states and 2954 transitions. [2025-03-03 16:49:25,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 16:49:25,230 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 162 [2025-03-03 16:49:25,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:25,233 INFO L225 Difference]: With dead ends: 1979 [2025-03-03 16:49:25,233 INFO L226 Difference]: Without dead ends: 1081 [2025-03-03 16:49:25,235 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:25,236 INFO L435 NwaCegarLoop]: 1150 mSDtfsCounter, 0 mSDsluCounter, 2292 mSDsCounter, 0 mSdLazyCounter, 700 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3442 SdHoareTripleChecker+Invalid, 700 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 700 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:25,236 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3442 Invalid, 700 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 700 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-03 16:49:25,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1081 states. [2025-03-03 16:49:25,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1081 to 1081. [2025-03-03 16:49:25,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1081 states, 1080 states have (on average 1.4925925925925927) internal successors, (1612), 1080 states have internal predecessors, (1612), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:25,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1081 states to 1081 states and 1612 transitions. [2025-03-03 16:49:25,255 INFO L78 Accepts]: Start accepts. Automaton has 1081 states and 1612 transitions. Word has length 162 [2025-03-03 16:49:25,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:25,256 INFO L471 AbstractCegarLoop]: Abstraction has 1081 states and 1612 transitions. [2025-03-03 16:49:25,256 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:25,256 INFO L276 IsEmpty]: Start isEmpty. Operand 1081 states and 1612 transitions. [2025-03-03 16:49:25,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2025-03-03 16:49:25,257 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:25,257 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:25,257 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-03 16:49:25,257 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:25,258 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:25,258 INFO L85 PathProgramCache]: Analyzing trace with hash 1079643952, now seen corresponding path program 1 times [2025-03-03 16:49:25,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:25,258 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889550123] [2025-03-03 16:49:25,258 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:25,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:25,299 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 162 statements into 1 equivalence classes. [2025-03-03 16:49:25,466 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 162 of 162 statements. [2025-03-03 16:49:25,467 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:25,467 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:25,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:25,885 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:25,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889550123] [2025-03-03 16:49:25,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1889550123] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:25,885 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:25,885 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 16:49:25,885 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [146467144] [2025-03-03 16:49:25,885 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:25,885 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 16:49:25,885 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:25,887 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 16:49:25,888 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:49:25,888 INFO L87 Difference]: Start difference. First operand 1081 states and 1612 transitions. Second operand has 5 states, 5 states have (on average 32.4) internal successors, (162), 5 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:26,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:26,465 INFO L93 Difference]: Finished difference Result 2366 states and 3525 transitions. [2025-03-03 16:49:26,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:49:26,466 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.4) internal successors, (162), 5 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 162 [2025-03-03 16:49:26,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:26,470 INFO L225 Difference]: With dead ends: 2366 [2025-03-03 16:49:26,470 INFO L226 Difference]: Without dead ends: 1466 [2025-03-03 16:49:26,472 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:49:26,473 INFO L435 NwaCegarLoop]: 1129 mSDtfsCounter, 2289 mSDsluCounter, 2257 mSDsCounter, 0 mSdLazyCounter, 757 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2289 SdHoareTripleChecker+Valid, 3386 SdHoareTripleChecker+Invalid, 758 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 757 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:26,473 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2289 Valid, 3386 Invalid, 758 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 757 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-03 16:49:26,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1466 states. [2025-03-03 16:49:26,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1466 to 1254. [2025-03-03 16:49:26,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1254 states, 1253 states have (on average 1.490023942537909) internal successors, (1867), 1253 states have internal predecessors, (1867), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:26,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1254 states to 1254 states and 1867 transitions. [2025-03-03 16:49:26,496 INFO L78 Accepts]: Start accepts. Automaton has 1254 states and 1867 transitions. Word has length 162 [2025-03-03 16:49:26,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:26,496 INFO L471 AbstractCegarLoop]: Abstraction has 1254 states and 1867 transitions. [2025-03-03 16:49:26,497 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.4) internal successors, (162), 5 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:26,497 INFO L276 IsEmpty]: Start isEmpty. Operand 1254 states and 1867 transitions. [2025-03-03 16:49:26,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2025-03-03 16:49:26,500 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:26,500 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:26,500 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-03 16:49:26,500 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:26,500 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:26,500 INFO L85 PathProgramCache]: Analyzing trace with hash -360110, now seen corresponding path program 1 times [2025-03-03 16:49:26,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:26,500 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1115141319] [2025-03-03 16:49:26,500 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:26,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:26,543 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 164 statements into 1 equivalence classes. [2025-03-03 16:49:26,692 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 164 of 164 statements. [2025-03-03 16:49:26,692 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:26,692 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:27,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:27,186 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:27,186 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1115141319] [2025-03-03 16:49:27,186 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1115141319] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:27,186 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:27,186 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 16:49:27,187 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1014995629] [2025-03-03 16:49:27,187 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:27,187 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 16:49:27,187 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:27,187 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 16:49:27,188 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:27,188 INFO L87 Difference]: Start difference. First operand 1254 states and 1867 transitions. Second operand has 4 states, 4 states have (on average 41.0) internal successors, (164), 4 states have internal predecessors, (164), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:27,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:27,584 INFO L93 Difference]: Finished difference Result 2378 states and 3540 transitions. [2025-03-03 16:49:27,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 16:49:27,585 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 41.0) internal successors, (164), 4 states have internal predecessors, (164), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 164 [2025-03-03 16:49:27,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:27,588 INFO L225 Difference]: With dead ends: 2378 [2025-03-03 16:49:27,588 INFO L226 Difference]: Without dead ends: 1254 [2025-03-03 16:49:27,590 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:27,591 INFO L435 NwaCegarLoop]: 1147 mSDtfsCounter, 6 mSDsluCounter, 2285 mSDsCounter, 0 mSdLazyCounter, 699 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 3432 SdHoareTripleChecker+Invalid, 699 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 699 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:27,591 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 3432 Invalid, 699 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 699 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-03 16:49:27,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1254 states. [2025-03-03 16:49:27,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1254 to 1254. [2025-03-03 16:49:27,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1254 states, 1253 states have (on average 1.4884277733439744) internal successors, (1865), 1253 states have internal predecessors, (1865), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:27,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1254 states to 1254 states and 1865 transitions. [2025-03-03 16:49:27,611 INFO L78 Accepts]: Start accepts. Automaton has 1254 states and 1865 transitions. Word has length 164 [2025-03-03 16:49:27,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:27,611 INFO L471 AbstractCegarLoop]: Abstraction has 1254 states and 1865 transitions. [2025-03-03 16:49:27,611 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 41.0) internal successors, (164), 4 states have internal predecessors, (164), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:27,611 INFO L276 IsEmpty]: Start isEmpty. Operand 1254 states and 1865 transitions. [2025-03-03 16:49:27,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2025-03-03 16:49:27,613 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:27,613 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:27,613 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-03 16:49:27,613 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:27,613 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:27,613 INFO L85 PathProgramCache]: Analyzing trace with hash -1202885032, now seen corresponding path program 1 times [2025-03-03 16:49:27,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:27,615 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158489931] [2025-03-03 16:49:27,615 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:27,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:27,655 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 165 statements into 1 equivalence classes. [2025-03-03 16:49:27,735 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 165 of 165 statements. [2025-03-03 16:49:27,735 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:27,736 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:28,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:28,357 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:28,357 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158489931] [2025-03-03 16:49:28,357 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [158489931] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:28,357 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:28,357 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-03 16:49:28,357 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1306694931] [2025-03-03 16:49:28,357 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:28,357 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2025-03-03 16:49:28,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:28,358 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-03 16:49:28,358 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2025-03-03 16:49:28,358 INFO L87 Difference]: Start difference. First operand 1254 states and 1865 transitions. Second operand has 9 states, 9 states have (on average 18.333333333333332) internal successors, (165), 9 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:29,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:29,057 INFO L93 Difference]: Finished difference Result 2396 states and 3563 transitions. [2025-03-03 16:49:29,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-03 16:49:29,057 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 18.333333333333332) internal successors, (165), 9 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 165 [2025-03-03 16:49:29,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:29,063 INFO L225 Difference]: With dead ends: 2396 [2025-03-03 16:49:29,063 INFO L226 Difference]: Without dead ends: 1288 [2025-03-03 16:49:29,064 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2025-03-03 16:49:29,066 INFO L435 NwaCegarLoop]: 1141 mSDtfsCounter, 19 mSDsluCounter, 5711 mSDsCounter, 0 mSdLazyCounter, 1454 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 6852 SdHoareTripleChecker+Invalid, 1455 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1454 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:29,066 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 6852 Invalid, 1455 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1454 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-03-03 16:49:29,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1288 states. [2025-03-03 16:49:29,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1288 to 1280. [2025-03-03 16:49:29,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1280 states, 1279 states have (on average 1.4878811571540267) internal successors, (1903), 1279 states have internal predecessors, (1903), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:29,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1280 states to 1280 states and 1903 transitions. [2025-03-03 16:49:29,087 INFO L78 Accepts]: Start accepts. Automaton has 1280 states and 1903 transitions. Word has length 165 [2025-03-03 16:49:29,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:29,087 INFO L471 AbstractCegarLoop]: Abstraction has 1280 states and 1903 transitions. [2025-03-03 16:49:29,087 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 18.333333333333332) internal successors, (165), 9 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:29,088 INFO L276 IsEmpty]: Start isEmpty. Operand 1280 states and 1903 transitions. [2025-03-03 16:49:29,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2025-03-03 16:49:29,089 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:29,089 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:29,089 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-03 16:49:29,090 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:29,090 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:29,090 INFO L85 PathProgramCache]: Analyzing trace with hash 546248828, now seen corresponding path program 1 times [2025-03-03 16:49:29,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:29,092 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [437501445] [2025-03-03 16:49:29,092 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:29,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:29,135 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 166 statements into 1 equivalence classes. [2025-03-03 16:49:29,264 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 166 of 166 statements. [2025-03-03 16:49:29,265 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:29,265 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:29,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:29,627 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:29,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [437501445] [2025-03-03 16:49:29,627 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [437501445] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:29,627 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:29,627 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 16:49:29,627 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1750985132] [2025-03-03 16:49:29,627 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:29,628 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 16:49:29,628 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:29,628 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 16:49:29,629 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:49:29,629 INFO L87 Difference]: Start difference. First operand 1280 states and 1903 transitions. Second operand has 5 states, 5 states have (on average 33.2) internal successors, (166), 5 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:30,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:30,176 INFO L93 Difference]: Finished difference Result 2197 states and 3270 transitions. [2025-03-03 16:49:30,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:49:30,177 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.2) internal successors, (166), 5 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 166 [2025-03-03 16:49:30,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:30,181 INFO L225 Difference]: With dead ends: 2197 [2025-03-03 16:49:30,181 INFO L226 Difference]: Without dead ends: 1284 [2025-03-03 16:49:30,182 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:49:30,183 INFO L435 NwaCegarLoop]: 1132 mSDtfsCounter, 1228 mSDsluCounter, 2258 mSDsCounter, 0 mSdLazyCounter, 749 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1228 SdHoareTripleChecker+Valid, 3390 SdHoareTripleChecker+Invalid, 750 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 749 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:30,183 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1228 Valid, 3390 Invalid, 750 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 749 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-03 16:49:30,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1284 states. [2025-03-03 16:49:30,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1284 to 1283. [2025-03-03 16:49:30,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1283 states, 1282 states have (on average 1.4867394695787832) internal successors, (1906), 1282 states have internal predecessors, (1906), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:30,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1283 states to 1283 states and 1906 transitions. [2025-03-03 16:49:30,201 INFO L78 Accepts]: Start accepts. Automaton has 1283 states and 1906 transitions. Word has length 166 [2025-03-03 16:49:30,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:30,201 INFO L471 AbstractCegarLoop]: Abstraction has 1283 states and 1906 transitions. [2025-03-03 16:49:30,202 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.2) internal successors, (166), 5 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:30,202 INFO L276 IsEmpty]: Start isEmpty. Operand 1283 states and 1906 transitions. [2025-03-03 16:49:30,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2025-03-03 16:49:30,203 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:30,203 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:30,203 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-03 16:49:30,203 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:30,204 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:30,204 INFO L85 PathProgramCache]: Analyzing trace with hash -972735317, now seen corresponding path program 1 times [2025-03-03 16:49:30,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:30,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611392522] [2025-03-03 16:49:30,204 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:30,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:30,244 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 167 statements into 1 equivalence classes. [2025-03-03 16:49:30,382 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 167 of 167 statements. [2025-03-03 16:49:30,382 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:30,382 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:30,698 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:30,699 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:30,699 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1611392522] [2025-03-03 16:49:30,699 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1611392522] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:30,699 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:30,699 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 16:49:30,699 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [695124220] [2025-03-03 16:49:30,699 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:30,699 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 16:49:30,700 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:30,700 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 16:49:30,700 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:30,700 INFO L87 Difference]: Start difference. First operand 1283 states and 1906 transitions. Second operand has 4 states, 4 states have (on average 41.75) internal successors, (167), 4 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:31,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:31,085 INFO L93 Difference]: Finished difference Result 2413 states and 3584 transitions. [2025-03-03 16:49:31,085 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 16:49:31,085 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 41.75) internal successors, (167), 4 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 167 [2025-03-03 16:49:31,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:31,089 INFO L225 Difference]: With dead ends: 2413 [2025-03-03 16:49:31,089 INFO L226 Difference]: Without dead ends: 1283 [2025-03-03 16:49:31,091 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:31,091 INFO L435 NwaCegarLoop]: 1146 mSDtfsCounter, 6 mSDsluCounter, 2283 mSDsCounter, 0 mSdLazyCounter, 699 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 3429 SdHoareTripleChecker+Invalid, 699 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 699 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:31,092 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 3429 Invalid, 699 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 699 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-03 16:49:31,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1283 states. [2025-03-03 16:49:31,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1283 to 1283. [2025-03-03 16:49:31,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1283 states, 1282 states have (on average 1.4836193447737909) internal successors, (1902), 1282 states have internal predecessors, (1902), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:31,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1283 states to 1283 states and 1902 transitions. [2025-03-03 16:49:31,109 INFO L78 Accepts]: Start accepts. Automaton has 1283 states and 1902 transitions. Word has length 167 [2025-03-03 16:49:31,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:31,109 INFO L471 AbstractCegarLoop]: Abstraction has 1283 states and 1902 transitions. [2025-03-03 16:49:31,109 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 41.75) internal successors, (167), 4 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:31,109 INFO L276 IsEmpty]: Start isEmpty. Operand 1283 states and 1902 transitions. [2025-03-03 16:49:31,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2025-03-03 16:49:31,110 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:31,110 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:31,110 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-03 16:49:31,111 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:31,111 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:31,111 INFO L85 PathProgramCache]: Analyzing trace with hash 1856730506, now seen corresponding path program 1 times [2025-03-03 16:49:31,111 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:31,111 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696167047] [2025-03-03 16:49:31,111 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:31,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:31,149 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-03-03 16:49:31,257 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-03-03 16:49:31,257 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:31,257 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:31,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:31,589 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:31,590 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1696167047] [2025-03-03 16:49:31,590 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1696167047] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:31,590 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:31,590 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 16:49:31,590 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [922257560] [2025-03-03 16:49:31,590 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:31,590 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 16:49:31,590 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:31,591 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 16:49:31,591 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:49:31,591 INFO L87 Difference]: Start difference. First operand 1283 states and 1902 transitions. Second operand has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:32,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:32,037 INFO L93 Difference]: Finished difference Result 2430 states and 3602 transitions. [2025-03-03 16:49:32,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:49:32,038 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 168 [2025-03-03 16:49:32,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:32,041 INFO L225 Difference]: With dead ends: 2430 [2025-03-03 16:49:32,041 INFO L226 Difference]: Without dead ends: 1289 [2025-03-03 16:49:32,042 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:49:32,043 INFO L435 NwaCegarLoop]: 1124 mSDtfsCounter, 1318 mSDsluCounter, 2242 mSDsCounter, 0 mSdLazyCounter, 770 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1318 SdHoareTripleChecker+Valid, 3366 SdHoareTripleChecker+Invalid, 770 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 770 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:32,043 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1318 Valid, 3366 Invalid, 770 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 770 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-03 16:49:32,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1289 states. [2025-03-03 16:49:32,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1289 to 1289. [2025-03-03 16:49:32,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1289 states, 1288 states have (on average 1.4813664596273293) internal successors, (1908), 1288 states have internal predecessors, (1908), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:32,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1289 states to 1289 states and 1908 transitions. [2025-03-03 16:49:32,061 INFO L78 Accepts]: Start accepts. Automaton has 1289 states and 1908 transitions. Word has length 168 [2025-03-03 16:49:32,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:32,061 INFO L471 AbstractCegarLoop]: Abstraction has 1289 states and 1908 transitions. [2025-03-03 16:49:32,061 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:32,061 INFO L276 IsEmpty]: Start isEmpty. Operand 1289 states and 1908 transitions. [2025-03-03 16:49:32,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2025-03-03 16:49:32,062 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:32,062 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:32,062 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-03 16:49:32,063 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:32,063 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:32,063 INFO L85 PathProgramCache]: Analyzing trace with hash 435253130, now seen corresponding path program 1 times [2025-03-03 16:49:32,063 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:32,063 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [513844163] [2025-03-03 16:49:32,063 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:32,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:32,100 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-03-03 16:49:32,131 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-03-03 16:49:32,131 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:32,131 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:32,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:32,536 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:32,536 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [513844163] [2025-03-03 16:49:32,537 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [513844163] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:32,537 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:32,537 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-03 16:49:32,537 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1549126275] [2025-03-03 16:49:32,537 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:32,537 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-03 16:49:32,537 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:32,538 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-03 16:49:32,538 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-03 16:49:32,538 INFO L87 Difference]: Start difference. First operand 1289 states and 1908 transitions. Second operand has 8 states, 8 states have (on average 21.0) internal successors, (168), 8 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:33,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:33,248 INFO L93 Difference]: Finished difference Result 2660 states and 3942 transitions. [2025-03-03 16:49:33,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-03 16:49:33,248 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 21.0) internal successors, (168), 8 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 168 [2025-03-03 16:49:33,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:33,253 INFO L225 Difference]: With dead ends: 2660 [2025-03-03 16:49:33,253 INFO L226 Difference]: Without dead ends: 1741 [2025-03-03 16:49:33,255 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-03-03 16:49:33,255 INFO L435 NwaCegarLoop]: 1142 mSDtfsCounter, 147 mSDsluCounter, 5875 mSDsCounter, 0 mSdLazyCounter, 1474 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 147 SdHoareTripleChecker+Valid, 7017 SdHoareTripleChecker+Invalid, 1474 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1474 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:33,255 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [147 Valid, 7017 Invalid, 1474 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1474 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-03-03 16:49:33,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1741 states. [2025-03-03 16:49:33,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1741 to 1737. [2025-03-03 16:49:33,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1737 states, 1736 states have (on average 1.4809907834101383) internal successors, (2571), 1736 states have internal predecessors, (2571), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:33,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1737 states to 1737 states and 2571 transitions. [2025-03-03 16:49:33,282 INFO L78 Accepts]: Start accepts. Automaton has 1737 states and 2571 transitions. Word has length 168 [2025-03-03 16:49:33,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:33,283 INFO L471 AbstractCegarLoop]: Abstraction has 1737 states and 2571 transitions. [2025-03-03 16:49:33,283 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 21.0) internal successors, (168), 8 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:33,283 INFO L276 IsEmpty]: Start isEmpty. Operand 1737 states and 2571 transitions. [2025-03-03 16:49:33,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2025-03-03 16:49:33,285 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:33,285 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:33,286 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-03 16:49:33,286 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:33,286 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:33,286 INFO L85 PathProgramCache]: Analyzing trace with hash -1244770789, now seen corresponding path program 1 times [2025-03-03 16:49:33,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:33,287 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701236099] [2025-03-03 16:49:33,287 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:33,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:33,338 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-03-03 16:49:33,514 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-03-03 16:49:33,515 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:33,515 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:34,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:34,415 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:34,415 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [701236099] [2025-03-03 16:49:34,415 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [701236099] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:34,415 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:34,415 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2025-03-03 16:49:34,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [27605962] [2025-03-03 16:49:34,415 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:34,415 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2025-03-03 16:49:34,415 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:34,415 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2025-03-03 16:49:34,416 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=210, Unknown=0, NotChecked=0, Total=240 [2025-03-03 16:49:34,416 INFO L87 Difference]: Start difference. First operand 1737 states and 2571 transitions. Second operand has 16 states, 16 states have (on average 10.5) internal successors, (168), 16 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:35,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:35,977 INFO L93 Difference]: Finished difference Result 3369 states and 4991 transitions. [2025-03-03 16:49:35,977 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2025-03-03 16:49:35,978 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 10.5) internal successors, (168), 16 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 168 [2025-03-03 16:49:35,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:35,983 INFO L225 Difference]: With dead ends: 3369 [2025-03-03 16:49:35,983 INFO L226 Difference]: Without dead ends: 2210 [2025-03-03 16:49:35,984 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2025-03-03 16:49:35,985 INFO L435 NwaCegarLoop]: 1129 mSDtfsCounter, 434 mSDsluCounter, 15883 mSDsCounter, 0 mSdLazyCounter, 3815 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 434 SdHoareTripleChecker+Valid, 17012 SdHoareTripleChecker+Invalid, 3816 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 3815 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:35,985 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [434 Valid, 17012 Invalid, 3816 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 3815 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2025-03-03 16:49:35,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2210 states. [2025-03-03 16:49:36,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2210 to 2033. [2025-03-03 16:49:36,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2033 states, 2032 states have (on average 1.4798228346456692) internal successors, (3007), 2032 states have internal predecessors, (3007), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:36,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2033 states to 2033 states and 3007 transitions. [2025-03-03 16:49:36,013 INFO L78 Accepts]: Start accepts. Automaton has 2033 states and 3007 transitions. Word has length 168 [2025-03-03 16:49:36,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:36,013 INFO L471 AbstractCegarLoop]: Abstraction has 2033 states and 3007 transitions. [2025-03-03 16:49:36,013 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 10.5) internal successors, (168), 16 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:36,013 INFO L276 IsEmpty]: Start isEmpty. Operand 2033 states and 3007 transitions. [2025-03-03 16:49:36,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2025-03-03 16:49:36,015 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:36,015 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:36,015 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-03 16:49:36,015 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:36,016 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:36,016 INFO L85 PathProgramCache]: Analyzing trace with hash 685530245, now seen corresponding path program 1 times [2025-03-03 16:49:36,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:36,016 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217417444] [2025-03-03 16:49:36,016 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:36,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:36,055 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-03-03 16:49:36,088 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-03-03 16:49:36,089 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:36,089 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:36,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:36,689 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:36,689 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1217417444] [2025-03-03 16:49:36,690 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1217417444] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:36,690 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:36,690 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-03 16:49:36,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [771071514] [2025-03-03 16:49:36,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:36,690 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2025-03-03 16:49:36,691 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:36,691 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-03 16:49:36,691 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2025-03-03 16:49:36,691 INFO L87 Difference]: Start difference. First operand 2033 states and 3007 transitions. Second operand has 9 states, 9 states have (on average 18.666666666666668) internal successors, (168), 9 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:37,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:37,541 INFO L93 Difference]: Finished difference Result 4558 states and 6757 transitions. [2025-03-03 16:49:37,541 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-03 16:49:37,542 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 18.666666666666668) internal successors, (168), 9 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 168 [2025-03-03 16:49:37,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:37,548 INFO L225 Difference]: With dead ends: 4558 [2025-03-03 16:49:37,548 INFO L226 Difference]: Without dead ends: 3238 [2025-03-03 16:49:37,550 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2025-03-03 16:49:37,550 INFO L435 NwaCegarLoop]: 1138 mSDtfsCounter, 1423 mSDsluCounter, 6373 mSDsCounter, 0 mSdLazyCounter, 2142 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1423 SdHoareTripleChecker+Valid, 7511 SdHoareTripleChecker+Invalid, 2143 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:37,550 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1423 Valid, 7511 Invalid, 2143 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2142 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-03-03 16:49:37,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3238 states. [2025-03-03 16:49:37,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3238 to 2738. [2025-03-03 16:49:37,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2738 states, 2737 states have (on average 1.4804530507855316) internal successors, (4052), 2737 states have internal predecessors, (4052), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:37,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2738 states to 2738 states and 4052 transitions. [2025-03-03 16:49:37,583 INFO L78 Accepts]: Start accepts. Automaton has 2738 states and 4052 transitions. Word has length 168 [2025-03-03 16:49:37,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:37,583 INFO L471 AbstractCegarLoop]: Abstraction has 2738 states and 4052 transitions. [2025-03-03 16:49:37,583 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 18.666666666666668) internal successors, (168), 9 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:37,584 INFO L276 IsEmpty]: Start isEmpty. Operand 2738 states and 4052 transitions. [2025-03-03 16:49:37,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2025-03-03 16:49:37,586 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:37,586 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:37,586 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-03 16:49:37,586 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:37,586 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:37,586 INFO L85 PathProgramCache]: Analyzing trace with hash 676818442, now seen corresponding path program 1 times [2025-03-03 16:49:37,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:37,586 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085088159] [2025-03-03 16:49:37,586 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:37,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:37,621 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-03-03 16:49:37,702 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-03-03 16:49:37,702 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:37,703 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:38,040 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:38,040 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:38,040 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085088159] [2025-03-03 16:49:38,040 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2085088159] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:38,040 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:38,040 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 16:49:38,040 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1760023304] [2025-03-03 16:49:38,040 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:38,040 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 16:49:38,040 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:38,041 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 16:49:38,041 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:49:38,041 INFO L87 Difference]: Start difference. First operand 2738 states and 4052 transitions. Second operand has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:38,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:38,397 INFO L93 Difference]: Finished difference Result 5331 states and 7890 transitions. [2025-03-03 16:49:38,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:49:38,397 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 168 [2025-03-03 16:49:38,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:38,403 INFO L225 Difference]: With dead ends: 5331 [2025-03-03 16:49:38,403 INFO L226 Difference]: Without dead ends: 2750 [2025-03-03 16:49:38,406 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:49:38,406 INFO L435 NwaCegarLoop]: 1124 mSDtfsCounter, 1311 mSDsluCounter, 2242 mSDsCounter, 0 mSdLazyCounter, 770 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1311 SdHoareTripleChecker+Valid, 3366 SdHoareTripleChecker+Invalid, 770 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 770 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:38,406 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1311 Valid, 3366 Invalid, 770 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 770 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-03 16:49:38,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2750 states. [2025-03-03 16:49:38,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2750 to 2750. [2025-03-03 16:49:38,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2750 states, 2749 states have (on average 1.4783557657329938) internal successors, (4064), 2749 states have internal predecessors, (4064), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:38,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2750 states to 2750 states and 4064 transitions. [2025-03-03 16:49:38,441 INFO L78 Accepts]: Start accepts. Automaton has 2750 states and 4064 transitions. Word has length 168 [2025-03-03 16:49:38,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:38,441 INFO L471 AbstractCegarLoop]: Abstraction has 2750 states and 4064 transitions. [2025-03-03 16:49:38,441 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:38,441 INFO L276 IsEmpty]: Start isEmpty. Operand 2750 states and 4064 transitions. [2025-03-03 16:49:38,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2025-03-03 16:49:38,447 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:38,447 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:38,448 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-03 16:49:38,448 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:38,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:38,448 INFO L85 PathProgramCache]: Analyzing trace with hash 1806205318, now seen corresponding path program 1 times [2025-03-03 16:49:38,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:38,448 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [14391404] [2025-03-03 16:49:38,448 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:38,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:38,481 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 169 statements into 1 equivalence classes. [2025-03-03 16:49:38,509 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 169 of 169 statements. [2025-03-03 16:49:38,509 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:38,509 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:39,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:39,137 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:39,137 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [14391404] [2025-03-03 16:49:39,138 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [14391404] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:39,138 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:39,138 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 16:49:39,138 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1300743189] [2025-03-03 16:49:39,138 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:39,138 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 16:49:39,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:39,139 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 16:49:39,139 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:49:39,139 INFO L87 Difference]: Start difference. First operand 2750 states and 4064 transitions. Second operand has 7 states, 7 states have (on average 24.142857142857142) internal successors, (169), 7 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:40,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:40,402 INFO L93 Difference]: Finished difference Result 7609 states and 11238 transitions. [2025-03-03 16:49:40,402 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 16:49:40,402 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.142857142857142) internal successors, (169), 7 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 169 [2025-03-03 16:49:40,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:40,417 INFO L225 Difference]: With dead ends: 7609 [2025-03-03 16:49:40,417 INFO L226 Difference]: Without dead ends: 5014 [2025-03-03 16:49:40,422 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=76, Unknown=0, NotChecked=0, Total=110 [2025-03-03 16:49:40,424 INFO L435 NwaCegarLoop]: 930 mSDtfsCounter, 2627 mSDsluCounter, 2351 mSDsCounter, 0 mSdLazyCounter, 2233 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2627 SdHoareTripleChecker+Valid, 3281 SdHoareTripleChecker+Invalid, 2233 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2233 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:40,424 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2627 Valid, 3281 Invalid, 2233 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2233 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2025-03-03 16:49:40,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5014 states. [2025-03-03 16:49:40,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5014 to 2800. [2025-03-03 16:49:40,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2800 states, 2799 states have (on average 1.4762415148267238) internal successors, (4132), 2799 states have internal predecessors, (4132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:40,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2800 states to 2800 states and 4132 transitions. [2025-03-03 16:49:40,459 INFO L78 Accepts]: Start accepts. Automaton has 2800 states and 4132 transitions. Word has length 169 [2025-03-03 16:49:40,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:40,459 INFO L471 AbstractCegarLoop]: Abstraction has 2800 states and 4132 transitions. [2025-03-03 16:49:40,459 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.142857142857142) internal successors, (169), 7 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:40,459 INFO L276 IsEmpty]: Start isEmpty. Operand 2800 states and 4132 transitions. [2025-03-03 16:49:40,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2025-03-03 16:49:40,461 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:40,461 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:40,461 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-03-03 16:49:40,461 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:40,462 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:40,462 INFO L85 PathProgramCache]: Analyzing trace with hash 937096670, now seen corresponding path program 1 times [2025-03-03 16:49:40,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:40,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041241057] [2025-03-03 16:49:40,463 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:40,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:40,527 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 169 statements into 1 equivalence classes. [2025-03-03 16:49:40,693 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 169 of 169 statements. [2025-03-03 16:49:40,693 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:40,693 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:41,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:41,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:41,312 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1041241057] [2025-03-03 16:49:41,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1041241057] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:41,313 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:41,313 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 16:49:41,313 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1298816361] [2025-03-03 16:49:41,313 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:41,313 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 16:49:41,313 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:41,313 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 16:49:41,313 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:49:41,314 INFO L87 Difference]: Start difference. First operand 2800 states and 4132 transitions. Second operand has 7 states, 7 states have (on average 24.142857142857142) internal successors, (169), 7 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:41,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:41,929 INFO L93 Difference]: Finished difference Result 5643 states and 8319 transitions. [2025-03-03 16:49:41,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 16:49:41,930 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.142857142857142) internal successors, (169), 7 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 169 [2025-03-03 16:49:41,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:41,934 INFO L225 Difference]: With dead ends: 5643 [2025-03-03 16:49:41,934 INFO L226 Difference]: Without dead ends: 3088 [2025-03-03 16:49:41,936 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-03-03 16:49:41,937 INFO L435 NwaCegarLoop]: 1113 mSDtfsCounter, 2176 mSDsluCounter, 4451 mSDsCounter, 0 mSdLazyCounter, 1330 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2176 SdHoareTripleChecker+Valid, 5564 SdHoareTripleChecker+Invalid, 1330 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1330 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:41,937 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2176 Valid, 5564 Invalid, 1330 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1330 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-03 16:49:41,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3088 states. [2025-03-03 16:49:41,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3088 to 2806. [2025-03-03 16:49:41,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2806 states, 2805 states have (on average 1.475222816399287) internal successors, (4138), 2805 states have internal predecessors, (4138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:41,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2806 states to 2806 states and 4138 transitions. [2025-03-03 16:49:41,961 INFO L78 Accepts]: Start accepts. Automaton has 2806 states and 4138 transitions. Word has length 169 [2025-03-03 16:49:41,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:41,962 INFO L471 AbstractCegarLoop]: Abstraction has 2806 states and 4138 transitions. [2025-03-03 16:49:41,962 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.142857142857142) internal successors, (169), 7 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:41,962 INFO L276 IsEmpty]: Start isEmpty. Operand 2806 states and 4138 transitions. [2025-03-03 16:49:41,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2025-03-03 16:49:41,964 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:41,964 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:41,964 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-03 16:49:41,964 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:41,964 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:41,964 INFO L85 PathProgramCache]: Analyzing trace with hash 523754129, now seen corresponding path program 1 times [2025-03-03 16:49:41,965 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:41,965 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229707506] [2025-03-03 16:49:41,965 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:41,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:42,000 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 170 statements into 1 equivalence classes. [2025-03-03 16:49:42,096 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 170 of 170 statements. [2025-03-03 16:49:42,096 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:42,096 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:42,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:42,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:42,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1229707506] [2025-03-03 16:49:42,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1229707506] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:42,976 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:42,977 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2025-03-03 16:49:42,977 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [275681269] [2025-03-03 16:49:42,977 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:42,977 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2025-03-03 16:49:42,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:42,978 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2025-03-03 16:49:42,978 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2025-03-03 16:49:42,978 INFO L87 Difference]: Start difference. First operand 2806 states and 4138 transitions. Second operand has 16 states, 16 states have (on average 10.625) internal successors, (170), 16 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:44,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:44,277 INFO L93 Difference]: Finished difference Result 5309 states and 7837 transitions. [2025-03-03 16:49:44,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2025-03-03 16:49:44,277 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 10.625) internal successors, (170), 16 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 170 [2025-03-03 16:49:44,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:44,282 INFO L225 Difference]: With dead ends: 5309 [2025-03-03 16:49:44,282 INFO L226 Difference]: Without dead ends: 3578 [2025-03-03 16:49:44,284 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=90, Invalid=666, Unknown=0, NotChecked=0, Total=756 [2025-03-03 16:49:44,284 INFO L435 NwaCegarLoop]: 1109 mSDtfsCounter, 1875 mSDsluCounter, 12638 mSDsCounter, 0 mSdLazyCounter, 3389 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1875 SdHoareTripleChecker+Valid, 13747 SdHoareTripleChecker+Invalid, 3390 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 3389 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:44,284 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1875 Valid, 13747 Invalid, 3390 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 3389 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2025-03-03 16:49:44,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3578 states. [2025-03-03 16:49:44,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3578 to 3261. [2025-03-03 16:49:44,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3261 states, 3260 states have (on average 1.473006134969325) internal successors, (4802), 3260 states have internal predecessors, (4802), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:44,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3261 states to 3261 states and 4802 transitions. [2025-03-03 16:49:44,330 INFO L78 Accepts]: Start accepts. Automaton has 3261 states and 4802 transitions. Word has length 170 [2025-03-03 16:49:44,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:44,330 INFO L471 AbstractCegarLoop]: Abstraction has 3261 states and 4802 transitions. [2025-03-03 16:49:44,331 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 10.625) internal successors, (170), 16 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:44,331 INFO L276 IsEmpty]: Start isEmpty. Operand 3261 states and 4802 transitions. [2025-03-03 16:49:44,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2025-03-03 16:49:44,333 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:44,333 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:44,333 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-03 16:49:44,333 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:44,334 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:44,334 INFO L85 PathProgramCache]: Analyzing trace with hash -957960708, now seen corresponding path program 1 times [2025-03-03 16:49:44,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:44,334 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307957408] [2025-03-03 16:49:44,334 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:44,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:44,376 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 170 statements into 1 equivalence classes. [2025-03-03 16:49:44,472 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 170 of 170 statements. [2025-03-03 16:49:44,472 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:44,472 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:45,004 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:45,004 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:45,004 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307957408] [2025-03-03 16:49:45,004 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [307957408] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:45,004 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:45,004 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-03-03 16:49:45,004 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [191607163] [2025-03-03 16:49:45,004 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:45,005 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-03-03 16:49:45,005 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:45,005 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-03 16:49:45,005 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-03-03 16:49:45,005 INFO L87 Difference]: Start difference. First operand 3261 states and 4802 transitions. Second operand has 10 states, 10 states have (on average 17.0) internal successors, (170), 10 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:45,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:45,610 INFO L93 Difference]: Finished difference Result 5250 states and 7744 transitions. [2025-03-03 16:49:45,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-03 16:49:45,611 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 17.0) internal successors, (170), 10 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 170 [2025-03-03 16:49:45,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:45,615 INFO L225 Difference]: With dead ends: 5250 [2025-03-03 16:49:45,615 INFO L226 Difference]: Without dead ends: 3275 [2025-03-03 16:49:45,616 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-03-03 16:49:45,616 INFO L435 NwaCegarLoop]: 1139 mSDtfsCounter, 365 mSDsluCounter, 7178 mSDsCounter, 0 mSdLazyCounter, 1792 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 365 SdHoareTripleChecker+Valid, 8317 SdHoareTripleChecker+Invalid, 1793 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1792 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:45,617 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [365 Valid, 8317 Invalid, 1793 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1792 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-03 16:49:45,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3275 states. [2025-03-03 16:49:45,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3275 to 3261. [2025-03-03 16:49:45,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3261 states, 3260 states have (on average 1.473006134969325) internal successors, (4802), 3260 states have internal predecessors, (4802), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:45,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3261 states to 3261 states and 4802 transitions. [2025-03-03 16:49:45,636 INFO L78 Accepts]: Start accepts. Automaton has 3261 states and 4802 transitions. Word has length 170 [2025-03-03 16:49:45,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:45,637 INFO L471 AbstractCegarLoop]: Abstraction has 3261 states and 4802 transitions. [2025-03-03 16:49:45,637 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 17.0) internal successors, (170), 10 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:45,637 INFO L276 IsEmpty]: Start isEmpty. Operand 3261 states and 4802 transitions. [2025-03-03 16:49:45,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2025-03-03 16:49:45,639 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:45,639 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:45,639 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-03 16:49:45,639 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:45,640 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:45,640 INFO L85 PathProgramCache]: Analyzing trace with hash -1902047777, now seen corresponding path program 1 times [2025-03-03 16:49:45,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:45,640 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1856746483] [2025-03-03 16:49:45,640 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:45,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:45,674 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 170 statements into 1 equivalence classes. [2025-03-03 16:49:45,692 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 170 of 170 statements. [2025-03-03 16:49:45,692 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:45,692 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:45,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:45,850 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:45,850 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1856746483] [2025-03-03 16:49:45,850 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1856746483] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:45,850 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:45,850 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 16:49:45,850 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [182552041] [2025-03-03 16:49:45,851 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:45,851 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 16:49:45,851 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:45,852 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 16:49:45,852 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:45,852 INFO L87 Difference]: Start difference. First operand 3261 states and 4802 transitions. Second operand has 4 states, 4 states have (on average 42.5) internal successors, (170), 4 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:46,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:46,118 INFO L93 Difference]: Finished difference Result 6112 states and 9021 transitions. [2025-03-03 16:49:46,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 16:49:46,119 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 42.5) internal successors, (170), 4 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 170 [2025-03-03 16:49:46,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:46,123 INFO L225 Difference]: With dead ends: 6112 [2025-03-03 16:49:46,123 INFO L226 Difference]: Without dead ends: 3277 [2025-03-03 16:49:46,125 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:49:46,126 INFO L435 NwaCegarLoop]: 1148 mSDtfsCounter, 0 mSDsluCounter, 2288 mSDsCounter, 0 mSdLazyCounter, 700 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3436 SdHoareTripleChecker+Invalid, 700 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 700 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:46,126 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3436 Invalid, 700 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 700 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 16:49:46,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3277 states. [2025-03-03 16:49:46,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3277 to 3277. [2025-03-03 16:49:46,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3277 states, 3276 states have (on average 1.4706959706959708) internal successors, (4818), 3276 states have internal predecessors, (4818), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:46,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3277 states to 3277 states and 4818 transitions. [2025-03-03 16:49:46,151 INFO L78 Accepts]: Start accepts. Automaton has 3277 states and 4818 transitions. Word has length 170 [2025-03-03 16:49:46,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:46,151 INFO L471 AbstractCegarLoop]: Abstraction has 3277 states and 4818 transitions. [2025-03-03 16:49:46,151 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 42.5) internal successors, (170), 4 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:46,151 INFO L276 IsEmpty]: Start isEmpty. Operand 3277 states and 4818 transitions. [2025-03-03 16:49:46,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2025-03-03 16:49:46,153 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:46,154 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:46,154 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-03 16:49:46,154 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:46,154 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:46,154 INFO L85 PathProgramCache]: Analyzing trace with hash 1909501681, now seen corresponding path program 1 times [2025-03-03 16:49:46,154 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:46,155 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [178820070] [2025-03-03 16:49:46,155 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:46,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:46,193 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 170 statements into 1 equivalence classes. [2025-03-03 16:49:46,275 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 170 of 170 statements. [2025-03-03 16:49:46,276 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:46,276 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:46,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:46,929 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:46,929 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [178820070] [2025-03-03 16:49:46,929 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [178820070] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:46,930 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:46,930 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 16:49:46,930 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [172602033] [2025-03-03 16:49:46,930 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:46,930 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 16:49:46,930 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:46,930 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 16:49:46,930 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:49:46,930 INFO L87 Difference]: Start difference. First operand 3277 states and 4818 transitions. Second operand has 7 states, 7 states have (on average 24.285714285714285) internal successors, (170), 7 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:47,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:47,584 INFO L93 Difference]: Finished difference Result 6599 states and 9697 transitions. [2025-03-03 16:49:47,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 16:49:47,584 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.285714285714285) internal successors, (170), 7 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 170 [2025-03-03 16:49:47,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:47,589 INFO L225 Difference]: With dead ends: 6599 [2025-03-03 16:49:47,590 INFO L226 Difference]: Without dead ends: 3604 [2025-03-03 16:49:47,592 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-03-03 16:49:47,593 INFO L435 NwaCegarLoop]: 1118 mSDtfsCounter, 2163 mSDsluCounter, 4460 mSDsCounter, 0 mSdLazyCounter, 1333 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2163 SdHoareTripleChecker+Valid, 5578 SdHoareTripleChecker+Invalid, 1333 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1333 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:47,593 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2163 Valid, 5578 Invalid, 1333 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1333 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-03 16:49:47,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3604 states. [2025-03-03 16:49:47,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3604 to 3277. [2025-03-03 16:49:47,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3277 states, 3276 states have (on average 1.4706959706959708) internal successors, (4818), 3276 states have internal predecessors, (4818), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:47,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3277 states to 3277 states and 4818 transitions. [2025-03-03 16:49:47,622 INFO L78 Accepts]: Start accepts. Automaton has 3277 states and 4818 transitions. Word has length 170 [2025-03-03 16:49:47,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:47,622 INFO L471 AbstractCegarLoop]: Abstraction has 3277 states and 4818 transitions. [2025-03-03 16:49:47,622 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.285714285714285) internal successors, (170), 7 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:47,622 INFO L276 IsEmpty]: Start isEmpty. Operand 3277 states and 4818 transitions. [2025-03-03 16:49:47,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2025-03-03 16:49:47,624 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:47,624 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:47,624 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-03-03 16:49:47,625 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:47,625 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:47,625 INFO L85 PathProgramCache]: Analyzing trace with hash 1308476492, now seen corresponding path program 1 times [2025-03-03 16:49:47,625 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:47,625 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1838548205] [2025-03-03 16:49:47,625 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:47,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:47,662 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 170 statements into 1 equivalence classes. [2025-03-03 16:49:47,736 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 170 of 170 statements. [2025-03-03 16:49:47,736 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:47,736 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:47,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:47,982 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:47,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1838548205] [2025-03-03 16:49:47,982 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1838548205] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:47,982 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:47,982 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 16:49:47,982 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1463383969] [2025-03-03 16:49:47,982 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:47,982 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 16:49:47,982 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:47,983 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 16:49:47,983 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:49:47,983 INFO L87 Difference]: Start difference. First operand 3277 states and 4818 transitions. Second operand has 7 states, 7 states have (on average 24.285714285714285) internal successors, (170), 7 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:48,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:48,391 INFO L93 Difference]: Finished difference Result 6324 states and 9309 transitions. [2025-03-03 16:49:48,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 16:49:48,392 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.285714285714285) internal successors, (170), 7 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 170 [2025-03-03 16:49:48,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:48,397 INFO L225 Difference]: With dead ends: 6324 [2025-03-03 16:49:48,397 INFO L226 Difference]: Without dead ends: 3373 [2025-03-03 16:49:48,399 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:49:48,400 INFO L435 NwaCegarLoop]: 1144 mSDtfsCounter, 10 mSDsluCounter, 4570 mSDsCounter, 0 mSdLazyCounter, 1190 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 5714 SdHoareTripleChecker+Invalid, 1191 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1190 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:48,401 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 5714 Invalid, 1191 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1190 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-03 16:49:48,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3373 states. [2025-03-03 16:49:48,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3373 to 3349. [2025-03-03 16:49:48,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3349 states, 3348 states have (on average 1.467741935483871) internal successors, (4914), 3348 states have internal predecessors, (4914), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:48,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3349 states to 3349 states and 4914 transitions. [2025-03-03 16:49:48,428 INFO L78 Accepts]: Start accepts. Automaton has 3349 states and 4914 transitions. Word has length 170 [2025-03-03 16:49:48,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:48,428 INFO L471 AbstractCegarLoop]: Abstraction has 3349 states and 4914 transitions. [2025-03-03 16:49:48,428 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.285714285714285) internal successors, (170), 7 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:48,428 INFO L276 IsEmpty]: Start isEmpty. Operand 3349 states and 4914 transitions. [2025-03-03 16:49:48,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2025-03-03 16:49:48,430 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:48,430 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:48,430 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-03 16:49:48,430 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:48,431 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:48,431 INFO L85 PathProgramCache]: Analyzing trace with hash 335856192, now seen corresponding path program 1 times [2025-03-03 16:49:48,431 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:48,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474100858] [2025-03-03 16:49:48,431 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:48,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:48,468 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 171 statements into 1 equivalence classes. [2025-03-03 16:49:48,551 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 171 of 171 statements. [2025-03-03 16:49:48,551 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:48,551 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:48,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:48,881 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:48,881 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [474100858] [2025-03-03 16:49:48,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [474100858] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:48,881 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:48,881 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 16:49:48,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [605251526] [2025-03-03 16:49:48,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:48,882 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 16:49:48,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:48,882 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 16:49:48,882 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:49:48,882 INFO L87 Difference]: Start difference. First operand 3349 states and 4914 transitions. Second operand has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:49,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:49,504 INFO L93 Difference]: Finished difference Result 7235 states and 10627 transitions. [2025-03-03 16:49:49,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:49:49,505 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 171 [2025-03-03 16:49:49,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:49,510 INFO L225 Difference]: With dead ends: 7235 [2025-03-03 16:49:49,510 INFO L226 Difference]: Without dead ends: 4148 [2025-03-03 16:49:49,513 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:49:49,513 INFO L435 NwaCegarLoop]: 1111 mSDtfsCounter, 3677 mSDsluCounter, 2221 mSDsCounter, 0 mSdLazyCounter, 805 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3677 SdHoareTripleChecker+Valid, 3332 SdHoareTripleChecker+Invalid, 805 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 805 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:49,513 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3677 Valid, 3332 Invalid, 805 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 805 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-03 16:49:49,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4148 states. [2025-03-03 16:49:49,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4148 to 3337. [2025-03-03 16:49:49,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3337 states, 3336 states have (on average 1.4670263788968825) internal successors, (4894), 3336 states have internal predecessors, (4894), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:49,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3337 states to 3337 states and 4894 transitions. [2025-03-03 16:49:49,542 INFO L78 Accepts]: Start accepts. Automaton has 3337 states and 4894 transitions. Word has length 171 [2025-03-03 16:49:49,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:49,542 INFO L471 AbstractCegarLoop]: Abstraction has 3337 states and 4894 transitions. [2025-03-03 16:49:49,542 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:49,543 INFO L276 IsEmpty]: Start isEmpty. Operand 3337 states and 4894 transitions. [2025-03-03 16:49:49,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2025-03-03 16:49:49,544 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:49,544 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:49,544 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-03-03 16:49:49,545 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:49,545 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:49,545 INFO L85 PathProgramCache]: Analyzing trace with hash -950099487, now seen corresponding path program 1 times [2025-03-03 16:49:49,545 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:49,545 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086857610] [2025-03-03 16:49:49,545 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:49,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:49,582 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 171 statements into 1 equivalence classes. [2025-03-03 16:49:49,601 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 171 of 171 statements. [2025-03-03 16:49:49,601 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:49,602 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:49,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:49,776 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:49,776 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2086857610] [2025-03-03 16:49:49,776 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2086857610] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:49,776 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:49,777 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-03 16:49:49,777 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196668659] [2025-03-03 16:49:49,777 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:49,777 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-03 16:49:49,778 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:49,778 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-03 16:49:49,778 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:49:49,778 INFO L87 Difference]: Start difference. First operand 3337 states and 4894 transitions. Second operand has 6 states, 6 states have (on average 28.5) internal successors, (171), 6 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:50,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:50,708 INFO L93 Difference]: Finished difference Result 7612 states and 11176 transitions. [2025-03-03 16:49:50,708 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-03 16:49:50,709 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 28.5) internal successors, (171), 6 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 171 [2025-03-03 16:49:50,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:50,712 INFO L225 Difference]: With dead ends: 7612 [2025-03-03 16:49:50,712 INFO L226 Difference]: Without dead ends: 3369 [2025-03-03 16:49:50,714 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2025-03-03 16:49:50,715 INFO L435 NwaCegarLoop]: 1111 mSDtfsCounter, 790 mSDsluCounter, 4053 mSDsCounter, 0 mSdLazyCounter, 1956 mSolverCounterSat, 80 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 790 SdHoareTripleChecker+Valid, 5164 SdHoareTripleChecker+Invalid, 2036 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 80 IncrementalHoareTripleChecker+Valid, 1956 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:50,715 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [790 Valid, 5164 Invalid, 2036 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [80 Valid, 1956 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-03-03 16:49:50,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3369 states. [2025-03-03 16:49:50,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3369 to 3353. [2025-03-03 16:49:50,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3353 states, 3352 states have (on average 1.4647971360381862) internal successors, (4910), 3352 states have internal predecessors, (4910), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:50,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3353 states to 3353 states and 4910 transitions. [2025-03-03 16:49:50,757 INFO L78 Accepts]: Start accepts. Automaton has 3353 states and 4910 transitions. Word has length 171 [2025-03-03 16:49:50,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:50,757 INFO L471 AbstractCegarLoop]: Abstraction has 3353 states and 4910 transitions. [2025-03-03 16:49:50,758 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 28.5) internal successors, (171), 6 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:50,758 INFO L276 IsEmpty]: Start isEmpty. Operand 3353 states and 4910 transitions. [2025-03-03 16:49:50,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2025-03-03 16:49:50,760 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:50,760 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:50,761 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2025-03-03 16:49:50,761 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:50,761 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:50,761 INFO L85 PathProgramCache]: Analyzing trace with hash -741626810, now seen corresponding path program 1 times [2025-03-03 16:49:50,762 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:50,762 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304895183] [2025-03-03 16:49:50,762 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:50,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:50,813 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 171 statements into 1 equivalence classes. [2025-03-03 16:49:50,901 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 171 of 171 statements. [2025-03-03 16:49:50,902 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:50,902 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:51,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:51,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:51,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1304895183] [2025-03-03 16:49:51,261 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1304895183] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:51,261 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:51,261 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-03 16:49:51,262 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [149139807] [2025-03-03 16:49:51,262 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:51,262 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-03 16:49:51,262 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:51,262 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-03 16:49:51,262 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:49:51,263 INFO L87 Difference]: Start difference. First operand 3353 states and 4910 transitions. Second operand has 6 states, 6 states have (on average 28.5) internal successors, (171), 6 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:51,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:51,812 INFO L93 Difference]: Finished difference Result 6679 states and 9781 transitions. [2025-03-03 16:49:51,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-03 16:49:51,813 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 28.5) internal successors, (171), 6 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 171 [2025-03-03 16:49:51,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:51,816 INFO L225 Difference]: With dead ends: 6679 [2025-03-03 16:49:51,816 INFO L226 Difference]: Without dead ends: 3656 [2025-03-03 16:49:51,818 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2025-03-03 16:49:51,819 INFO L435 NwaCegarLoop]: 1109 mSDtfsCounter, 2168 mSDsluCounter, 3321 mSDsCounter, 0 mSdLazyCounter, 1086 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2168 SdHoareTripleChecker+Valid, 4430 SdHoareTripleChecker+Invalid, 1086 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1086 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:51,819 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2168 Valid, 4430 Invalid, 1086 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1086 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-03 16:49:51,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3656 states. [2025-03-03 16:49:51,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3656 to 3345. [2025-03-03 16:49:51,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3345 states, 3344 states have (on average 1.4623205741626795) internal successors, (4890), 3344 states have internal predecessors, (4890), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:51,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3345 states to 3345 states and 4890 transitions. [2025-03-03 16:49:51,849 INFO L78 Accepts]: Start accepts. Automaton has 3345 states and 4890 transitions. Word has length 171 [2025-03-03 16:49:51,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:51,849 INFO L471 AbstractCegarLoop]: Abstraction has 3345 states and 4890 transitions. [2025-03-03 16:49:51,849 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 28.5) internal successors, (171), 6 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:51,849 INFO L276 IsEmpty]: Start isEmpty. Operand 3345 states and 4890 transitions. [2025-03-03 16:49:51,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2025-03-03 16:49:51,851 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:51,851 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:51,851 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-03-03 16:49:51,851 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:51,851 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:51,851 INFO L85 PathProgramCache]: Analyzing trace with hash -923415894, now seen corresponding path program 1 times [2025-03-03 16:49:51,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:51,852 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1683819376] [2025-03-03 16:49:51,852 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:51,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:51,888 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 171 statements into 1 equivalence classes. [2025-03-03 16:49:52,014 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 171 of 171 statements. [2025-03-03 16:49:52,014 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:52,014 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:52,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:52,630 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:52,630 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1683819376] [2025-03-03 16:49:52,630 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1683819376] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:52,630 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:52,630 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 16:49:52,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [950910718] [2025-03-03 16:49:52,630 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:52,630 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 16:49:52,630 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:52,631 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 16:49:52,631 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:49:52,631 INFO L87 Difference]: Start difference. First operand 3345 states and 4890 transitions. Second operand has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:53,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:53,371 INFO L93 Difference]: Finished difference Result 7247 states and 10607 transitions. [2025-03-03 16:49:53,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:49:53,371 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 171 [2025-03-03 16:49:53,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:53,374 INFO L225 Difference]: With dead ends: 7247 [2025-03-03 16:49:53,374 INFO L226 Difference]: Without dead ends: 4156 [2025-03-03 16:49:53,377 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:49:53,377 INFO L435 NwaCegarLoop]: 1112 mSDtfsCounter, 3645 mSDsluCounter, 2220 mSDsCounter, 0 mSdLazyCounter, 804 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3645 SdHoareTripleChecker+Valid, 3332 SdHoareTripleChecker+Invalid, 804 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 804 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:53,377 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3645 Valid, 3332 Invalid, 804 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 804 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-03-03 16:49:53,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4156 states. [2025-03-03 16:49:53,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4156 to 3345. [2025-03-03 16:49:53,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3345 states, 3344 states have (on average 1.4611244019138756) internal successors, (4886), 3344 states have internal predecessors, (4886), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:53,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3345 states to 3345 states and 4886 transitions. [2025-03-03 16:49:53,399 INFO L78 Accepts]: Start accepts. Automaton has 3345 states and 4886 transitions. Word has length 171 [2025-03-03 16:49:53,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:53,399 INFO L471 AbstractCegarLoop]: Abstraction has 3345 states and 4886 transitions. [2025-03-03 16:49:53,400 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:53,400 INFO L276 IsEmpty]: Start isEmpty. Operand 3345 states and 4886 transitions. [2025-03-03 16:49:53,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2025-03-03 16:49:53,401 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:53,402 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:53,402 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2025-03-03 16:49:53,402 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:53,403 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:53,403 INFO L85 PathProgramCache]: Analyzing trace with hash -380173429, now seen corresponding path program 1 times [2025-03-03 16:49:53,403 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:53,403 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604225040] [2025-03-03 16:49:53,403 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:53,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:53,437 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 172 statements into 1 equivalence classes. [2025-03-03 16:49:53,531 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 172 of 172 statements. [2025-03-03 16:49:53,532 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:53,532 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:54,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:54,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:54,076 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [604225040] [2025-03-03 16:49:54,076 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [604225040] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:54,076 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:54,076 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 16:49:54,076 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [251398219] [2025-03-03 16:49:54,077 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:54,077 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 16:49:54,077 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:54,077 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 16:49:54,077 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:49:54,078 INFO L87 Difference]: Start difference. First operand 3345 states and 4886 transitions. Second operand has 5 states, 5 states have (on average 34.4) internal successors, (172), 5 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:54,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:54,677 INFO L93 Difference]: Finished difference Result 6927 states and 10161 transitions. [2025-03-03 16:49:54,677 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:49:54,677 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.4) internal successors, (172), 5 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 172 [2025-03-03 16:49:54,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:54,681 INFO L225 Difference]: With dead ends: 6927 [2025-03-03 16:49:54,681 INFO L226 Difference]: Without dead ends: 4156 [2025-03-03 16:49:54,683 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:49:54,683 INFO L435 NwaCegarLoop]: 1111 mSDtfsCounter, 3578 mSDsluCounter, 2220 mSDsCounter, 0 mSdLazyCounter, 805 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3578 SdHoareTripleChecker+Valid, 3331 SdHoareTripleChecker+Invalid, 805 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 805 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:54,683 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3578 Valid, 3331 Invalid, 805 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 805 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-03 16:49:54,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4156 states. [2025-03-03 16:49:54,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4156 to 3345. [2025-03-03 16:49:54,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3345 states, 3344 states have (on average 1.457535885167464) internal successors, (4874), 3344 states have internal predecessors, (4874), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:54,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3345 states to 3345 states and 4874 transitions. [2025-03-03 16:49:54,711 INFO L78 Accepts]: Start accepts. Automaton has 3345 states and 4874 transitions. Word has length 172 [2025-03-03 16:49:54,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:54,711 INFO L471 AbstractCegarLoop]: Abstraction has 3345 states and 4874 transitions. [2025-03-03 16:49:54,711 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.4) internal successors, (172), 5 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:54,711 INFO L276 IsEmpty]: Start isEmpty. Operand 3345 states and 4874 transitions. [2025-03-03 16:49:54,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-03-03 16:49:54,713 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:54,713 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:54,713 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2025-03-03 16:49:54,713 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:54,714 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:54,714 INFO L85 PathProgramCache]: Analyzing trace with hash -1250030618, now seen corresponding path program 1 times [2025-03-03 16:49:54,714 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:54,714 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1391709121] [2025-03-03 16:49:54,714 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:54,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:54,751 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-03-03 16:49:54,831 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-03-03 16:49:54,831 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:54,831 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:55,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:55,445 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:55,446 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1391709121] [2025-03-03 16:49:55,446 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1391709121] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:55,446 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:55,446 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 16:49:55,446 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962375493] [2025-03-03 16:49:55,446 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:55,446 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 16:49:55,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:55,446 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 16:49:55,446 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:49:55,446 INFO L87 Difference]: Start difference. First operand 3345 states and 4874 transitions. Second operand has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 7 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:56,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:56,053 INFO L93 Difference]: Finished difference Result 6531 states and 9555 transitions. [2025-03-03 16:49:56,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 16:49:56,053 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 7 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-03-03 16:49:56,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:56,056 INFO L225 Difference]: With dead ends: 6531 [2025-03-03 16:49:56,056 INFO L226 Difference]: Without dead ends: 3808 [2025-03-03 16:49:56,059 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-03-03 16:49:56,059 INFO L435 NwaCegarLoop]: 1117 mSDtfsCounter, 1862 mSDsluCounter, 4464 mSDsCounter, 0 mSdLazyCounter, 1314 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1862 SdHoareTripleChecker+Valid, 5581 SdHoareTripleChecker+Invalid, 1314 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:56,059 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1862 Valid, 5581 Invalid, 1314 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1314 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-03 16:49:56,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3808 states. [2025-03-03 16:49:56,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3808 to 3369. [2025-03-03 16:49:56,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3369 states, 3368 states have (on average 1.4542755344418052) internal successors, (4898), 3368 states have internal predecessors, (4898), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:56,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3369 states to 3369 states and 4898 transitions. [2025-03-03 16:49:56,084 INFO L78 Accepts]: Start accepts. Automaton has 3369 states and 4898 transitions. Word has length 173 [2025-03-03 16:49:56,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:56,085 INFO L471 AbstractCegarLoop]: Abstraction has 3369 states and 4898 transitions. [2025-03-03 16:49:56,085 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.714285714285715) internal successors, (173), 7 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:56,085 INFO L276 IsEmpty]: Start isEmpty. Operand 3369 states and 4898 transitions. [2025-03-03 16:49:56,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2025-03-03 16:49:56,086 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:56,086 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:56,086 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2025-03-03 16:49:56,087 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:56,087 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:56,087 INFO L85 PathProgramCache]: Analyzing trace with hash -1599183482, now seen corresponding path program 1 times [2025-03-03 16:49:56,087 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:56,087 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410819631] [2025-03-03 16:49:56,087 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:56,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:56,122 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 174 statements into 1 equivalence classes. [2025-03-03 16:49:56,186 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 174 of 174 statements. [2025-03-03 16:49:56,186 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:56,186 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:56,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:56,588 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:56,588 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [410819631] [2025-03-03 16:49:56,588 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [410819631] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:56,588 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:56,588 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-03 16:49:56,589 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [65910656] [2025-03-03 16:49:56,589 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:56,589 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2025-03-03 16:49:56,589 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:56,589 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-03 16:49:56,589 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-03-03 16:49:56,590 INFO L87 Difference]: Start difference. First operand 3369 states and 4898 transitions. Second operand has 9 states, 9 states have (on average 19.333333333333332) internal successors, (174), 9 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:57,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:57,088 INFO L93 Difference]: Finished difference Result 6248 states and 9139 transitions. [2025-03-03 16:49:57,088 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-03 16:49:57,088 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 19.333333333333332) internal successors, (174), 9 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 174 [2025-03-03 16:49:57,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:57,091 INFO L225 Difference]: With dead ends: 6248 [2025-03-03 16:49:57,091 INFO L226 Difference]: Without dead ends: 3657 [2025-03-03 16:49:57,092 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-03-03 16:49:57,093 INFO L435 NwaCegarLoop]: 1141 mSDtfsCounter, 14 mSDsluCounter, 5696 mSDsCounter, 0 mSdLazyCounter, 1440 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 6837 SdHoareTripleChecker+Invalid, 1441 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1440 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:57,093 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 6837 Invalid, 1441 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1440 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-03 16:49:57,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3657 states. [2025-03-03 16:49:57,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3657 to 3585. [2025-03-03 16:49:57,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3585 states, 3584 states have (on average 1.4469866071428572) internal successors, (5186), 3584 states have internal predecessors, (5186), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:57,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3585 states to 3585 states and 5186 transitions. [2025-03-03 16:49:57,112 INFO L78 Accepts]: Start accepts. Automaton has 3585 states and 5186 transitions. Word has length 174 [2025-03-03 16:49:57,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:57,112 INFO L471 AbstractCegarLoop]: Abstraction has 3585 states and 5186 transitions. [2025-03-03 16:49:57,112 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 19.333333333333332) internal successors, (174), 9 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:57,112 INFO L276 IsEmpty]: Start isEmpty. Operand 3585 states and 5186 transitions. [2025-03-03 16:49:57,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2025-03-03 16:49:57,114 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:57,114 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:57,114 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2025-03-03 16:49:57,114 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:57,115 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:57,115 INFO L85 PathProgramCache]: Analyzing trace with hash -70107997, now seen corresponding path program 1 times [2025-03-03 16:49:57,115 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:57,115 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [205275758] [2025-03-03 16:49:57,115 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:57,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:57,152 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 174 statements into 1 equivalence classes. [2025-03-03 16:49:57,191 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 174 of 174 statements. [2025-03-03 16:49:57,191 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:57,191 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:57,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:57,467 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:57,467 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [205275758] [2025-03-03 16:49:57,467 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [205275758] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:57,467 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:57,467 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 16:49:57,467 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936467694] [2025-03-03 16:49:57,467 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:57,467 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 16:49:57,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:57,468 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 16:49:57,468 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:49:57,468 INFO L87 Difference]: Start difference. First operand 3585 states and 5186 transitions. Second operand has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:58,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:58,062 INFO L93 Difference]: Finished difference Result 7359 states and 10713 transitions. [2025-03-03 16:49:58,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:49:58,062 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 174 [2025-03-03 16:49:58,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:58,065 INFO L225 Difference]: With dead ends: 7359 [2025-03-03 16:49:58,065 INFO L226 Difference]: Without dead ends: 4360 [2025-03-03 16:49:58,068 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:49:58,068 INFO L435 NwaCegarLoop]: 1112 mSDtfsCounter, 3626 mSDsluCounter, 2221 mSDsCounter, 0 mSdLazyCounter, 804 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3626 SdHoareTripleChecker+Valid, 3333 SdHoareTripleChecker+Invalid, 804 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 804 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:58,068 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3626 Valid, 3333 Invalid, 804 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 804 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-03 16:49:58,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4360 states. [2025-03-03 16:49:58,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4360 to 3549. [2025-03-03 16:49:58,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3549 states, 3548 states have (on average 1.4447576099210824) internal successors, (5126), 3548 states have internal predecessors, (5126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:58,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3549 states to 3549 states and 5126 transitions. [2025-03-03 16:49:58,092 INFO L78 Accepts]: Start accepts. Automaton has 3549 states and 5126 transitions. Word has length 174 [2025-03-03 16:49:58,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:58,093 INFO L471 AbstractCegarLoop]: Abstraction has 3549 states and 5126 transitions. [2025-03-03 16:49:58,093 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:58,093 INFO L276 IsEmpty]: Start isEmpty. Operand 3549 states and 5126 transitions. [2025-03-03 16:49:58,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-03-03 16:49:58,095 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:58,095 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:58,095 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2025-03-03 16:49:58,095 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:58,095 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:58,095 INFO L85 PathProgramCache]: Analyzing trace with hash 1321763895, now seen corresponding path program 1 times [2025-03-03 16:49:58,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:58,095 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345227511] [2025-03-03 16:49:58,096 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:58,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:58,127 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-03-03 16:49:58,145 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-03-03 16:49:58,145 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:58,145 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:58,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:58,318 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:58,318 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1345227511] [2025-03-03 16:49:58,318 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1345227511] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:58,318 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:58,318 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-03 16:49:58,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [301133200] [2025-03-03 16:49:58,318 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:58,318 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-03 16:49:58,318 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:58,319 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-03 16:49:58,319 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:49:58,319 INFO L87 Difference]: Start difference. First operand 3549 states and 5126 transitions. Second operand has 6 states, 6 states have (on average 29.166666666666668) internal successors, (175), 6 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:59,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:49:59,185 INFO L93 Difference]: Finished difference Result 7929 states and 11553 transitions. [2025-03-03 16:49:59,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-03-03 16:49:59,185 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.166666666666668) internal successors, (175), 6 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-03-03 16:49:59,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:49:59,188 INFO L225 Difference]: With dead ends: 7929 [2025-03-03 16:49:59,188 INFO L226 Difference]: Without dead ends: 3621 [2025-03-03 16:49:59,191 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2025-03-03 16:49:59,192 INFO L435 NwaCegarLoop]: 1156 mSDtfsCounter, 823 mSDsluCounter, 4188 mSDsCounter, 0 mSdLazyCounter, 1984 mSolverCounterSat, 81 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 823 SdHoareTripleChecker+Valid, 5344 SdHoareTripleChecker+Invalid, 2065 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 81 IncrementalHoareTripleChecker+Valid, 1984 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-03-03 16:49:59,192 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [823 Valid, 5344 Invalid, 2065 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [81 Valid, 1984 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-03-03 16:49:59,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3621 states. [2025-03-03 16:49:59,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3621 to 3537. [2025-03-03 16:49:59,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3537 states, 3536 states have (on average 1.4462669683257918) internal successors, (5114), 3536 states have internal predecessors, (5114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:59,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3537 states to 3537 states and 5114 transitions. [2025-03-03 16:49:59,217 INFO L78 Accepts]: Start accepts. Automaton has 3537 states and 5114 transitions. Word has length 175 [2025-03-03 16:49:59,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:49:59,217 INFO L471 AbstractCegarLoop]: Abstraction has 3537 states and 5114 transitions. [2025-03-03 16:49:59,217 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.166666666666668) internal successors, (175), 6 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:49:59,217 INFO L276 IsEmpty]: Start isEmpty. Operand 3537 states and 5114 transitions. [2025-03-03 16:49:59,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-03-03 16:49:59,219 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:49:59,219 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:49:59,219 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2025-03-03 16:49:59,219 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:49:59,220 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:49:59,220 INFO L85 PathProgramCache]: Analyzing trace with hash 1234328924, now seen corresponding path program 1 times [2025-03-03 16:49:59,220 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:49:59,220 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [546938309] [2025-03-03 16:49:59,220 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:49:59,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:49:59,255 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-03-03 16:49:59,304 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-03-03 16:49:59,304 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:49:59,304 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:49:59,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:49:59,624 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:49:59,624 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [546938309] [2025-03-03 16:49:59,624 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [546938309] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:49:59,624 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:49:59,624 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 16:49:59,624 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201924137] [2025-03-03 16:49:59,624 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:49:59,624 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 16:49:59,624 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:49:59,624 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 16:49:59,625 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:49:59,625 INFO L87 Difference]: Start difference. First operand 3537 states and 5114 transitions. Second operand has 7 states, 7 states have (on average 25.0) internal successors, (175), 7 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:00,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:00,261 INFO L93 Difference]: Finished difference Result 6693 states and 9729 transitions. [2025-03-03 16:50:00,263 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-03 16:50:00,263 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.0) internal successors, (175), 7 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-03-03 16:50:00,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:00,266 INFO L225 Difference]: With dead ends: 6693 [2025-03-03 16:50:00,266 INFO L226 Difference]: Without dead ends: 3928 [2025-03-03 16:50:00,268 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-03-03 16:50:00,268 INFO L435 NwaCegarLoop]: 1110 mSDtfsCounter, 2428 mSDsluCounter, 4429 mSDsCounter, 0 mSdLazyCounter, 1356 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2428 SdHoareTripleChecker+Valid, 5539 SdHoareTripleChecker+Invalid, 1357 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1356 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:00,268 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2428 Valid, 5539 Invalid, 1357 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1356 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-03 16:50:00,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3928 states. [2025-03-03 16:50:00,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3928 to 3477. [2025-03-03 16:50:00,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3477 states, 3476 states have (on average 1.4401611047180667) internal successors, (5006), 3476 states have internal predecessors, (5006), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:00,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3477 states to 3477 states and 5006 transitions. [2025-03-03 16:50:00,292 INFO L78 Accepts]: Start accepts. Automaton has 3477 states and 5006 transitions. Word has length 175 [2025-03-03 16:50:00,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:00,292 INFO L471 AbstractCegarLoop]: Abstraction has 3477 states and 5006 transitions. [2025-03-03 16:50:00,292 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.0) internal successors, (175), 7 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:00,292 INFO L276 IsEmpty]: Start isEmpty. Operand 3477 states and 5006 transitions. [2025-03-03 16:50:00,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-03-03 16:50:00,294 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:00,294 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:00,294 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2025-03-03 16:50:00,294 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:00,294 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:00,295 INFO L85 PathProgramCache]: Analyzing trace with hash 22502022, now seen corresponding path program 1 times [2025-03-03 16:50:00,295 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:00,295 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869867764] [2025-03-03 16:50:00,295 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:00,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:00,328 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-03-03 16:50:00,431 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-03-03 16:50:00,432 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:00,432 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:01,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:01,095 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:01,095 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869867764] [2025-03-03 16:50:01,095 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [869867764] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:01,095 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:01,095 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-03-03 16:50:01,095 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1749020719] [2025-03-03 16:50:01,095 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:01,095 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2025-03-03 16:50:01,095 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:01,095 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-03 16:50:01,095 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2025-03-03 16:50:01,096 INFO L87 Difference]: Start difference. First operand 3477 states and 5006 transitions. Second operand has 13 states, 13 states have (on average 13.461538461538462) internal successors, (175), 13 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:02,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:02,052 INFO L93 Difference]: Finished difference Result 5993 states and 8665 transitions. [2025-03-03 16:50:02,052 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-03-03 16:50:02,052 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 13.461538461538462) internal successors, (175), 13 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-03-03 16:50:02,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:02,055 INFO L225 Difference]: With dead ends: 5993 [2025-03-03 16:50:02,055 INFO L226 Difference]: Without dead ends: 3505 [2025-03-03 16:50:02,056 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2025-03-03 16:50:02,056 INFO L435 NwaCegarLoop]: 1118 mSDtfsCounter, 1378 mSDsluCounter, 10049 mSDsCounter, 0 mSdLazyCounter, 2636 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1378 SdHoareTripleChecker+Valid, 11167 SdHoareTripleChecker+Invalid, 2636 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2636 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:02,056 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1378 Valid, 11167 Invalid, 2636 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2636 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-03-03 16:50:02,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3505 states. [2025-03-03 16:50:02,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3505 to 3503. [2025-03-03 16:50:02,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3503 states, 3502 states have (on average 1.4380354083380926) internal successors, (5036), 3502 states have internal predecessors, (5036), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:02,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3503 states to 3503 states and 5036 transitions. [2025-03-03 16:50:02,076 INFO L78 Accepts]: Start accepts. Automaton has 3503 states and 5036 transitions. Word has length 175 [2025-03-03 16:50:02,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:02,077 INFO L471 AbstractCegarLoop]: Abstraction has 3503 states and 5036 transitions. [2025-03-03 16:50:02,077 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 13.461538461538462) internal successors, (175), 13 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:02,077 INFO L276 IsEmpty]: Start isEmpty. Operand 3503 states and 5036 transitions. [2025-03-03 16:50:02,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-03-03 16:50:02,078 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:02,078 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:02,079 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2025-03-03 16:50:02,079 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:02,079 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:02,079 INFO L85 PathProgramCache]: Analyzing trace with hash -1079201471, now seen corresponding path program 1 times [2025-03-03 16:50:02,079 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:02,079 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930099741] [2025-03-03 16:50:02,079 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:02,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:02,114 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-03-03 16:50:02,141 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-03-03 16:50:02,141 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:02,141 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:02,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:02,507 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:02,507 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930099741] [2025-03-03 16:50:02,507 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1930099741] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:02,507 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:02,507 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 16:50:02,507 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1709503402] [2025-03-03 16:50:02,507 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:02,507 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 16:50:02,507 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:02,508 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 16:50:02,508 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:50:02,508 INFO L87 Difference]: Start difference. First operand 3503 states and 5036 transitions. Second operand has 7 states, 7 states have (on average 25.0) internal successors, (175), 7 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:03,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:03,849 INFO L93 Difference]: Finished difference Result 9461 states and 13605 transitions. [2025-03-03 16:50:03,849 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 16:50:03,849 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.0) internal successors, (175), 7 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-03-03 16:50:03,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:03,854 INFO L225 Difference]: With dead ends: 9461 [2025-03-03 16:50:03,854 INFO L226 Difference]: Without dead ends: 6130 [2025-03-03 16:50:03,856 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=76, Unknown=0, NotChecked=0, Total=110 [2025-03-03 16:50:03,856 INFO L435 NwaCegarLoop]: 1628 mSDtfsCounter, 2262 mSDsluCounter, 3553 mSDsCounter, 0 mSdLazyCounter, 3152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2262 SdHoareTripleChecker+Valid, 5181 SdHoareTripleChecker+Invalid, 3153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 3152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:03,856 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2262 Valid, 5181 Invalid, 3153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 3152 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2025-03-03 16:50:03,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6130 states. [2025-03-03 16:50:03,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6130 to 3511. [2025-03-03 16:50:03,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3511 states, 3510 states have (on average 1.435897435897436) internal successors, (5040), 3510 states have internal predecessors, (5040), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:03,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3511 states to 3511 states and 5040 transitions. [2025-03-03 16:50:03,881 INFO L78 Accepts]: Start accepts. Automaton has 3511 states and 5040 transitions. Word has length 175 [2025-03-03 16:50:03,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:03,881 INFO L471 AbstractCegarLoop]: Abstraction has 3511 states and 5040 transitions. [2025-03-03 16:50:03,881 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.0) internal successors, (175), 7 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:03,881 INFO L276 IsEmpty]: Start isEmpty. Operand 3511 states and 5040 transitions. [2025-03-03 16:50:03,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2025-03-03 16:50:03,883 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:03,883 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:03,883 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2025-03-03 16:50:03,883 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:03,883 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:03,883 INFO L85 PathProgramCache]: Analyzing trace with hash 1277050718, now seen corresponding path program 1 times [2025-03-03 16:50:03,883 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:03,883 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1002100144] [2025-03-03 16:50:03,883 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:03,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:03,915 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 176 statements into 1 equivalence classes. [2025-03-03 16:50:03,940 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 176 of 176 statements. [2025-03-03 16:50:03,940 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:03,940 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:04,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:04,309 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:04,309 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1002100144] [2025-03-03 16:50:04,309 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1002100144] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:04,309 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:04,309 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-03 16:50:04,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1349213675] [2025-03-03 16:50:04,309 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:04,309 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-03 16:50:04,309 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:04,310 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-03 16:50:04,310 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:50:04,310 INFO L87 Difference]: Start difference. First operand 3511 states and 5040 transitions. Second operand has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:05,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:05,345 INFO L93 Difference]: Finished difference Result 8474 states and 12195 transitions. [2025-03-03 16:50:05,345 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-03 16:50:05,345 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 176 [2025-03-03 16:50:05,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:05,349 INFO L225 Difference]: With dead ends: 8474 [2025-03-03 16:50:05,349 INFO L226 Difference]: Without dead ends: 5372 [2025-03-03 16:50:05,350 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2025-03-03 16:50:05,351 INFO L435 NwaCegarLoop]: 933 mSDtfsCounter, 2613 mSDsluCounter, 2355 mSDsCounter, 0 mSdLazyCounter, 2231 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2613 SdHoareTripleChecker+Valid, 3288 SdHoareTripleChecker+Invalid, 2231 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2231 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:05,351 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2613 Valid, 3288 Invalid, 2231 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2231 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-03-03 16:50:05,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5372 states. [2025-03-03 16:50:05,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5372 to 3483. [2025-03-03 16:50:05,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3483 states, 3482 states have (on average 1.4359563469270533) internal successors, (5000), 3482 states have internal predecessors, (5000), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:05,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3483 states to 3483 states and 5000 transitions. [2025-03-03 16:50:05,372 INFO L78 Accepts]: Start accepts. Automaton has 3483 states and 5000 transitions. Word has length 176 [2025-03-03 16:50:05,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:05,373 INFO L471 AbstractCegarLoop]: Abstraction has 3483 states and 5000 transitions. [2025-03-03 16:50:05,373 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:05,373 INFO L276 IsEmpty]: Start isEmpty. Operand 3483 states and 5000 transitions. [2025-03-03 16:50:05,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2025-03-03 16:50:05,374 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:05,374 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:05,374 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2025-03-03 16:50:05,374 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:05,375 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:05,375 INFO L85 PathProgramCache]: Analyzing trace with hash -961015596, now seen corresponding path program 1 times [2025-03-03 16:50:05,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:05,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1097434322] [2025-03-03 16:50:05,375 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:05,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:05,406 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 176 statements into 1 equivalence classes. [2025-03-03 16:50:05,426 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 176 of 176 statements. [2025-03-03 16:50:05,426 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:05,426 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:05,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:05,834 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:05,834 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1097434322] [2025-03-03 16:50:05,834 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1097434322] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:05,834 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:05,834 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-03 16:50:05,834 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2021192031] [2025-03-03 16:50:05,834 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:05,834 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-03 16:50:05,834 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:05,835 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-03 16:50:05,835 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2025-03-03 16:50:05,835 INFO L87 Difference]: Start difference. First operand 3483 states and 5000 transitions. Second operand has 8 states, 8 states have (on average 22.0) internal successors, (176), 8 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:07,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:07,161 INFO L93 Difference]: Finished difference Result 9043 states and 13015 transitions. [2025-03-03 16:50:07,161 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 16:50:07,161 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 22.0) internal successors, (176), 8 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 176 [2025-03-03 16:50:07,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:07,165 INFO L225 Difference]: With dead ends: 9043 [2025-03-03 16:50:07,165 INFO L226 Difference]: Without dead ends: 6617 [2025-03-03 16:50:07,167 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2025-03-03 16:50:07,168 INFO L435 NwaCegarLoop]: 1603 mSDtfsCounter, 4025 mSDsluCounter, 6002 mSDsCounter, 0 mSdLazyCounter, 2825 mSolverCounterSat, 64 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4025 SdHoareTripleChecker+Valid, 7605 SdHoareTripleChecker+Invalid, 2889 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 64 IncrementalHoareTripleChecker+Valid, 2825 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:07,168 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4025 Valid, 7605 Invalid, 2889 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [64 Valid, 2825 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2025-03-03 16:50:07,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6617 states. [2025-03-03 16:50:07,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6617 to 3910. [2025-03-03 16:50:07,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3910 states, 3909 states have (on average 1.430800716295728) internal successors, (5593), 3909 states have internal predecessors, (5593), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:07,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3910 states to 3910 states and 5593 transitions. [2025-03-03 16:50:07,194 INFO L78 Accepts]: Start accepts. Automaton has 3910 states and 5593 transitions. Word has length 176 [2025-03-03 16:50:07,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:07,194 INFO L471 AbstractCegarLoop]: Abstraction has 3910 states and 5593 transitions. [2025-03-03 16:50:07,194 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 22.0) internal successors, (176), 8 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:07,194 INFO L276 IsEmpty]: Start isEmpty. Operand 3910 states and 5593 transitions. [2025-03-03 16:50:07,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2025-03-03 16:50:07,196 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:07,196 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:07,196 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2025-03-03 16:50:07,196 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:07,196 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:07,196 INFO L85 PathProgramCache]: Analyzing trace with hash 1551974917, now seen corresponding path program 1 times [2025-03-03 16:50:07,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:07,197 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501683442] [2025-03-03 16:50:07,197 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:07,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:07,244 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 176 statements into 1 equivalence classes. [2025-03-03 16:50:07,315 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 176 of 176 statements. [2025-03-03 16:50:07,315 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:07,315 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:07,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:07,524 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:07,524 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501683442] [2025-03-03 16:50:07,524 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1501683442] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:07,524 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:07,524 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 16:50:07,524 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1641570152] [2025-03-03 16:50:07,524 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:07,524 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 16:50:07,524 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:07,525 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 16:50:07,525 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:50:07,525 INFO L87 Difference]: Start difference. First operand 3910 states and 5593 transitions. Second operand has 7 states, 7 states have (on average 25.142857142857142) internal successors, (176), 7 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:08,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:08,818 INFO L93 Difference]: Finished difference Result 8393 states and 12078 transitions. [2025-03-03 16:50:08,818 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-03 16:50:08,818 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.142857142857142) internal successors, (176), 7 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 176 [2025-03-03 16:50:08,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:08,822 INFO L225 Difference]: With dead ends: 8393 [2025-03-03 16:50:08,822 INFO L226 Difference]: Without dead ends: 5387 [2025-03-03 16:50:08,824 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2025-03-03 16:50:08,824 INFO L435 NwaCegarLoop]: 745 mSDtfsCounter, 3171 mSDsluCounter, 2962 mSDsCounter, 0 mSdLazyCounter, 3230 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3171 SdHoareTripleChecker+Valid, 3707 SdHoareTripleChecker+Invalid, 3232 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3230 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:08,824 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3171 Valid, 3707 Invalid, 3232 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3230 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2025-03-03 16:50:08,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5387 states. [2025-03-03 16:50:08,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5387 to 3886. [2025-03-03 16:50:08,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3886 states, 3885 states have (on average 1.430888030888031) internal successors, (5559), 3885 states have internal predecessors, (5559), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:08,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3886 states to 3886 states and 5559 transitions. [2025-03-03 16:50:08,852 INFO L78 Accepts]: Start accepts. Automaton has 3886 states and 5559 transitions. Word has length 176 [2025-03-03 16:50:08,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:08,852 INFO L471 AbstractCegarLoop]: Abstraction has 3886 states and 5559 transitions. [2025-03-03 16:50:08,852 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.142857142857142) internal successors, (176), 7 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:08,852 INFO L276 IsEmpty]: Start isEmpty. Operand 3886 states and 5559 transitions. [2025-03-03 16:50:08,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2025-03-03 16:50:08,854 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:08,854 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:08,854 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2025-03-03 16:50:08,854 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:08,854 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:08,854 INFO L85 PathProgramCache]: Analyzing trace with hash 1627383766, now seen corresponding path program 1 times [2025-03-03 16:50:08,854 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:08,854 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859912468] [2025-03-03 16:50:08,854 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:08,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:08,889 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 176 statements into 1 equivalence classes. [2025-03-03 16:50:08,969 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 176 of 176 statements. [2025-03-03 16:50:08,969 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:08,969 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:09,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:09,404 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:09,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1859912468] [2025-03-03 16:50:09,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1859912468] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:09,405 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:09,405 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-03 16:50:09,405 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1935765712] [2025-03-03 16:50:09,405 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:09,405 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-03 16:50:09,405 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:09,405 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-03 16:50:09,405 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:50:09,405 INFO L87 Difference]: Start difference. First operand 3886 states and 5559 transitions. Second operand has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:09,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:09,905 INFO L93 Difference]: Finished difference Result 7354 states and 10607 transitions. [2025-03-03 16:50:09,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:50:09,905 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 176 [2025-03-03 16:50:09,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:09,908 INFO L225 Difference]: With dead ends: 7354 [2025-03-03 16:50:09,908 INFO L226 Difference]: Without dead ends: 3809 [2025-03-03 16:50:09,910 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2025-03-03 16:50:09,911 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 3499 mSDsluCounter, 2207 mSDsCounter, 0 mSdLazyCounter, 825 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3499 SdHoareTripleChecker+Valid, 3313 SdHoareTripleChecker+Invalid, 826 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 825 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:09,911 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3499 Valid, 3313 Invalid, 826 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 825 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-03 16:50:09,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3809 states. [2025-03-03 16:50:09,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3809 to 3126. [2025-03-03 16:50:09,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3126 states, 3125 states have (on average 1.44352) internal successors, (4511), 3125 states have internal predecessors, (4511), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:09,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3126 states to 3126 states and 4511 transitions. [2025-03-03 16:50:09,929 INFO L78 Accepts]: Start accepts. Automaton has 3126 states and 4511 transitions. Word has length 176 [2025-03-03 16:50:09,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:09,929 INFO L471 AbstractCegarLoop]: Abstraction has 3126 states and 4511 transitions. [2025-03-03 16:50:09,929 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:09,929 INFO L276 IsEmpty]: Start isEmpty. Operand 3126 states and 4511 transitions. [2025-03-03 16:50:09,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2025-03-03 16:50:09,930 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:09,930 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:09,930 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2025-03-03 16:50:09,930 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:09,931 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:09,931 INFO L85 PathProgramCache]: Analyzing trace with hash -1699527552, now seen corresponding path program 1 times [2025-03-03 16:50:09,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:09,931 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [66189923] [2025-03-03 16:50:09,931 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:09,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:09,964 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 176 statements into 1 equivalence classes. [2025-03-03 16:50:10,021 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 176 of 176 statements. [2025-03-03 16:50:10,021 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:10,021 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:10,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:10,479 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:10,479 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [66189923] [2025-03-03 16:50:10,479 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [66189923] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:10,479 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:10,479 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-03 16:50:10,479 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508599592] [2025-03-03 16:50:10,479 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:10,479 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-03 16:50:10,479 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:10,479 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-03 16:50:10,479 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-03 16:50:10,480 INFO L87 Difference]: Start difference. First operand 3126 states and 4511 transitions. Second operand has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:11,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:11,289 INFO L93 Difference]: Finished difference Result 5888 states and 8553 transitions. [2025-03-03 16:50:11,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:50:11,290 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 176 [2025-03-03 16:50:11,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:11,293 INFO L225 Difference]: With dead ends: 5888 [2025-03-03 16:50:11,293 INFO L226 Difference]: Without dead ends: 3106 [2025-03-03 16:50:11,294 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2025-03-03 16:50:11,295 INFO L435 NwaCegarLoop]: 1106 mSDtfsCounter, 2887 mSDsluCounter, 2904 mSDsCounter, 0 mSdLazyCounter, 1506 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2887 SdHoareTripleChecker+Valid, 4010 SdHoareTripleChecker+Invalid, 1507 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1506 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:11,295 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2887 Valid, 4010 Invalid, 1507 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1506 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-03-03 16:50:11,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3106 states. [2025-03-03 16:50:11,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3106 to 2682. [2025-03-03 16:50:11,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2682 states, 2681 states have (on average 1.454681089145841) internal successors, (3900), 2681 states have internal predecessors, (3900), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:11,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2682 states to 2682 states and 3900 transitions. [2025-03-03 16:50:11,315 INFO L78 Accepts]: Start accepts. Automaton has 2682 states and 3900 transitions. Word has length 176 [2025-03-03 16:50:11,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:11,315 INFO L471 AbstractCegarLoop]: Abstraction has 2682 states and 3900 transitions. [2025-03-03 16:50:11,315 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.333333333333332) internal successors, (176), 6 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:11,315 INFO L276 IsEmpty]: Start isEmpty. Operand 2682 states and 3900 transitions. [2025-03-03 16:50:11,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2025-03-03 16:50:11,316 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:11,316 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:11,316 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2025-03-03 16:50:11,316 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:11,317 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:11,317 INFO L85 PathProgramCache]: Analyzing trace with hash 1495380177, now seen corresponding path program 1 times [2025-03-03 16:50:11,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:11,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140986188] [2025-03-03 16:50:11,317 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:11,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:11,350 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 177 statements into 1 equivalence classes. [2025-03-03 16:50:11,419 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 177 of 177 statements. [2025-03-03 16:50:11,419 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:11,419 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:11,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:11,995 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:11,995 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1140986188] [2025-03-03 16:50:11,995 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1140986188] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:11,995 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:11,995 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-03-03 16:50:11,995 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1692449265] [2025-03-03 16:50:11,996 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:11,996 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2025-03-03 16:50:11,996 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:11,996 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-03-03 16:50:11,996 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2025-03-03 16:50:11,996 INFO L87 Difference]: Start difference. First operand 2682 states and 3900 transitions. Second operand has 11 states, 11 states have (on average 16.09090909090909) internal successors, (177), 11 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:13,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:13,179 INFO L93 Difference]: Finished difference Result 5827 states and 8504 transitions. [2025-03-03 16:50:13,179 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-03-03 16:50:13,179 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 16.09090909090909) internal successors, (177), 11 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 177 [2025-03-03 16:50:13,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:13,182 INFO L225 Difference]: With dead ends: 5827 [2025-03-03 16:50:13,182 INFO L226 Difference]: Without dead ends: 3489 [2025-03-03 16:50:13,183 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2025-03-03 16:50:13,185 INFO L435 NwaCegarLoop]: 784 mSDtfsCounter, 1419 mSDsluCounter, 3350 mSDsCounter, 0 mSdLazyCounter, 3542 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1419 SdHoareTripleChecker+Valid, 4134 SdHoareTripleChecker+Invalid, 3544 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3542 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:13,185 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1419 Valid, 4134 Invalid, 3544 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3542 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2025-03-03 16:50:13,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3489 states. [2025-03-03 16:50:13,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3489 to 3067. [2025-03-03 16:50:13,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3067 states, 3066 states have (on average 1.4540117416829745) internal successors, (4458), 3066 states have internal predecessors, (4458), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:13,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3067 states to 3067 states and 4458 transitions. [2025-03-03 16:50:13,202 INFO L78 Accepts]: Start accepts. Automaton has 3067 states and 4458 transitions. Word has length 177 [2025-03-03 16:50:13,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:13,202 INFO L471 AbstractCegarLoop]: Abstraction has 3067 states and 4458 transitions. [2025-03-03 16:50:13,202 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 16.09090909090909) internal successors, (177), 11 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:13,202 INFO L276 IsEmpty]: Start isEmpty. Operand 3067 states and 4458 transitions. [2025-03-03 16:50:13,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2025-03-03 16:50:13,202 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:13,203 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:13,203 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2025-03-03 16:50:13,203 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:13,203 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:13,203 INFO L85 PathProgramCache]: Analyzing trace with hash 1536709718, now seen corresponding path program 1 times [2025-03-03 16:50:13,203 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:13,203 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [958645943] [2025-03-03 16:50:13,203 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:13,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:13,235 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 177 statements into 1 equivalence classes. [2025-03-03 16:50:13,273 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 177 of 177 statements. [2025-03-03 16:50:13,273 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:13,273 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:13,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:13,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:13,708 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [958645943] [2025-03-03 16:50:13,708 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [958645943] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:13,708 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:13,708 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-03 16:50:13,708 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2061599098] [2025-03-03 16:50:13,708 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:13,708 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-03 16:50:13,708 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:13,708 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-03 16:50:13,708 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2025-03-03 16:50:13,709 INFO L87 Difference]: Start difference. First operand 3067 states and 4458 transitions. Second operand has 8 states, 8 states have (on average 22.125) internal successors, (177), 8 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:14,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:14,942 INFO L93 Difference]: Finished difference Result 6092 states and 8870 transitions. [2025-03-03 16:50:14,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-03 16:50:14,943 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 22.125) internal successors, (177), 8 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 177 [2025-03-03 16:50:14,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:14,945 INFO L225 Difference]: With dead ends: 6092 [2025-03-03 16:50:14,946 INFO L226 Difference]: Without dead ends: 3349 [2025-03-03 16:50:14,947 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2025-03-03 16:50:14,947 INFO L435 NwaCegarLoop]: 1104 mSDtfsCounter, 2395 mSDsluCounter, 3202 mSDsCounter, 0 mSdLazyCounter, 2590 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2395 SdHoareTripleChecker+Valid, 4306 SdHoareTripleChecker+Invalid, 2590 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2590 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:14,948 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2395 Valid, 4306 Invalid, 2590 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2590 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2025-03-03 16:50:14,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3349 states. [2025-03-03 16:50:14,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3349 to 3070. [2025-03-03 16:50:14,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3070 states, 3069 states have (on average 1.4538937764744215) internal successors, (4462), 3069 states have internal predecessors, (4462), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:14,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3070 states to 3070 states and 4462 transitions. [2025-03-03 16:50:14,965 INFO L78 Accepts]: Start accepts. Automaton has 3070 states and 4462 transitions. Word has length 177 [2025-03-03 16:50:14,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:14,965 INFO L471 AbstractCegarLoop]: Abstraction has 3070 states and 4462 transitions. [2025-03-03 16:50:14,965 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 22.125) internal successors, (177), 8 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:14,965 INFO L276 IsEmpty]: Start isEmpty. Operand 3070 states and 4462 transitions. [2025-03-03 16:50:14,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-03-03 16:50:14,966 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:14,966 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:14,966 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2025-03-03 16:50:14,966 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:14,966 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:14,966 INFO L85 PathProgramCache]: Analyzing trace with hash 369643102, now seen corresponding path program 1 times [2025-03-03 16:50:14,966 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:14,966 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922456515] [2025-03-03 16:50:14,966 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:14,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:15,003 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-03-03 16:50:15,024 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-03 16:50:15,024 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:15,024 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:15,155 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:15,155 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:15,155 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922456515] [2025-03-03 16:50:15,155 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [922456515] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:15,155 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:15,155 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 16:50:15,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094151161] [2025-03-03 16:50:15,155 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:15,155 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 16:50:15,156 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:15,156 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 16:50:15,156 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 16:50:15,156 INFO L87 Difference]: Start difference. First operand 3070 states and 4462 transitions. Second operand has 4 states, 4 states have (on average 44.5) internal successors, (178), 4 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:15,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:15,363 INFO L93 Difference]: Finished difference Result 5708 states and 8318 transitions. [2025-03-03 16:50:15,363 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 16:50:15,363 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 44.5) internal successors, (178), 4 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-03-03 16:50:15,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:15,365 INFO L225 Difference]: With dead ends: 5708 [2025-03-03 16:50:15,365 INFO L226 Difference]: Without dead ends: 3040 [2025-03-03 16:50:15,366 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:50:15,367 INFO L435 NwaCegarLoop]: 1144 mSDtfsCounter, 1219 mSDsluCounter, 1143 mSDsCounter, 0 mSdLazyCounter, 463 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1219 SdHoareTripleChecker+Valid, 2287 SdHoareTripleChecker+Invalid, 463 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 463 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:15,367 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1219 Valid, 2287 Invalid, 463 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 463 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 16:50:15,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3040 states. [2025-03-03 16:50:15,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3040 to 3028. [2025-03-03 16:50:15,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3028 states, 3027 states have (on average 1.4502808060786256) internal successors, (4390), 3027 states have internal predecessors, (4390), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:15,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3028 states to 3028 states and 4390 transitions. [2025-03-03 16:50:15,383 INFO L78 Accepts]: Start accepts. Automaton has 3028 states and 4390 transitions. Word has length 178 [2025-03-03 16:50:15,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:15,384 INFO L471 AbstractCegarLoop]: Abstraction has 3028 states and 4390 transitions. [2025-03-03 16:50:15,384 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 44.5) internal successors, (178), 4 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:15,384 INFO L276 IsEmpty]: Start isEmpty. Operand 3028 states and 4390 transitions. [2025-03-03 16:50:15,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-03-03 16:50:15,385 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:15,385 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:15,385 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2025-03-03 16:50:15,385 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:15,385 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:15,385 INFO L85 PathProgramCache]: Analyzing trace with hash -1157439229, now seen corresponding path program 1 times [2025-03-03 16:50:15,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:15,385 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585790245] [2025-03-03 16:50:15,385 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:15,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:15,420 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-03-03 16:50:15,504 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-03 16:50:15,504 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:15,504 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:15,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:15,752 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:15,752 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1585790245] [2025-03-03 16:50:15,753 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1585790245] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:15,753 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:15,753 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 16:50:15,753 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [182634759] [2025-03-03 16:50:15,753 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:15,753 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 16:50:15,753 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:15,753 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 16:50:15,753 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:50:15,753 INFO L87 Difference]: Start difference. First operand 3028 states and 4390 transitions. Second operand has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:16,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:16,124 INFO L93 Difference]: Finished difference Result 5795 states and 8423 transitions. [2025-03-03 16:50:16,124 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:50:16,124 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-03-03 16:50:16,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:16,126 INFO L225 Difference]: With dead ends: 5795 [2025-03-03 16:50:16,126 INFO L226 Difference]: Without dead ends: 3058 [2025-03-03 16:50:16,128 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:50:16,128 INFO L435 NwaCegarLoop]: 1141 mSDtfsCounter, 2 mSDsluCounter, 3412 mSDsCounter, 0 mSdLazyCounter, 947 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 4553 SdHoareTripleChecker+Invalid, 947 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 947 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:16,128 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 4553 Invalid, 947 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 947 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-03 16:50:16,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3058 states. [2025-03-03 16:50:16,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3058 to 3046. [2025-03-03 16:50:16,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3046 states, 3045 states have (on average 1.4495894909688014) internal successors, (4414), 3045 states have internal predecessors, (4414), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:16,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3046 states to 3046 states and 4414 transitions. [2025-03-03 16:50:16,143 INFO L78 Accepts]: Start accepts. Automaton has 3046 states and 4414 transitions. Word has length 178 [2025-03-03 16:50:16,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:16,144 INFO L471 AbstractCegarLoop]: Abstraction has 3046 states and 4414 transitions. [2025-03-03 16:50:16,144 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:16,144 INFO L276 IsEmpty]: Start isEmpty. Operand 3046 states and 4414 transitions. [2025-03-03 16:50:16,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-03-03 16:50:16,144 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:16,144 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:16,145 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2025-03-03 16:50:16,145 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:16,145 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:16,145 INFO L85 PathProgramCache]: Analyzing trace with hash 1116731346, now seen corresponding path program 1 times [2025-03-03 16:50:16,145 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:16,145 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1378831166] [2025-03-03 16:50:16,145 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:16,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:16,177 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-03-03 16:50:16,241 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-03 16:50:16,241 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:16,241 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:16,417 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:16,417 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:16,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1378831166] [2025-03-03 16:50:16,418 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1378831166] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:16,418 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:16,418 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 16:50:16,418 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [640518607] [2025-03-03 16:50:16,418 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:16,418 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 16:50:16,418 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:16,418 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 16:50:16,418 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:50:16,419 INFO L87 Difference]: Start difference. First operand 3046 states and 4414 transitions. Second operand has 7 states, 7 states have (on average 25.428571428571427) internal successors, (178), 7 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:17,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:17,501 INFO L93 Difference]: Finished difference Result 5904 states and 8584 transitions. [2025-03-03 16:50:17,502 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 16:50:17,502 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.428571428571427) internal successors, (178), 7 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-03-03 16:50:17,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:17,504 INFO L225 Difference]: With dead ends: 5904 [2025-03-03 16:50:17,504 INFO L226 Difference]: Without dead ends: 3104 [2025-03-03 16:50:17,506 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:50:17,506 INFO L435 NwaCegarLoop]: 734 mSDtfsCounter, 1254 mSDsluCounter, 2923 mSDsCounter, 0 mSdLazyCounter, 3215 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1254 SdHoareTripleChecker+Valid, 3657 SdHoareTripleChecker+Invalid, 3217 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3215 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:17,506 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1254 Valid, 3657 Invalid, 3217 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3215 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-03-03 16:50:17,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3104 states. [2025-03-03 16:50:17,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3104 to 3092. [2025-03-03 16:50:17,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3092 states, 3091 states have (on average 1.4454868974441928) internal successors, (4468), 3091 states have internal predecessors, (4468), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:17,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3092 states to 3092 states and 4468 transitions. [2025-03-03 16:50:17,523 INFO L78 Accepts]: Start accepts. Automaton has 3092 states and 4468 transitions. Word has length 178 [2025-03-03 16:50:17,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:17,524 INFO L471 AbstractCegarLoop]: Abstraction has 3092 states and 4468 transitions. [2025-03-03 16:50:17,524 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.428571428571427) internal successors, (178), 7 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:17,524 INFO L276 IsEmpty]: Start isEmpty. Operand 3092 states and 4468 transitions. [2025-03-03 16:50:17,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-03-03 16:50:17,524 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:17,524 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:17,525 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2025-03-03 16:50:17,525 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:17,525 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:17,525 INFO L85 PathProgramCache]: Analyzing trace with hash 1938199300, now seen corresponding path program 1 times [2025-03-03 16:50:17,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:17,525 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1603710036] [2025-03-03 16:50:17,525 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:17,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:17,558 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-03-03 16:50:17,628 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-03 16:50:17,628 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:17,628 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:17,965 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:17,965 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:17,965 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1603710036] [2025-03-03 16:50:17,965 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1603710036] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:17,965 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:17,965 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 16:50:17,965 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462652630] [2025-03-03 16:50:17,965 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:17,966 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 16:50:17,966 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:17,966 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 16:50:17,966 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:50:17,966 INFO L87 Difference]: Start difference. First operand 3092 states and 4468 transitions. Second operand has 7 states, 7 states have (on average 25.428571428571427) internal successors, (178), 7 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:18,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:18,577 INFO L93 Difference]: Finished difference Result 6249 states and 9040 transitions. [2025-03-03 16:50:18,578 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 16:50:18,578 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.428571428571427) internal successors, (178), 7 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-03-03 16:50:18,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:18,581 INFO L225 Difference]: With dead ends: 6249 [2025-03-03 16:50:18,581 INFO L226 Difference]: Without dead ends: 3361 [2025-03-03 16:50:18,583 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2025-03-03 16:50:18,583 INFO L435 NwaCegarLoop]: 1104 mSDtfsCounter, 2364 mSDsluCounter, 4410 mSDsCounter, 0 mSdLazyCounter, 1361 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2364 SdHoareTripleChecker+Valid, 5514 SdHoareTripleChecker+Invalid, 1362 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1361 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:18,583 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2364 Valid, 5514 Invalid, 1362 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1361 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-03 16:50:18,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3361 states. [2025-03-03 16:50:18,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3361 to 3090. [2025-03-03 16:50:18,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3090 states, 3089 states have (on average 1.44512787309809) internal successors, (4464), 3089 states have internal predecessors, (4464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:18,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3090 states to 3090 states and 4464 transitions. [2025-03-03 16:50:18,604 INFO L78 Accepts]: Start accepts. Automaton has 3090 states and 4464 transitions. Word has length 178 [2025-03-03 16:50:18,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:18,604 INFO L471 AbstractCegarLoop]: Abstraction has 3090 states and 4464 transitions. [2025-03-03 16:50:18,604 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.428571428571427) internal successors, (178), 7 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:18,604 INFO L276 IsEmpty]: Start isEmpty. Operand 3090 states and 4464 transitions. [2025-03-03 16:50:18,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-03-03 16:50:18,604 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:18,605 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:18,605 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2025-03-03 16:50:18,605 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:18,605 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:18,605 INFO L85 PathProgramCache]: Analyzing trace with hash -127919697, now seen corresponding path program 1 times [2025-03-03 16:50:18,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:18,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597780524] [2025-03-03 16:50:18,605 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:18,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:18,638 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-03-03 16:50:18,681 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-03-03 16:50:18,681 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:18,681 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 16:50:18,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 16:50:18,991 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 16:50:18,991 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [597780524] [2025-03-03 16:50:18,991 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [597780524] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 16:50:18,991 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 16:50:18,991 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 16:50:18,991 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [566381611] [2025-03-03 16:50:18,992 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 16:50:18,992 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 16:50:18,992 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 16:50:18,992 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 16:50:18,992 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 16:50:18,992 INFO L87 Difference]: Start difference. First operand 3090 states and 4464 transitions. Second operand has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:19,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 16:50:19,758 INFO L93 Difference]: Finished difference Result 6618 states and 9599 transitions. [2025-03-03 16:50:19,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 16:50:19,758 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-03-03 16:50:19,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 16:50:19,762 INFO L225 Difference]: With dead ends: 6618 [2025-03-03 16:50:19,762 INFO L226 Difference]: Without dead ends: 3731 [2025-03-03 16:50:19,764 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-03 16:50:19,764 INFO L435 NwaCegarLoop]: 1110 mSDtfsCounter, 3535 mSDsluCounter, 2216 mSDsCounter, 0 mSdLazyCounter, 799 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3535 SdHoareTripleChecker+Valid, 3326 SdHoareTripleChecker+Invalid, 799 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 799 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-03-03 16:50:19,764 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3535 Valid, 3326 Invalid, 799 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 799 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-03-03 16:50:19,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3731 states. [2025-03-03 16:50:19,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3731 to 3064. [2025-03-03 16:50:19,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3064 states, 3063 states have (on average 1.4466209598432909) internal successors, (4431), 3063 states have internal predecessors, (4431), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:19,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3064 states to 3064 states and 4431 transitions. [2025-03-03 16:50:19,783 INFO L78 Accepts]: Start accepts. Automaton has 3064 states and 4431 transitions. Word has length 178 [2025-03-03 16:50:19,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 16:50:19,783 INFO L471 AbstractCegarLoop]: Abstraction has 3064 states and 4431 transitions. [2025-03-03 16:50:19,784 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:19,784 INFO L276 IsEmpty]: Start isEmpty. Operand 3064 states and 4431 transitions. [2025-03-03 16:50:19,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-03-03 16:50:19,784 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:19,784 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:19,784 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2025-03-03 16:50:19,784 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:19,785 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:19,785 INFO L85 PathProgramCache]: Analyzing trace with hash -149292849, now seen corresponding path program 1 times [2025-03-03 16:50:19,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 16:50:19,785 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [276433084] [2025-03-03 16:50:19,785 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:19,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 16:50:19,820 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-03-03 16:50:19,946 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-03-03 16:50:19,946 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:19,946 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-03 16:50:19,946 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-03 16:50:19,961 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-03-03 16:50:20,069 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-03-03 16:50:20,070 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 16:50:20,070 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-03 16:50:20,165 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-03 16:50:20,166 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-03-03 16:50:20,166 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-03-03 16:50:20,168 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2025-03-03 16:50:20,170 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 16:50:20,262 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-03-03 16:50:20,285 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-03-03 16:50:20,288 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.03 04:50:20 BoogieIcfgContainer [2025-03-03 16:50:20,288 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-03-03 16:50:20,289 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-03 16:50:20,289 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-03 16:50:20,289 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-03 16:50:20,290 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 04:49:18" (3/4) ... [2025-03-03 16:50:20,292 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-03-03 16:50:20,293 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-03 16:50:20,293 INFO L158 Benchmark]: Toolchain (without parser) took 66142.10ms. Allocated memory was 167.8MB in the beginning and 1.4GB in the end (delta: 1.3GB). Free memory was 121.0MB in the beginning and 967.8MB in the end (delta: -846.8MB). Peak memory consumption was 425.6MB. Max. memory is 16.1GB. [2025-03-03 16:50:20,293 INFO L158 Benchmark]: CDTParser took 0.14ms. Allocated memory is still 201.3MB. Free memory is still 115.7MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-03 16:50:20,294 INFO L158 Benchmark]: CACSL2BoogieTranslator took 521.81ms. Allocated memory is still 167.8MB. Free memory was 120.0MB in the beginning and 48.4MB in the end (delta: 71.6MB). Peak memory consumption was 75.5MB. Max. memory is 16.1GB. [2025-03-03 16:50:20,294 INFO L158 Benchmark]: Boogie Procedure Inliner took 312.59ms. Allocated memory was 167.8MB in the beginning and 176.2MB in the end (delta: 8.4MB). Free memory was 48.4MB in the beginning and 86.4MB in the end (delta: -38.0MB). Peak memory consumption was 54.8MB. Max. memory is 16.1GB. [2025-03-03 16:50:20,294 INFO L158 Benchmark]: Boogie Preprocessor took 426.64ms. Allocated memory was 176.2MB in the beginning and 478.2MB in the end (delta: 302.0MB). Free memory was 85.6MB in the beginning and 374.5MB in the end (delta: -288.9MB). Peak memory consumption was 47.6MB. Max. memory is 16.1GB. [2025-03-03 16:50:20,294 INFO L158 Benchmark]: IcfgBuilder took 3234.64ms. Allocated memory was 478.2MB in the beginning and 369.1MB in the end (delta: -109.1MB). Free memory was 374.5MB in the beginning and 232.0MB in the end (delta: 142.5MB). Peak memory consumption was 234.1MB. Max. memory is 16.1GB. [2025-03-03 16:50:20,294 INFO L158 Benchmark]: TraceAbstraction took 61633.63ms. Allocated memory was 369.1MB in the beginning and 1.4GB in the end (delta: 1.1GB). Free memory was 232.0MB in the beginning and 967.9MB in the end (delta: -735.9MB). Peak memory consumption was 329.5MB. Max. memory is 16.1GB. [2025-03-03 16:50:20,294 INFO L158 Benchmark]: Witness Printer took 3.92ms. Allocated memory is still 1.4GB. Free memory was 967.9MB in the beginning and 967.8MB in the end (delta: 127.0kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-03 16:50:20,295 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14ms. Allocated memory is still 201.3MB. Free memory is still 115.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 521.81ms. Allocated memory is still 167.8MB. Free memory was 120.0MB in the beginning and 48.4MB in the end (delta: 71.6MB). Peak memory consumption was 75.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 312.59ms. Allocated memory was 167.8MB in the beginning and 176.2MB in the end (delta: 8.4MB). Free memory was 48.4MB in the beginning and 86.4MB in the end (delta: -38.0MB). Peak memory consumption was 54.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 426.64ms. Allocated memory was 176.2MB in the beginning and 478.2MB in the end (delta: 302.0MB). Free memory was 85.6MB in the beginning and 374.5MB in the end (delta: -288.9MB). Peak memory consumption was 47.6MB. Max. memory is 16.1GB. * IcfgBuilder took 3234.64ms. Allocated memory was 478.2MB in the beginning and 369.1MB in the end (delta: -109.1MB). Free memory was 374.5MB in the beginning and 232.0MB in the end (delta: 142.5MB). Peak memory consumption was 234.1MB. Max. memory is 16.1GB. * TraceAbstraction took 61633.63ms. Allocated memory was 369.1MB in the beginning and 1.4GB in the end (delta: 1.1GB). Free memory was 232.0MB in the beginning and 967.9MB in the end (delta: -735.9MB). Peak memory consumption was 329.5MB. Max. memory is 16.1GB. * Witness Printer took 3.92ms. Allocated memory is still 1.4GB. Free memory was 967.9MB in the beginning and 967.8MB in the end (delta: 127.0kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 414, overapproximation of bitwiseAnd at line 310, overapproximation of bitwiseAnd at line 422, overapproximation of bitwiseAnd at line 392, overapproximation of bitwiseAnd at line 236, overapproximation of bitwiseAnd at line 260. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 32); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (32 - 1); [L32] const SORT_6 mask_SORT_6 = (SORT_6)-1 >> (sizeof(SORT_6) * 8 - 2); [L33] const SORT_6 msb_SORT_6 = (SORT_6)1 << (2 - 1); [L35] const SORT_38 mask_SORT_38 = (SORT_38)-1 >> (sizeof(SORT_38) * 8 - 31); [L36] const SORT_38 msb_SORT_38 = (SORT_38)1 << (31 - 1); [L38] const SORT_45 mask_SORT_45 = (SORT_45)-1 >> (sizeof(SORT_45) * 8 - 3); [L39] const SORT_45 msb_SORT_45 = (SORT_45)1 << (3 - 1); [L41] const SORT_3 var_4 = 0; [L42] const SORT_3 var_5 = 1; [L43] const SORT_6 var_7 = 2; [L44] const SORT_6 var_10 = 1; [L45] const SORT_1 var_32 = 1; [L46] const SORT_1 var_33 = 0; [L47] const SORT_38 var_39 = 0; [L48] const SORT_6 var_41 = 0; [L49] const SORT_45 var_46 = 0; [L50] const SORT_45 var_50 = 1; [L51] const SORT_45 var_56 = 4; [L52] const SORT_45 var_58 = 5; [L53] const SORT_45 var_76 = 2; [L54] const SORT_45 var_86 = 3; [L56] SORT_1 input_2; [L57] SORT_45 input_451; [L58] SORT_45 input_572; [L60] EXPR __VERIFIER_nondet_uchar() & mask_SORT_6 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L60] SORT_6 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_6; [L61] EXPR __VERIFIER_nondet_uchar() & mask_SORT_6 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L61] SORT_6 state_17 = __VERIFIER_nondet_uchar() & mask_SORT_6; [L62] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L62] SORT_1 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L63] EXPR __VERIFIER_nondet_uchar() & mask_SORT_6 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L63] SORT_6 state_42 = __VERIFIER_nondet_uchar() & mask_SORT_6; [L64] EXPR __VERIFIER_nondet_uchar() & mask_SORT_45 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L64] SORT_45 state_47 = __VERIFIER_nondet_uchar() & mask_SORT_45; [L65] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L65] SORT_1 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L66] EXPR __VERIFIER_nondet_uchar() & mask_SORT_6 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L66] SORT_6 state_98 = __VERIFIER_nondet_uchar() & mask_SORT_6; [L67] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L67] SORT_1 state_129 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L68] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L68] SORT_1 state_131 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L69] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L69] SORT_1 state_141 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L70] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L70] SORT_1 state_143 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L71] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L71] SORT_1 state_145 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L72] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L72] SORT_1 state_147 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L73] EXPR __VERIFIER_nondet_uchar() & mask_SORT_45 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L73] SORT_45 state_149 = __VERIFIER_nondet_uchar() & mask_SORT_45; [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L74] SORT_1 state_154 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L75] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L75] SORT_1 state_168 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_45 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L76] SORT_45 state_170 = __VERIFIER_nondet_uchar() & mask_SORT_45; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L77] SORT_1 state_172 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L78] SORT_1 state_174 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L79] SORT_1 state_176 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L80] SORT_1 state_178 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L81] SORT_1 state_180 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L82] SORT_1 state_182 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_45 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L83] SORT_45 state_184 = __VERIFIER_nondet_uchar() & mask_SORT_45; [L84] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L84] SORT_1 state_189 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L85] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L85] SORT_1 state_203 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] EXPR __VERIFIER_nondet_uchar() & mask_SORT_45 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L86] SORT_45 state_205 = __VERIFIER_nondet_uchar() & mask_SORT_45; [L87] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L87] SORT_1 state_207 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L88] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L88] SORT_1 state_209 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L90] SORT_6 init_9_arg_1 = var_7; [L91] state_8 = init_9_arg_1 [L92] SORT_6 init_18_arg_1 = var_7; [L93] state_17 = init_18_arg_1 [L94] SORT_1 init_35_arg_1 = var_33; [L95] state_34 = init_35_arg_1 [L96] SORT_6 init_43_arg_1 = var_41; [L97] state_42 = init_43_arg_1 [L98] SORT_45 init_48_arg_1 = var_46; [L99] state_47 = init_48_arg_1 [L100] SORT_1 init_73_arg_1 = var_33; [L101] state_72 = init_73_arg_1 [L102] SORT_6 init_99_arg_1 = var_41; [L103] state_98 = init_99_arg_1 [L104] SORT_1 init_130_arg_1 = var_33; [L105] state_129 = init_130_arg_1 [L106] SORT_1 init_132_arg_1 = var_33; [L107] state_131 = init_132_arg_1 [L108] SORT_1 init_142_arg_1 = var_33; [L109] state_141 = init_142_arg_1 [L110] SORT_1 init_144_arg_1 = var_33; [L111] state_143 = init_144_arg_1 [L112] SORT_1 init_146_arg_1 = var_33; [L113] state_145 = init_146_arg_1 [L114] SORT_1 init_148_arg_1 = var_32; [L115] state_147 = init_148_arg_1 [L116] SORT_45 init_150_arg_1 = var_58; [L117] state_149 = init_150_arg_1 [L118] SORT_1 init_155_arg_1 = var_32; [L119] state_154 = init_155_arg_1 [L120] SORT_1 init_169_arg_1 = var_32; [L121] state_168 = init_169_arg_1 [L122] SORT_45 init_171_arg_1 = var_76; [L123] state_170 = init_171_arg_1 [L124] SORT_1 init_173_arg_1 = var_33; [L125] state_172 = init_173_arg_1 [L126] SORT_1 init_175_arg_1 = var_33; [L127] state_174 = init_175_arg_1 [L128] SORT_1 init_177_arg_1 = var_33; [L129] state_176 = init_177_arg_1 [L130] SORT_1 init_179_arg_1 = var_33; [L131] state_178 = init_179_arg_1 [L132] SORT_1 init_181_arg_1 = var_33; [L133] state_180 = init_181_arg_1 [L134] SORT_1 init_183_arg_1 = var_32; [L135] state_182 = init_183_arg_1 [L136] SORT_45 init_185_arg_1 = var_58; [L137] state_184 = init_185_arg_1 [L138] SORT_1 init_190_arg_1 = var_32; [L139] state_189 = init_190_arg_1 [L140] SORT_1 init_204_arg_1 = var_32; [L141] state_203 = init_204_arg_1 [L142] SORT_45 init_206_arg_1 = var_76; [L143] state_205 = init_206_arg_1 [L144] SORT_1 init_208_arg_1 = var_33; [L145] state_207 = init_208_arg_1 [L146] SORT_1 init_210_arg_1 = var_33; [L147] state_209 = init_210_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L150] input_2 = __VERIFIER_nondet_uchar() [L151] input_451 = __VERIFIER_nondet_uchar() [L152] input_572 = __VERIFIER_nondet_uchar() [L155] SORT_6 var_11_arg_0 = state_8; [L156] SORT_6 var_11_arg_1 = var_10; [L157] SORT_1 var_11 = var_11_arg_0 == var_11_arg_1; [L158] SORT_1 var_12_arg_0 = var_11; [L159] SORT_3 var_12_arg_1 = var_5; [L160] SORT_3 var_12_arg_2 = var_4; [L161] SORT_3 var_12 = var_12_arg_0 ? var_12_arg_1 : var_12_arg_2; [L162] SORT_3 var_13_arg_0 = var_12; [L163] SORT_1 var_13 = var_13_arg_0 >> 0; [L164] SORT_1 var_14_arg_0 = var_13; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_14_arg_0=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L165] EXPR var_14_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L165] var_14_arg_0 = var_14_arg_0 & mask_SORT_1 [L166] SORT_3 var_14 = var_14_arg_0; [L167] SORT_3 var_15_arg_0 = var_14; [L168] SORT_3 var_15_arg_1 = var_5; [L169] SORT_1 var_15 = var_15_arg_0 == var_15_arg_1; [L170] SORT_1 var_16_arg_0 = var_15; [L171] SORT_1 var_16 = ~var_16_arg_0; [L172] SORT_6 var_19_arg_0 = state_17; [L173] SORT_6 var_19_arg_1 = var_10; [L174] SORT_1 var_19 = var_19_arg_0 == var_19_arg_1; [L175] SORT_1 var_20_arg_0 = var_19; [L176] SORT_3 var_20_arg_1 = var_5; [L177] SORT_3 var_20_arg_2 = var_4; [L178] SORT_3 var_20 = var_20_arg_0 ? var_20_arg_1 : var_20_arg_2; [L179] SORT_3 var_21_arg_0 = var_20; [L180] SORT_1 var_21 = var_21_arg_0 >> 0; [L181] SORT_1 var_22_arg_0 = var_21; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_16=-1, var_21=0, var_22_arg_0=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L182] EXPR var_22_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_16=-1, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L182] var_22_arg_0 = var_22_arg_0 & mask_SORT_1 [L183] SORT_3 var_22 = var_22_arg_0; [L184] SORT_3 var_23_arg_0 = var_22; [L185] SORT_3 var_23_arg_1 = var_5; [L186] SORT_1 var_23 = var_23_arg_0 == var_23_arg_1; [L187] SORT_1 var_24_arg_0 = var_16; [L188] SORT_1 var_24_arg_1 = var_23; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24_arg_0=-1, var_24_arg_1=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L189] EXPR var_24_arg_0 | var_24_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L189] SORT_1 var_24 = var_24_arg_0 | var_24_arg_1; [L190] SORT_1 var_25_arg_0 = var_21; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_25_arg_0=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L191] EXPR var_25_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L191] var_25_arg_0 = var_25_arg_0 & mask_SORT_1 [L192] SORT_3 var_25 = var_25_arg_0; [L193] SORT_3 var_26_arg_0 = var_25; [L194] SORT_3 var_26_arg_1 = var_5; [L195] SORT_1 var_26 = var_26_arg_0 == var_26_arg_1; [L196] SORT_1 var_27_arg_0 = var_26; [L197] SORT_1 var_27 = ~var_27_arg_0; [L198] SORT_1 var_28_arg_0 = var_13; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_27=-1, var_28_arg_0=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L199] EXPR var_28_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_27=-1, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L199] var_28_arg_0 = var_28_arg_0 & mask_SORT_1 [L200] SORT_3 var_28 = var_28_arg_0; [L201] SORT_3 var_29_arg_0 = var_28; [L202] SORT_3 var_29_arg_1 = var_5; [L203] SORT_1 var_29 = var_29_arg_0 == var_29_arg_1; [L204] SORT_1 var_30_arg_0 = var_27; [L205] SORT_1 var_30_arg_1 = var_29; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_30_arg_0=-1, var_30_arg_1=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L206] EXPR var_30_arg_0 | var_30_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_24=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L206] SORT_1 var_30 = var_30_arg_0 | var_30_arg_1; [L207] SORT_1 var_31_arg_0 = var_24; [L208] SORT_1 var_31_arg_1 = var_30; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31_arg_0=255, var_31_arg_1=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L209] EXPR var_31_arg_0 & var_31_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L209] SORT_1 var_31 = var_31_arg_0 & var_31_arg_1; [L210] SORT_45 var_64_arg_0 = state_47; [L211] SORT_45 var_64_arg_1 = var_50; [L212] SORT_1 var_64 = var_64_arg_0 == var_64_arg_1; [L213] SORT_6 var_65_arg_0 = state_42; [L214] SORT_6 var_65_arg_1 = var_10; [L215] SORT_1 var_65 = var_65_arg_0 == var_65_arg_1; [L216] SORT_1 var_66_arg_0 = var_64; [L217] SORT_1 var_66_arg_1 = var_65; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_66_arg_0=0, var_66_arg_1=0, var_76=2, var_7=2, var_86=3] [L218] EXPR var_66_arg_0 | var_66_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L218] SORT_1 var_66 = var_66_arg_0 | var_66_arg_1; [L219] EXPR var_66 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L219] var_66 = var_66 & mask_SORT_1 [L220] SORT_6 var_44_arg_0 = state_42; [L221] SORT_6 var_44_arg_1 = var_41; [L222] SORT_1 var_44 = var_44_arg_0 == var_44_arg_1; [L223] SORT_45 var_49_arg_0 = state_47; [L224] SORT_45 var_49_arg_1 = var_46; [L225] SORT_1 var_49 = var_49_arg_0 == var_49_arg_1; [L226] SORT_45 var_51_arg_0 = state_47; [L227] SORT_45 var_51_arg_1 = var_50; [L228] SORT_1 var_51 = var_51_arg_0 == var_51_arg_1; [L229] SORT_1 var_52_arg_0 = var_49; [L230] SORT_1 var_52_arg_1 = var_51; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_44=1, var_46=0, var_4=0, var_50=1, var_52_arg_0=1, var_52_arg_1=0, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L231] EXPR var_52_arg_0 | var_52_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_44=1, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L231] SORT_1 var_52 = var_52_arg_0 | var_52_arg_1; [L232] SORT_1 var_53_arg_0 = var_52; [L233] SORT_1 var_53 = ~var_53_arg_0; [L234] SORT_1 var_54_arg_0 = var_44; [L235] SORT_1 var_54_arg_1 = var_53; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_54_arg_0=1, var_54_arg_1=-2, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L236] EXPR var_54_arg_0 & var_54_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L236] SORT_1 var_54 = var_54_arg_0 & var_54_arg_1; [L237] SORT_6 var_55_arg_0 = state_42; [L238] SORT_6 var_55_arg_1 = var_10; [L239] SORT_1 var_55 = var_55_arg_0 == var_55_arg_1; [L240] SORT_45 var_57_arg_0 = state_47; [L241] SORT_45 var_57_arg_1 = var_56; [L242] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L243] SORT_45 var_59_arg_0 = state_47; [L244] SORT_45 var_59_arg_1 = var_58; [L245] SORT_1 var_59 = var_59_arg_0 == var_59_arg_1; [L246] SORT_1 var_60_arg_0 = var_57; [L247] SORT_1 var_60_arg_1 = var_59; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_54=0, var_55=0, var_56=4, var_58=5, var_5=1, var_60_arg_0=0, var_60_arg_1=0, var_66=0, var_76=2, var_7=2, var_86=3] [L248] EXPR var_60_arg_0 | var_60_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_54=0, var_55=0, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L248] SORT_1 var_60 = var_60_arg_0 | var_60_arg_1; [L249] SORT_1 var_61_arg_0 = var_55; [L250] SORT_1 var_61_arg_1 = var_60; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_54=0, var_56=4, var_58=5, var_5=1, var_61_arg_0=0, var_61_arg_1=0, var_66=0, var_76=2, var_7=2, var_86=3] [L251] EXPR var_61_arg_0 & var_61_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_54=0, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L251] SORT_1 var_61 = var_61_arg_0 & var_61_arg_1; [L252] SORT_1 var_62_arg_0 = var_54; [L253] SORT_1 var_62_arg_1 = var_61; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62_arg_0=0, var_62_arg_1=0, var_66=0, var_76=2, var_7=2, var_86=3] [L254] EXPR var_62_arg_0 | var_62_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L254] SORT_1 var_62 = var_62_arg_0 | var_62_arg_1; [L255] EXPR var_62 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_66=0, var_76=2, var_7=2, var_86=3] [L255] var_62 = var_62 & mask_SORT_1 [L256] SORT_1 var_36_arg_0 = state_34; [L257] SORT_1 var_36 = ~var_36_arg_0; [L258] SORT_1 var_37_arg_0 = var_32; [L259] SORT_1 var_37_arg_1 = var_36; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37_arg_0=1, var_37_arg_1=-1, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62=0, var_66=0, var_76=2, var_7=2, var_86=3] [L260] EXPR var_37_arg_0 & var_37_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62=0, var_66=0, var_76=2, var_7=2, var_86=3] [L260] SORT_1 var_37 = var_37_arg_0 & var_37_arg_1; [L261] EXPR var_37 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62=0, var_66=0, var_76=2, var_7=2, var_86=3] [L261] var_37 = var_37 & mask_SORT_1 [L262] SORT_38 var_40_arg_0 = var_39; [L263] SORT_1 var_40_arg_1 = var_37; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_40_arg_0=0, var_40_arg_1=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62=0, var_66=0, var_76=2, var_7=2, var_86=3] [L264] EXPR ((SORT_3)var_40_arg_0 << 1) | var_40_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_62=0, var_66=0, var_76=2, var_7=2, var_86=3] [L264] SORT_3 var_40 = ((SORT_3)var_40_arg_0 << 1) | var_40_arg_1; [L265] SORT_1 var_63_arg_0 = var_62; [L266] SORT_3 var_63_arg_1 = var_40; [L267] SORT_3 var_63_arg_2 = var_4; [L268] SORT_3 var_63 = var_63_arg_0 ? var_63_arg_1 : var_63_arg_2; [L269] SORT_1 var_67_arg_0 = var_66; [L270] SORT_3 var_67_arg_1 = var_5; [L271] SORT_3 var_67_arg_2 = var_63; [L272] SORT_3 var_67 = var_67_arg_0 ? var_67_arg_1 : var_67_arg_2; [L273] SORT_3 var_68_arg_0 = var_67; [L274] SORT_1 var_68 = var_68_arg_0 >> 0; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L275] EXPR var_68 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_76=2, var_7=2, var_86=3] [L275] var_68 = var_68 & mask_SORT_1 [L276] SORT_1 var_69_arg_0 = var_13; [L277] SORT_1 var_69_arg_1 = var_68; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_69_arg_0=0, var_69_arg_1=0, var_76=2, var_7=2, var_86=3] [L278] EXPR var_69_arg_0 & var_69_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L278] SORT_1 var_69 = var_69_arg_0 & var_69_arg_1; [L279] SORT_1 var_70_arg_0 = var_69; [L280] SORT_1 var_70_arg_1 = var_21; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_70_arg_0=0, var_70_arg_1=0, var_76=2, var_7=2, var_86=3] [L281] EXPR var_70_arg_0 & var_70_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L281] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L282] SORT_1 var_71_arg_0 = var_70; [L283] SORT_1 var_71 = ~var_71_arg_0; [L284] SORT_45 var_113_arg_0 = state_47; [L285] SORT_45 var_113_arg_1 = var_50; [L286] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L287] SORT_6 var_114_arg_0 = state_98; [L288] SORT_6 var_114_arg_1 = var_10; [L289] SORT_1 var_114 = var_114_arg_0 == var_114_arg_1; [L290] SORT_1 var_115_arg_0 = var_113; [L291] SORT_1 var_115_arg_1 = var_114; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_115_arg_0=0, var_115_arg_1=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L292] EXPR var_115_arg_0 | var_115_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L292] SORT_1 var_115 = var_115_arg_0 | var_115_arg_1; [L293] EXPR var_115 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L293] var_115 = var_115 & mask_SORT_1 [L294] SORT_6 var_100_arg_0 = state_98; [L295] SORT_6 var_100_arg_1 = var_41; [L296] SORT_1 var_100 = var_100_arg_0 == var_100_arg_1; [L297] SORT_45 var_101_arg_0 = state_47; [L298] SORT_45 var_101_arg_1 = var_46; [L299] SORT_1 var_101 = var_101_arg_0 == var_101_arg_1; [L300] SORT_45 var_102_arg_0 = state_47; [L301] SORT_45 var_102_arg_1 = var_50; [L302] SORT_1 var_102 = var_102_arg_0 == var_102_arg_1; [L303] SORT_1 var_103_arg_0 = var_101; [L304] SORT_1 var_103_arg_1 = var_102; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_100=1, var_103_arg_0=1, var_103_arg_1=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L305] EXPR var_103_arg_0 | var_103_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_100=1, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L305] SORT_1 var_103 = var_103_arg_0 | var_103_arg_1; [L306] SORT_1 var_104_arg_0 = var_103; [L307] SORT_1 var_104 = ~var_104_arg_0; [L308] SORT_1 var_105_arg_0 = var_100; [L309] SORT_1 var_105_arg_1 = var_104; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_105_arg_0=1, var_105_arg_1=-2, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L310] EXPR var_105_arg_0 & var_105_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L310] SORT_1 var_105 = var_105_arg_0 & var_105_arg_1; [L311] SORT_6 var_106_arg_0 = state_98; [L312] SORT_6 var_106_arg_1 = var_10; [L313] SORT_1 var_106 = var_106_arg_0 == var_106_arg_1; [L314] SORT_45 var_107_arg_0 = state_47; [L315] SORT_45 var_107_arg_1 = var_56; [L316] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L317] SORT_45 var_108_arg_0 = state_47; [L318] SORT_45 var_108_arg_1 = var_58; [L319] SORT_1 var_108 = var_108_arg_0 == var_108_arg_1; [L320] SORT_1 var_109_arg_0 = var_107; [L321] SORT_1 var_109_arg_1 = var_108; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_105=1, var_106=0, var_109_arg_0=0, var_109_arg_1=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L322] EXPR var_109_arg_0 | var_109_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_105=1, var_106=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L322] SORT_1 var_109 = var_109_arg_0 | var_109_arg_1; [L323] SORT_1 var_110_arg_0 = var_106; [L324] SORT_1 var_110_arg_1 = var_109; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_105=1, var_10=1, var_110_arg_0=0, var_110_arg_1=0, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L325] EXPR var_110_arg_0 & var_110_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_105=1, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L325] SORT_1 var_110 = var_110_arg_0 & var_110_arg_1; [L326] SORT_1 var_111_arg_0 = var_105; [L327] SORT_1 var_111_arg_1 = var_110; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111_arg_0=1, var_111_arg_1=0, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L328] EXPR var_111_arg_0 | var_111_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L328] SORT_1 var_111 = var_111_arg_0 | var_111_arg_1; [L329] EXPR var_111 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L329] var_111 = var_111 & mask_SORT_1 [L330] SORT_6 var_92_arg_0 = state_42; [L331] SORT_6 var_92_arg_1 = var_7; [L332] SORT_1 var_92 = var_92_arg_0 == var_92_arg_1; [L333] SORT_1 var_93_arg_0 = var_33; [L334] SORT_1 var_93_arg_1 = var_92; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93_arg_0=0, var_93_arg_1=0] [L335] EXPR var_93_arg_0 | var_93_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L335] SORT_1 var_93 = var_93_arg_0 | var_93_arg_1; [L336] EXPR var_93 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L336] var_93 = var_93 & mask_SORT_1 [L337] SORT_45 var_77_arg_0 = state_47; [L338] SORT_45 var_77_arg_1 = var_76; [L339] SORT_1 var_77 = var_77_arg_0 == var_77_arg_1; [L340] SORT_45 var_78_arg_0 = state_47; [L341] SORT_45 var_78_arg_1 = var_56; [L342] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L343] SORT_1 var_79_arg_0 = var_77; [L344] SORT_1 var_79_arg_1 = var_78; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_79_arg_0=0, var_79_arg_1=0, var_7=2, var_86=3, var_93=0] [L345] EXPR var_79_arg_0 | var_79_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93=0] [L345] SORT_1 var_79 = var_79_arg_0 | var_79_arg_1; [L346] SORT_45 var_80_arg_0 = state_47; [L347] SORT_45 var_80_arg_1 = var_58; [L348] SORT_1 var_80 = var_80_arg_0 == var_80_arg_1; [L349] SORT_1 var_81_arg_0 = var_79; [L350] SORT_1 var_81_arg_1 = var_80; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_81_arg_0=0, var_81_arg_1=0, var_86=3, var_93=0] [L351] EXPR var_81_arg_0 | var_81_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93=0] [L351] SORT_1 var_81 = var_81_arg_0 | var_81_arg_1; [L352] SORT_45 var_82_arg_0 = state_47; [L353] SORT_45 var_82_arg_1 = var_50; [L354] SORT_1 var_82 = var_82_arg_0 == var_82_arg_1; [L355] SORT_6 var_83_arg_0 = state_42; [L356] SORT_6 var_83_arg_1 = var_10; [L357] SORT_1 var_83 = var_83_arg_0 == var_83_arg_1; [L358] SORT_1 var_84_arg_0 = var_82; [L359] SORT_1 var_84_arg_1 = var_83; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_81=0, var_84_arg_0=0, var_84_arg_1=0, var_86=3, var_93=0] [L360] EXPR var_84_arg_0 & var_84_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_81=0, var_86=3, var_93=0] [L360] SORT_1 var_84 = var_84_arg_0 & var_84_arg_1; [L361] SORT_1 var_85_arg_0 = var_81; [L362] SORT_1 var_85_arg_1 = var_84; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_85_arg_0=0, var_85_arg_1=0, var_86=3, var_93=0] [L363] EXPR var_85_arg_0 | var_85_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93=0] [L363] SORT_1 var_85 = var_85_arg_0 | var_85_arg_1; [L364] SORT_45 var_87_arg_0 = state_47; [L365] SORT_45 var_87_arg_1 = var_86; [L366] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L367] SORT_6 var_88_arg_0 = state_42; [L368] SORT_6 var_88_arg_1 = var_41; [L369] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L370] SORT_1 var_89_arg_0 = var_87; [L371] SORT_1 var_89_arg_1 = var_88; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_85=0, var_86=3, var_89_arg_0=0, var_89_arg_1=1, var_93=0] [L372] EXPR var_89_arg_0 & var_89_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_85=0, var_86=3, var_93=0] [L372] SORT_1 var_89 = var_89_arg_0 & var_89_arg_1; [L373] SORT_1 var_90_arg_0 = var_85; [L374] SORT_1 var_90_arg_1 = var_89; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_90_arg_0=0, var_90_arg_1=0, var_93=0] [L375] EXPR var_90_arg_0 | var_90_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93=0] [L375] SORT_1 var_90 = var_90_arg_0 | var_90_arg_1; [L376] EXPR var_90 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_93=0] [L376] var_90 = var_90 & mask_SORT_1 [L377] SORT_1 var_91_arg_0 = var_90; [L378] SORT_3 var_91_arg_1 = var_5; [L379] SORT_3 var_91_arg_2 = var_4; [L380] SORT_3 var_91 = var_91_arg_0 ? var_91_arg_1 : var_91_arg_2; [L381] SORT_1 var_94_arg_0 = var_93; [L382] SORT_3 var_94_arg_1 = var_4; [L383] SORT_3 var_94_arg_2 = var_91; [L384] SORT_3 var_94 = var_94_arg_0 ? var_94_arg_1 : var_94_arg_2; [L385] SORT_3 var_95_arg_0 = var_94; [L386] SORT_1 var_95 = var_95_arg_0 >> 0; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_95=0] [L387] EXPR var_95 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L387] var_95 = var_95 & mask_SORT_1 [L388] SORT_1 var_74_arg_0 = state_72; [L389] SORT_1 var_74 = ~var_74_arg_0; [L390] SORT_1 var_75_arg_0 = var_32; [L391] SORT_1 var_75_arg_1 = var_74; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_75_arg_0=1, var_75_arg_1=-1, var_76=2, var_7=2, var_86=3, var_95=0] [L392] EXPR var_75_arg_0 & var_75_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_37=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_95=0] [L392] SORT_1 var_75 = var_75_arg_0 & var_75_arg_1; [L393] SORT_1 var_96_arg_0 = var_95; [L394] SORT_1 var_96_arg_1 = var_37; [L395] SORT_1 var_96_arg_2 = var_75; [L396] SORT_1 var_96 = var_96_arg_0 ? var_96_arg_1 : var_96_arg_2; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_96=1] [L397] EXPR var_96 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L397] var_96 = var_96 & mask_SORT_1 [L398] SORT_38 var_97_arg_0 = var_39; [L399] SORT_1 var_97_arg_1 = var_96; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3, var_97_arg_0=0, var_97_arg_1=1] [L400] EXPR ((SORT_3)var_97_arg_0 << 1) | var_97_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_111=1, var_115=0, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L400] SORT_3 var_97 = ((SORT_3)var_97_arg_0 << 1) | var_97_arg_1; [L401] SORT_1 var_112_arg_0 = var_111; [L402] SORT_3 var_112_arg_1 = var_97; [L403] SORT_3 var_112_arg_2 = var_4; [L404] SORT_3 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L405] SORT_1 var_116_arg_0 = var_115; [L406] SORT_3 var_116_arg_1 = var_5; [L407] SORT_3 var_116_arg_2 = var_112; [L408] SORT_3 var_116 = var_116_arg_0 ? var_116_arg_1 : var_116_arg_2; [L409] SORT_3 var_117_arg_0 = var_116; [L410] SORT_1 var_117 = var_117_arg_0 >> 0; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L411] EXPR var_117 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_71=-1, var_76=2, var_7=2, var_86=3] [L411] var_117 = var_117 & mask_SORT_1 [L412] SORT_1 var_118_arg_0 = var_71; [L413] SORT_1 var_118_arg_1 = var_117; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_118_arg_0=-1, var_118_arg_1=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L414] EXPR var_118_arg_0 | var_118_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_13=0, var_21=0, var_31=255, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L414] SORT_1 var_118 = var_118_arg_0 | var_118_arg_1; [L415] SORT_1 var_119_arg_0 = var_31; [L416] SORT_1 var_119_arg_1 = var_118; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_119_arg_0=255, var_119_arg_1=256, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L417] EXPR var_119_arg_0 & var_119_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L417] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L418] SORT_1 var_122_arg_0 = var_119; [L419] SORT_1 var_122 = ~var_122_arg_0; [L420] SORT_1 var_123_arg_0 = var_32; [L421] SORT_1 var_123_arg_1 = var_122; VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_123_arg_0=1, var_123_arg_1=-1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L422] EXPR var_123_arg_0 & var_123_arg_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L422] SORT_1 var_123 = var_123_arg_0 & var_123_arg_1; [L423] EXPR var_123 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_45=7, mask_SORT_6=3, state_129=0, state_131=0, state_141=0, state_143=0, state_145=0, state_147=1, state_149=5, state_154=1, state_168=1, state_170=2, state_172=0, state_174=0, state_176=0, state_178=0, state_17=2, state_180=0, state_182=1, state_184=5, state_189=1, state_203=1, state_205=2, state_207=0, state_209=0, state_34=0, state_42=0, state_47=0, state_72=0, state_8=2, state_98=0, var_10=1, var_117=1, var_13=0, var_21=0, var_32=1, var_33=0, var_39=0, var_41=0, var_46=0, var_4=0, var_50=1, var_56=4, var_58=5, var_5=1, var_68=0, var_76=2, var_7=2, var_86=3] [L423] var_123 = var_123 & mask_SORT_1 [L424] SORT_1 bad_124_arg_0 = var_123; [L425] CALL __VERIFIER_assert(!(bad_124_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 926 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 61.5s, OverallIterations: 47, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 33.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 74139 SdHoareTripleChecker+Valid, 30.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 74139 mSDsluCounter, 235074 SdHoareTripleChecker+Invalid, 25.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 183744 mSDsCounter, 247 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 70791 IncrementalHoareTripleChecker+Invalid, 71038 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 247 mSolverCounterUnsat, 51330 mSDtfsCounter, 70791 mSolverCounterSat, 0.4s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 440 GetRequests, 131 SyntacticMatches, 2 SemanticMatches, 307 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3910occurred in iteration=36, InterpolantAutomatonStates: 312, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.1s AutomataMinimizationTime, 46 MinimizatonAttempts, 20382 StatesRemovedByMinimization, 38 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.5s SsaConstructionTime, 4.0s SatisfiabilityAnalysisTime, 20.2s InterpolantComputationTime, 8031 NumberOfCodeBlocks, 8031 NumberOfCodeBlocksAsserted, 47 NumberOfCheckSat, 7806 ConstructedInterpolants, 0 QuantifiedInterpolants, 27920 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 46 InterpolantComputations, 46 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2025-03-03 16:50:20,320 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 56b29f9d5660210a85c24688e6471450833c85f52fe4e28968dbf3dd7aaa100e --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-03 16:50:22,150 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-03 16:50:22,253 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2025-03-03 16:50:22,258 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-03 16:50:22,260 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-03 16:50:22,281 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-03 16:50:22,282 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-03 16:50:22,282 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-03 16:50:22,283 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-03 16:50:22,283 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-03 16:50:22,283 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-03 16:50:22,284 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-03 16:50:22,284 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-03 16:50:22,284 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-03 16:50:22,284 INFO L153 SettingsManager]: * Use SBE=true [2025-03-03 16:50:22,285 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-03 16:50:22,285 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-03 16:50:22,285 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-03 16:50:22,285 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-03 16:50:22,285 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-03 16:50:22,285 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-03 16:50:22,285 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2025-03-03 16:50:22,285 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2025-03-03 16:50:22,285 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2025-03-03 16:50:22,285 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-03 16:50:22,285 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-03 16:50:22,286 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-03 16:50:22,286 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-03 16:50:22,286 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-03 16:50:22,286 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-03 16:50:22,286 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-03 16:50:22,286 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 16:50:22,286 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-03 16:50:22,286 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-03 16:50:22,287 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-03 16:50:22,287 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-03 16:50:22,287 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2025-03-03 16:50:22,287 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2025-03-03 16:50:22,287 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-03 16:50:22,287 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-03 16:50:22,287 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-03 16:50:22,287 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-03 16:50:22,287 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 56b29f9d5660210a85c24688e6471450833c85f52fe4e28968dbf3dd7aaa100e [2025-03-03 16:50:22,555 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-03 16:50:22,561 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-03 16:50:22,566 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-03 16:50:22,567 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-03 16:50:22,568 INFO L274 PluginConnector]: CDTParser initialized [2025-03-03 16:50:22,573 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c [2025-03-03 16:50:23,752 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a6e151052/134bc6cfe664469d9e8fa2d4ec7974c6/FLAGe4dce8cce [2025-03-03 16:50:24,059 INFO L384 CDTParser]: Found 1 translation units. [2025-03-03 16:50:24,061 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c [2025-03-03 16:50:24,075 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a6e151052/134bc6cfe664469d9e8fa2d4ec7974c6/FLAGe4dce8cce [2025-03-03 16:50:24,331 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a6e151052/134bc6cfe664469d9e8fa2d4ec7974c6 [2025-03-03 16:50:24,333 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-03 16:50:24,334 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-03 16:50:24,335 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-03 16:50:24,335 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-03 16:50:24,338 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-03 16:50:24,338 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:24,339 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5205c9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24, skipping insertion in model container [2025-03-03 16:50:24,339 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:24,383 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-03 16:50:24,508 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c[1259,1272] [2025-03-03 16:50:24,723 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 16:50:24,731 INFO L200 MainTranslator]: Completed pre-run [2025-03-03 16:50:24,738 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.cache_coherence_two.c[1259,1272] [2025-03-03 16:50:24,868 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 16:50:24,878 INFO L204 MainTranslator]: Completed translation [2025-03-03 16:50:24,878 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24 WrapperNode [2025-03-03 16:50:24,878 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-03 16:50:24,879 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-03 16:50:24,879 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-03 16:50:24,879 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-03 16:50:24,883 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:24,922 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:24,994 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1995 [2025-03-03 16:50:24,995 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-03 16:50:24,995 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-03 16:50:24,995 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-03 16:50:24,995 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-03 16:50:25,001 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:25,002 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:25,011 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:25,049 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-03 16:50:25,050 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:25,050 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:25,089 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:25,095 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:25,103 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:25,116 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:25,129 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-03 16:50:25,131 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-03 16:50:25,131 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-03 16:50:25,131 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-03 16:50:25,132 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (1/1) ... [2025-03-03 16:50:25,136 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 16:50:25,145 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 16:50:25,156 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-03 16:50:25,158 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-03 16:50:25,177 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-03 16:50:25,177 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2025-03-03 16:50:25,177 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-03 16:50:25,177 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-03 16:50:25,443 INFO L256 CfgBuilder]: Building ICFG [2025-03-03 16:50:25,444 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-03 16:50:26,392 INFO L? ?]: Removed 293 outVars from TransFormulas that were not future-live. [2025-03-03 16:50:26,392 INFO L307 CfgBuilder]: Performing block encoding [2025-03-03 16:50:26,398 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-03 16:50:26,398 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-03 16:50:26,398 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 04:50:26 BoogieIcfgContainer [2025-03-03 16:50:26,398 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-03 16:50:26,400 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-03 16:50:26,401 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-03 16:50:26,404 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-03 16:50:26,404 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.03 04:50:24" (1/3) ... [2025-03-03 16:50:26,405 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@475737d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 04:50:26, skipping insertion in model container [2025-03-03 16:50:26,405 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 04:50:24" (2/3) ... [2025-03-03 16:50:26,406 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@475737d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 04:50:26, skipping insertion in model container [2025-03-03 16:50:26,406 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 04:50:26" (3/3) ... [2025-03-03 16:50:26,407 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.cache_coherence_two.c [2025-03-03 16:50:26,417 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-03 16:50:26,419 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.cache_coherence_two.c that has 1 procedures, 10 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-03-03 16:50:26,452 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-03 16:50:26,461 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@714a6d46, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-03 16:50:26,462 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-03 16:50:26,466 INFO L276 IsEmpty]: Start isEmpty. Operand has 10 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 16:50:26,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2025-03-03 16:50:26,470 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 16:50:26,470 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2025-03-03 16:50:26,471 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 16:50:26,475 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 16:50:26,476 INFO L85 PathProgramCache]: Analyzing trace with hash 38140359, now seen corresponding path program 1 times [2025-03-03 16:50:26,483 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-03-03 16:50:26,483 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1845856639] [2025-03-03 16:50:26,483 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 16:50:26,484 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-03 16:50:26,484 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 16:50:26,486 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-03 16:50:26,487 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process