./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 798a7b37 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-03 17:38:41,642 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-03 17:38:41,692 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2025-03-03 17:38:41,698 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-03 17:38:41,701 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-03 17:38:41,717 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-03 17:38:41,717 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-03 17:38:41,717 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-03 17:38:41,719 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-03 17:38:41,719 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-03 17:38:41,719 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Use SBE=true [2025-03-03 17:38:41,719 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-03 17:38:41,719 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-03 17:38:41,720 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 17:38:41,720 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-03 17:38:41,720 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 [2025-03-03 17:38:41,952 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-03 17:38:41,959 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-03 17:38:41,962 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-03 17:38:41,963 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-03 17:38:41,964 INFO L274 PluginConnector]: CDTParser initialized [2025-03-03 17:38:41,965 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2025-03-03 17:38:43,136 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/da2caaf0a/936307ad42154a09b2066acf8209d7d5/FLAG20d043b49 [2025-03-03 17:38:43,393 INFO L384 CDTParser]: Found 1 translation units. [2025-03-03 17:38:43,394 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2025-03-03 17:38:43,404 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/da2caaf0a/936307ad42154a09b2066acf8209d7d5/FLAG20d043b49 [2025-03-03 17:38:43,414 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/da2caaf0a/936307ad42154a09b2066acf8209d7d5 [2025-03-03 17:38:43,416 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-03 17:38:43,417 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-03 17:38:43,418 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-03 17:38:43,418 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-03 17:38:43,421 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-03 17:38:43,422 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:43,422 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3641e6de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43, skipping insertion in model container [2025-03-03 17:38:43,422 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:43,451 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-03 17:38:43,579 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2025-03-03 17:38:43,778 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 17:38:43,787 INFO L200 MainTranslator]: Completed pre-run [2025-03-03 17:38:43,794 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2025-03-03 17:38:43,878 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 17:38:43,890 INFO L204 MainTranslator]: Completed translation [2025-03-03 17:38:43,891 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43 WrapperNode [2025-03-03 17:38:43,891 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-03 17:38:43,892 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-03 17:38:43,892 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-03 17:38:43,892 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-03 17:38:43,898 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:43,924 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:44,055 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1945 [2025-03-03 17:38:44,055 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-03 17:38:44,056 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-03 17:38:44,056 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-03 17:38:44,056 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-03 17:38:44,062 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:44,063 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:44,094 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:44,181 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-03 17:38:44,182 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:44,182 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:44,214 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:44,221 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:44,234 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:44,242 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:44,261 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-03 17:38:44,262 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-03 17:38:44,262 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-03 17:38:44,262 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-03 17:38:44,263 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (1/1) ... [2025-03-03 17:38:44,267 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 17:38:44,275 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 17:38:44,286 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-03 17:38:44,288 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-03 17:38:44,306 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-03 17:38:44,306 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-03 17:38:44,306 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-03 17:38:44,306 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-03 17:38:44,507 INFO L256 CfgBuilder]: Building ICFG [2025-03-03 17:38:44,509 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-03 17:38:46,105 INFO L? ?]: Removed 1134 outVars from TransFormulas that were not future-live. [2025-03-03 17:38:46,105 INFO L307 CfgBuilder]: Performing block encoding [2025-03-03 17:38:46,176 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-03 17:38:46,176 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-03 17:38:46,177 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 05:38:46 BoogieIcfgContainer [2025-03-03 17:38:46,177 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-03 17:38:46,179 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-03 17:38:46,180 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-03 17:38:46,183 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-03 17:38:46,184 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.03 05:38:43" (1/3) ... [2025-03-03 17:38:46,184 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2bc3cc06 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 05:38:46, skipping insertion in model container [2025-03-03 17:38:46,185 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:38:43" (2/3) ... [2025-03-03 17:38:46,185 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2bc3cc06 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 05:38:46, skipping insertion in model container [2025-03-03 17:38:46,185 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 05:38:46" (3/3) ... [2025-03-03 17:38:46,186 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.itc99_b13.c [2025-03-03 17:38:46,200 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-03 17:38:46,201 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.itc99_b13.c that has 1 procedures, 498 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-03-03 17:38:46,262 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-03 17:38:46,271 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@42334add, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-03 17:38:46,271 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-03 17:38:46,275 INFO L276 IsEmpty]: Start isEmpty. Operand has 498 states, 496 states have (on average 1.497983870967742) internal successors, (743), 497 states have internal predecessors, (743), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:46,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2025-03-03 17:38:46,288 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:46,289 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:46,289 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:46,294 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:46,294 INFO L85 PathProgramCache]: Analyzing trace with hash 788867937, now seen corresponding path program 1 times [2025-03-03 17:38:46,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:46,300 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [915943391] [2025-03-03 17:38:46,300 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:46,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:46,414 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 215 statements into 1 equivalence classes. [2025-03-03 17:38:46,720 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 215 of 215 statements. [2025-03-03 17:38:46,721 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:46,721 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:47,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:47,743 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:47,743 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [915943391] [2025-03-03 17:38:47,744 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [915943391] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:47,745 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:47,745 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:38:47,746 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1171795945] [2025-03-03 17:38:47,746 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:47,749 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:38:47,750 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:47,766 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:38:47,767 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:47,769 INFO L87 Difference]: Start difference. First operand has 498 states, 496 states have (on average 1.497983870967742) internal successors, (743), 497 states have internal predecessors, (743), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:48,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:48,091 INFO L93 Difference]: Finished difference Result 901 states and 1347 transitions. [2025-03-03 17:38:48,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:38:48,093 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 215 [2025-03-03 17:38:48,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:48,105 INFO L225 Difference]: With dead ends: 901 [2025-03-03 17:38:48,107 INFO L226 Difference]: Without dead ends: 497 [2025-03-03 17:38:48,113 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:48,116 INFO L435 NwaCegarLoop]: 615 mSDtfsCounter, 0 mSDsluCounter, 1225 mSDsCounter, 0 mSdLazyCounter, 376 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1840 SdHoareTripleChecker+Invalid, 376 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 376 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:48,117 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1840 Invalid, 376 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 376 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-03 17:38:48,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2025-03-03 17:38:48,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 497. [2025-03-03 17:38:48,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 497 states, 496 states have (on average 1.4939516129032258) internal successors, (741), 496 states have internal predecessors, (741), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:48,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 741 transitions. [2025-03-03 17:38:48,171 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 741 transitions. Word has length 215 [2025-03-03 17:38:48,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:48,173 INFO L471 AbstractCegarLoop]: Abstraction has 497 states and 741 transitions. [2025-03-03 17:38:48,173 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:48,173 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 741 transitions. [2025-03-03 17:38:48,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2025-03-03 17:38:48,177 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:48,177 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:48,177 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-03 17:38:48,177 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:48,178 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:48,178 INFO L85 PathProgramCache]: Analyzing trace with hash -1310218465, now seen corresponding path program 1 times [2025-03-03 17:38:48,178 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:48,178 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2058806612] [2025-03-03 17:38:48,178 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:48,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:48,261 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 216 statements into 1 equivalence classes. [2025-03-03 17:38:48,361 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 216 of 216 statements. [2025-03-03 17:38:48,362 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:48,362 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:48,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:48,865 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:48,865 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2058806612] [2025-03-03 17:38:48,865 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2058806612] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:48,865 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:48,865 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-03 17:38:48,866 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [316770934] [2025-03-03 17:38:48,866 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:48,867 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-03 17:38:48,868 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:48,868 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-03 17:38:48,868 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-03 17:38:48,868 INFO L87 Difference]: Start difference. First operand 497 states and 741 transitions. Second operand has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:49,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:49,834 INFO L93 Difference]: Finished difference Result 1711 states and 2552 transitions. [2025-03-03 17:38:49,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 17:38:49,834 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 216 [2025-03-03 17:38:49,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:49,838 INFO L225 Difference]: With dead ends: 1711 [2025-03-03 17:38:49,838 INFO L226 Difference]: Without dead ends: 876 [2025-03-03 17:38:49,839 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2025-03-03 17:38:49,840 INFO L435 NwaCegarLoop]: 721 mSDtfsCounter, 2923 mSDsluCounter, 1587 mSDsCounter, 0 mSdLazyCounter, 1047 mSolverCounterSat, 69 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2923 SdHoareTripleChecker+Valid, 2308 SdHoareTripleChecker+Invalid, 1116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 69 IncrementalHoareTripleChecker+Valid, 1047 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:49,840 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2923 Valid, 2308 Invalid, 1116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [69 Valid, 1047 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-03-03 17:38:49,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 876 states. [2025-03-03 17:38:49,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 876 to 695. [2025-03-03 17:38:49,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 695 states, 694 states have (on average 1.494236311239193) internal successors, (1037), 694 states have internal predecessors, (1037), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:49,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 695 states to 695 states and 1037 transitions. [2025-03-03 17:38:49,871 INFO L78 Accepts]: Start accepts. Automaton has 695 states and 1037 transitions. Word has length 216 [2025-03-03 17:38:49,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:49,872 INFO L471 AbstractCegarLoop]: Abstraction has 695 states and 1037 transitions. [2025-03-03 17:38:49,872 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:49,872 INFO L276 IsEmpty]: Start isEmpty. Operand 695 states and 1037 transitions. [2025-03-03 17:38:49,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2025-03-03 17:38:49,878 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:49,878 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:49,878 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-03 17:38:49,878 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:49,879 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:49,879 INFO L85 PathProgramCache]: Analyzing trace with hash 767905409, now seen corresponding path program 1 times [2025-03-03 17:38:49,879 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:49,879 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402891211] [2025-03-03 17:38:49,879 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:49,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:49,935 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 217 statements into 1 equivalence classes. [2025-03-03 17:38:50,000 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 217 of 217 statements. [2025-03-03 17:38:50,001 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:50,001 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:50,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:50,362 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:50,362 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [402891211] [2025-03-03 17:38:50,362 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [402891211] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:50,362 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:50,362 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:38:50,362 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1203633731] [2025-03-03 17:38:50,363 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:50,363 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:38:50,363 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:50,364 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:38:50,364 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:50,364 INFO L87 Difference]: Start difference. First operand 695 states and 1037 transitions. Second operand has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:50,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:50,570 INFO L93 Difference]: Finished difference Result 1100 states and 1641 transitions. [2025-03-03 17:38:50,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:38:50,572 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 217 [2025-03-03 17:38:50,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:50,575 INFO L225 Difference]: With dead ends: 1100 [2025-03-03 17:38:50,575 INFO L226 Difference]: Without dead ends: 697 [2025-03-03 17:38:50,575 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:50,579 INFO L435 NwaCegarLoop]: 615 mSDtfsCounter, 0 mSDsluCounter, 1222 mSDsCounter, 0 mSdLazyCounter, 379 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1837 SdHoareTripleChecker+Invalid, 379 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 379 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:50,580 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1837 Invalid, 379 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 379 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:38:50,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2025-03-03 17:38:50,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 697. [2025-03-03 17:38:50,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 697 states, 696 states have (on average 1.492816091954023) internal successors, (1039), 696 states have internal predecessors, (1039), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:50,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 697 states to 697 states and 1039 transitions. [2025-03-03 17:38:50,596 INFO L78 Accepts]: Start accepts. Automaton has 697 states and 1039 transitions. Word has length 217 [2025-03-03 17:38:50,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:50,596 INFO L471 AbstractCegarLoop]: Abstraction has 697 states and 1039 transitions. [2025-03-03 17:38:50,596 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:50,596 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 1039 transitions. [2025-03-03 17:38:50,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2025-03-03 17:38:50,598 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:50,598 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:50,598 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-03 17:38:50,598 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:50,599 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:50,599 INFO L85 PathProgramCache]: Analyzing trace with hash -33226758, now seen corresponding path program 1 times [2025-03-03 17:38:50,599 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:50,599 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1387514754] [2025-03-03 17:38:50,599 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:50,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:50,648 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 218 statements into 1 equivalence classes. [2025-03-03 17:38:50,948 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 218 of 218 statements. [2025-03-03 17:38:50,948 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:50,948 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:51,692 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:51,692 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:51,692 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1387514754] [2025-03-03 17:38:51,692 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1387514754] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:51,692 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:51,692 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:38:51,693 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [693434760] [2025-03-03 17:38:51,693 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:51,693 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:38:51,693 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:51,694 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:38:51,694 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:51,694 INFO L87 Difference]: Start difference. First operand 697 states and 1039 transitions. Second operand has 4 states, 4 states have (on average 54.5) internal successors, (218), 4 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:51,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:51,908 INFO L93 Difference]: Finished difference Result 1240 states and 1848 transitions. [2025-03-03 17:38:51,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:38:51,909 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 54.5) internal successors, (218), 4 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 218 [2025-03-03 17:38:51,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:51,911 INFO L225 Difference]: With dead ends: 1240 [2025-03-03 17:38:51,911 INFO L226 Difference]: Without dead ends: 697 [2025-03-03 17:38:51,912 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:51,913 INFO L435 NwaCegarLoop]: 612 mSDtfsCounter, 6 mSDsluCounter, 1215 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 1827 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:51,914 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 1827 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:38:51,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2025-03-03 17:38:51,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 697. [2025-03-03 17:38:51,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 697 states, 696 states have (on average 1.4899425287356323) internal successors, (1037), 696 states have internal predecessors, (1037), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:51,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 697 states to 697 states and 1037 transitions. [2025-03-03 17:38:51,932 INFO L78 Accepts]: Start accepts. Automaton has 697 states and 1037 transitions. Word has length 218 [2025-03-03 17:38:51,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:51,932 INFO L471 AbstractCegarLoop]: Abstraction has 697 states and 1037 transitions. [2025-03-03 17:38:51,932 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 54.5) internal successors, (218), 4 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:51,932 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 1037 transitions. [2025-03-03 17:38:51,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2025-03-03 17:38:51,934 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:51,934 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:51,934 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-03 17:38:51,934 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:51,934 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:51,935 INFO L85 PathProgramCache]: Analyzing trace with hash -2030554707, now seen corresponding path program 1 times [2025-03-03 17:38:51,935 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:51,935 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254758731] [2025-03-03 17:38:51,935 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:51,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:51,978 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 219 statements into 1 equivalence classes. [2025-03-03 17:38:52,199 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 219 of 219 statements. [2025-03-03 17:38:52,199 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:52,199 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:52,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:52,739 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:52,740 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254758731] [2025-03-03 17:38:52,740 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [254758731] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:52,740 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:52,740 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 17:38:52,740 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [91754826] [2025-03-03 17:38:52,740 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:52,740 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 17:38:52,740 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:52,741 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 17:38:52,741 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-03 17:38:52,741 INFO L87 Difference]: Start difference. First operand 697 states and 1037 transitions. Second operand has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:52,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:52,994 INFO L93 Difference]: Finished difference Result 1106 states and 1645 transitions. [2025-03-03 17:38:52,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 17:38:52,994 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 219 [2025-03-03 17:38:52,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:52,996 INFO L225 Difference]: With dead ends: 1106 [2025-03-03 17:38:52,997 INFO L226 Difference]: Without dead ends: 701 [2025-03-03 17:38:52,997 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-03 17:38:52,998 INFO L435 NwaCegarLoop]: 600 mSDtfsCounter, 533 mSDsluCounter, 1194 mSDsCounter, 0 mSdLazyCounter, 420 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 533 SdHoareTripleChecker+Valid, 1794 SdHoareTripleChecker+Invalid, 421 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 420 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:52,998 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [533 Valid, 1794 Invalid, 421 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 420 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:38:52,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 701 states. [2025-03-03 17:38:53,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 701 to 700. [2025-03-03 17:38:53,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4878397711015736) internal successors, (1040), 699 states have internal predecessors, (1040), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:53,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1040 transitions. [2025-03-03 17:38:53,015 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1040 transitions. Word has length 219 [2025-03-03 17:38:53,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:53,016 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1040 transitions. [2025-03-03 17:38:53,016 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.8) internal successors, (219), 5 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:53,016 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1040 transitions. [2025-03-03 17:38:53,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2025-03-03 17:38:53,017 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:53,018 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:53,018 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-03 17:38:53,018 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:53,018 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:53,018 INFO L85 PathProgramCache]: Analyzing trace with hash -929291149, now seen corresponding path program 1 times [2025-03-03 17:38:53,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:53,018 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941488265] [2025-03-03 17:38:53,018 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:53,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:53,068 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 220 statements into 1 equivalence classes. [2025-03-03 17:38:53,112 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 220 of 220 statements. [2025-03-03 17:38:53,113 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:53,113 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:53,507 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:53,508 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:53,508 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941488265] [2025-03-03 17:38:53,508 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [941488265] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:53,510 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:53,510 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-03 17:38:53,510 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248800098] [2025-03-03 17:38:53,510 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:53,510 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-03 17:38:53,510 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:53,511 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-03 17:38:53,511 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-03 17:38:53,511 INFO L87 Difference]: Start difference. First operand 700 states and 1040 transitions. Second operand has 6 states, 6 states have (on average 36.666666666666664) internal successors, (220), 6 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:53,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:53,756 INFO L93 Difference]: Finished difference Result 1122 states and 1666 transitions. [2025-03-03 17:38:53,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 17:38:53,757 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 36.666666666666664) internal successors, (220), 6 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 220 [2025-03-03 17:38:53,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:53,759 INFO L225 Difference]: With dead ends: 1122 [2025-03-03 17:38:53,760 INFO L226 Difference]: Without dead ends: 714 [2025-03-03 17:38:53,762 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-03 17:38:53,762 INFO L435 NwaCegarLoop]: 613 mSDtfsCounter, 12 mSDsluCounter, 1829 mSDsCounter, 0 mSdLazyCounter, 510 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 2442 SdHoareTripleChecker+Invalid, 511 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 510 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:53,762 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 2442 Invalid, 511 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 510 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:38:53,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2025-03-03 17:38:53,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 714. [2025-03-03 17:38:53,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 714 states, 713 states have (on average 1.4866760168302946) internal successors, (1060), 713 states have internal predecessors, (1060), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:53,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 714 states to 714 states and 1060 transitions. [2025-03-03 17:38:53,775 INFO L78 Accepts]: Start accepts. Automaton has 714 states and 1060 transitions. Word has length 220 [2025-03-03 17:38:53,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:53,775 INFO L471 AbstractCegarLoop]: Abstraction has 714 states and 1060 transitions. [2025-03-03 17:38:53,775 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 36.666666666666664) internal successors, (220), 6 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:53,775 INFO L276 IsEmpty]: Start isEmpty. Operand 714 states and 1060 transitions. [2025-03-03 17:38:53,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2025-03-03 17:38:53,777 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:53,777 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:53,777 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-03 17:38:53,777 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:53,777 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:53,778 INFO L85 PathProgramCache]: Analyzing trace with hash 148331307, now seen corresponding path program 1 times [2025-03-03 17:38:53,778 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:53,778 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737674883] [2025-03-03 17:38:53,778 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:53,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:53,822 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 220 statements into 1 equivalence classes. [2025-03-03 17:38:54,063 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 220 of 220 statements. [2025-03-03 17:38:54,063 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:54,063 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:54,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:54,591 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:54,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737674883] [2025-03-03 17:38:54,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1737674883] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:54,592 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:54,592 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:38:54,592 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1040558140] [2025-03-03 17:38:54,592 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:54,592 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:38:54,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:54,593 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:38:54,593 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:54,593 INFO L87 Difference]: Start difference. First operand 714 states and 1060 transitions. Second operand has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:54,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:54,802 INFO L93 Difference]: Finished difference Result 1294 states and 1920 transitions. [2025-03-03 17:38:54,802 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:38:54,803 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 220 [2025-03-03 17:38:54,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:54,805 INFO L225 Difference]: With dead ends: 1294 [2025-03-03 17:38:54,805 INFO L226 Difference]: Without dead ends: 714 [2025-03-03 17:38:54,806 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:54,806 INFO L435 NwaCegarLoop]: 611 mSDtfsCounter, 6 mSDsluCounter, 1213 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 1824 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:54,806 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 1824 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:38:54,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2025-03-03 17:38:54,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 714. [2025-03-03 17:38:54,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 714 states, 713 states have (on average 1.4838709677419355) internal successors, (1058), 713 states have internal predecessors, (1058), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:54,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 714 states to 714 states and 1058 transitions. [2025-03-03 17:38:54,818 INFO L78 Accepts]: Start accepts. Automaton has 714 states and 1058 transitions. Word has length 220 [2025-03-03 17:38:54,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:54,818 INFO L471 AbstractCegarLoop]: Abstraction has 714 states and 1058 transitions. [2025-03-03 17:38:54,818 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:54,818 INFO L276 IsEmpty]: Start isEmpty. Operand 714 states and 1058 transitions. [2025-03-03 17:38:54,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2025-03-03 17:38:54,820 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:54,820 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:54,820 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-03 17:38:54,820 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:54,821 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:54,821 INFO L85 PathProgramCache]: Analyzing trace with hash 716833733, now seen corresponding path program 1 times [2025-03-03 17:38:54,821 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:54,821 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [584746723] [2025-03-03 17:38:54,821 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:54,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:54,869 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 221 statements into 1 equivalence classes. [2025-03-03 17:38:55,008 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 221 of 221 statements. [2025-03-03 17:38:55,008 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:55,008 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:55,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:55,459 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:55,460 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [584746723] [2025-03-03 17:38:55,460 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [584746723] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:55,460 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:55,460 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:38:55,460 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1757238625] [2025-03-03 17:38:55,460 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:55,460 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:38:55,460 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:55,461 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:38:55,461 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:55,461 INFO L87 Difference]: Start difference. First operand 714 states and 1058 transitions. Second operand has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:55,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:55,692 INFO L93 Difference]: Finished difference Result 1322 states and 1958 transitions. [2025-03-03 17:38:55,692 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:38:55,693 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 221 [2025-03-03 17:38:55,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:55,695 INFO L225 Difference]: With dead ends: 1322 [2025-03-03 17:38:55,695 INFO L226 Difference]: Without dead ends: 714 [2025-03-03 17:38:55,696 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:55,696 INFO L435 NwaCegarLoop]: 610 mSDtfsCounter, 6 mSDsluCounter, 1211 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 1821 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:55,697 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 1821 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:38:55,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2025-03-03 17:38:55,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 714. [2025-03-03 17:38:55,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 714 states, 713 states have (on average 1.4810659186535764) internal successors, (1056), 713 states have internal predecessors, (1056), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:55,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 714 states to 714 states and 1056 transitions. [2025-03-03 17:38:55,710 INFO L78 Accepts]: Start accepts. Automaton has 714 states and 1056 transitions. Word has length 221 [2025-03-03 17:38:55,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:55,711 INFO L471 AbstractCegarLoop]: Abstraction has 714 states and 1056 transitions. [2025-03-03 17:38:55,711 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:55,711 INFO L276 IsEmpty]: Start isEmpty. Operand 714 states and 1056 transitions. [2025-03-03 17:38:55,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2025-03-03 17:38:55,713 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:55,713 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:55,713 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-03 17:38:55,714 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:55,714 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:55,714 INFO L85 PathProgramCache]: Analyzing trace with hash -307694482, now seen corresponding path program 1 times [2025-03-03 17:38:55,714 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:55,714 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [624989922] [2025-03-03 17:38:55,714 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:55,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:55,767 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 222 statements into 1 equivalence classes. [2025-03-03 17:38:55,934 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 222 of 222 statements. [2025-03-03 17:38:55,935 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:55,935 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:56,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:56,475 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:56,475 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [624989922] [2025-03-03 17:38:56,475 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [624989922] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:56,475 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:56,475 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:38:56,475 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959346369] [2025-03-03 17:38:56,475 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:56,476 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:38:56,476 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:56,476 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:38:56,477 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:56,477 INFO L87 Difference]: Start difference. First operand 714 states and 1056 transitions. Second operand has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:56,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:56,697 INFO L93 Difference]: Finished difference Result 1136 states and 1679 transitions. [2025-03-03 17:38:56,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:38:56,698 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 222 [2025-03-03 17:38:56,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:56,700 INFO L225 Difference]: With dead ends: 1136 [2025-03-03 17:38:56,700 INFO L226 Difference]: Without dead ends: 714 [2025-03-03 17:38:56,701 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:56,702 INFO L435 NwaCegarLoop]: 609 mSDtfsCounter, 5 mSDsluCounter, 1209 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 1818 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:56,702 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 1818 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:38:56,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2025-03-03 17:38:56,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 714. [2025-03-03 17:38:56,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 714 states, 713 states have (on average 1.4796633941093968) internal successors, (1055), 713 states have internal predecessors, (1055), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:56,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 714 states to 714 states and 1055 transitions. [2025-03-03 17:38:56,714 INFO L78 Accepts]: Start accepts. Automaton has 714 states and 1055 transitions. Word has length 222 [2025-03-03 17:38:56,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:56,715 INFO L471 AbstractCegarLoop]: Abstraction has 714 states and 1055 transitions. [2025-03-03 17:38:56,715 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:56,715 INFO L276 IsEmpty]: Start isEmpty. Operand 714 states and 1055 transitions. [2025-03-03 17:38:56,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2025-03-03 17:38:56,717 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:56,717 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:56,717 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-03 17:38:56,717 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:56,717 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:56,717 INFO L85 PathProgramCache]: Analyzing trace with hash 259079153, now seen corresponding path program 1 times [2025-03-03 17:38:56,718 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:56,718 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [223771322] [2025-03-03 17:38:56,718 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:56,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:56,772 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 223 statements into 1 equivalence classes. [2025-03-03 17:38:56,899 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 223 of 223 statements. [2025-03-03 17:38:56,900 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:56,900 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:57,365 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:57,365 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:57,365 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [223771322] [2025-03-03 17:38:57,365 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [223771322] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:57,365 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:57,366 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:38:57,367 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1347233866] [2025-03-03 17:38:57,367 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:57,367 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:38:57,367 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:57,367 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:38:57,368 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:57,368 INFO L87 Difference]: Start difference. First operand 714 states and 1055 transitions. Second operand has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:57,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:57,589 INFO L93 Difference]: Finished difference Result 1136 states and 1677 transitions. [2025-03-03 17:38:57,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:38:57,590 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 223 [2025-03-03 17:38:57,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:57,592 INFO L225 Difference]: With dead ends: 1136 [2025-03-03 17:38:57,593 INFO L226 Difference]: Without dead ends: 714 [2025-03-03 17:38:57,593 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:57,594 INFO L435 NwaCegarLoop]: 608 mSDtfsCounter, 6 mSDsluCounter, 1207 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 1815 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:57,594 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 1815 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:38:57,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2025-03-03 17:38:57,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 714. [2025-03-03 17:38:57,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 714 states, 713 states have (on average 1.4782608695652173) internal successors, (1054), 713 states have internal predecessors, (1054), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:57,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 714 states to 714 states and 1054 transitions. [2025-03-03 17:38:57,607 INFO L78 Accepts]: Start accepts. Automaton has 714 states and 1054 transitions. Word has length 223 [2025-03-03 17:38:57,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:57,608 INFO L471 AbstractCegarLoop]: Abstraction has 714 states and 1054 transitions. [2025-03-03 17:38:57,608 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:57,608 INFO L276 IsEmpty]: Start isEmpty. Operand 714 states and 1054 transitions. [2025-03-03 17:38:57,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2025-03-03 17:38:57,609 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:57,610 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:57,610 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-03 17:38:57,610 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:57,611 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:57,613 INFO L85 PathProgramCache]: Analyzing trace with hash -1587876066, now seen corresponding path program 1 times [2025-03-03 17:38:57,613 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:57,613 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048882288] [2025-03-03 17:38:57,613 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:57,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:57,657 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 224 statements into 1 equivalence classes. [2025-03-03 17:38:57,777 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 224 of 224 statements. [2025-03-03 17:38:57,777 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:57,777 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:58,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:58,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:58,206 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1048882288] [2025-03-03 17:38:58,206 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1048882288] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:58,206 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:58,206 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:38:58,206 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [247013] [2025-03-03 17:38:58,206 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:58,206 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:38:58,206 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:58,207 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:38:58,207 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:58,207 INFO L87 Difference]: Start difference. First operand 714 states and 1054 transitions. Second operand has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:58,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:58,438 INFO L93 Difference]: Finished difference Result 1136 states and 1675 transitions. [2025-03-03 17:38:58,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:38:58,439 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 224 [2025-03-03 17:38:58,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:58,441 INFO L225 Difference]: With dead ends: 1136 [2025-03-03 17:38:58,442 INFO L226 Difference]: Without dead ends: 714 [2025-03-03 17:38:58,442 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:58,443 INFO L435 NwaCegarLoop]: 607 mSDtfsCounter, 6 mSDsluCounter, 1205 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 1812 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:58,443 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 1812 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:38:58,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2025-03-03 17:38:58,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 714. [2025-03-03 17:38:58,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 714 states, 713 states have (on average 1.476858345021038) internal successors, (1053), 713 states have internal predecessors, (1053), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:58,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 714 states to 714 states and 1053 transitions. [2025-03-03 17:38:58,461 INFO L78 Accepts]: Start accepts. Automaton has 714 states and 1053 transitions. Word has length 224 [2025-03-03 17:38:58,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:58,462 INFO L471 AbstractCegarLoop]: Abstraction has 714 states and 1053 transitions. [2025-03-03 17:38:58,462 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:58,463 INFO L276 IsEmpty]: Start isEmpty. Operand 714 states and 1053 transitions. [2025-03-03 17:38:58,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 226 [2025-03-03 17:38:58,466 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:58,466 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:58,466 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-03 17:38:58,466 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:58,467 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:58,467 INFO L85 PathProgramCache]: Analyzing trace with hash 190148557, now seen corresponding path program 1 times [2025-03-03 17:38:58,467 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:58,467 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833220858] [2025-03-03 17:38:58,467 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:58,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:58,526 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 225 statements into 1 equivalence classes. [2025-03-03 17:38:58,666 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 225 of 225 statements. [2025-03-03 17:38:58,666 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:58,666 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:59,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:59,081 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:59,081 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833220858] [2025-03-03 17:38:59,081 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1833220858] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:59,081 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:59,081 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:38:59,081 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476094362] [2025-03-03 17:38:59,081 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:59,081 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:38:59,081 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:59,082 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:38:59,082 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:59,082 INFO L87 Difference]: Start difference. First operand 714 states and 1053 transitions. Second operand has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:59,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:38:59,300 INFO L93 Difference]: Finished difference Result 1136 states and 1673 transitions. [2025-03-03 17:38:59,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:38:59,301 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 225 [2025-03-03 17:38:59,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:38:59,303 INFO L225 Difference]: With dead ends: 1136 [2025-03-03 17:38:59,303 INFO L226 Difference]: Without dead ends: 714 [2025-03-03 17:38:59,304 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:59,304 INFO L435 NwaCegarLoop]: 606 mSDtfsCounter, 6 mSDsluCounter, 1203 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 1809 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:38:59,305 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 1809 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:38:59,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2025-03-03 17:38:59,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 714. [2025-03-03 17:38:59,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 714 states, 713 states have (on average 1.4754558204768584) internal successors, (1052), 713 states have internal predecessors, (1052), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:59,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 714 states to 714 states and 1052 transitions. [2025-03-03 17:38:59,317 INFO L78 Accepts]: Start accepts. Automaton has 714 states and 1052 transitions. Word has length 225 [2025-03-03 17:38:59,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:38:59,318 INFO L471 AbstractCegarLoop]: Abstraction has 714 states and 1052 transitions. [2025-03-03 17:38:59,318 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:38:59,318 INFO L276 IsEmpty]: Start isEmpty. Operand 714 states and 1052 transitions. [2025-03-03 17:38:59,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2025-03-03 17:38:59,320 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:38:59,320 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:38:59,320 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-03 17:38:59,320 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:38:59,321 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:38:59,321 INFO L85 PathProgramCache]: Analyzing trace with hash -373355690, now seen corresponding path program 1 times [2025-03-03 17:38:59,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:38:59,321 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720929604] [2025-03-03 17:38:59,321 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:38:59,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:38:59,363 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 226 statements into 1 equivalence classes. [2025-03-03 17:38:59,490 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 226 of 226 statements. [2025-03-03 17:38:59,490 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:38:59,491 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:38:59,927 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:38:59,928 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:38:59,928 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720929604] [2025-03-03 17:38:59,928 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [720929604] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:38:59,928 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:38:59,928 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:38:59,928 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1256727311] [2025-03-03 17:38:59,928 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:38:59,928 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:38:59,928 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:38:59,930 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:38:59,930 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:38:59,930 INFO L87 Difference]: Start difference. First operand 714 states and 1052 transitions. Second operand has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:00,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:00,169 INFO L93 Difference]: Finished difference Result 1146 states and 1685 transitions. [2025-03-03 17:39:00,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:39:00,169 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 226 [2025-03-03 17:39:00,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:00,171 INFO L225 Difference]: With dead ends: 1146 [2025-03-03 17:39:00,172 INFO L226 Difference]: Without dead ends: 714 [2025-03-03 17:39:00,172 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:39:00,173 INFO L435 NwaCegarLoop]: 605 mSDtfsCounter, 6 mSDsluCounter, 1201 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 1806 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:00,173 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 1806 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:39:00,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2025-03-03 17:39:00,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 714. [2025-03-03 17:39:00,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 714 states, 713 states have (on average 1.4726507713884993) internal successors, (1050), 713 states have internal predecessors, (1050), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:00,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 714 states to 714 states and 1050 transitions. [2025-03-03 17:39:00,184 INFO L78 Accepts]: Start accepts. Automaton has 714 states and 1050 transitions. Word has length 226 [2025-03-03 17:39:00,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:00,184 INFO L471 AbstractCegarLoop]: Abstraction has 714 states and 1050 transitions. [2025-03-03 17:39:00,185 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:00,185 INFO L276 IsEmpty]: Start isEmpty. Operand 714 states and 1050 transitions. [2025-03-03 17:39:00,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2025-03-03 17:39:00,186 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:00,187 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:00,187 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-03 17:39:00,187 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:00,187 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:00,187 INFO L85 PathProgramCache]: Analyzing trace with hash -1564568829, now seen corresponding path program 1 times [2025-03-03 17:39:00,187 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:00,187 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361505820] [2025-03-03 17:39:00,188 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:00,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:00,228 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 227 statements into 1 equivalence classes. [2025-03-03 17:39:00,348 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 227 of 227 statements. [2025-03-03 17:39:00,349 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:00,349 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:00,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:00,786 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:00,786 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361505820] [2025-03-03 17:39:00,786 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [361505820] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:00,786 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:00,786 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:39:00,786 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [513771163] [2025-03-03 17:39:00,786 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:00,787 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:39:00,787 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:00,787 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:39:00,787 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:39:00,787 INFO L87 Difference]: Start difference. First operand 714 states and 1050 transitions. Second operand has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:01,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:01,002 INFO L93 Difference]: Finished difference Result 1136 states and 1668 transitions. [2025-03-03 17:39:01,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:39:01,002 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 227 [2025-03-03 17:39:01,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:01,004 INFO L225 Difference]: With dead ends: 1136 [2025-03-03 17:39:01,004 INFO L226 Difference]: Without dead ends: 714 [2025-03-03 17:39:01,005 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:39:01,005 INFO L435 NwaCegarLoop]: 604 mSDtfsCounter, 6 mSDsluCounter, 1199 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 1803 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:01,006 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 1803 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:39:01,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2025-03-03 17:39:01,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 714. [2025-03-03 17:39:01,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 714 states, 713 states have (on average 1.4712482468443198) internal successors, (1049), 713 states have internal predecessors, (1049), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:01,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 714 states to 714 states and 1049 transitions. [2025-03-03 17:39:01,017 INFO L78 Accepts]: Start accepts. Automaton has 714 states and 1049 transitions. Word has length 227 [2025-03-03 17:39:01,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:01,017 INFO L471 AbstractCegarLoop]: Abstraction has 714 states and 1049 transitions. [2025-03-03 17:39:01,017 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:01,018 INFO L276 IsEmpty]: Start isEmpty. Operand 714 states and 1049 transitions. [2025-03-03 17:39:01,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2025-03-03 17:39:01,019 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:01,019 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:01,019 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-03 17:39:01,019 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:01,019 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:01,019 INFO L85 PathProgramCache]: Analyzing trace with hash 323751372, now seen corresponding path program 1 times [2025-03-03 17:39:01,019 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:01,019 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479397862] [2025-03-03 17:39:01,019 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:01,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:01,059 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 228 statements into 1 equivalence classes. [2025-03-03 17:39:01,323 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 228 of 228 statements. [2025-03-03 17:39:01,324 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:01,324 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:02,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:02,070 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:02,071 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1479397862] [2025-03-03 17:39:02,071 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1479397862] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:02,071 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:02,071 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:39:02,071 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1785197935] [2025-03-03 17:39:02,071 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:02,071 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:39:02,071 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:02,072 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:39:02,072 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:39:02,072 INFO L87 Difference]: Start difference. First operand 714 states and 1049 transitions. Second operand has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:02,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:02,278 INFO L93 Difference]: Finished difference Result 1136 states and 1666 transitions. [2025-03-03 17:39:02,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:39:02,278 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 228 [2025-03-03 17:39:02,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:02,280 INFO L225 Difference]: With dead ends: 1136 [2025-03-03 17:39:02,281 INFO L226 Difference]: Without dead ends: 714 [2025-03-03 17:39:02,281 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:39:02,283 INFO L435 NwaCegarLoop]: 603 mSDtfsCounter, 6 mSDsluCounter, 1197 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 1800 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:02,283 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 1800 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:39:02,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2025-03-03 17:39:02,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 714. [2025-03-03 17:39:02,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 714 states, 713 states have (on average 1.4698457223001402) internal successors, (1048), 713 states have internal predecessors, (1048), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:02,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 714 states to 714 states and 1048 transitions. [2025-03-03 17:39:02,294 INFO L78 Accepts]: Start accepts. Automaton has 714 states and 1048 transitions. Word has length 228 [2025-03-03 17:39:02,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:02,294 INFO L471 AbstractCegarLoop]: Abstraction has 714 states and 1048 transitions. [2025-03-03 17:39:02,294 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:02,295 INFO L276 IsEmpty]: Start isEmpty. Operand 714 states and 1048 transitions. [2025-03-03 17:39:02,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2025-03-03 17:39:02,295 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:02,295 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:02,296 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-03 17:39:02,296 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:02,296 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:02,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1835221943, now seen corresponding path program 1 times [2025-03-03 17:39:02,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:02,296 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [849804573] [2025-03-03 17:39:02,296 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:02,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:02,342 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 229 statements into 1 equivalence classes. [2025-03-03 17:39:02,658 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 229 of 229 statements. [2025-03-03 17:39:02,659 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:02,659 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:03,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:03,399 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:03,399 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [849804573] [2025-03-03 17:39:03,400 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [849804573] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:03,401 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:03,401 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-03-03 17:39:03,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1497964178] [2025-03-03 17:39:03,401 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:03,401 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-03-03 17:39:03,401 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:03,402 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-03-03 17:39:03,402 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-03-03 17:39:03,402 INFO L87 Difference]: Start difference. First operand 714 states and 1048 transitions. Second operand has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:03,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:03,778 INFO L93 Difference]: Finished difference Result 1332 states and 1953 transitions. [2025-03-03 17:39:03,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-03-03 17:39:03,779 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 229 [2025-03-03 17:39:03,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:03,782 INFO L225 Difference]: With dead ends: 1332 [2025-03-03 17:39:03,783 INFO L226 Difference]: Without dead ends: 732 [2025-03-03 17:39:03,784 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2025-03-03 17:39:03,785 INFO L435 NwaCegarLoop]: 579 mSDtfsCounter, 691 mSDsluCounter, 2305 mSDsCounter, 0 mSdLazyCounter, 761 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 691 SdHoareTripleChecker+Valid, 2884 SdHoareTripleChecker+Invalid, 761 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 761 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:03,785 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [691 Valid, 2884 Invalid, 761 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 761 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-03 17:39:03,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 732 states. [2025-03-03 17:39:03,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 732 to 722. [2025-03-03 17:39:03,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 722 states, 721 states have (on average 1.4674063800277393) internal successors, (1058), 721 states have internal predecessors, (1058), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:03,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 722 states to 722 states and 1058 transitions. [2025-03-03 17:39:03,798 INFO L78 Accepts]: Start accepts. Automaton has 722 states and 1058 transitions. Word has length 229 [2025-03-03 17:39:03,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:03,798 INFO L471 AbstractCegarLoop]: Abstraction has 722 states and 1058 transitions. [2025-03-03 17:39:03,799 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:03,799 INFO L276 IsEmpty]: Start isEmpty. Operand 722 states and 1058 transitions. [2025-03-03 17:39:03,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2025-03-03 17:39:03,800 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:03,800 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:03,800 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-03-03 17:39:03,800 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:03,800 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:03,801 INFO L85 PathProgramCache]: Analyzing trace with hash 1359894186, now seen corresponding path program 1 times [2025-03-03 17:39:03,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:03,801 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [275074457] [2025-03-03 17:39:03,801 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:03,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:03,841 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 230 statements into 1 equivalence classes. [2025-03-03 17:39:04,063 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 230 of 230 statements. [2025-03-03 17:39:04,063 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:04,063 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:04,600 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:04,601 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:04,601 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [275074457] [2025-03-03 17:39:04,601 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [275074457] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:04,601 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:04,601 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 17:39:04,601 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1399679479] [2025-03-03 17:39:04,601 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:04,601 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 17:39:04,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:04,602 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 17:39:04,603 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-03 17:39:04,603 INFO L87 Difference]: Start difference. First operand 722 states and 1058 transitions. Second operand has 7 states, 7 states have (on average 32.857142857142854) internal successors, (230), 7 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:04,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:04,989 INFO L93 Difference]: Finished difference Result 1338 states and 1960 transitions. [2025-03-03 17:39:04,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 17:39:04,989 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 32.857142857142854) internal successors, (230), 7 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2025-03-03 17:39:04,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:04,991 INFO L225 Difference]: With dead ends: 1338 [2025-03-03 17:39:04,991 INFO L226 Difference]: Without dead ends: 734 [2025-03-03 17:39:04,992 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-03 17:39:04,993 INFO L435 NwaCegarLoop]: 599 mSDtfsCounter, 10 mSDsluCounter, 2979 mSDsCounter, 0 mSdLazyCounter, 786 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 3578 SdHoareTripleChecker+Invalid, 786 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 786 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:04,993 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 3578 Invalid, 786 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 786 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-03 17:39:04,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 734 states. [2025-03-03 17:39:05,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 734 to 732. [2025-03-03 17:39:05,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 732 states, 731 states have (on average 1.466484268125855) internal successors, (1072), 731 states have internal predecessors, (1072), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:05,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 732 states to 732 states and 1072 transitions. [2025-03-03 17:39:05,007 INFO L78 Accepts]: Start accepts. Automaton has 732 states and 1072 transitions. Word has length 230 [2025-03-03 17:39:05,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:05,007 INFO L471 AbstractCegarLoop]: Abstraction has 732 states and 1072 transitions. [2025-03-03 17:39:05,007 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 32.857142857142854) internal successors, (230), 7 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:05,007 INFO L276 IsEmpty]: Start isEmpty. Operand 732 states and 1072 transitions. [2025-03-03 17:39:05,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2025-03-03 17:39:05,008 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:05,009 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:05,009 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-03 17:39:05,009 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:05,010 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:05,010 INFO L85 PathProgramCache]: Analyzing trace with hash 949611109, now seen corresponding path program 1 times [2025-03-03 17:39:05,010 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:05,010 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450863502] [2025-03-03 17:39:05,010 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:05,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:05,048 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 230 statements into 1 equivalence classes. [2025-03-03 17:39:05,177 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 230 of 230 statements. [2025-03-03 17:39:05,177 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:05,177 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:05,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:05,802 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:05,802 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1450863502] [2025-03-03 17:39:05,802 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1450863502] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:05,802 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:05,802 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-03-03 17:39:05,802 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203435848] [2025-03-03 17:39:05,802 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:05,803 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-03 17:39:05,803 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:05,803 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-03 17:39:05,803 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-03-03 17:39:05,803 INFO L87 Difference]: Start difference. First operand 732 states and 1072 transitions. Second operand has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:06,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:06,322 INFO L93 Difference]: Finished difference Result 1516 states and 2212 transitions. [2025-03-03 17:39:06,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-03 17:39:06,323 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2025-03-03 17:39:06,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:06,325 INFO L225 Difference]: With dead ends: 1516 [2025-03-03 17:39:06,325 INFO L226 Difference]: Without dead ends: 900 [2025-03-03 17:39:06,326 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2025-03-03 17:39:06,326 INFO L435 NwaCegarLoop]: 600 mSDtfsCounter, 589 mSDsluCounter, 1407 mSDsCounter, 0 mSdLazyCounter, 771 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 589 SdHoareTripleChecker+Valid, 2007 SdHoareTripleChecker+Invalid, 771 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 771 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:06,327 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [589 Valid, 2007 Invalid, 771 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 771 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-03-03 17:39:06,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 900 states. [2025-03-03 17:39:06,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 900 to 732. [2025-03-03 17:39:06,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 732 states, 731 states have (on average 1.4637482900136798) internal successors, (1070), 731 states have internal predecessors, (1070), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:06,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 732 states to 732 states and 1070 transitions. [2025-03-03 17:39:06,338 INFO L78 Accepts]: Start accepts. Automaton has 732 states and 1070 transitions. Word has length 230 [2025-03-03 17:39:06,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:06,338 INFO L471 AbstractCegarLoop]: Abstraction has 732 states and 1070 transitions. [2025-03-03 17:39:06,338 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:06,338 INFO L276 IsEmpty]: Start isEmpty. Operand 732 states and 1070 transitions. [2025-03-03 17:39:06,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2025-03-03 17:39:06,339 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:06,339 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:06,339 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-03 17:39:06,340 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:06,340 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:06,340 INFO L85 PathProgramCache]: Analyzing trace with hash -546060313, now seen corresponding path program 1 times [2025-03-03 17:39:06,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:06,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694541795] [2025-03-03 17:39:06,340 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:06,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:06,381 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 230 statements into 1 equivalence classes. [2025-03-03 17:39:06,533 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 230 of 230 statements. [2025-03-03 17:39:06,533 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:06,533 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:07,001 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:07,002 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:07,002 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [694541795] [2025-03-03 17:39:07,002 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [694541795] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:07,002 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:07,002 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 17:39:07,002 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585594502] [2025-03-03 17:39:07,002 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:07,003 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 17:39:07,003 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:07,003 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 17:39:07,004 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-03 17:39:07,004 INFO L87 Difference]: Start difference. First operand 732 states and 1070 transitions. Second operand has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:07,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:07,237 INFO L93 Difference]: Finished difference Result 1356 states and 1981 transitions. [2025-03-03 17:39:07,238 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 17:39:07,238 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2025-03-03 17:39:07,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:07,240 INFO L225 Difference]: With dead ends: 1356 [2025-03-03 17:39:07,241 INFO L226 Difference]: Without dead ends: 738 [2025-03-03 17:39:07,242 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-03 17:39:07,242 INFO L435 NwaCegarLoop]: 588 mSDtfsCounter, 680 mSDsluCounter, 1170 mSDsCounter, 0 mSdLazyCounter, 428 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 680 SdHoareTripleChecker+Valid, 1758 SdHoareTripleChecker+Invalid, 428 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 428 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:07,243 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [680 Valid, 1758 Invalid, 428 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 428 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:39:07,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 738 states. [2025-03-03 17:39:07,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 738 to 738. [2025-03-03 17:39:07,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 738 states, 737 states have (on average 1.4599728629579376) internal successors, (1076), 737 states have internal predecessors, (1076), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:07,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 738 states to 738 states and 1076 transitions. [2025-03-03 17:39:07,253 INFO L78 Accepts]: Start accepts. Automaton has 738 states and 1076 transitions. Word has length 230 [2025-03-03 17:39:07,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:07,253 INFO L471 AbstractCegarLoop]: Abstraction has 738 states and 1076 transitions. [2025-03-03 17:39:07,253 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:07,253 INFO L276 IsEmpty]: Start isEmpty. Operand 738 states and 1076 transitions. [2025-03-03 17:39:07,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2025-03-03 17:39:07,254 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:07,254 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:07,254 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-03 17:39:07,255 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:07,255 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:07,255 INFO L85 PathProgramCache]: Analyzing trace with hash -898055720, now seen corresponding path program 1 times [2025-03-03 17:39:07,256 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:07,256 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [523980770] [2025-03-03 17:39:07,256 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:07,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:07,296 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 231 statements into 1 equivalence classes. [2025-03-03 17:39:07,657 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 231 of 231 statements. [2025-03-03 17:39:07,657 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:07,657 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:08,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:08,244 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:08,244 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [523980770] [2025-03-03 17:39:08,244 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [523980770] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:08,244 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:08,244 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 17:39:08,244 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206037736] [2025-03-03 17:39:08,244 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:08,244 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 17:39:08,244 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:08,245 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 17:39:08,245 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-03 17:39:08,245 INFO L87 Difference]: Start difference. First operand 738 states and 1076 transitions. Second operand has 5 states, 5 states have (on average 46.2) internal successors, (231), 5 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:08,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:08,526 INFO L93 Difference]: Finished difference Result 1190 states and 1731 transitions. [2025-03-03 17:39:08,526 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 17:39:08,526 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.2) internal successors, (231), 5 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 231 [2025-03-03 17:39:08,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:08,528 INFO L225 Difference]: With dead ends: 1190 [2025-03-03 17:39:08,528 INFO L226 Difference]: Without dead ends: 746 [2025-03-03 17:39:08,529 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-03 17:39:08,530 INFO L435 NwaCegarLoop]: 582 mSDtfsCounter, 589 mSDsluCounter, 1159 mSDsCounter, 0 mSdLazyCounter, 446 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 589 SdHoareTripleChecker+Valid, 1741 SdHoareTripleChecker+Invalid, 446 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 446 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:08,530 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [589 Valid, 1741 Invalid, 446 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 446 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-03 17:39:08,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 746 states. [2025-03-03 17:39:08,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 746 to 744. [2025-03-03 17:39:08,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 744 states, 743 states have (on average 1.4562584118438762) internal successors, (1082), 743 states have internal predecessors, (1082), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:08,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 744 states to 744 states and 1082 transitions. [2025-03-03 17:39:08,540 INFO L78 Accepts]: Start accepts. Automaton has 744 states and 1082 transitions. Word has length 231 [2025-03-03 17:39:08,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:08,541 INFO L471 AbstractCegarLoop]: Abstraction has 744 states and 1082 transitions. [2025-03-03 17:39:08,541 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.2) internal successors, (231), 5 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:08,541 INFO L276 IsEmpty]: Start isEmpty. Operand 744 states and 1082 transitions. [2025-03-03 17:39:08,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2025-03-03 17:39:08,542 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:08,542 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:08,542 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-03 17:39:08,542 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:08,543 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:08,543 INFO L85 PathProgramCache]: Analyzing trace with hash 2044047588, now seen corresponding path program 1 times [2025-03-03 17:39:08,543 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:08,543 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268476844] [2025-03-03 17:39:08,543 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:08,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:08,582 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 232 statements into 1 equivalence classes. [2025-03-03 17:39:08,610 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 232 of 232 statements. [2025-03-03 17:39:08,611 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:08,611 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:08,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:08,869 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:08,869 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1268476844] [2025-03-03 17:39:08,869 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1268476844] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:08,869 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:08,869 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 17:39:08,870 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [867128037] [2025-03-03 17:39:08,870 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:08,870 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 17:39:08,870 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:08,870 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 17:39:08,871 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 17:39:08,872 INFO L87 Difference]: Start difference. First operand 744 states and 1082 transitions. Second operand has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:09,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:09,123 INFO L93 Difference]: Finished difference Result 1384 states and 2006 transitions. [2025-03-03 17:39:09,124 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 17:39:09,124 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 232 [2025-03-03 17:39:09,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:09,126 INFO L225 Difference]: With dead ends: 1384 [2025-03-03 17:39:09,126 INFO L226 Difference]: Without dead ends: 931 [2025-03-03 17:39:09,127 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-03 17:39:09,127 INFO L435 NwaCegarLoop]: 592 mSDtfsCounter, 1654 mSDsluCounter, 1179 mSDsCounter, 0 mSdLazyCounter, 416 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1654 SdHoareTripleChecker+Valid, 1771 SdHoareTripleChecker+Invalid, 416 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 416 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:09,127 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1654 Valid, 1771 Invalid, 416 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 416 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:39:09,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 931 states. [2025-03-03 17:39:09,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 931 to 739. [2025-03-03 17:39:09,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 739 states, 738 states have (on average 1.4552845528455285) internal successors, (1074), 738 states have internal predecessors, (1074), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:09,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 739 states to 739 states and 1074 transitions. [2025-03-03 17:39:09,136 INFO L78 Accepts]: Start accepts. Automaton has 739 states and 1074 transitions. Word has length 232 [2025-03-03 17:39:09,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:09,136 INFO L471 AbstractCegarLoop]: Abstraction has 739 states and 1074 transitions. [2025-03-03 17:39:09,136 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:09,136 INFO L276 IsEmpty]: Start isEmpty. Operand 739 states and 1074 transitions. [2025-03-03 17:39:09,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2025-03-03 17:39:09,137 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:09,137 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:09,138 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-03-03 17:39:09,138 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:09,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:09,138 INFO L85 PathProgramCache]: Analyzing trace with hash 171400980, now seen corresponding path program 1 times [2025-03-03 17:39:09,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:09,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155951644] [2025-03-03 17:39:09,138 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:09,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:09,195 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 232 statements into 1 equivalence classes. [2025-03-03 17:39:09,585 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 232 of 232 statements. [2025-03-03 17:39:09,585 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:09,585 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:10,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:10,280 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:10,280 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155951644] [2025-03-03 17:39:10,280 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1155951644] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:10,280 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:10,280 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 17:39:10,280 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [914539579] [2025-03-03 17:39:10,281 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:10,281 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 17:39:10,281 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:10,281 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 17:39:10,281 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-03 17:39:10,282 INFO L87 Difference]: Start difference. First operand 739 states and 1074 transitions. Second operand has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:10,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:10,465 INFO L93 Difference]: Finished difference Result 1180 states and 1713 transitions. [2025-03-03 17:39:10,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 17:39:10,468 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 232 [2025-03-03 17:39:10,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:10,470 INFO L225 Difference]: With dead ends: 1180 [2025-03-03 17:39:10,470 INFO L226 Difference]: Without dead ends: 743 [2025-03-03 17:39:10,470 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-03-03 17:39:10,472 INFO L435 NwaCegarLoop]: 582 mSDtfsCounter, 560 mSDsluCounter, 1159 mSDsCounter, 0 mSdLazyCounter, 446 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 560 SdHoareTripleChecker+Valid, 1741 SdHoareTripleChecker+Invalid, 446 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 446 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:10,472 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [560 Valid, 1741 Invalid, 446 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 446 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:39:10,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 743 states. [2025-03-03 17:39:10,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 743 to 742. [2025-03-03 17:39:10,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 742 states, 741 states have (on average 1.4534412955465588) internal successors, (1077), 741 states have internal predecessors, (1077), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:10,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 742 states to 742 states and 1077 transitions. [2025-03-03 17:39:10,480 INFO L78 Accepts]: Start accepts. Automaton has 742 states and 1077 transitions. Word has length 232 [2025-03-03 17:39:10,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:10,480 INFO L471 AbstractCegarLoop]: Abstraction has 742 states and 1077 transitions. [2025-03-03 17:39:10,481 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:10,481 INFO L276 IsEmpty]: Start isEmpty. Operand 742 states and 1077 transitions. [2025-03-03 17:39:10,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2025-03-03 17:39:10,482 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:10,482 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:10,482 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-03 17:39:10,482 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:10,482 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:10,483 INFO L85 PathProgramCache]: Analyzing trace with hash -635814918, now seen corresponding path program 1 times [2025-03-03 17:39:10,483 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:10,483 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97534974] [2025-03-03 17:39:10,483 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:10,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:10,518 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 233 statements into 1 equivalence classes. [2025-03-03 17:39:10,842 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 233 of 233 statements. [2025-03-03 17:39:10,842 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:10,842 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:11,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:11,532 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:11,532 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97534974] [2025-03-03 17:39:11,533 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [97534974] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:11,533 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:11,533 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 17:39:11,533 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [612250197] [2025-03-03 17:39:11,533 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:11,533 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 17:39:11,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:11,534 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 17:39:11,534 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-03-03 17:39:11,534 INFO L87 Difference]: Start difference. First operand 742 states and 1077 transitions. Second operand has 7 states, 7 states have (on average 33.285714285714285) internal successors, (233), 7 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:11,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:11,899 INFO L93 Difference]: Finished difference Result 1389 states and 2009 transitions. [2025-03-03 17:39:11,899 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 17:39:11,900 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 33.285714285714285) internal successors, (233), 7 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 233 [2025-03-03 17:39:11,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:11,902 INFO L225 Difference]: With dead ends: 1389 [2025-03-03 17:39:11,902 INFO L226 Difference]: Without dead ends: 949 [2025-03-03 17:39:11,903 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2025-03-03 17:39:11,904 INFO L435 NwaCegarLoop]: 585 mSDtfsCounter, 1678 mSDsluCounter, 2336 mSDsCounter, 0 mSdLazyCounter, 724 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1678 SdHoareTripleChecker+Valid, 2921 SdHoareTripleChecker+Invalid, 724 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 724 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:11,904 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1678 Valid, 2921 Invalid, 724 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 724 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-03 17:39:11,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 949 states. [2025-03-03 17:39:11,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 949 to 746. [2025-03-03 17:39:11,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 746 states, 745 states have (on average 1.4523489932885907) internal successors, (1082), 745 states have internal predecessors, (1082), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:11,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 746 states to 746 states and 1082 transitions. [2025-03-03 17:39:11,913 INFO L78 Accepts]: Start accepts. Automaton has 746 states and 1082 transitions. Word has length 233 [2025-03-03 17:39:11,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:11,914 INFO L471 AbstractCegarLoop]: Abstraction has 746 states and 1082 transitions. [2025-03-03 17:39:11,914 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 33.285714285714285) internal successors, (233), 7 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:11,914 INFO L276 IsEmpty]: Start isEmpty. Operand 746 states and 1082 transitions. [2025-03-03 17:39:11,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2025-03-03 17:39:11,915 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:11,915 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:11,915 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-03-03 17:39:11,915 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:11,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:11,916 INFO L85 PathProgramCache]: Analyzing trace with hash -202191487, now seen corresponding path program 1 times [2025-03-03 17:39:11,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:11,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [635019763] [2025-03-03 17:39:11,916 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:11,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:11,956 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 234 statements into 1 equivalence classes. [2025-03-03 17:39:12,321 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 234 of 234 statements. [2025-03-03 17:39:12,322 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:12,322 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:13,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:13,560 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:13,560 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [635019763] [2025-03-03 17:39:13,560 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [635019763] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:13,560 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:13,561 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-03-03 17:39:13,561 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [309372093] [2025-03-03 17:39:13,561 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:13,561 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-03 17:39:13,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:13,562 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-03 17:39:13,562 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-03-03 17:39:13,562 INFO L87 Difference]: Start difference. First operand 746 states and 1082 transitions. Second operand has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:13,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:13,887 INFO L93 Difference]: Finished difference Result 1204 states and 1745 transitions. [2025-03-03 17:39:13,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-03 17:39:13,888 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 234 [2025-03-03 17:39:13,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:13,889 INFO L225 Difference]: With dead ends: 1204 [2025-03-03 17:39:13,890 INFO L226 Difference]: Without dead ends: 764 [2025-03-03 17:39:13,890 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-03-03 17:39:13,890 INFO L435 NwaCegarLoop]: 564 mSDtfsCounter, 529 mSDsluCounter, 2244 mSDsCounter, 0 mSdLazyCounter, 836 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 529 SdHoareTripleChecker+Valid, 2808 SdHoareTripleChecker+Invalid, 836 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 836 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:13,891 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [529 Valid, 2808 Invalid, 836 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 836 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-03-03 17:39:13,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 764 states. [2025-03-03 17:39:13,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 764 to 754. [2025-03-03 17:39:13,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 754 states, 753 states have (on average 1.450199203187251) internal successors, (1092), 753 states have internal predecessors, (1092), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:13,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 754 states to 754 states and 1092 transitions. [2025-03-03 17:39:13,903 INFO L78 Accepts]: Start accepts. Automaton has 754 states and 1092 transitions. Word has length 234 [2025-03-03 17:39:13,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:13,903 INFO L471 AbstractCegarLoop]: Abstraction has 754 states and 1092 transitions. [2025-03-03 17:39:13,903 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:13,903 INFO L276 IsEmpty]: Start isEmpty. Operand 754 states and 1092 transitions. [2025-03-03 17:39:13,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2025-03-03 17:39:13,904 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:13,904 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:13,905 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2025-03-03 17:39:13,905 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:13,905 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:13,905 INFO L85 PathProgramCache]: Analyzing trace with hash 1008170565, now seen corresponding path program 1 times [2025-03-03 17:39:13,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:13,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1124854430] [2025-03-03 17:39:13,905 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:13,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:13,942 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 235 statements into 1 equivalence classes. [2025-03-03 17:39:13,969 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 235 of 235 statements. [2025-03-03 17:39:13,970 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:13,970 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:14,231 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:14,231 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-03 17:39:14,231 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1124854430] [2025-03-03 17:39:14,231 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1124854430] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:14,231 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:14,231 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-03 17:39:14,231 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1644679901] [2025-03-03 17:39:14,231 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:14,232 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-03 17:39:14,232 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-03 17:39:14,232 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-03 17:39:14,232 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-03 17:39:14,232 INFO L87 Difference]: Start difference. First operand 754 states and 1092 transitions. Second operand has 5 states, 5 states have (on average 47.0) internal successors, (235), 5 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:14,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:14,469 INFO L93 Difference]: Finished difference Result 1364 states and 1965 transitions. [2025-03-03 17:39:14,469 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-03 17:39:14,470 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 47.0) internal successors, (235), 5 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 235 [2025-03-03 17:39:14,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:14,472 INFO L225 Difference]: With dead ends: 1364 [2025-03-03 17:39:14,472 INFO L226 Difference]: Without dead ends: 916 [2025-03-03 17:39:14,472 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-03 17:39:14,473 INFO L435 NwaCegarLoop]: 591 mSDtfsCounter, 1463 mSDsluCounter, 1177 mSDsCounter, 0 mSdLazyCounter, 419 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1463 SdHoareTripleChecker+Valid, 1768 SdHoareTripleChecker+Invalid, 419 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 419 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:14,473 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1463 Valid, 1768 Invalid, 419 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 419 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-03 17:39:14,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 916 states. [2025-03-03 17:39:14,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 916 to 878. [2025-03-03 17:39:14,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 878 states, 877 states have (on average 1.443557582668187) internal successors, (1266), 877 states have internal predecessors, (1266), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:14,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 878 states to 878 states and 1266 transitions. [2025-03-03 17:39:14,482 INFO L78 Accepts]: Start accepts. Automaton has 878 states and 1266 transitions. Word has length 235 [2025-03-03 17:39:14,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:14,483 INFO L471 AbstractCegarLoop]: Abstraction has 878 states and 1266 transitions. [2025-03-03 17:39:14,483 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 47.0) internal successors, (235), 5 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:14,483 INFO L276 IsEmpty]: Start isEmpty. Operand 878 states and 1266 transitions. [2025-03-03 17:39:14,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2025-03-03 17:39:14,484 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:14,484 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:14,484 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-03-03 17:39:14,484 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:14,485 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:14,485 INFO L85 PathProgramCache]: Analyzing trace with hash 757893450, now seen corresponding path program 1 times [2025-03-03 17:39:14,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-03 17:39:14,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [623968325] [2025-03-03 17:39:14,485 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:14,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-03 17:39:14,521 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 235 statements into 1 equivalence classes. [2025-03-03 17:39:14,835 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 235 of 235 statements. [2025-03-03 17:39:14,835 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:14,835 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-03 17:39:14,835 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-03 17:39:14,849 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 235 statements into 1 equivalence classes. [2025-03-03 17:39:15,211 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 235 of 235 statements. [2025-03-03 17:39:15,211 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:15,211 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-03 17:39:15,322 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-03 17:39:15,322 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-03-03 17:39:15,324 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-03-03 17:39:15,325 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2025-03-03 17:39:15,327 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:15,426 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-03-03 17:39:15,456 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-03-03 17:39:15,459 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.03 05:39:15 BoogieIcfgContainer [2025-03-03 17:39:15,460 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-03-03 17:39:15,460 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-03 17:39:15,460 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-03 17:39:15,460 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-03 17:39:15,461 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 05:38:46" (3/4) ... [2025-03-03 17:39:15,462 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-03-03 17:39:15,463 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-03 17:39:15,463 INFO L158 Benchmark]: Toolchain (without parser) took 32046.39ms. Allocated memory was 167.8MB in the beginning and 738.2MB in the end (delta: 570.4MB). Free memory was 132.4MB in the beginning and 490.1MB in the end (delta: -357.7MB). Peak memory consumption was 212.8MB. Max. memory is 16.1GB. [2025-03-03 17:39:15,464 INFO L158 Benchmark]: CDTParser took 0.25ms. Allocated memory is still 201.3MB. Free memory is still 126.5MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-03 17:39:15,464 INFO L158 Benchmark]: CACSL2BoogieTranslator took 473.48ms. Allocated memory is still 167.8MB. Free memory was 132.4MB in the beginning and 95.1MB in the end (delta: 37.3MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2025-03-03 17:39:15,464 INFO L158 Benchmark]: Boogie Procedure Inliner took 163.18ms. Allocated memory is still 167.8MB. Free memory was 95.1MB in the beginning and 53.4MB in the end (delta: 41.6MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2025-03-03 17:39:15,464 INFO L158 Benchmark]: Boogie Preprocessor took 205.66ms. Allocated memory was 167.8MB in the beginning and 176.2MB in the end (delta: 8.4MB). Free memory was 53.4MB in the beginning and 104.7MB in the end (delta: -51.2MB). Peak memory consumption was 44.0MB. Max. memory is 16.1GB. [2025-03-03 17:39:15,464 INFO L158 Benchmark]: IcfgBuilder took 1914.88ms. Allocated memory was 176.2MB in the beginning and 234.9MB in the end (delta: 58.7MB). Free memory was 104.7MB in the beginning and 100.7MB in the end (delta: 4.0MB). Peak memory consumption was 80.9MB. Max. memory is 16.1GB. [2025-03-03 17:39:15,464 INFO L158 Benchmark]: TraceAbstraction took 29280.74ms. Allocated memory was 234.9MB in the beginning and 738.2MB in the end (delta: 503.3MB). Free memory was 99.6MB in the beginning and 490.2MB in the end (delta: -390.6MB). Peak memory consumption was 369.6MB. Max. memory is 16.1GB. [2025-03-03 17:39:15,464 INFO L158 Benchmark]: Witness Printer took 2.83ms. Allocated memory is still 738.2MB. Free memory was 490.2MB in the beginning and 490.1MB in the end (delta: 97.6kB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-03 17:39:15,465 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25ms. Allocated memory is still 201.3MB. Free memory is still 126.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 473.48ms. Allocated memory is still 167.8MB. Free memory was 132.4MB in the beginning and 95.1MB in the end (delta: 37.3MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 163.18ms. Allocated memory is still 167.8MB. Free memory was 95.1MB in the beginning and 53.4MB in the end (delta: 41.6MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Boogie Preprocessor took 205.66ms. Allocated memory was 167.8MB in the beginning and 176.2MB in the end (delta: 8.4MB). Free memory was 53.4MB in the beginning and 104.7MB in the end (delta: -51.2MB). Peak memory consumption was 44.0MB. Max. memory is 16.1GB. * IcfgBuilder took 1914.88ms. Allocated memory was 176.2MB in the beginning and 234.9MB in the end (delta: 58.7MB). Free memory was 104.7MB in the beginning and 100.7MB in the end (delta: 4.0MB). Peak memory consumption was 80.9MB. Max. memory is 16.1GB. * TraceAbstraction took 29280.74ms. Allocated memory was 234.9MB in the beginning and 738.2MB in the end (delta: 503.3MB). Free memory was 99.6MB in the beginning and 490.2MB in the end (delta: -390.6MB). Peak memory consumption was 369.6MB. Max. memory is 16.1GB. * Witness Printer took 2.83ms. Allocated memory is still 738.2MB. Free memory was 490.2MB in the beginning and 490.1MB in the end (delta: 97.6kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 400, overapproximation of bitwiseOr at line 420, overapproximation of bitwiseOr at line 460, overapproximation of bitwiseAnd at line 200, overapproximation of bitwiseAnd at line 564. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 8); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (8 - 1); [L32] const SORT_10 mask_SORT_10 = (SORT_10)-1 >> (sizeof(SORT_10) * 8 - 32); [L33] const SORT_10 msb_SORT_10 = (SORT_10)1 << (32 - 1); [L35] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 4); [L36] const SORT_20 msb_SORT_20 = (SORT_20)1 << (4 - 1); [L38] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 10); [L39] const SORT_29 msb_SORT_29 = (SORT_29)1 << (10 - 1); [L41] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 2); [L42] const SORT_33 msb_SORT_33 = (SORT_33)1 << (2 - 1); [L44] const SORT_1 var_7 = 0; [L45] const SORT_10 var_12 = 1; [L46] const SORT_20 var_21 = 0; [L47] const SORT_10 var_26 = 0; [L48] const SORT_29 var_30 = 0; [L49] const SORT_1 var_122 = 1; [L50] const SORT_20 var_126 = 1; [L51] const SORT_3 var_183 = 0; [L52] const SORT_10 var_254 = 104; [L54] SORT_1 input_2; [L55] SORT_3 input_4; [L56] SORT_1 input_5; [L57] SORT_1 input_6; [L58] SORT_1 input_201; [L59] SORT_1 input_228; [L60] SORT_1 input_234; [L61] SORT_1 input_235; [L62] SORT_29 input_249; [L63] SORT_1 input_262; [L64] SORT_1 input_270; [L65] SORT_1 input_278; [L66] SORT_1 input_284; [L67] SORT_1 input_289; [L68] SORT_1 input_290; [L69] SORT_1 input_291; [L70] SORT_1 input_300; [L71] SORT_1 input_301; [L72] SORT_1 input_302; [L73] SORT_3 input_323; [L74] SORT_1 input_330; [L75] SORT_1 input_336; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L77] SORT_1 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L78] SORT_1 state_15 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_20 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L79] SORT_20 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_20; [L80] EXPR __VERIFIER_nondet_ushort() & mask_SORT_29 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L80] SORT_29 state_31 = __VERIFIER_nondet_ushort() & mask_SORT_29; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L81] SORT_1 state_38 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L82] SORT_1 state_43 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_20 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L83] SORT_20 state_49 = __VERIFIER_nondet_uchar() & mask_SORT_20; [L84] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L84] SORT_1 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L85] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L85] SORT_1 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L86] SORT_1 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L87] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L87] SORT_1 state_86 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L88] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L88] SORT_1 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L89] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L89] SORT_1 state_123 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L90] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L90] SORT_1 state_130 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L91] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L91] SORT_1 state_135 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L92] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L92] SORT_1 state_141 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L93] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L93] SORT_1 state_153 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L94] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L94] SORT_1 state_166 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L95] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L95] SORT_1 state_177 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L96] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L96] SORT_3 state_184 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L97] SORT_1 state_197 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L98] SORT_1 state_199 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L99] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L99] SORT_1 state_203 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] SORT_1 init_9_arg_1 = var_7; [L102] state_8 = init_9_arg_1 [L103] SORT_1 init_16_arg_1 = var_7; [L104] state_15 = init_16_arg_1 [L105] SORT_20 init_23_arg_1 = var_21; [L106] state_22 = init_23_arg_1 [L107] SORT_29 init_32_arg_1 = var_30; [L108] state_31 = init_32_arg_1 [L109] SORT_1 init_39_arg_1 = var_7; [L110] state_38 = init_39_arg_1 [L111] SORT_1 init_44_arg_1 = var_7; [L112] state_43 = init_44_arg_1 [L113] SORT_20 init_50_arg_1 = var_21; [L114] state_49 = init_50_arg_1 [L115] SORT_1 init_61_arg_1 = var_7; [L116] state_60 = init_61_arg_1 [L117] SORT_1 init_65_arg_1 = var_7; [L118] state_64 = init_65_arg_1 [L119] SORT_1 init_73_arg_1 = var_7; [L120] state_72 = init_73_arg_1 [L121] SORT_1 init_87_arg_1 = var_7; [L122] state_86 = init_87_arg_1 [L123] SORT_1 init_101_arg_1 = var_7; [L124] state_100 = init_101_arg_1 [L125] SORT_1 init_124_arg_1 = var_122; [L126] state_123 = init_124_arg_1 [L127] SORT_1 init_131_arg_1 = var_7; [L128] state_130 = init_131_arg_1 [L129] SORT_1 init_136_arg_1 = var_7; [L130] state_135 = init_136_arg_1 [L131] SORT_1 init_142_arg_1 = var_7; [L132] state_141 = init_142_arg_1 [L133] SORT_1 init_154_arg_1 = var_7; [L134] state_153 = init_154_arg_1 [L135] SORT_1 init_167_arg_1 = var_7; [L136] state_166 = init_167_arg_1 [L137] SORT_1 init_178_arg_1 = var_7; [L138] state_177 = init_178_arg_1 [L139] SORT_3 init_185_arg_1 = var_183; [L140] state_184 = init_185_arg_1 [L141] SORT_1 init_198_arg_1 = var_7; [L142] state_197 = init_198_arg_1 [L143] SORT_1 init_200_arg_1 = var_7; [L144] state_199 = init_200_arg_1 [L145] SORT_1 init_204_arg_1 = var_7; [L146] state_203 = init_204_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L149] input_2 = __VERIFIER_nondet_uchar() [L150] input_4 = __VERIFIER_nondet_uchar() [L151] input_5 = __VERIFIER_nondet_uchar() [L152] input_6 = __VERIFIER_nondet_uchar() [L153] input_201 = __VERIFIER_nondet_uchar() [L154] input_228 = __VERIFIER_nondet_uchar() [L155] input_234 = __VERIFIER_nondet_uchar() [L156] input_235 = __VERIFIER_nondet_uchar() [L157] input_249 = __VERIFIER_nondet_ushort() [L158] input_262 = __VERIFIER_nondet_uchar() [L159] input_270 = __VERIFIER_nondet_uchar() [L160] input_278 = __VERIFIER_nondet_uchar() [L161] input_284 = __VERIFIER_nondet_uchar() [L162] input_289 = __VERIFIER_nondet_uchar() [L163] input_290 = __VERIFIER_nondet_uchar() [L164] input_291 = __VERIFIER_nondet_uchar() [L165] input_300 = __VERIFIER_nondet_uchar() [L166] input_301 = __VERIFIER_nondet_uchar() [L167] input_302 = __VERIFIER_nondet_uchar() [L168] input_323 = __VERIFIER_nondet_uchar() [L169] input_330 = __VERIFIER_nondet_uchar() [L170] input_336 = __VERIFIER_nondet_uchar() [L173] SORT_1 var_11_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_11_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L174] EXPR var_11_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L174] var_11_arg_0 = var_11_arg_0 & mask_SORT_1 [L175] SORT_10 var_11 = var_11_arg_0; [L176] SORT_10 var_13_arg_0 = var_11; [L177] SORT_10 var_13_arg_1 = var_12; [L178] SORT_1 var_13 = var_13_arg_0 == var_13_arg_1; [L179] SORT_1 var_14_arg_0 = var_13; [L180] SORT_1 var_14 = ~var_14_arg_0; [L181] SORT_1 var_17_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_14=-1, var_17_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L182] EXPR var_17_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_14=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L182] var_17_arg_0 = var_17_arg_0 & mask_SORT_1 [L183] SORT_10 var_17 = var_17_arg_0; [L184] SORT_10 var_18_arg_0 = var_17; [L185] SORT_10 var_18_arg_1 = var_12; [L186] SORT_1 var_18 = var_18_arg_0 == var_18_arg_1; [L187] SORT_1 var_19_arg_0 = var_14; [L188] SORT_1 var_19_arg_1 = var_18; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19_arg_0=-1, var_19_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L189] EXPR var_19_arg_0 | var_19_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L189] SORT_1 var_19 = var_19_arg_0 | var_19_arg_1; [L190] SORT_20 var_24_arg_0 = state_22; [L191] SORT_1 var_24 = var_24_arg_0 >> 3; [L192] SORT_1 var_25_arg_0 = var_24; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19=255, var_254=104, var_25_arg_0=0, var_26=0, var_30=0, var_7=0] [L193] EXPR var_25_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19=255, var_254=104, var_26=0, var_30=0, var_7=0] [L193] var_25_arg_0 = var_25_arg_0 & mask_SORT_1 [L194] SORT_10 var_25 = var_25_arg_0; [L195] SORT_10 var_27_arg_0 = var_25; [L196] SORT_10 var_27_arg_1 = var_26; [L197] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L198] SORT_1 var_28_arg_0 = var_19; [L199] SORT_1 var_28_arg_1 = var_27; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28_arg_0=255, var_28_arg_1=1, var_30=0, var_7=0] [L200] EXPR var_28_arg_0 & var_28_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L200] SORT_1 var_28 = var_28_arg_0 & var_28_arg_1; [L201] SORT_29 var_34_arg_0 = state_31; [L202] SORT_33 var_34 = var_34_arg_0 >> 8; [L203] SORT_33 var_35_arg_0 = var_34; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28=0, var_30=0, var_35_arg_0=0, var_7=0] [L204] EXPR var_35_arg_0 & mask_SORT_33 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28=0, var_30=0, var_7=0] [L204] var_35_arg_0 = var_35_arg_0 & mask_SORT_33 [L205] SORT_10 var_35 = var_35_arg_0; [L206] SORT_10 var_36_arg_0 = var_35; [L207] SORT_10 var_36_arg_1 = var_26; [L208] SORT_1 var_36 = var_36_arg_0 == var_36_arg_1; [L209] SORT_1 var_37_arg_0 = var_28; [L210] SORT_1 var_37_arg_1 = var_36; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37_arg_0=0, var_37_arg_1=1, var_7=0] [L211] EXPR var_37_arg_0 & var_37_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L211] SORT_1 var_37 = var_37_arg_0 & var_37_arg_1; [L212] SORT_1 var_40_arg_0 = state_38; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_40_arg_0=0, var_7=0] [L213] EXPR var_40_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_7=0] [L213] var_40_arg_0 = var_40_arg_0 & mask_SORT_1 [L214] SORT_10 var_40 = var_40_arg_0; [L215] SORT_10 var_41_arg_0 = var_40; [L216] SORT_10 var_41_arg_1 = var_12; [L217] SORT_1 var_41 = var_41_arg_0 == var_41_arg_1; [L218] SORT_1 var_42_arg_0 = var_41; [L219] SORT_1 var_42 = ~var_42_arg_0; [L220] SORT_1 var_45_arg_0 = state_43; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_42=-1, var_45_arg_0=0, var_7=0] [L221] EXPR var_45_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_42=-1, var_7=0] [L221] var_45_arg_0 = var_45_arg_0 & mask_SORT_1 [L222] SORT_10 var_45 = var_45_arg_0; [L223] SORT_10 var_46_arg_0 = var_45; [L224] SORT_10 var_46_arg_1 = var_12; [L225] SORT_1 var_46 = var_46_arg_0 == var_46_arg_1; [L226] SORT_1 var_47_arg_0 = var_42; [L227] SORT_1 var_47_arg_1 = var_46; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_47_arg_0=-1, var_47_arg_1=0, var_7=0] [L228] EXPR var_47_arg_0 | var_47_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_7=0] [L228] SORT_1 var_47 = var_47_arg_0 | var_47_arg_1; [L229] SORT_1 var_48_arg_0 = var_37; [L230] SORT_1 var_48_arg_1 = var_47; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_48_arg_0=0, var_48_arg_1=255, var_7=0] [L231] EXPR var_48_arg_0 & var_48_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L231] SORT_1 var_48 = var_48_arg_0 & var_48_arg_1; [L232] SORT_20 var_51_arg_0 = state_22; [L233] SORT_20 var_51_arg_1 = state_49; [L234] SORT_1 var_51 = var_51_arg_0 == var_51_arg_1; [L235] SORT_1 var_52_arg_0 = var_48; [L236] SORT_1 var_52_arg_1 = var_51; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52_arg_0=0, var_52_arg_1=1, var_7=0] [L237] EXPR var_52_arg_0 & var_52_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L237] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L238] SORT_1 var_53_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_53_arg_0=0, var_7=0] [L239] EXPR var_53_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_7=0] [L239] var_53_arg_0 = var_53_arg_0 & mask_SORT_1 [L240] SORT_10 var_53 = var_53_arg_0; [L241] SORT_10 var_54_arg_0 = var_53; [L242] SORT_10 var_54_arg_1 = var_12; [L243] SORT_1 var_54 = var_54_arg_0 == var_54_arg_1; [L244] SORT_1 var_55_arg_0 = var_54; [L245] SORT_1 var_55 = ~var_55_arg_0; [L246] SORT_1 var_56_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_55=-1, var_56_arg_0=0, var_7=0] [L247] EXPR var_56_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_55=-1, var_7=0] [L247] var_56_arg_0 = var_56_arg_0 & mask_SORT_1 [L248] SORT_10 var_56 = var_56_arg_0; [L249] SORT_10 var_57_arg_0 = var_56; [L250] SORT_10 var_57_arg_1 = var_12; [L251] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L252] SORT_1 var_58_arg_0 = var_55; [L253] SORT_1 var_58_arg_1 = var_57; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_58_arg_0=-1, var_58_arg_1=0, var_7=0] [L254] EXPR var_58_arg_0 | var_58_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_7=0] [L254] SORT_1 var_58 = var_58_arg_0 | var_58_arg_1; [L255] SORT_1 var_59_arg_0 = var_52; [L256] SORT_1 var_59_arg_1 = var_58; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59_arg_0=0, var_59_arg_1=255, var_7=0] [L257] EXPR var_59_arg_0 & var_59_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L257] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L258] SORT_1 var_62_arg_0 = state_60; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_62_arg_0=0, var_7=0] [L259] EXPR var_62_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_7=0] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_1 [L260] SORT_10 var_62 = var_62_arg_0; [L261] SORT_10 var_63_arg_0 = var_62; [L262] SORT_10 var_63_arg_1 = var_26; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_1 var_66_arg_0 = state_64; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_63=1, var_66_arg_0=0, var_7=0] [L265] EXPR var_66_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_63=1, var_7=0] [L265] var_66_arg_0 = var_66_arg_0 & mask_SORT_1 [L266] SORT_10 var_66 = var_66_arg_0; [L267] SORT_10 var_67_arg_0 = var_66; [L268] SORT_10 var_67_arg_1 = var_26; [L269] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L270] SORT_1 var_68_arg_0 = var_63; [L271] SORT_1 var_68_arg_1 = var_67; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_68_arg_0=1, var_68_arg_1=1, var_7=0] [L272] EXPR var_68_arg_0 | var_68_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_7=0] [L272] SORT_1 var_68 = var_68_arg_0 | var_68_arg_1; [L273] SORT_1 var_69_arg_0 = var_59; [L274] SORT_1 var_69_arg_1 = var_68; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69_arg_0=0, var_69_arg_1=1, var_7=0] [L275] EXPR var_69_arg_0 & var_69_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L275] SORT_1 var_69 = var_69_arg_0 & var_69_arg_1; [L276] SORT_1 var_70_arg_0 = state_60; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_70_arg_0=0, var_7=0] [L277] EXPR var_70_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_7=0] [L277] var_70_arg_0 = var_70_arg_0 & mask_SORT_1 [L278] SORT_10 var_70 = var_70_arg_0; [L279] SORT_10 var_71_arg_0 = var_70; [L280] SORT_10 var_71_arg_1 = var_26; [L281] SORT_1 var_71 = var_71_arg_0 == var_71_arg_1; [L282] SORT_1 var_74_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_71=1, var_74_arg_0=0, var_7=0] [L283] EXPR var_74_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_71=1, var_7=0] [L283] var_74_arg_0 = var_74_arg_0 & mask_SORT_1 [L284] SORT_10 var_74 = var_74_arg_0; [L285] SORT_10 var_75_arg_0 = var_74; [L286] SORT_10 var_75_arg_1 = var_26; [L287] SORT_1 var_75 = var_75_arg_0 == var_75_arg_1; [L288] SORT_1 var_76_arg_0 = var_71; [L289] SORT_1 var_76_arg_1 = var_75; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_76_arg_0=1, var_76_arg_1=1, var_7=0] [L290] EXPR var_76_arg_0 | var_76_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_7=0] [L290] SORT_1 var_76 = var_76_arg_0 | var_76_arg_1; [L291] SORT_1 var_77_arg_0 = var_69; [L292] SORT_1 var_77_arg_1 = var_76; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77_arg_0=0, var_77_arg_1=1, var_7=0] [L293] EXPR var_77_arg_0 & var_77_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L293] SORT_1 var_77 = var_77_arg_0 & var_77_arg_1; [L294] SORT_1 var_78_arg_0 = state_64; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_78_arg_0=0, var_7=0] [L295] EXPR var_78_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0] [L295] var_78_arg_0 = var_78_arg_0 & mask_SORT_1 [L296] SORT_10 var_78 = var_78_arg_0; [L297] SORT_10 var_79_arg_0 = var_78; [L298] SORT_10 var_79_arg_1 = var_26; [L299] SORT_1 var_79 = var_79_arg_0 == var_79_arg_1; [L300] SORT_1 var_80_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_79=1, var_7=0, var_80_arg_0=0] [L301] EXPR var_80_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_79=1, var_7=0] [L301] var_80_arg_0 = var_80_arg_0 & mask_SORT_1 [L302] SORT_10 var_80 = var_80_arg_0; [L303] SORT_10 var_81_arg_0 = var_80; [L304] SORT_10 var_81_arg_1 = var_26; [L305] SORT_1 var_81 = var_81_arg_0 == var_81_arg_1; [L306] SORT_1 var_82_arg_0 = var_79; [L307] SORT_1 var_82_arg_1 = var_81; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0, var_82_arg_0=1, var_82_arg_1=1] [L308] EXPR var_82_arg_0 | var_82_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0] [L308] SORT_1 var_82 = var_82_arg_0 | var_82_arg_1; [L309] SORT_1 var_83_arg_0 = var_77; [L310] SORT_1 var_83_arg_1 = var_82; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83_arg_0=0, var_83_arg_1=1] [L311] EXPR var_83_arg_0 & var_83_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L311] SORT_1 var_83 = var_83_arg_0 & var_83_arg_1; [L312] SORT_1 var_84_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_84_arg_0=0] [L313] EXPR var_84_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0] [L313] var_84_arg_0 = var_84_arg_0 & mask_SORT_1 [L314] SORT_10 var_84 = var_84_arg_0; [L315] SORT_10 var_85_arg_0 = var_84; [L316] SORT_10 var_85_arg_1 = var_26; [L317] SORT_1 var_85 = var_85_arg_0 == var_85_arg_1; [L318] SORT_1 var_88_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_85=1, var_88_arg_0=0] [L319] EXPR var_88_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_85=1] [L319] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L320] SORT_10 var_88 = var_88_arg_0; [L321] SORT_10 var_89_arg_0 = var_88; [L322] SORT_10 var_89_arg_1 = var_26; [L323] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L324] SORT_1 var_90_arg_0 = var_85; [L325] SORT_1 var_90_arg_1 = var_89; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_90_arg_0=1, var_90_arg_1=1] [L326] EXPR var_90_arg_0 | var_90_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0] [L326] SORT_1 var_90 = var_90_arg_0 | var_90_arg_1; [L327] SORT_1 var_91_arg_0 = var_83; [L328] SORT_1 var_91_arg_1 = var_90; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91_arg_0=0, var_91_arg_1=1] [L329] EXPR var_91_arg_0 & var_91_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L329] SORT_1 var_91 = var_91_arg_0 & var_91_arg_1; [L330] SORT_1 var_92_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_92_arg_0=0] [L331] EXPR var_92_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0] [L331] var_92_arg_0 = var_92_arg_0 & mask_SORT_1 [L332] SORT_10 var_92 = var_92_arg_0; [L333] SORT_10 var_93_arg_0 = var_92; [L334] SORT_10 var_93_arg_1 = var_26; [L335] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L336] SORT_1 var_94_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_93=1, var_94_arg_0=0] [L337] EXPR var_94_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_93=1] [L337] var_94_arg_0 = var_94_arg_0 & mask_SORT_1 [L338] SORT_10 var_94 = var_94_arg_0; [L339] SORT_10 var_95_arg_0 = var_94; [L340] SORT_10 var_95_arg_1 = var_26; [L341] SORT_1 var_95 = var_95_arg_0 == var_95_arg_1; [L342] SORT_1 var_96_arg_0 = var_93; [L343] SORT_1 var_96_arg_1 = var_95; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_96_arg_0=1, var_96_arg_1=1] [L344] EXPR var_96_arg_0 | var_96_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0] [L344] SORT_1 var_96 = var_96_arg_0 | var_96_arg_1; [L345] SORT_1 var_97_arg_0 = var_91; [L346] SORT_1 var_97_arg_1 = var_96; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97_arg_0=0, var_97_arg_1=1] [L347] EXPR var_97_arg_0 & var_97_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L347] SORT_1 var_97 = var_97_arg_0 & var_97_arg_1; [L348] SORT_1 var_98_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_98_arg_0=0] [L349] EXPR var_98_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L349] var_98_arg_0 = var_98_arg_0 & mask_SORT_1 [L350] SORT_10 var_98 = var_98_arg_0; [L351] SORT_10 var_99_arg_0 = var_98; [L352] SORT_10 var_99_arg_1 = var_26; [L353] SORT_1 var_99 = var_99_arg_0 == var_99_arg_1; [L354] SORT_1 var_102_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_102_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_99=1] [L355] EXPR var_102_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_99=1] [L355] var_102_arg_0 = var_102_arg_0 & mask_SORT_1 [L356] SORT_10 var_102 = var_102_arg_0; [L357] SORT_10 var_103_arg_0 = var_102; [L358] SORT_10 var_103_arg_1 = var_26; [L359] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L360] SORT_1 var_104_arg_0 = var_99; [L361] SORT_1 var_104_arg_1 = var_103; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_104_arg_0=1, var_104_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L362] EXPR var_104_arg_0 | var_104_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L362] SORT_1 var_104 = var_104_arg_0 | var_104_arg_1; [L363] SORT_1 var_105_arg_0 = var_97; [L364] SORT_1 var_105_arg_1 = var_104; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105_arg_0=0, var_105_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L365] EXPR var_105_arg_0 & var_105_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L365] SORT_1 var_105 = var_105_arg_0 & var_105_arg_1; [L366] SORT_1 var_106_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_106_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L367] EXPR var_106_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L367] var_106_arg_0 = var_106_arg_0 & mask_SORT_1 [L368] SORT_10 var_106 = var_106_arg_0; [L369] SORT_10 var_107_arg_0 = var_106; [L370] SORT_10 var_107_arg_1 = var_26; [L371] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L372] SORT_1 var_108_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_107=1, var_108_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L373] EXPR var_108_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_107=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L373] var_108_arg_0 = var_108_arg_0 & mask_SORT_1 [L374] SORT_10 var_108 = var_108_arg_0; [L375] SORT_10 var_109_arg_0 = var_108; [L376] SORT_10 var_109_arg_1 = var_26; [L377] SORT_1 var_109 = var_109_arg_0 == var_109_arg_1; [L378] SORT_1 var_110_arg_0 = var_107; [L379] SORT_1 var_110_arg_1 = var_109; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_110_arg_0=1, var_110_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L380] EXPR var_110_arg_0 | var_110_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L380] SORT_1 var_110 = var_110_arg_0 | var_110_arg_1; [L381] SORT_1 var_111_arg_0 = var_105; [L382] SORT_1 var_111_arg_1 = var_110; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111_arg_0=0, var_111_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L383] EXPR var_111_arg_0 & var_111_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L383] SORT_1 var_111 = var_111_arg_0 & var_111_arg_1; [L384] SORT_1 var_112_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_112_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L385] EXPR var_112_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L385] var_112_arg_0 = var_112_arg_0 & mask_SORT_1 [L386] SORT_10 var_112 = var_112_arg_0; [L387] SORT_10 var_113_arg_0 = var_112; [L388] SORT_10 var_113_arg_1 = var_26; [L389] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L390] SORT_1 var_114_arg_0 = var_113; [L391] SORT_1 var_114 = ~var_114_arg_0; [L392] SORT_1 var_115_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_114=-2, var_115_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L393] EXPR var_115_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_114=-2, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L393] var_115_arg_0 = var_115_arg_0 & mask_SORT_1 [L394] SORT_10 var_115 = var_115_arg_0; [L395] SORT_10 var_116_arg_0 = var_115; [L396] SORT_10 var_116_arg_1 = var_26; [L397] SORT_1 var_116 = var_116_arg_0 == var_116_arg_1; [L398] SORT_1 var_117_arg_0 = var_114; [L399] SORT_1 var_117_arg_1 = var_116; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_117_arg_0=-2, var_117_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L400] EXPR var_117_arg_0 | var_117_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L400] SORT_1 var_117 = var_117_arg_0 | var_117_arg_1; [L401] SORT_1 var_118_arg_0 = var_111; [L402] SORT_1 var_118_arg_1 = var_117; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118_arg_0=0, var_118_arg_1=254, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L403] EXPR var_118_arg_0 & var_118_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L403] SORT_1 var_118 = var_118_arg_0 & var_118_arg_1; [L404] SORT_1 var_119_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_119_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L405] EXPR var_119_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L405] var_119_arg_0 = var_119_arg_0 & mask_SORT_1 [L406] SORT_10 var_119 = var_119_arg_0; [L407] SORT_10 var_120_arg_0 = var_119; [L408] SORT_10 var_120_arg_1 = var_12; [L409] SORT_1 var_120 = var_120_arg_0 == var_120_arg_1; [L410] SORT_1 var_121_arg_0 = var_120; [L411] SORT_1 var_121 = ~var_121_arg_0; [L412] SORT_1 var_125_arg_0 = state_123; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_121=-1, var_122=1, var_125_arg_0=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L413] EXPR var_125_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_121=-1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L413] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L414] SORT_20 var_125 = var_125_arg_0; [L415] SORT_20 var_127_arg_0 = var_125; [L416] SORT_20 var_127_arg_1 = var_126; [L417] SORT_1 var_127 = var_127_arg_0 == var_127_arg_1; [L418] SORT_1 var_128_arg_0 = var_121; [L419] SORT_1 var_128_arg_1 = var_127; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_128_arg_0=-1, var_128_arg_1=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L420] EXPR var_128_arg_0 | var_128_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L420] SORT_1 var_128 = var_128_arg_0 | var_128_arg_1; [L421] SORT_1 var_129_arg_0 = var_118; [L422] SORT_1 var_129_arg_1 = var_128; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129_arg_0=0, var_129_arg_1=256, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L423] EXPR var_129_arg_0 & var_129_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L423] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L424] SORT_1 var_132_arg_0 = state_130; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_132_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L425] EXPR var_132_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L425] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L426] SORT_10 var_132 = var_132_arg_0; [L427] SORT_10 var_133_arg_0 = var_132; [L428] SORT_10 var_133_arg_1 = var_12; [L429] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L430] SORT_1 var_134_arg_0 = var_133; [L431] SORT_1 var_134 = ~var_134_arg_0; [L432] SORT_1 var_137_arg_0 = state_135; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_134=-1, var_137_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L433] EXPR var_137_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_134=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L433] var_137_arg_0 = var_137_arg_0 & mask_SORT_1 [L434] SORT_10 var_137 = var_137_arg_0; [L435] SORT_10 var_138_arg_0 = var_137; [L436] SORT_10 var_138_arg_1 = var_12; [L437] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L438] SORT_1 var_139_arg_0 = var_134; [L439] SORT_1 var_139_arg_1 = var_138; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_139_arg_0=-1, var_139_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L440] EXPR var_139_arg_0 | var_139_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L440] SORT_1 var_139 = var_139_arg_0 | var_139_arg_1; [L441] SORT_1 var_140_arg_0 = var_129; [L442] SORT_1 var_140_arg_1 = var_139; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140_arg_0=0, var_140_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L443] EXPR var_140_arg_0 & var_140_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L443] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L444] SORT_1 var_143_arg_0 = state_141; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_143_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L445] EXPR var_143_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_254=104, var_26=0, var_30=0, var_7=0] [L445] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L446] SORT_10 var_143 = var_143_arg_0; [L447] SORT_10 var_144_arg_0 = var_143; [L448] SORT_10 var_144_arg_1 = var_26; [L449] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L450] SORT_1 var_145_arg_0 = var_144; [L451] SORT_1 var_145 = ~var_145_arg_0; [L452] SORT_1 var_146_arg_0 = state_135; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_145=-2, var_146_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L453] EXPR var_146_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_145=-2, var_254=104, var_26=0, var_30=0, var_7=0] [L453] var_146_arg_0 = var_146_arg_0 & mask_SORT_1 [L454] SORT_10 var_146 = var_146_arg_0; [L455] SORT_10 var_147_arg_0 = var_146; [L456] SORT_10 var_147_arg_1 = var_26; [L457] SORT_1 var_147 = var_147_arg_0 == var_147_arg_1; [L458] SORT_1 var_148_arg_0 = var_145; [L459] SORT_1 var_148_arg_1 = var_147; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_148_arg_0=-2, var_148_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L460] EXPR var_148_arg_0 | var_148_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_254=104, var_26=0, var_30=0, var_7=0] [L460] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L461] SORT_1 var_149_arg_0 = var_140; [L462] SORT_1 var_149_arg_1 = var_148; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149_arg_0=0, var_149_arg_1=254, var_254=104, var_26=0, var_30=0, var_7=0] [L463] EXPR var_149_arg_0 & var_149_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L463] SORT_1 var_149 = var_149_arg_0 & var_149_arg_1; [L464] SORT_1 var_150_arg_0 = state_38; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_150_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L465] EXPR var_150_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_254=104, var_26=0, var_30=0, var_7=0] [L465] var_150_arg_0 = var_150_arg_0 & mask_SORT_1 [L466] SORT_10 var_150 = var_150_arg_0; [L467] SORT_10 var_151_arg_0 = var_150; [L468] SORT_10 var_151_arg_1 = var_12; [L469] SORT_1 var_151 = var_151_arg_0 == var_151_arg_1; [L470] SORT_1 var_152_arg_0 = var_151; [L471] SORT_1 var_152 = ~var_152_arg_0; [L472] SORT_1 var_155_arg_0 = state_153; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_152=-1, var_155_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L473] EXPR var_155_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_152=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L473] var_155_arg_0 = var_155_arg_0 & mask_SORT_1 [L474] SORT_10 var_155 = var_155_arg_0; [L475] SORT_10 var_156_arg_0 = var_155; [L476] SORT_10 var_156_arg_1 = var_12; [L477] SORT_1 var_156 = var_156_arg_0 == var_156_arg_1; [L478] SORT_1 var_157_arg_0 = var_152; [L479] SORT_1 var_157_arg_1 = var_156; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_157_arg_0=-1, var_157_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L480] EXPR var_157_arg_0 | var_157_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_254=104, var_26=0, var_30=0, var_7=0] [L480] SORT_1 var_157 = var_157_arg_0 | var_157_arg_1; [L481] SORT_1 var_158_arg_0 = var_149; [L482] SORT_1 var_158_arg_1 = var_157; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158_arg_0=0, var_158_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L483] EXPR var_158_arg_0 & var_158_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L483] SORT_1 var_158 = var_158_arg_0 & var_158_arg_1; [L484] SORT_1 var_159_arg_0 = state_153; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_159_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L485] EXPR var_159_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_254=104, var_26=0, var_30=0, var_7=0] [L485] var_159_arg_0 = var_159_arg_0 & mask_SORT_1 [L486] SORT_10 var_159 = var_159_arg_0; [L487] SORT_10 var_160_arg_0 = var_159; [L488] SORT_10 var_160_arg_1 = var_12; [L489] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L490] SORT_1 var_161_arg_0 = var_160; [L491] SORT_1 var_161 = ~var_161_arg_0; [L492] SORT_1 var_162_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_161=-1, var_162_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L493] EXPR var_162_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_161=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L493] var_162_arg_0 = var_162_arg_0 & mask_SORT_1 [L494] SORT_10 var_162 = var_162_arg_0; [L495] SORT_10 var_163_arg_0 = var_162; [L496] SORT_10 var_163_arg_1 = var_12; [L497] SORT_1 var_163 = var_163_arg_0 == var_163_arg_1; [L498] SORT_1 var_164_arg_0 = var_161; [L499] SORT_1 var_164_arg_1 = var_163; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_164_arg_0=-1, var_164_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L500] EXPR var_164_arg_0 | var_164_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_254=104, var_26=0, var_30=0, var_7=0] [L500] SORT_1 var_164 = var_164_arg_0 | var_164_arg_1; [L501] SORT_1 var_165_arg_0 = var_158; [L502] SORT_1 var_165_arg_1 = var_164; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165_arg_0=0, var_165_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L503] EXPR var_165_arg_0 & var_165_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L503] SORT_1 var_165 = var_165_arg_0 & var_165_arg_1; [L504] SORT_1 var_168_arg_0 = state_166; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_168_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L505] EXPR var_168_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_254=104, var_26=0, var_30=0, var_7=0] [L505] var_168_arg_0 = var_168_arg_0 & mask_SORT_1 [L506] SORT_10 var_168 = var_168_arg_0; [L507] SORT_10 var_169_arg_0 = var_168; [L508] SORT_10 var_169_arg_1 = var_12; [L509] SORT_1 var_169 = var_169_arg_0 == var_169_arg_1; [L510] SORT_1 var_170_arg_0 = var_169; [L511] SORT_1 var_170 = ~var_170_arg_0; [L512] SORT_1 var_171_arg_0 = state_43; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_170=-1, var_171_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L513] EXPR var_171_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_170=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L513] var_171_arg_0 = var_171_arg_0 & mask_SORT_1 [L514] SORT_10 var_171 = var_171_arg_0; [L515] SORT_10 var_172_arg_0 = var_171; [L516] SORT_10 var_172_arg_1 = var_12; [L517] SORT_1 var_172 = var_172_arg_0 == var_172_arg_1; [L518] SORT_1 var_173_arg_0 = var_170; [L519] SORT_1 var_173_arg_1 = var_172; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_173_arg_0=-1, var_173_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L520] EXPR var_173_arg_0 | var_173_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_254=104, var_26=0, var_30=0, var_7=0] [L520] SORT_1 var_173 = var_173_arg_0 | var_173_arg_1; [L521] SORT_1 var_174_arg_0 = var_165; [L522] SORT_1 var_174_arg_1 = var_173; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174_arg_0=0, var_174_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L523] EXPR var_174_arg_0 & var_174_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L523] SORT_1 var_174 = var_174_arg_0 & var_174_arg_1; [L524] SORT_1 var_175_arg_0 = state_130; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_175_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L525] EXPR var_175_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_254=104, var_26=0, var_30=0, var_7=0] [L525] var_175_arg_0 = var_175_arg_0 & mask_SORT_1 [L526] SORT_10 var_175 = var_175_arg_0; [L527] SORT_10 var_176_arg_0 = var_175; [L528] SORT_10 var_176_arg_1 = var_26; [L529] SORT_1 var_176 = var_176_arg_0 == var_176_arg_1; [L530] SORT_1 var_179_arg_0 = state_177; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_176=1, var_179_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L531] EXPR var_179_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_176=1, var_254=104, var_26=0, var_30=0, var_7=0] [L531] var_179_arg_0 = var_179_arg_0 & mask_SORT_1 [L532] SORT_10 var_179 = var_179_arg_0; [L533] SORT_10 var_180_arg_0 = var_179; [L534] SORT_10 var_180_arg_1 = var_26; [L535] SORT_1 var_180 = var_180_arg_0 == var_180_arg_1; [L536] SORT_1 var_181_arg_0 = var_176; [L537] SORT_1 var_181_arg_1 = var_180; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_181_arg_0=1, var_181_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L538] EXPR var_181_arg_0 | var_181_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_254=104, var_26=0, var_30=0, var_7=0] [L538] SORT_1 var_181 = var_181_arg_0 | var_181_arg_1; [L539] SORT_1 var_182_arg_0 = var_174; [L540] SORT_1 var_182_arg_1 = var_181; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182_arg_0=0, var_182_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L541] EXPR var_182_arg_0 & var_182_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L541] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L542] SORT_3 var_186_arg_0 = state_184; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_186_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L543] EXPR var_186_arg_0 & mask_SORT_3 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_254=104, var_26=0, var_30=0, var_7=0] [L543] var_186_arg_0 = var_186_arg_0 & mask_SORT_3 [L544] SORT_10 var_186 = var_186_arg_0; [L545] SORT_10 var_187_arg_0 = var_186; [L546] SORT_10 var_187_arg_1 = var_26; [L547] SORT_1 var_187 = var_187_arg_0 == var_187_arg_1; [L548] SORT_1 var_188_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_187=1, var_188_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L549] EXPR var_188_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_187=1, var_254=104, var_26=0, var_30=0, var_7=0] [L549] var_188_arg_0 = var_188_arg_0 & mask_SORT_1 [L550] SORT_10 var_188 = var_188_arg_0; [L551] SORT_10 var_189_arg_0 = var_188; [L552] SORT_10 var_189_arg_1 = var_12; [L553] SORT_1 var_189 = var_189_arg_0 == var_189_arg_1; [L554] SORT_1 var_190_arg_0 = var_187; [L555] SORT_1 var_190_arg_1 = var_189; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_190_arg_0=1, var_190_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L556] EXPR var_190_arg_0 | var_190_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_254=104, var_26=0, var_30=0, var_7=0] [L556] SORT_1 var_190 = var_190_arg_0 | var_190_arg_1; [L557] SORT_1 var_191_arg_0 = var_182; [L558] SORT_1 var_191_arg_1 = var_190; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_191_arg_0=0, var_191_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L559] EXPR var_191_arg_0 & var_191_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L559] SORT_1 var_191 = var_191_arg_0 & var_191_arg_1; [L560] SORT_1 var_194_arg_0 = var_191; [L561] SORT_1 var_194 = ~var_194_arg_0; [L562] SORT_1 var_195_arg_0 = var_122; [L563] SORT_1 var_195_arg_1 = var_194; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_195_arg_0=1, var_195_arg_1=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L564] EXPR var_195_arg_0 & var_195_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L564] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L565] EXPR var_195 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L565] var_195 = var_195 & mask_SORT_1 [L566] SORT_1 bad_196_arg_0 = var_195; [L567] CALL __VERIFIER_assert(!(bad_196_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 498 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 29.1s, OverallIterations: 26, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 7.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 11970 SdHoareTripleChecker+Valid, 6.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 11970 mSDsluCounter, 51333 SdHoareTripleChecker+Invalid, 5.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 36232 mSDsCounter, 71 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 12545 IncrementalHoareTripleChecker+Invalid, 12616 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 71 mSolverCounterUnsat, 15101 mSDtfsCounter, 12545 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 160 GetRequests, 62 SyntacticMatches, 1 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=878occurred in iteration=25, InterpolantAutomatonStates: 125, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 25 MinimizatonAttempts, 808 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 5.1s SatisfiabilityAnalysisTime, 14.1s InterpolantComputationTime, 5872 NumberOfCodeBlocks, 5872 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 5612 ConstructedInterpolants, 0 QuantifiedInterpolants, 11334 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2025-03-03 17:39:15,498 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 --- Real Ultimate output --- This is Ultimate 0.3.0-?-798a7b3-m [2025-03-03 17:39:17,327 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-03 17:39:17,404 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2025-03-03 17:39:17,408 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-03 17:39:17,409 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-03 17:39:17,425 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-03 17:39:17,426 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-03 17:39:17,426 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-03 17:39:17,426 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-03 17:39:17,427 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-03 17:39:17,427 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-03 17:39:17,427 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-03 17:39:17,427 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-03 17:39:17,427 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-03 17:39:17,427 INFO L153 SettingsManager]: * Use SBE=true [2025-03-03 17:39:17,427 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-03 17:39:17,428 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-03 17:39:17,428 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-03 17:39:17,428 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-03 17:39:17,428 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-03 17:39:17,428 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-03 17:39:17,428 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2025-03-03 17:39:17,428 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2025-03-03 17:39:17,428 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2025-03-03 17:39:17,428 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-03 17:39:17,428 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-03 17:39:17,429 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 17:39:17,429 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-03 17:39:17,429 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-03 17:39:17,430 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 [2025-03-03 17:39:17,676 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-03 17:39:17,683 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-03 17:39:17,685 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-03 17:39:17,686 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-03 17:39:17,687 INFO L274 PluginConnector]: CDTParser initialized [2025-03-03 17:39:17,687 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2025-03-03 17:39:18,843 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9763bfa43/6868db4841f948cca55107299220f32d/FLAG0b7821a7f [2025-03-03 17:39:19,068 INFO L384 CDTParser]: Found 1 translation units. [2025-03-03 17:39:19,069 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2025-03-03 17:39:19,082 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9763bfa43/6868db4841f948cca55107299220f32d/FLAG0b7821a7f [2025-03-03 17:39:19,097 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9763bfa43/6868db4841f948cca55107299220f32d [2025-03-03 17:39:19,100 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-03 17:39:19,101 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-03 17:39:19,102 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-03 17:39:19,103 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-03 17:39:19,105 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-03 17:39:19,106 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,107 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1a23fc83 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19, skipping insertion in model container [2025-03-03 17:39:19,108 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,140 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-03 17:39:19,261 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2025-03-03 17:39:19,452 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 17:39:19,463 INFO L200 MainTranslator]: Completed pre-run [2025-03-03 17:39:19,469 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2025-03-03 17:39:19,539 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-03 17:39:19,554 INFO L204 MainTranslator]: Completed translation [2025-03-03 17:39:19,555 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19 WrapperNode [2025-03-03 17:39:19,555 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-03 17:39:19,556 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-03 17:39:19,557 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-03 17:39:19,557 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-03 17:39:19,561 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,583 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,650 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 969 [2025-03-03 17:39:19,650 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-03 17:39:19,651 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-03 17:39:19,651 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-03 17:39:19,651 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-03 17:39:19,657 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,657 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,666 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,697 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-03 17:39:19,702 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,702 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,728 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,733 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,740 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,747 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,753 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-03 17:39:19,760 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-03 17:39:19,760 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-03 17:39:19,760 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-03 17:39:19,761 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (1/1) ... [2025-03-03 17:39:19,765 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-03 17:39:19,776 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 17:39:19,787 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-03 17:39:19,792 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-03 17:39:19,806 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-03 17:39:19,806 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2025-03-03 17:39:19,806 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-03 17:39:19,806 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-03 17:39:19,982 INFO L256 CfgBuilder]: Building ICFG [2025-03-03 17:39:19,983 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-03 17:39:20,566 INFO L? ?]: Removed 409 outVars from TransFormulas that were not future-live. [2025-03-03 17:39:20,566 INFO L307 CfgBuilder]: Performing block encoding [2025-03-03 17:39:20,573 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-03 17:39:20,574 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-03 17:39:20,574 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 05:39:20 BoogieIcfgContainer [2025-03-03 17:39:20,575 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-03 17:39:20,576 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-03 17:39:20,577 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-03 17:39:20,580 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-03 17:39:20,580 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.03 05:39:19" (1/3) ... [2025-03-03 17:39:20,581 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7cd977de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 05:39:20, skipping insertion in model container [2025-03-03 17:39:20,581 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.03 05:39:19" (2/3) ... [2025-03-03 17:39:20,582 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7cd977de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.03 05:39:20, skipping insertion in model container [2025-03-03 17:39:20,582 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 03.03 05:39:20" (3/3) ... [2025-03-03 17:39:20,583 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.itc99_b13.c [2025-03-03 17:39:20,593 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-03 17:39:20,594 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.itc99_b13.c that has 1 procedures, 10 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-03-03 17:39:20,627 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-03 17:39:20,636 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@20d47eac, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-03 17:39:20,636 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-03 17:39:20,640 INFO L276 IsEmpty]: Start isEmpty. Operand has 10 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:20,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2025-03-03 17:39:20,643 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:20,643 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2025-03-03 17:39:20,644 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:20,648 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:20,648 INFO L85 PathProgramCache]: Analyzing trace with hash 38140359, now seen corresponding path program 1 times [2025-03-03 17:39:20,663 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-03-03 17:39:20,665 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [199554463] [2025-03-03 17:39:20,665 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:20,665 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-03 17:39:20,666 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 17:39:20,667 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-03 17:39:20,670 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-03-03 17:39:20,922 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-03-03 17:39:20,999 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-03-03 17:39:20,999 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:20,999 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:21,020 WARN L254 TraceCheckSpWp]: Trace formula consists of 436 conjuncts, 283 conjuncts are in the unsatisfiable core [2025-03-03 17:39:21,052 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-03 17:39:23,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:23,673 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-03 17:39:23,674 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2025-03-03 17:39:23,674 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [199554463] [2025-03-03 17:39:23,674 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [199554463] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-03 17:39:23,674 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-03 17:39:23,674 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-03 17:39:23,676 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [95697861] [2025-03-03 17:39:23,676 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-03 17:39:23,678 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-03 17:39:23,678 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2025-03-03 17:39:23,691 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-03 17:39:23,692 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-03 17:39:23,694 INFO L87 Difference]: Start difference. First operand has 10 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:23,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-03 17:39:23,857 INFO L93 Difference]: Finished difference Result 18 states and 23 transitions. [2025-03-03 17:39:23,859 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-03 17:39:23,860 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2025-03-03 17:39:23,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-03 17:39:23,864 INFO L225 Difference]: With dead ends: 18 [2025-03-03 17:39:23,864 INFO L226 Difference]: Without dead ends: 10 [2025-03-03 17:39:23,867 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-03 17:39:23,869 INFO L435 NwaCegarLoop]: 4 mSDtfsCounter, 2 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-03 17:39:23,871 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 11 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-03 17:39:23,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states. [2025-03-03 17:39:23,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 9. [2025-03-03 17:39:23,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:23,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 9 transitions. [2025-03-03 17:39:23,895 INFO L78 Accepts]: Start accepts. Automaton has 9 states and 9 transitions. Word has length 5 [2025-03-03 17:39:23,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-03 17:39:23,895 INFO L471 AbstractCegarLoop]: Abstraction has 9 states and 9 transitions. [2025-03-03 17:39:23,895 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-03 17:39:23,895 INFO L276 IsEmpty]: Start isEmpty. Operand 9 states and 9 transitions. [2025-03-03 17:39:23,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2025-03-03 17:39:23,896 INFO L210 NwaCegarLoop]: Found error trace [2025-03-03 17:39:23,896 INFO L218 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2025-03-03 17:39:23,903 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2025-03-03 17:39:24,100 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-03 17:39:24,100 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-03 17:39:24,101 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-03 17:39:24,101 INFO L85 PathProgramCache]: Analyzing trace with hash -1926026653, now seen corresponding path program 1 times [2025-03-03 17:39:24,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2025-03-03 17:39:24,102 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1470706699] [2025-03-03 17:39:24,102 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-03 17:39:24,102 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-03 17:39:24,102 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-03 17:39:24,104 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-03 17:39:24,106 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-03-03 17:39:24,411 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-03-03 17:39:24,513 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-03-03 17:39:24,514 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-03 17:39:24,514 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-03 17:39:24,528 INFO L256 TraceCheckSpWp]: Trace formula consists of 815 conjuncts, 300 conjuncts are in the unsatisfiable core [2025-03-03 17:39:24,549 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-03 17:39:26,755 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-03 17:39:26,756 INFO L312 TraceCheckSpWp]: Computing backward predicates...