./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/array-examples/standard_sentinel-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e2fb8bed Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/array-examples/standard_sentinel-2.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 590a845a219659d0ad58521e10c3551f2ec7e80ca70e994a8616abe765f6f296 --- Real Ultimate output --- This is Ultimate 0.3.0-?-e2fb8be-m [2025-03-09 06:57:02,745 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-09 06:57:02,794 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-09 06:57:02,799 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-09 06:57:02,799 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-09 06:57:02,799 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-09 06:57:02,823 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-09 06:57:02,824 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-09 06:57:02,824 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-09 06:57:02,825 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-09 06:57:02,825 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-09 06:57:02,825 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-09 06:57:02,826 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-09 06:57:02,826 INFO L153 SettingsManager]: * Use SBE=true [2025-03-09 06:57:02,826 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-09 06:57:02,827 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-09 06:57:02,827 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-09 06:57:02,827 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-09 06:57:02,827 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-09 06:57:02,827 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-09 06:57:02,827 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-09 06:57:02,827 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-09 06:57:02,827 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-09 06:57:02,827 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-09 06:57:02,827 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-09 06:57:02,827 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-09 06:57:02,828 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-09 06:57:02,828 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-09 06:57:02,828 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-09 06:57:02,828 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-09 06:57:02,828 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-09 06:57:02,828 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-09 06:57:02,828 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-09 06:57:02,828 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-09 06:57:02,828 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-09 06:57:02,828 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-09 06:57:02,828 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-09 06:57:02,828 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-09 06:57:02,828 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-09 06:57:02,829 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-09 06:57:02,829 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 590a845a219659d0ad58521e10c3551f2ec7e80ca70e994a8616abe765f6f296 [2025-03-09 06:57:03,031 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-09 06:57:03,036 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-09 06:57:03,038 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-09 06:57:03,038 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-09 06:57:03,039 INFO L274 PluginConnector]: CDTParser initialized [2025-03-09 06:57:03,039 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/array-examples/standard_sentinel-2.i [2025-03-09 06:57:04,184 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2bd54057d/0c2e7b4101ba45e2a137b7aee9f0e60b/FLAGa7218336d [2025-03-09 06:57:04,449 INFO L384 CDTParser]: Found 1 translation units. [2025-03-09 06:57:04,449 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/array-examples/standard_sentinel-2.i [2025-03-09 06:57:04,477 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2bd54057d/0c2e7b4101ba45e2a137b7aee9f0e60b/FLAGa7218336d [2025-03-09 06:57:04,768 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2bd54057d/0c2e7b4101ba45e2a137b7aee9f0e60b [2025-03-09 06:57:04,770 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-09 06:57:04,771 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-09 06:57:04,773 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-09 06:57:04,773 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-09 06:57:04,777 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-09 06:57:04,778 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,778 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@29eb79d6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04, skipping insertion in model container [2025-03-09 06:57:04,779 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,790 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-09 06:57:04,881 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-09 06:57:04,889 INFO L200 MainTranslator]: Completed pre-run [2025-03-09 06:57:04,899 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-09 06:57:04,908 INFO L204 MainTranslator]: Completed translation [2025-03-09 06:57:04,909 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04 WrapperNode [2025-03-09 06:57:04,909 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-09 06:57:04,910 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-09 06:57:04,910 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-09 06:57:04,910 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-09 06:57:04,916 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,921 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,931 INFO L138 Inliner]: procedures = 16, calls = 14, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 49 [2025-03-09 06:57:04,934 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-09 06:57:04,935 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-09 06:57:04,935 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-09 06:57:04,935 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-09 06:57:04,940 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,940 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,945 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,955 INFO L175 MemorySlicer]: Split 5 memory accesses to 2 slices as follows [2, 3]. 60 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 2 writes are split as follows [0, 2]. [2025-03-09 06:57:04,957 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,957 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,960 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,963 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,966 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,966 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,967 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-09 06:57:04,968 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-09 06:57:04,968 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-09 06:57:04,968 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-09 06:57:04,970 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (1/1) ... [2025-03-09 06:57:04,974 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 06:57:04,984 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:04,997 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 06:57:05,000 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-09 06:57:05,018 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-09 06:57:05,018 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-09 06:57:05,018 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-03-09 06:57:05,018 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-03-09 06:57:05,019 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-09 06:57:05,019 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-03-09 06:57:05,019 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-09 06:57:05,019 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-09 06:57:05,019 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-09 06:57:05,019 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-03-09 06:57:05,019 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-09 06:57:05,076 INFO L256 CfgBuilder]: Building ICFG [2025-03-09 06:57:05,078 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-09 06:57:05,197 INFO L1307 $ProcedureCfgBuilder]: dead code at ProgramPoint L16: call ULTIMATE.dealloc(main_~#a~0#1.base, main_~#a~0#1.offset);havoc main_~#a~0#1.base, main_~#a~0#1.offset; [2025-03-09 06:57:05,204 INFO L? ?]: Removed 9 outVars from TransFormulas that were not future-live. [2025-03-09 06:57:05,204 INFO L307 CfgBuilder]: Performing block encoding [2025-03-09 06:57:05,212 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-09 06:57:05,213 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-09 06:57:05,213 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 06:57:05 BoogieIcfgContainer [2025-03-09 06:57:05,213 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-09 06:57:05,214 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-09 06:57:05,214 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-09 06:57:05,218 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-09 06:57:05,219 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 06:57:05,219 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.03 06:57:04" (1/3) ... [2025-03-09 06:57:05,220 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@234c46f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.03 06:57:05, skipping insertion in model container [2025-03-09 06:57:05,221 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 06:57:05,222 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 06:57:04" (2/3) ... [2025-03-09 06:57:05,222 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@234c46f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.03 06:57:05, skipping insertion in model container [2025-03-09 06:57:05,222 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 06:57:05,222 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 06:57:05" (3/3) ... [2025-03-09 06:57:05,223 INFO L363 chiAutomizerObserver]: Analyzing ICFG standard_sentinel-2.i [2025-03-09 06:57:05,262 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-09 06:57:05,263 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-09 06:57:05,263 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-09 06:57:05,263 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-09 06:57:05,263 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-09 06:57:05,263 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-09 06:57:05,264 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-09 06:57:05,264 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-09 06:57:05,269 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:05,280 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2025-03-09 06:57:05,281 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 06:57:05,281 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 06:57:05,284 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 06:57:05,284 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 06:57:05,284 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-09 06:57:05,285 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:05,286 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2025-03-09 06:57:05,286 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 06:57:05,286 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 06:57:05,287 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 06:57:05,287 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 06:57:05,291 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" [2025-03-09 06:57:05,291 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-03-09 06:57:05,295 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:05,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1696, now seen corresponding path program 1 times [2025-03-09 06:57:05,301 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:05,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610601157] [2025-03-09 06:57:05,302 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 06:57:05,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:05,355 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:05,377 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:05,381 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:05,381 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:05,381 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 06:57:05,390 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:05,395 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:05,396 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:05,396 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:05,411 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 06:57:05,413 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:05,413 INFO L85 PathProgramCache]: Analyzing trace with hash 52, now seen corresponding path program 1 times [2025-03-09 06:57:05,413 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:05,413 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1893974637] [2025-03-09 06:57:05,413 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 06:57:05,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:05,419 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 06:57:05,424 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 06:57:05,425 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:05,425 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:05,425 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 06:57:05,427 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 06:57:05,430 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 06:57:05,430 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:05,430 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:05,431 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 06:57:05,432 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:05,432 INFO L85 PathProgramCache]: Analyzing trace with hash 52597, now seen corresponding path program 1 times [2025-03-09 06:57:05,433 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:05,433 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1750530394] [2025-03-09 06:57:05,433 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 06:57:05,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:05,438 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-09 06:57:05,447 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-09 06:57:05,447 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:05,447 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:05,447 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 06:57:05,452 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-09 06:57:05,459 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-09 06:57:05,459 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:05,459 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:05,461 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 06:57:05,741 INFO L204 LassoAnalysis]: Preferences: [2025-03-09 06:57:05,742 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-09 06:57:05,742 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-09 06:57:05,742 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-09 06:57:05,742 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-09 06:57:05,743 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 06:57:05,743 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-09 06:57:05,744 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-09 06:57:05,744 INFO L132 ssoRankerPreferences]: Filename of dumped script: standard_sentinel-2.i_Iteration1_Lasso [2025-03-09 06:57:05,744 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-09 06:57:05,744 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-09 06:57:05,755 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 06:57:05,761 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 06:57:05,779 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 06:57:05,782 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 06:57:05,930 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 06:57:05,932 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 06:57:05,934 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 06:57:05,937 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 06:57:05,939 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 06:57:05,941 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 06:57:05,943 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 06:57:06,120 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-09 06:57:06,122 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-09 06:57:06,124 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 06:57:06,124 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:06,126 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 06:57:06,128 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-09 06:57:06,130 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-09 06:57:06,140 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-09 06:57:06,141 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-09 06:57:06,141 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-09 06:57:06,141 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-09 06:57:06,141 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-09 06:57:06,144 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-09 06:57:06,144 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-09 06:57:06,146 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-09 06:57:06,152 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2025-03-09 06:57:06,153 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 06:57:06,153 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:06,155 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 06:57:06,156 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-09 06:57:06,156 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-09 06:57:06,166 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-09 06:57:06,166 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-09 06:57:06,166 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-09 06:57:06,166 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-09 06:57:06,172 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-09 06:57:06,172 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-09 06:57:06,176 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-09 06:57:06,182 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-03-09 06:57:06,182 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 06:57:06,182 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:06,184 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 06:57:06,186 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-09 06:57:06,188 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-09 06:57:06,198 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-09 06:57:06,198 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-09 06:57:06,198 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-09 06:57:06,198 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-09 06:57:06,201 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-09 06:57:06,202 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-09 06:57:06,206 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-09 06:57:06,212 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2025-03-09 06:57:06,213 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 06:57:06,213 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:06,214 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 06:57:06,216 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-09 06:57:06,217 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-09 06:57:06,226 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-09 06:57:06,226 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-09 06:57:06,226 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-09 06:57:06,226 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-09 06:57:06,226 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-09 06:57:06,227 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-09 06:57:06,227 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-09 06:57:06,228 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-09 06:57:06,233 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-03-09 06:57:06,234 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 06:57:06,234 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:06,235 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 06:57:06,238 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2025-03-09 06:57:06,239 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-09 06:57:06,248 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-09 06:57:06,248 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-09 06:57:06,248 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-09 06:57:06,248 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-09 06:57:06,250 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-09 06:57:06,250 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-09 06:57:06,253 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-09 06:57:06,259 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2025-03-09 06:57:06,260 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 06:57:06,260 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:06,261 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 06:57:06,263 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2025-03-09 06:57:06,264 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-09 06:57:06,274 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-09 06:57:06,274 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-09 06:57:06,274 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-09 06:57:06,274 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-09 06:57:06,276 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-09 06:57:06,276 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-09 06:57:06,279 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-03-09 06:57:06,285 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2025-03-09 06:57:06,285 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 06:57:06,285 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:06,287 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 06:57:06,288 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-03-09 06:57:06,290 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-09 06:57:06,299 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-09 06:57:06,300 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-09 06:57:06,300 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-09 06:57:06,300 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-09 06:57:06,303 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-03-09 06:57:06,303 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-03-09 06:57:06,309 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-09 06:57:06,338 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2025-03-09 06:57:06,340 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2025-03-09 06:57:06,341 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 06:57:06,341 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:06,343 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 06:57:06,345 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2025-03-09 06:57:06,347 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-09 06:57:06,358 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-03-09 06:57:06,359 INFO L474 LassoAnalysis]: Proved termination. [2025-03-09 06:57:06,359 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 199999*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2025-03-09 06:57:06,365 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2025-03-09 06:57:06,383 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2025-03-09 06:57:06,389 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-03-09 06:57:06,392 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-03-09 06:57:06,407 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:06,414 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:06,420 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:06,420 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:06,420 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:06,421 INFO L256 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-09 06:57:06,421 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 06:57:06,439 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 06:57:06,442 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 06:57:06,442 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:06,442 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:06,443 INFO L256 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-09 06:57:06,443 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 06:57:06,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:06,468 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2025-03-09 06:57:06,470 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:06,497 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 17 states and 23 transitions. Complement of second has 3 states. [2025-03-09 06:57:06,498 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2025-03-09 06:57:06,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:06,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 3 transitions. [2025-03-09 06:57:06,504 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 1 letters. [2025-03-09 06:57:06,504 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-09 06:57:06,504 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 3 letters. Loop has 1 letters. [2025-03-09 06:57:06,504 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-09 06:57:06,504 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 2 letters. [2025-03-09 06:57:06,504 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-09 06:57:06,505 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 23 transitions. [2025-03-09 06:57:06,506 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:06,507 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 7 states and 9 transitions. [2025-03-09 06:57:06,508 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2025-03-09 06:57:06,508 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-09 06:57:06,508 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 9 transitions. [2025-03-09 06:57:06,508 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 06:57:06,508 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 9 transitions. [2025-03-09 06:57:06,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 9 transitions. [2025-03-09 06:57:06,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2025-03-09 06:57:06,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.2857142857142858) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:06,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 9 transitions. [2025-03-09 06:57:06,521 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 9 transitions. [2025-03-09 06:57:06,521 INFO L432 stractBuchiCegarLoop]: Abstraction has 7 states and 9 transitions. [2025-03-09 06:57:06,521 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-09 06:57:06,521 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 9 transitions. [2025-03-09 06:57:06,522 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:06,522 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 06:57:06,522 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 06:57:06,522 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-03-09 06:57:06,522 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-09 06:57:06,522 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-09 06:57:06,522 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-09 06:57:06,522 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:06,522 INFO L85 PathProgramCache]: Analyzing trace with hash 1630494, now seen corresponding path program 1 times [2025-03-09 06:57:06,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:06,523 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [902179079] [2025-03-09 06:57:06,523 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 06:57:06,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:06,526 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-03-09 06:57:06,529 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-03-09 06:57:06,529 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:06,529 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:06,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:06,589 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 06:57:06,589 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [902179079] [2025-03-09 06:57:06,589 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [902179079] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 06:57:06,589 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 06:57:06,589 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 06:57:06,590 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [557369592] [2025-03-09 06:57:06,590 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 06:57:06,591 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 06:57:06,591 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:06,591 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 1 times [2025-03-09 06:57:06,591 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:06,591 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [17718376] [2025-03-09 06:57:06,591 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 06:57:06,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:06,593 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:06,595 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:06,595 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:06,595 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:06,595 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 06:57:06,596 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:06,597 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:06,597 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:06,597 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:06,598 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 06:57:06,640 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 06:57:06,642 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 06:57:06,642 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 06:57:06,643 INFO L87 Difference]: Start difference. First operand 7 states and 9 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:06,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 06:57:06,648 INFO L93 Difference]: Finished difference Result 7 states and 8 transitions. [2025-03-09 06:57:06,648 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7 states and 8 transitions. [2025-03-09 06:57:06,648 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:06,648 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7 states to 7 states and 8 transitions. [2025-03-09 06:57:06,648 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-09 06:57:06,649 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-09 06:57:06,649 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions. [2025-03-09 06:57:06,649 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 06:57:06,649 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2025-03-09 06:57:06,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions. [2025-03-09 06:57:06,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2025-03-09 06:57:06,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:06,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2025-03-09 06:57:06,649 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2025-03-09 06:57:06,650 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 06:57:06,651 INFO L432 stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2025-03-09 06:57:06,651 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-09 06:57:06,651 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2025-03-09 06:57:06,651 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:06,651 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 06:57:06,651 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 06:57:06,651 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-03-09 06:57:06,651 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-09 06:57:06,652 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-09 06:57:06,652 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-09 06:57:06,652 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:06,652 INFO L85 PathProgramCache]: Analyzing trace with hash 50546355, now seen corresponding path program 1 times [2025-03-09 06:57:06,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:06,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [12191414] [2025-03-09 06:57:06,652 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 06:57:06,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:06,655 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-03-09 06:57:06,659 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-03-09 06:57:06,660 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:06,660 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:06,708 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:06,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 06:57:06,708 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [12191414] [2025-03-09 06:57:06,708 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [12191414] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 06:57:06,708 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [76583777] [2025-03-09 06:57:06,708 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 06:57:06,708 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 06:57:06,708 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:06,710 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 06:57:06,712 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-09 06:57:06,734 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-03-09 06:57:06,740 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-03-09 06:57:06,740 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:06,740 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:06,741 INFO L256 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-03-09 06:57:06,741 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 06:57:06,751 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:06,751 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 06:57:06,766 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:06,766 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [76583777] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 06:57:06,766 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 06:57:06,767 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2025-03-09 06:57:06,767 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1449846860] [2025-03-09 06:57:06,767 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 06:57:06,767 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 06:57:06,767 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:06,767 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 2 times [2025-03-09 06:57:06,767 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:06,767 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [940536261] [2025-03-09 06:57:06,767 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 06:57:06,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:06,772 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:06,774 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:06,774 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 06:57:06,774 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:06,774 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 06:57:06,775 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:06,776 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:06,776 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:06,776 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:06,779 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 06:57:06,807 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 06:57:06,808 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-09 06:57:06,808 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-03-09 06:57:06,808 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.4285714285714286) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:06,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 06:57:06,824 INFO L93 Difference]: Finished difference Result 10 states and 11 transitions. [2025-03-09 06:57:06,824 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 11 transitions. [2025-03-09 06:57:06,824 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:06,824 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 10 states and 11 transitions. [2025-03-09 06:57:06,824 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-09 06:57:06,825 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-09 06:57:06,825 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2025-03-09 06:57:06,825 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 06:57:06,825 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2025-03-09 06:57:06,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2025-03-09 06:57:06,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2025-03-09 06:57:06,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:06,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2025-03-09 06:57:06,825 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2025-03-09 06:57:06,827 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-09 06:57:06,828 INFO L432 stractBuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2025-03-09 06:57:06,828 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-09 06:57:06,828 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2025-03-09 06:57:06,829 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:06,829 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 06:57:06,829 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 06:57:06,829 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 1, 1, 1, 1] [2025-03-09 06:57:06,829 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-09 06:57:06,829 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-09 06:57:06,829 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-09 06:57:06,830 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:06,830 INFO L85 PathProgramCache]: Analyzing trace with hash -1706025378, now seen corresponding path program 2 times [2025-03-09 06:57:06,830 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:06,830 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369333919] [2025-03-09 06:57:06,830 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 06:57:06,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:06,839 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 8 statements into 2 equivalence classes. [2025-03-09 06:57:06,845 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 8 of 8 statements. [2025-03-09 06:57:06,845 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-09 06:57:06,845 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:06,966 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:06,966 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 06:57:06,966 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369333919] [2025-03-09 06:57:06,966 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1369333919] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 06:57:06,966 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1666117323] [2025-03-09 06:57:06,966 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 06:57:06,966 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 06:57:06,966 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:06,970 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 06:57:06,970 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-03-09 06:57:06,979 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2025-03-09 06:57:07,002 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 8 statements into 2 equivalence classes. [2025-03-09 06:57:07,017 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 8 of 8 statements. [2025-03-09 06:57:07,017 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-09 06:57:07,017 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:07,017 INFO L256 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-09 06:57:07,018 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 06:57:07,033 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:07,034 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 06:57:07,098 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:07,099 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1666117323] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 06:57:07,099 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 06:57:07,099 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2025-03-09 06:57:07,099 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [349790347] [2025-03-09 06:57:07,099 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 06:57:07,100 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 06:57:07,101 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:07,101 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 3 times [2025-03-09 06:57:07,101 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:07,101 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [7732333] [2025-03-09 06:57:07,101 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 06:57:07,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:07,103 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:07,106 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:07,106 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-09 06:57:07,106 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:07,106 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 06:57:07,107 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:07,109 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:07,109 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:07,110 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:07,112 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 06:57:07,139 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 06:57:07,140 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-09 06:57:07,140 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-03-09 06:57:07,140 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:07,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 06:57:07,162 INFO L93 Difference]: Finished difference Result 16 states and 17 transitions. [2025-03-09 06:57:07,162 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 17 transitions. [2025-03-09 06:57:07,162 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:07,163 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 17 transitions. [2025-03-09 06:57:07,163 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-09 06:57:07,163 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-09 06:57:07,163 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 17 transitions. [2025-03-09 06:57:07,163 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 06:57:07,163 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2025-03-09 06:57:07,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 17 transitions. [2025-03-09 06:57:07,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2025-03-09 06:57:07,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:07,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2025-03-09 06:57:07,164 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2025-03-09 06:57:07,164 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-09 06:57:07,165 INFO L432 stractBuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2025-03-09 06:57:07,165 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-09 06:57:07,165 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2025-03-09 06:57:07,165 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:07,165 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 06:57:07,165 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 06:57:07,165 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 1, 1, 1, 1] [2025-03-09 06:57:07,165 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-09 06:57:07,166 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-09 06:57:07,166 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-09 06:57:07,166 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:07,166 INFO L85 PathProgramCache]: Analyzing trace with hash 828821054, now seen corresponding path program 3 times [2025-03-09 06:57:07,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:07,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723989532] [2025-03-09 06:57:07,168 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 06:57:07,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:07,175 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 14 statements into 6 equivalence classes. [2025-03-09 06:57:07,187 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 14 of 14 statements. [2025-03-09 06:57:07,188 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-09 06:57:07,188 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:07,385 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:07,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 06:57:07,386 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723989532] [2025-03-09 06:57:07,386 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [723989532] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 06:57:07,386 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1063358601] [2025-03-09 06:57:07,386 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 06:57:07,386 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 06:57:07,386 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:07,391 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 06:57:07,392 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-09 06:57:07,432 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 14 statements into 6 equivalence classes. [2025-03-09 06:57:07,482 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 14 of 14 statements. [2025-03-09 06:57:07,482 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-03-09 06:57:07,483 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:07,483 INFO L256 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-09 06:57:07,484 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 06:57:07,516 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:07,517 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 06:57:07,742 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:07,743 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1063358601] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 06:57:07,743 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 06:57:07,743 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2025-03-09 06:57:07,743 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [271068169] [2025-03-09 06:57:07,743 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 06:57:07,743 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 06:57:07,743 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:07,743 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 4 times [2025-03-09 06:57:07,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:07,743 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [389158469] [2025-03-09 06:57:07,743 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 06:57:07,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:07,746 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-09 06:57:07,747 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:07,747 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 06:57:07,747 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:07,748 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 06:57:07,748 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:07,749 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:07,749 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:07,749 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:07,750 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 06:57:07,798 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 06:57:07,798 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-09 06:57:07,798 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-03-09 06:57:07,799 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.12) internal successors, (28), 25 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:07,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 06:57:07,826 INFO L93 Difference]: Finished difference Result 28 states and 29 transitions. [2025-03-09 06:57:07,826 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 29 transitions. [2025-03-09 06:57:07,826 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:07,826 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 29 transitions. [2025-03-09 06:57:07,827 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-09 06:57:07,827 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-09 06:57:07,827 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 29 transitions. [2025-03-09 06:57:07,827 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 06:57:07,827 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2025-03-09 06:57:07,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 29 transitions. [2025-03-09 06:57:07,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2025-03-09 06:57:07,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:07,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2025-03-09 06:57:07,828 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2025-03-09 06:57:07,828 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-03-09 06:57:07,829 INFO L432 stractBuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2025-03-09 06:57:07,829 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-09 06:57:07,829 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2025-03-09 06:57:07,830 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:07,830 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 06:57:07,830 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 06:57:07,830 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 1, 1, 1, 1] [2025-03-09 06:57:07,830 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-09 06:57:07,830 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-09 06:57:07,830 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-09 06:57:07,830 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:07,830 INFO L85 PathProgramCache]: Analyzing trace with hash 908064254, now seen corresponding path program 4 times [2025-03-09 06:57:07,830 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:07,831 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [777811798] [2025-03-09 06:57:07,831 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 06:57:07,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:07,845 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 26 statements into 2 equivalence classes. [2025-03-09 06:57:07,862 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 26 of 26 statements. [2025-03-09 06:57:07,862 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 06:57:07,862 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:08,282 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:08,282 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 06:57:08,282 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [777811798] [2025-03-09 06:57:08,282 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [777811798] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 06:57:08,283 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2032934012] [2025-03-09 06:57:08,283 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 06:57:08,283 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 06:57:08,283 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:08,285 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 06:57:08,286 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-09 06:57:08,339 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 26 statements into 2 equivalence classes. [2025-03-09 06:57:08,369 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 26 of 26 statements. [2025-03-09 06:57:08,369 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 06:57:08,369 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:08,374 INFO L256 TraceCheckSpWp]: Trace formula consists of 286 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-09 06:57:08,377 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 06:57:08,434 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:08,435 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 06:57:09,022 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:09,023 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2032934012] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 06:57:09,023 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 06:57:09,023 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2025-03-09 06:57:09,023 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [197078276] [2025-03-09 06:57:09,023 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 06:57:09,023 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 06:57:09,023 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:09,024 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 5 times [2025-03-09 06:57:09,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:09,024 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [308875251] [2025-03-09 06:57:09,024 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 06:57:09,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:09,026 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:09,027 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:09,027 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 06:57:09,027 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:09,027 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 06:57:09,028 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:09,028 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:09,028 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:09,028 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:09,029 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 06:57:09,061 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 06:57:09,062 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-03-09 06:57:09,063 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2025-03-09 06:57:09,063 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 1.0612244897959184) internal successors, (52), 49 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:09,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 06:57:09,123 INFO L93 Difference]: Finished difference Result 52 states and 53 transitions. [2025-03-09 06:57:09,123 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 53 transitions. [2025-03-09 06:57:09,124 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:09,124 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 52 states and 53 transitions. [2025-03-09 06:57:09,124 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-09 06:57:09,125 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-09 06:57:09,125 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 53 transitions. [2025-03-09 06:57:09,125 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 06:57:09,125 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2025-03-09 06:57:09,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 53 transitions. [2025-03-09 06:57:09,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2025-03-09 06:57:09,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 51 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:09,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2025-03-09 06:57:09,127 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2025-03-09 06:57:09,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-03-09 06:57:09,129 INFO L432 stractBuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2025-03-09 06:57:09,129 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-09 06:57:09,130 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 53 transitions. [2025-03-09 06:57:09,130 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:09,130 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 06:57:09,130 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 06:57:09,131 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 1, 1, 1, 1] [2025-03-09 06:57:09,131 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-09 06:57:09,131 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-09 06:57:09,134 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-09 06:57:09,134 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:09,134 INFO L85 PathProgramCache]: Analyzing trace with hash -280402562, now seen corresponding path program 5 times [2025-03-09 06:57:09,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:09,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110830403] [2025-03-09 06:57:09,135 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 06:57:09,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:09,161 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 50 statements into 24 equivalence classes. [2025-03-09 06:57:09,239 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 50 of 50 statements. [2025-03-09 06:57:09,239 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-03-09 06:57:09,239 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:10,635 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:10,635 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 06:57:10,635 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2110830403] [2025-03-09 06:57:10,635 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2110830403] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 06:57:10,635 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [965858251] [2025-03-09 06:57:10,635 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 06:57:10,635 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 06:57:10,636 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:10,638 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 06:57:10,639 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-09 06:57:10,702 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 50 statements into 24 equivalence classes. [2025-03-09 06:57:27,301 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 50 of 50 statements. [2025-03-09 06:57:27,301 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-03-09 06:57:27,301 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:27,316 INFO L256 TraceCheckSpWp]: Trace formula consists of 550 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-03-09 06:57:27,318 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 06:57:27,388 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:27,388 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 06:57:29,337 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:29,337 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [965858251] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 06:57:29,337 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 06:57:29,337 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 96 [2025-03-09 06:57:29,338 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1839179127] [2025-03-09 06:57:29,338 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 06:57:29,338 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 06:57:29,338 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:29,338 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 6 times [2025-03-09 06:57:29,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:29,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520905348] [2025-03-09 06:57:29,338 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 06:57:29,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:29,341 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:29,342 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:29,342 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-09 06:57:29,342 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:29,342 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 06:57:29,343 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 06:57:29,343 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 06:57:29,343 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 06:57:29,343 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 06:57:29,344 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 06:57:29,366 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 06:57:29,367 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-03-09 06:57:29,370 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-03-09 06:57:29,370 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. cyclomatic complexity: 3 Second operand has 96 states, 96 states have (on average 1.0208333333333333) internal successors, (98), 96 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:29,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 06:57:29,479 INFO L93 Difference]: Finished difference Result 100 states and 101 transitions. [2025-03-09 06:57:29,479 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 101 transitions. [2025-03-09 06:57:29,480 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:29,481 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 101 transitions. [2025-03-09 06:57:29,481 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-03-09 06:57:29,481 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-03-09 06:57:29,481 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 101 transitions. [2025-03-09 06:57:29,481 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 06:57:29,481 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2025-03-09 06:57:29,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 101 transitions. [2025-03-09 06:57:29,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2025-03-09 06:57:29,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.01) internal successors, (101), 99 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 06:57:29,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2025-03-09 06:57:29,489 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2025-03-09 06:57:29,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-03-09 06:57:29,489 INFO L432 stractBuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2025-03-09 06:57:29,489 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-09 06:57:29,489 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 101 transitions. [2025-03-09 06:57:29,491 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-03-09 06:57:29,492 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 06:57:29,492 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 06:57:29,494 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 1, 1, 1, 1] [2025-03-09 06:57:29,495 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-09 06:57:29,495 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_~i~0#1, main_#t~mem5#1, main_~i~1#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~marker~0#1, main_~pos~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_#t~nondet1#1;main_~marker~0#1 := main_#t~nondet1#1;havoc main_#t~nondet1#1;havoc main_#t~nondet2#1;main_~pos~0#1 := main_#t~nondet2#1;havoc main_#t~nondet2#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume main_~i~0#1 < 100000;havoc main_#t~nondet3#1;call write~int#1(main_#t~nondet3#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" "assume !(main_~i~0#1 < 100000);havoc main_~i~0#1;" "assume main_~pos~0#1 >= 0 && main_~pos~0#1 < 100000;call write~int#1(main_~marker~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~pos~0#1, 4);main_~i~1#1 := 0;" [2025-03-09 06:57:29,496 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~1#1, 4);" "assume main_#t~mem5#1 != main_~marker~0#1;havoc main_#t~mem5#1;main_~i~1#1 := 1 + main_~i~1#1;" [2025-03-09 06:57:29,496 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 06:57:29,496 INFO L85 PathProgramCache]: Analyzing trace with hash -658979714, now seen corresponding path program 6 times [2025-03-09 06:57:29,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 06:57:29,496 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1666249188] [2025-03-09 06:57:29,496 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 06:57:29,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 06:57:29,533 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 98 statements into 48 equivalence classes. [2025-03-09 06:57:29,724 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) and asserted 98 of 98 statements. [2025-03-09 06:57:29,724 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) [2025-03-09 06:57:29,724 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 06:57:33,818 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 06:57:33,818 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 06:57:33,818 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1666249188] [2025-03-09 06:57:33,819 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1666249188] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 06:57:33,819 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1055859178] [2025-03-09 06:57:33,819 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 06:57:33,819 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 06:57:33,819 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 06:57:33,822 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 06:57:33,824 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-03-09 06:57:33,944 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 98 statements into 48 equivalence classes.