./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/loop-invgen/string_concat-noarr.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e2fb8bed Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/loop-invgen/string_concat-noarr.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 30a4b942034eaa47a8fcc8fdf4549d1d63a9a60d59b585da2a353c9626604750 --- Real Ultimate output --- This is Ultimate 0.3.0-?-e2fb8be-m [2025-03-09 07:18:51,229 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-09 07:18:51,283 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-09 07:18:51,286 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-09 07:18:51,286 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-09 07:18:51,286 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-09 07:18:51,307 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-09 07:18:51,308 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-09 07:18:51,308 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-09 07:18:51,308 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-09 07:18:51,309 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-09 07:18:51,309 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-09 07:18:51,309 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-09 07:18:51,309 INFO L153 SettingsManager]: * Use SBE=true [2025-03-09 07:18:51,309 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-09 07:18:51,309 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-09 07:18:51,309 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-09 07:18:51,309 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-09 07:18:51,309 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-09 07:18:51,309 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-09 07:18:51,310 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-09 07:18:51,310 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-09 07:18:51,310 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-09 07:18:51,310 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-09 07:18:51,310 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-09 07:18:51,310 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-09 07:18:51,310 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-09 07:18:51,310 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-09 07:18:51,310 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-09 07:18:51,310 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-09 07:18:51,310 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-09 07:18:51,311 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-09 07:18:51,311 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-09 07:18:51,311 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-09 07:18:51,311 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-09 07:18:51,311 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-09 07:18:51,311 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-09 07:18:51,311 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-09 07:18:51,311 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-09 07:18:51,311 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-09 07:18:51,311 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 30a4b942034eaa47a8fcc8fdf4549d1d63a9a60d59b585da2a353c9626604750 [2025-03-09 07:18:51,547 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-09 07:18:51,556 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-09 07:18:51,558 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-09 07:18:51,559 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-09 07:18:51,559 INFO L274 PluginConnector]: CDTParser initialized [2025-03-09 07:18:51,560 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2025-03-09 07:18:52,668 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e44dcb159/a7b54840eb3a44e8976f36633b44e61b/FLAG4854ed65f [2025-03-09 07:18:52,870 INFO L384 CDTParser]: Found 1 translation units. [2025-03-09 07:18:52,878 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2025-03-09 07:18:52,892 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e44dcb159/a7b54840eb3a44e8976f36633b44e61b/FLAG4854ed65f [2025-03-09 07:18:53,246 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e44dcb159/a7b54840eb3a44e8976f36633b44e61b [2025-03-09 07:18:53,248 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-09 07:18:53,251 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-09 07:18:53,252 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-09 07:18:53,252 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-09 07:18:53,255 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-09 07:18:53,255 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,256 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7f1a022e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53, skipping insertion in model container [2025-03-09 07:18:53,256 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,266 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-09 07:18:53,375 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-09 07:18:53,382 INFO L200 MainTranslator]: Completed pre-run [2025-03-09 07:18:53,394 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-09 07:18:53,407 INFO L204 MainTranslator]: Completed translation [2025-03-09 07:18:53,407 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53 WrapperNode [2025-03-09 07:18:53,408 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-09 07:18:53,408 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-09 07:18:53,409 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-09 07:18:53,409 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-09 07:18:53,413 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,417 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,431 INFO L138 Inliner]: procedures = 16, calls = 8, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 52 [2025-03-09 07:18:53,432 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-09 07:18:53,432 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-09 07:18:53,432 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-09 07:18:53,432 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-09 07:18:53,437 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,437 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,439 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,448 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-09 07:18:53,449 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,449 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,452 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,453 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,456 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,456 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,457 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-09 07:18:53,458 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-09 07:18:53,458 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-09 07:18:53,458 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-09 07:18:53,458 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (1/1) ... [2025-03-09 07:18:53,462 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 07:18:53,471 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:53,482 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 07:18:53,486 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-09 07:18:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-09 07:18:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-09 07:18:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-09 07:18:53,506 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-09 07:18:53,550 INFO L256 CfgBuilder]: Building ICFG [2025-03-09 07:18:53,552 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-09 07:18:53,640 INFO L? ?]: Removed 9 outVars from TransFormulas that were not future-live. [2025-03-09 07:18:53,640 INFO L307 CfgBuilder]: Performing block encoding [2025-03-09 07:18:53,650 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-09 07:18:53,650 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-09 07:18:53,650 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:18:53 BoogieIcfgContainer [2025-03-09 07:18:53,650 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-09 07:18:53,651 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-09 07:18:53,651 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-09 07:18:53,655 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-09 07:18:53,655 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:18:53,655 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.03 07:18:53" (1/3) ... [2025-03-09 07:18:53,656 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@145482a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.03 07:18:53, skipping insertion in model container [2025-03-09 07:18:53,656 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:18:53,656 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:18:53" (2/3) ... [2025-03-09 07:18:53,656 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@145482a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.03 07:18:53, skipping insertion in model container [2025-03-09 07:18:53,656 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:18:53,656 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:18:53" (3/3) ... [2025-03-09 07:18:53,657 INFO L363 chiAutomizerObserver]: Analyzing ICFG string_concat-noarr.i [2025-03-09 07:18:53,688 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-09 07:18:53,688 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-09 07:18:53,689 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-09 07:18:53,689 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-09 07:18:53,689 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-09 07:18:53,689 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-09 07:18:53,689 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-09 07:18:53,689 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-09 07:18:53,692 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 17 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:53,702 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 5 [2025-03-09 07:18:53,702 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:53,702 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:53,705 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-09 07:18:53,705 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-09 07:18:53,705 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-09 07:18:53,705 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 17 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:53,706 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 5 [2025-03-09 07:18:53,706 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:53,706 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:53,706 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-03-09 07:18:53,706 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-03-09 07:18:53,711 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" [2025-03-09 07:18:53,711 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" [2025-03-09 07:18:53,714 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:53,715 INFO L85 PathProgramCache]: Analyzing trace with hash 63520, now seen corresponding path program 1 times [2025-03-09 07:18:53,720 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:53,720 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453841172] [2025-03-09 07:18:53,720 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:18:53,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:53,761 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-09 07:18:53,769 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-09 07:18:53,769 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:53,769 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:53,769 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:53,774 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-09 07:18:53,776 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-09 07:18:53,777 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:53,777 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:53,787 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:53,789 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:53,789 INFO L85 PathProgramCache]: Analyzing trace with hash 1920, now seen corresponding path program 1 times [2025-03-09 07:18:53,790 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:53,790 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [66348067] [2025-03-09 07:18:53,790 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:18:53,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:53,796 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:18:53,801 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:18:53,802 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:53,802 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:53,802 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:53,804 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:18:53,805 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:18:53,805 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:53,805 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:53,807 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:53,809 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:53,809 INFO L85 PathProgramCache]: Analyzing trace with hash 61043679, now seen corresponding path program 1 times [2025-03-09 07:18:53,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:53,810 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1827132789] [2025-03-09 07:18:53,810 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:18:53,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:53,815 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-03-09 07:18:53,819 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-03-09 07:18:53,819 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:53,820 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:53,820 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:53,821 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-03-09 07:18:53,823 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-03-09 07:18:53,823 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:53,823 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:53,828 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:53,882 INFO L204 LassoAnalysis]: Preferences: [2025-03-09 07:18:53,882 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-09 07:18:53,882 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-09 07:18:53,882 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-09 07:18:53,882 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-03-09 07:18:53,883 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 07:18:53,883 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-09 07:18:53,883 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-09 07:18:53,883 INFO L132 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2025-03-09 07:18:53,883 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-09 07:18:53,883 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-09 07:18:53,890 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 07:18:53,908 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 07:18:53,912 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 07:18:53,949 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-09 07:18:53,949 INFO L365 LassoAnalysis]: Checking for nontermination... [2025-03-09 07:18:53,951 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 07:18:53,951 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:53,953 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 07:18:53,954 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-03-09 07:18:53,955 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-03-09 07:18:53,955 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-09 07:18:53,975 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2025-03-09 07:18:53,976 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 07:18:53,976 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:53,977 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 07:18:53,979 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-03-09 07:18:53,980 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-03-09 07:18:53,980 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-03-09 07:18:54,003 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2025-03-09 07:18:54,007 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2025-03-09 07:18:54,007 INFO L204 LassoAnalysis]: Preferences: [2025-03-09 07:18:54,007 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-03-09 07:18:54,007 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-03-09 07:18:54,007 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-03-09 07:18:54,007 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-03-09 07:18:54,007 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 07:18:54,007 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-03-09 07:18:54,007 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-03-09 07:18:54,007 INFO L132 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2025-03-09 07:18:54,007 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-03-09 07:18:54,007 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-03-09 07:18:54,008 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 07:18:54,017 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 07:18:54,019 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-03-09 07:18:54,045 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-03-09 07:18:54,048 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-03-09 07:18:54,049 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 07:18:54,049 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:54,051 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 07:18:54,052 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-03-09 07:18:54,054 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-03-09 07:18:54,065 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-03-09 07:18:54,065 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-03-09 07:18:54,066 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-03-09 07:18:54,066 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-03-09 07:18:54,067 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-03-09 07:18:54,074 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-03-09 07:18:54,075 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-03-09 07:18:54,077 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-03-09 07:18:54,081 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2025-03-09 07:18:54,083 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2025-03-09 07:18:54,084 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 07:18:54,084 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:54,086 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 07:18:54,089 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-03-09 07:18:54,090 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-03-09 07:18:54,090 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2025-03-09 07:18:54,090 INFO L474 LassoAnalysis]: Proved termination. [2025-03-09 07:18:54,091 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1) = -2*ULTIMATE.start_main_~i~0#1 + 1999999 Supporting invariants [] [2025-03-09 07:18:54,096 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2025-03-09 07:18:54,098 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2025-03-09 07:18:54,121 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:54,127 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-03-09 07:18:54,130 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-03-09 07:18:54,130 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,130 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:54,131 INFO L256 TraceCheckSpWp]: Trace formula consists of 20 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-03-09 07:18:54,131 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:18:54,140 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:18:54,142 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:18:54,142 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,142 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:54,142 WARN L254 TraceCheckSpWp]: Trace formula consists of 7 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-03-09 07:18:54,143 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:18:54,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,167 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2025-03-09 07:18:54,169 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 18 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 17 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:54,208 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 18 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 17 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 41 states and 58 transitions. Complement of second has 6 states. [2025-03-09 07:18:54,209 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-03-09 07:18:54,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:54,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 34 transitions. [2025-03-09 07:18:54,218 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 34 transitions. Stem has 3 letters. Loop has 2 letters. [2025-03-09 07:18:54,220 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-09 07:18:54,220 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 34 transitions. Stem has 5 letters. Loop has 2 letters. [2025-03-09 07:18:54,220 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-09 07:18:54,221 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 34 transitions. Stem has 3 letters. Loop has 4 letters. [2025-03-09 07:18:54,221 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-03-09 07:18:54,221 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 58 transitions. [2025-03-09 07:18:54,223 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-03-09 07:18:54,226 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 18 states and 23 transitions. [2025-03-09 07:18:54,226 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-03-09 07:18:54,226 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2025-03-09 07:18:54,227 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 23 transitions. [2025-03-09 07:18:54,227 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:18:54,227 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 23 transitions. [2025-03-09 07:18:54,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 23 transitions. [2025-03-09 07:18:54,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 16. [2025-03-09 07:18:54,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.3125) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:54,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 21 transitions. [2025-03-09 07:18:54,241 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 21 transitions. [2025-03-09 07:18:54,242 INFO L432 stractBuchiCegarLoop]: Abstraction has 16 states and 21 transitions. [2025-03-09 07:18:54,242 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-09 07:18:54,242 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 21 transitions. [2025-03-09 07:18:54,242 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:54,242 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:54,242 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:54,242 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2025-03-09 07:18:54,242 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:18:54,243 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-09 07:18:54,243 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:18:54,243 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:54,243 INFO L85 PathProgramCache]: Analyzing trace with hash 1892354041, now seen corresponding path program 1 times [2025-03-09 07:18:54,243 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:54,243 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114456361] [2025-03-09 07:18:54,243 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:18:54,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:54,246 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-09 07:18:54,249 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-09 07:18:54,249 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,249 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:54,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,308 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:18:54,309 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114456361] [2025-03-09 07:18:54,309 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [114456361] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:18:54,309 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:18:54,309 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-09 07:18:54,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [618039390] [2025-03-09 07:18:54,310 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:18:54,311 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:18:54,311 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:54,311 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 1 times [2025-03-09 07:18:54,311 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:54,311 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1646117973] [2025-03-09 07:18:54,311 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:18:54,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:54,315 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:54,316 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:54,316 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,316 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:54,316 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:54,316 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:54,317 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:54,317 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,317 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:54,317 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:54,321 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:18:54,322 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:18:54,323 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:18:54,323 INFO L87 Difference]: Start difference. First operand 16 states and 21 transitions. cyclomatic complexity: 8 Second operand has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:54,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:18:54,346 INFO L93 Difference]: Finished difference Result 26 states and 32 transitions. [2025-03-09 07:18:54,346 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 32 transitions. [2025-03-09 07:18:54,346 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-03-09 07:18:54,347 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 26 states and 32 transitions. [2025-03-09 07:18:54,347 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2025-03-09 07:18:54,347 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2025-03-09 07:18:54,347 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 32 transitions. [2025-03-09 07:18:54,347 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:18:54,347 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 32 transitions. [2025-03-09 07:18:54,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 32 transitions. [2025-03-09 07:18:54,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 18. [2025-03-09 07:18:54,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 17 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:54,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 23 transitions. [2025-03-09 07:18:54,348 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 23 transitions. [2025-03-09 07:18:54,349 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:18:54,350 INFO L432 stractBuchiCegarLoop]: Abstraction has 18 states and 23 transitions. [2025-03-09 07:18:54,350 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-09 07:18:54,350 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 23 transitions. [2025-03-09 07:18:54,351 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:54,351 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:54,351 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:54,351 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1] [2025-03-09 07:18:54,351 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:18:54,351 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-09 07:18:54,351 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:18:54,352 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:54,352 INFO L85 PathProgramCache]: Analyzing trace with hash 1781104602, now seen corresponding path program 1 times [2025-03-09 07:18:54,352 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:54,352 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [966343040] [2025-03-09 07:18:54,352 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:18:54,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:54,357 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-03-09 07:18:54,362 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-03-09 07:18:54,362 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,362 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:54,394 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,394 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:18:54,394 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [966343040] [2025-03-09 07:18:54,394 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [966343040] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:18:54,394 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2120139497] [2025-03-09 07:18:54,395 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:18:54,395 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:18:54,395 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:54,397 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:18:54,398 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-03-09 07:18:54,417 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-03-09 07:18:54,421 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-03-09 07:18:54,421 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,421 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:54,421 INFO L256 TraceCheckSpWp]: Trace formula consists of 28 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-03-09 07:18:54,422 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:18:54,441 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,441 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:18:54,461 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,461 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2120139497] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:18:54,461 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:18:54,461 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-03-09 07:18:54,461 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119835888] [2025-03-09 07:18:54,461 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:18:54,461 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:18:54,462 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:54,462 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 2 times [2025-03-09 07:18:54,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:54,462 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1992051731] [2025-03-09 07:18:54,462 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:18:54,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:54,464 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:54,464 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:54,464 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:18:54,464 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:54,464 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:54,464 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:54,465 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:54,465 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,465 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:54,465 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:54,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:18:54,467 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-09 07:18:54,467 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-03-09 07:18:54,467 INFO L87 Difference]: Start difference. First operand 18 states and 23 transitions. cyclomatic complexity: 8 Second operand has 7 states, 6 states have (on average 2.8333333333333335) internal successors, (17), 7 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:54,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:18:54,502 INFO L93 Difference]: Finished difference Result 60 states and 75 transitions. [2025-03-09 07:18:54,503 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 60 states and 75 transitions. [2025-03-09 07:18:54,504 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 5 [2025-03-09 07:18:54,505 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 60 states to 60 states and 75 transitions. [2025-03-09 07:18:54,505 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 33 [2025-03-09 07:18:54,506 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 33 [2025-03-09 07:18:54,506 INFO L73 IsDeterministic]: Start isDeterministic. Operand 60 states and 75 transitions. [2025-03-09 07:18:54,506 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:18:54,506 INFO L218 hiAutomatonCegarLoop]: Abstraction has 60 states and 75 transitions. [2025-03-09 07:18:54,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states and 75 transitions. [2025-03-09 07:18:54,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 24. [2025-03-09 07:18:54,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.4583333333333333) internal successors, (35), 23 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:54,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 35 transitions. [2025-03-09 07:18:54,507 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 35 transitions. [2025-03-09 07:18:54,509 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-09 07:18:54,510 INFO L432 stractBuchiCegarLoop]: Abstraction has 24 states and 35 transitions. [2025-03-09 07:18:54,510 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-09 07:18:54,510 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 35 transitions. [2025-03-09 07:18:54,510 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:54,510 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:54,510 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:54,511 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:18:54,511 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:18:54,511 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-09 07:18:54,511 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:18:54,511 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:54,512 INFO L85 PathProgramCache]: Analyzing trace with hash -621413485, now seen corresponding path program 1 times [2025-03-09 07:18:54,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:54,513 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220137229] [2025-03-09 07:18:54,513 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:18:54,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:54,517 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-03-09 07:18:54,521 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-03-09 07:18:54,521 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,521 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:54,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,550 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:18:54,550 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220137229] [2025-03-09 07:18:54,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [220137229] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:18:54,550 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:18:54,551 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-09 07:18:54,551 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [115297315] [2025-03-09 07:18:54,551 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:18:54,551 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:18:54,551 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:54,551 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 3 times [2025-03-09 07:18:54,551 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:54,551 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [609614415] [2025-03-09 07:18:54,551 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:18:54,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:54,553 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:54,553 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:54,553 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-09 07:18:54,553 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:54,553 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:54,554 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:54,554 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:54,554 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,554 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:54,554 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:54,556 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:18:54,556 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:18:54,556 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:18:54,557 INFO L87 Difference]: Start difference. First operand 24 states and 35 transitions. cyclomatic complexity: 14 Second operand has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:54,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:18:54,561 INFO L93 Difference]: Finished difference Result 27 states and 37 transitions. [2025-03-09 07:18:54,561 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 37 transitions. [2025-03-09 07:18:54,562 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:54,562 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 22 states and 28 transitions. [2025-03-09 07:18:54,562 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-03-09 07:18:54,562 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-03-09 07:18:54,562 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 28 transitions. [2025-03-09 07:18:54,562 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:18:54,562 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 28 transitions. [2025-03-09 07:18:54,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 28 transitions. [2025-03-09 07:18:54,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2025-03-09 07:18:54,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.2857142857142858) internal successors, (27), 20 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:54,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 27 transitions. [2025-03-09 07:18:54,564 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21 states and 27 transitions. [2025-03-09 07:18:54,564 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:18:54,565 INFO L432 stractBuchiCegarLoop]: Abstraction has 21 states and 27 transitions. [2025-03-09 07:18:54,565 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-09 07:18:54,565 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 27 transitions. [2025-03-09 07:18:54,565 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:54,565 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:54,565 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:54,565 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:18:54,565 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:18:54,565 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-09 07:18:54,565 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:18:54,566 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:54,566 INFO L85 PathProgramCache]: Analyzing trace with hash -177867884, now seen corresponding path program 1 times [2025-03-09 07:18:54,566 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:54,566 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [275100864] [2025-03-09 07:18:54,566 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:18:54,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:54,568 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-03-09 07:18:54,572 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-03-09 07:18:54,572 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,572 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:54,614 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,615 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:18:54,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [275100864] [2025-03-09 07:18:54,615 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [275100864] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:18:54,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [321945612] [2025-03-09 07:18:54,615 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:18:54,615 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:18:54,615 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:54,618 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:18:54,619 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-03-09 07:18:54,641 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-03-09 07:18:54,646 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-03-09 07:18:54,646 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,646 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:54,646 INFO L256 TraceCheckSpWp]: Trace formula consists of 35 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-03-09 07:18:54,647 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:18:54,662 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,662 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:18:54,681 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,681 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [321945612] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:18:54,681 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:18:54,681 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-03-09 07:18:54,682 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [597931267] [2025-03-09 07:18:54,682 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:18:54,682 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:18:54,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:54,682 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 4 times [2025-03-09 07:18:54,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:54,682 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [881090971] [2025-03-09 07:18:54,682 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:18:54,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:54,688 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-09 07:18:54,688 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:54,689 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:18:54,689 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:54,689 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:54,689 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:54,689 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:54,689 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,689 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:54,689 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:54,692 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:18:54,693 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-09 07:18:54,693 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-03-09 07:18:54,693 INFO L87 Difference]: Start difference. First operand 21 states and 27 transitions. cyclomatic complexity: 9 Second operand has 7 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 7 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:54,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:18:54,707 INFO L93 Difference]: Finished difference Result 34 states and 40 transitions. [2025-03-09 07:18:54,707 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 40 transitions. [2025-03-09 07:18:54,707 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:54,707 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 28 states and 34 transitions. [2025-03-09 07:18:54,708 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-03-09 07:18:54,708 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-03-09 07:18:54,708 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 34 transitions. [2025-03-09 07:18:54,708 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:18:54,708 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 34 transitions. [2025-03-09 07:18:54,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 34 transitions. [2025-03-09 07:18:54,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 27. [2025-03-09 07:18:54,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 26 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:54,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 33 transitions. [2025-03-09 07:18:54,710 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 33 transitions. [2025-03-09 07:18:54,711 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-09 07:18:54,712 INFO L432 stractBuchiCegarLoop]: Abstraction has 27 states and 33 transitions. [2025-03-09 07:18:54,712 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-09 07:18:54,712 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 33 transitions. [2025-03-09 07:18:54,712 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:54,712 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:54,712 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:54,712 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 1, 1, 1, 1, 1] [2025-03-09 07:18:54,712 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:18:54,712 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-09 07:18:54,712 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:18:54,713 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:54,713 INFO L85 PathProgramCache]: Analyzing trace with hash -1204130307, now seen corresponding path program 2 times [2025-03-09 07:18:54,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:54,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1312253056] [2025-03-09 07:18:54,713 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:18:54,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:54,717 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 14 statements into 2 equivalence classes. [2025-03-09 07:18:54,726 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 14 of 14 statements. [2025-03-09 07:18:54,726 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-09 07:18:54,726 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:54,756 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-03-09 07:18:54,815 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,816 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:18:54,816 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1312253056] [2025-03-09 07:18:54,816 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1312253056] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:18:54,816 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1174982240] [2025-03-09 07:18:54,816 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:18:54,816 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:18:54,816 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:54,818 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:18:54,819 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-03-09 07:18:54,840 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 14 statements into 2 equivalence classes. [2025-03-09 07:18:54,847 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 14 of 14 statements. [2025-03-09 07:18:54,847 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-09 07:18:54,847 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:54,848 INFO L256 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-09 07:18:54,848 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:18:54,873 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,873 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:18:54,939 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:54,940 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1174982240] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:18:54,940 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:18:54,940 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-03-09 07:18:54,940 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1988469849] [2025-03-09 07:18:54,940 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:18:54,940 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:18:54,940 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:54,944 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 5 times [2025-03-09 07:18:54,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:54,944 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [878762346] [2025-03-09 07:18:54,944 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:18:54,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:54,946 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:54,946 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:54,946 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:18:54,946 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:54,946 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:54,947 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:54,947 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:54,947 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:54,947 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:54,947 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:54,952 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:18:54,952 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-09 07:18:54,952 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-03-09 07:18:54,952 INFO L87 Difference]: Start difference. First operand 27 states and 33 transitions. cyclomatic complexity: 9 Second operand has 13 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 13 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:55,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:18:55,034 INFO L93 Difference]: Finished difference Result 152 states and 171 transitions. [2025-03-09 07:18:55,034 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 152 states and 171 transitions. [2025-03-09 07:18:55,035 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 7 [2025-03-09 07:18:55,036 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 152 states to 140 states and 159 transitions. [2025-03-09 07:18:55,036 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2025-03-09 07:18:55,036 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2025-03-09 07:18:55,036 INFO L73 IsDeterministic]: Start isDeterministic. Operand 140 states and 159 transitions. [2025-03-09 07:18:55,036 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:18:55,036 INFO L218 hiAutomatonCegarLoop]: Abstraction has 140 states and 159 transitions. [2025-03-09 07:18:55,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states and 159 transitions. [2025-03-09 07:18:55,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 39. [2025-03-09 07:18:55,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.3076923076923077) internal successors, (51), 38 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:55,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 51 transitions. [2025-03-09 07:18:55,039 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39 states and 51 transitions. [2025-03-09 07:18:55,039 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-09 07:18:55,040 INFO L432 stractBuchiCegarLoop]: Abstraction has 39 states and 51 transitions. [2025-03-09 07:18:55,040 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-09 07:18:55,040 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 51 transitions. [2025-03-09 07:18:55,040 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:55,040 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:55,040 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:55,041 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:18:55,041 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:18:55,041 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-09 07:18:55,041 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:18:55,041 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:55,041 INFO L85 PathProgramCache]: Analyzing trace with hash -1359597033, now seen corresponding path program 2 times [2025-03-09 07:18:55,041 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:55,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [484392991] [2025-03-09 07:18:55,042 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:18:55,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:55,044 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 17 statements into 2 equivalence classes. [2025-03-09 07:18:55,051 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 17 of 17 statements. [2025-03-09 07:18:55,051 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-09 07:18:55,052 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:55,112 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:55,112 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:18:55,112 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [484392991] [2025-03-09 07:18:55,112 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [484392991] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:18:55,112 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1675663813] [2025-03-09 07:18:55,112 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:18:55,112 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:18:55,113 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:55,115 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:18:55,116 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-03-09 07:18:55,140 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 17 statements into 2 equivalence classes. [2025-03-09 07:18:55,146 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 17 of 17 statements. [2025-03-09 07:18:55,147 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-09 07:18:55,147 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:55,147 INFO L256 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-03-09 07:18:55,148 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:18:55,171 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:55,171 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:18:55,233 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:55,233 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1675663813] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:18:55,233 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:18:55,233 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-03-09 07:18:55,233 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007045402] [2025-03-09 07:18:55,233 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:18:55,233 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:18:55,233 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:55,233 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 6 times [2025-03-09 07:18:55,233 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:55,233 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [275289242] [2025-03-09 07:18:55,233 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:18:55,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:55,235 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:55,235 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:55,235 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-09 07:18:55,235 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:55,235 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:55,236 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:55,236 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:55,236 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:55,236 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:55,236 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:55,237 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:18:55,238 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-03-09 07:18:55,238 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-03-09 07:18:55,238 INFO L87 Difference]: Start difference. First operand 39 states and 51 transitions. cyclomatic complexity: 15 Second operand has 13 states, 12 states have (on average 2.6666666666666665) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:55,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:18:55,262 INFO L93 Difference]: Finished difference Result 64 states and 76 transitions. [2025-03-09 07:18:55,262 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 64 states and 76 transitions. [2025-03-09 07:18:55,262 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:55,263 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 64 states to 52 states and 64 transitions. [2025-03-09 07:18:55,263 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-03-09 07:18:55,263 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-03-09 07:18:55,263 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 64 transitions. [2025-03-09 07:18:55,263 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:18:55,263 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 64 transitions. [2025-03-09 07:18:55,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 64 transitions. [2025-03-09 07:18:55,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 51. [2025-03-09 07:18:55,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.2352941176470589) internal successors, (63), 50 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:55,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 63 transitions. [2025-03-09 07:18:55,266 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 63 transitions. [2025-03-09 07:18:55,266 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-09 07:18:55,267 INFO L432 stractBuchiCegarLoop]: Abstraction has 51 states and 63 transitions. [2025-03-09 07:18:55,267 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-09 07:18:55,267 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 63 transitions. [2025-03-09 07:18:55,267 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:55,267 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:55,267 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:55,268 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 1, 1, 1, 1, 1] [2025-03-09 07:18:55,268 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:18:55,268 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-09 07:18:55,268 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:18:55,268 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:55,268 INFO L85 PathProgramCache]: Analyzing trace with hash -1562327165, now seen corresponding path program 3 times [2025-03-09 07:18:55,268 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:55,268 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148936239] [2025-03-09 07:18:55,268 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:18:55,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:55,272 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 26 statements into 11 equivalence classes. [2025-03-09 07:18:55,282 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 26 of 26 statements. [2025-03-09 07:18:55,284 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-09 07:18:55,284 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:55,428 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:55,428 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:18:55,428 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [148936239] [2025-03-09 07:18:55,428 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [148936239] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:18:55,428 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1791226277] [2025-03-09 07:18:55,428 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:18:55,428 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:18:55,429 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:55,431 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:18:55,432 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-09 07:18:55,452 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 26 statements into 11 equivalence classes. [2025-03-09 07:18:55,461 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 26 of 26 statements. [2025-03-09 07:18:55,461 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-09 07:18:55,461 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:55,462 INFO L256 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-09 07:18:55,463 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:18:55,515 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:55,515 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:18:55,735 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:55,735 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1791226277] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:18:55,735 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:18:55,735 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-03-09 07:18:55,735 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2140474379] [2025-03-09 07:18:55,736 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:18:55,736 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:18:55,736 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:55,736 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 7 times [2025-03-09 07:18:55,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:55,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113954025] [2025-03-09 07:18:55,736 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-09 07:18:55,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:55,738 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:55,738 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:55,738 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:55,738 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:55,738 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:55,739 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:55,739 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:55,739 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:55,739 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:55,739 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:55,741 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:18:55,741 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-09 07:18:55,741 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-03-09 07:18:55,742 INFO L87 Difference]: Start difference. First operand 51 states and 63 transitions. cyclomatic complexity: 15 Second operand has 25 states, 24 states have (on average 2.2083333333333335) internal successors, (53), 25 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:55,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:18:55,899 INFO L93 Difference]: Finished difference Result 518 states and 555 transitions. [2025-03-09 07:18:55,899 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 518 states and 555 transitions. [2025-03-09 07:18:55,903 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 13 [2025-03-09 07:18:55,905 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 518 states to 494 states and 531 transitions. [2025-03-09 07:18:55,906 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 45 [2025-03-09 07:18:55,906 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 45 [2025-03-09 07:18:55,906 INFO L73 IsDeterministic]: Start isDeterministic. Operand 494 states and 531 transitions. [2025-03-09 07:18:55,906 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:18:55,906 INFO L218 hiAutomatonCegarLoop]: Abstraction has 494 states and 531 transitions. [2025-03-09 07:18:55,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states and 531 transitions. [2025-03-09 07:18:55,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 75. [2025-03-09 07:18:55,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 75 states have (on average 1.32) internal successors, (99), 74 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:55,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 99 transitions. [2025-03-09 07:18:55,914 INFO L240 hiAutomatonCegarLoop]: Abstraction has 75 states and 99 transitions. [2025-03-09 07:18:55,916 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-03-09 07:18:55,917 INFO L432 stractBuchiCegarLoop]: Abstraction has 75 states and 99 transitions. [2025-03-09 07:18:55,917 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-09 07:18:55,917 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 99 transitions. [2025-03-09 07:18:55,917 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:55,917 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:55,917 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:55,918 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:18:55,918 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:18:55,918 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-09 07:18:55,918 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:18:55,918 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:55,918 INFO L85 PathProgramCache]: Analyzing trace with hash 2061489245, now seen corresponding path program 3 times [2025-03-09 07:18:55,919 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:55,919 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [788683251] [2025-03-09 07:18:55,919 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:18:55,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:55,922 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 29 statements into 11 equivalence classes. [2025-03-09 07:18:55,932 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 29 of 29 statements. [2025-03-09 07:18:55,932 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-09 07:18:55,932 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:56,046 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:56,046 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:18:56,046 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [788683251] [2025-03-09 07:18:56,046 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [788683251] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:18:56,046 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1235817040] [2025-03-09 07:18:56,046 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:18:56,047 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:18:56,047 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:56,049 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:18:56,050 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-03-09 07:18:56,071 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 29 statements into 11 equivalence classes. [2025-03-09 07:18:56,082 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 29 of 29 statements. [2025-03-09 07:18:56,082 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-03-09 07:18:56,082 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:56,083 INFO L256 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-09 07:18:56,084 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:18:56,124 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:56,125 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:18:56,308 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:56,308 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1235817040] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:18:56,308 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:18:56,309 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-03-09 07:18:56,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034802440] [2025-03-09 07:18:56,309 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:18:56,309 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:18:56,309 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:56,309 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 8 times [2025-03-09 07:18:56,309 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:56,310 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008167807] [2025-03-09 07:18:56,310 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:18:56,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:56,311 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:56,311 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:56,311 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:18:56,311 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:56,311 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:56,312 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:56,312 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:56,312 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:56,312 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:56,312 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:56,321 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:18:56,321 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-03-09 07:18:56,321 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-03-09 07:18:56,322 INFO L87 Difference]: Start difference. First operand 75 states and 99 transitions. cyclomatic complexity: 27 Second operand has 25 states, 24 states have (on average 2.3333333333333335) internal successors, (56), 25 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:56,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:18:56,349 INFO L93 Difference]: Finished difference Result 124 states and 148 transitions. [2025-03-09 07:18:56,349 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 124 states and 148 transitions. [2025-03-09 07:18:56,350 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:56,350 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 124 states to 100 states and 124 transitions. [2025-03-09 07:18:56,350 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-03-09 07:18:56,350 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-03-09 07:18:56,350 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 124 transitions. [2025-03-09 07:18:56,350 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:18:56,350 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 124 transitions. [2025-03-09 07:18:56,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 124 transitions. [2025-03-09 07:18:56,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 99. [2025-03-09 07:18:56,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.2424242424242424) internal successors, (123), 98 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:56,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 123 transitions. [2025-03-09 07:18:56,353 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 123 transitions. [2025-03-09 07:18:56,353 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-03-09 07:18:56,354 INFO L432 stractBuchiCegarLoop]: Abstraction has 99 states and 123 transitions. [2025-03-09 07:18:56,354 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-09 07:18:56,354 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 123 transitions. [2025-03-09 07:18:56,354 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:56,354 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:56,354 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:56,355 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 1, 1, 1, 1, 1] [2025-03-09 07:18:56,355 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:18:56,355 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-09 07:18:56,355 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:18:56,356 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:56,356 INFO L85 PathProgramCache]: Analyzing trace with hash -15552625, now seen corresponding path program 4 times [2025-03-09 07:18:56,356 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:56,356 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933783313] [2025-03-09 07:18:56,356 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:18:56,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:56,360 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 50 statements into 2 equivalence classes. [2025-03-09 07:18:56,368 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 50 of 50 statements. [2025-03-09 07:18:56,368 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:18:56,368 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:56,726 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:56,727 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:18:56,727 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933783313] [2025-03-09 07:18:56,727 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [933783313] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:18:56,727 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [717020012] [2025-03-09 07:18:56,727 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:18:56,727 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:18:56,727 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:56,729 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:18:56,731 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-09 07:18:56,757 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 50 statements into 2 equivalence classes. [2025-03-09 07:18:56,770 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 50 of 50 statements. [2025-03-09 07:18:56,771 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:18:56,771 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:56,771 INFO L256 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-09 07:18:56,773 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:18:56,847 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:56,847 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:18:57,493 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:57,494 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [717020012] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:18:57,494 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:18:57,494 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 47 [2025-03-09 07:18:57,494 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [754983178] [2025-03-09 07:18:57,494 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:18:57,495 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:18:57,495 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:57,495 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 9 times [2025-03-09 07:18:57,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:57,495 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638656125] [2025-03-09 07:18:57,495 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:18:57,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:57,497 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:57,498 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:57,498 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-09 07:18:57,498 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:57,498 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:57,498 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:57,498 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:57,498 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:57,498 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:57,498 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:57,500 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:18:57,501 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2025-03-09 07:18:57,501 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2025-03-09 07:18:57,502 INFO L87 Difference]: Start difference. First operand 99 states and 123 transitions. cyclomatic complexity: 27 Second operand has 48 states, 47 states have (on average 2.0851063829787235) internal successors, (98), 48 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:57,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:18:57,853 INFO L93 Difference]: Finished difference Result 1898 states and 1971 transitions. [2025-03-09 07:18:57,853 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1898 states and 1971 transitions. [2025-03-09 07:18:57,863 INFO L131 ngComponentsAnalysis]: Automaton has 25 accepting balls. 25 [2025-03-09 07:18:57,870 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1898 states to 1850 states and 1923 transitions. [2025-03-09 07:18:57,870 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 81 [2025-03-09 07:18:57,870 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 81 [2025-03-09 07:18:57,870 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1850 states and 1923 transitions. [2025-03-09 07:18:57,870 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:18:57,870 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1850 states and 1923 transitions. [2025-03-09 07:18:57,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1850 states and 1923 transitions. [2025-03-09 07:18:57,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1850 to 147. [2025-03-09 07:18:57,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 147 states have (on average 1.3265306122448979) internal successors, (195), 146 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:57,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 195 transitions. [2025-03-09 07:18:57,881 INFO L240 hiAutomatonCegarLoop]: Abstraction has 147 states and 195 transitions. [2025-03-09 07:18:57,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-03-09 07:18:57,882 INFO L432 stractBuchiCegarLoop]: Abstraction has 147 states and 195 transitions. [2025-03-09 07:18:57,882 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-09 07:18:57,882 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 147 states and 195 transitions. [2025-03-09 07:18:57,883 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:57,883 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:57,883 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:57,884 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:18:57,884 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:18:57,884 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-09 07:18:57,884 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:18:57,884 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:57,884 INFO L85 PathProgramCache]: Analyzing trace with hash 1779625449, now seen corresponding path program 4 times [2025-03-09 07:18:57,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:57,885 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [859332878] [2025-03-09 07:18:57,885 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:18:57,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:57,891 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 53 statements into 2 equivalence classes. [2025-03-09 07:18:57,901 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 53 of 53 statements. [2025-03-09 07:18:57,901 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:18:57,901 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:58,240 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:58,240 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:18:58,240 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [859332878] [2025-03-09 07:18:58,240 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [859332878] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:18:58,240 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [113530611] [2025-03-09 07:18:58,240 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:18:58,240 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:18:58,240 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:58,242 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:18:58,243 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-09 07:18:58,265 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 53 statements into 2 equivalence classes. [2025-03-09 07:18:58,279 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 53 of 53 statements. [2025-03-09 07:18:58,279 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:18:58,279 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:58,280 INFO L256 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-09 07:18:58,282 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:18:58,342 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:58,342 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:18:58,861 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:58,861 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [113530611] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:18:58,861 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:18:58,861 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 48 [2025-03-09 07:18:58,861 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1572807516] [2025-03-09 07:18:58,861 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:18:58,861 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:18:58,861 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:58,861 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 10 times [2025-03-09 07:18:58,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:58,861 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2036897238] [2025-03-09 07:18:58,861 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:18:58,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:58,863 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-03-09 07:18:58,863 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:58,863 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:18:58,863 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:58,863 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:18:58,863 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:18:58,863 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:18:58,863 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:18:58,863 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:18:58,863 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:18:58,866 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:18:58,866 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-03-09 07:18:58,867 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2025-03-09 07:18:58,867 INFO L87 Difference]: Start difference. First operand 147 states and 195 transitions. cyclomatic complexity: 51 Second operand has 49 states, 48 states have (on average 2.1666666666666665) internal successors, (104), 49 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:58,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:18:58,913 INFO L93 Difference]: Finished difference Result 244 states and 292 transitions. [2025-03-09 07:18:58,913 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 244 states and 292 transitions. [2025-03-09 07:18:58,914 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:58,915 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 244 states to 196 states and 244 transitions. [2025-03-09 07:18:58,915 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-03-09 07:18:58,915 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-03-09 07:18:58,915 INFO L73 IsDeterministic]: Start isDeterministic. Operand 196 states and 244 transitions. [2025-03-09 07:18:58,915 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:18:58,915 INFO L218 hiAutomatonCegarLoop]: Abstraction has 196 states and 244 transitions. [2025-03-09 07:18:58,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states and 244 transitions. [2025-03-09 07:18:58,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 195. [2025-03-09 07:18:58,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.2461538461538462) internal successors, (243), 194 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:18:58,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 243 transitions. [2025-03-09 07:18:58,919 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195 states and 243 transitions. [2025-03-09 07:18:58,920 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-03-09 07:18:58,920 INFO L432 stractBuchiCegarLoop]: Abstraction has 195 states and 243 transitions. [2025-03-09 07:18:58,920 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-09 07:18:58,920 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 243 transitions. [2025-03-09 07:18:58,921 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:18:58,921 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:18:58,921 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:18:58,922 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 1, 1, 1, 1, 1] [2025-03-09 07:18:58,922 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:18:58,922 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-09 07:18:58,923 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:18:58,923 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:18:58,923 INFO L85 PathProgramCache]: Analyzing trace with hash -1803201625, now seen corresponding path program 5 times [2025-03-09 07:18:58,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:18:58,923 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1756009203] [2025-03-09 07:18:58,923 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:18:58,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:18:58,927 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 98 statements into 47 equivalence classes. [2025-03-09 07:18:58,946 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 98 of 98 statements. [2025-03-09 07:18:58,946 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-09 07:18:58,946 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:18:59,959 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:18:59,959 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:18:59,959 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1756009203] [2025-03-09 07:18:59,960 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1756009203] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:18:59,960 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1753263877] [2025-03-09 07:18:59,960 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:18:59,960 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:18:59,960 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:18:59,964 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:18:59,965 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-09 07:18:59,990 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 98 statements into 47 equivalence classes. [2025-03-09 07:19:00,021 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 98 of 98 statements. [2025-03-09 07:19:00,022 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-09 07:19:00,022 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:19:00,024 INFO L256 TraceCheckSpWp]: Trace formula consists of 253 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-03-09 07:19:00,027 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:19:00,156 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:19:00,156 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:19:02,064 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:19:02,064 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1753263877] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:19:02,064 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:19:02,064 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2025-03-09 07:19:02,064 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [21733755] [2025-03-09 07:19:02,064 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:19:02,065 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:19:02,065 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:19:02,065 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 11 times [2025-03-09 07:19:02,065 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:19:02,065 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818152656] [2025-03-09 07:19:02,065 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:19:02,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:19:02,066 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:19:02,066 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:19:02,066 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:19:02,066 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:02,066 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:19:02,067 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:19:02,067 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:19:02,067 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:02,067 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:02,067 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:19:02,069 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:19:02,069 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-03-09 07:19:02,072 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-03-09 07:19:02,072 INFO L87 Difference]: Start difference. First operand 195 states and 243 transitions. cyclomatic complexity: 51 Second operand has 96 states, 95 states have (on average 2.042105263157895) internal successors, (194), 96 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:19:03,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:19:03,262 INFO L93 Difference]: Finished difference Result 7250 states and 7395 transitions. [2025-03-09 07:19:03,262 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7250 states and 7395 transitions. [2025-03-09 07:19:03,309 INFO L131 ngComponentsAnalysis]: Automaton has 49 accepting balls. 49 [2025-03-09 07:19:03,328 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7250 states to 7154 states and 7299 transitions. [2025-03-09 07:19:03,329 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 153 [2025-03-09 07:19:03,329 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 153 [2025-03-09 07:19:03,329 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7154 states and 7299 transitions. [2025-03-09 07:19:03,334 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:19:03,337 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7154 states and 7299 transitions. [2025-03-09 07:19:03,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7154 states and 7299 transitions. [2025-03-09 07:19:03,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7154 to 291. [2025-03-09 07:19:03,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 291 states, 291 states have (on average 1.3298969072164948) internal successors, (387), 290 states have internal predecessors, (387), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:19:03,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 387 transitions. [2025-03-09 07:19:03,361 INFO L240 hiAutomatonCegarLoop]: Abstraction has 291 states and 387 transitions. [2025-03-09 07:19:03,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-03-09 07:19:03,362 INFO L432 stractBuchiCegarLoop]: Abstraction has 291 states and 387 transitions. [2025-03-09 07:19:03,363 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-09 07:19:03,363 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 291 states and 387 transitions. [2025-03-09 07:19:03,364 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:19:03,364 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:19:03,364 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:19:03,365 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:19:03,367 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:19:03,367 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-09 07:19:03,367 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:19:03,367 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:19:03,367 INFO L85 PathProgramCache]: Analyzing trace with hash 2125624577, now seen corresponding path program 5 times [2025-03-09 07:19:03,367 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:19:03,368 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [983052104] [2025-03-09 07:19:03,368 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:19:03,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:19:03,373 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 101 statements into 47 equivalence classes. [2025-03-09 07:19:03,410 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 101 of 101 statements. [2025-03-09 07:19:03,410 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-09 07:19:03,411 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:19:04,408 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:19:04,408 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:19:04,408 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [983052104] [2025-03-09 07:19:04,408 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [983052104] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:19:04,408 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1993703046] [2025-03-09 07:19:04,409 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:19:04,409 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:19:04,409 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:19:04,411 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:19:04,412 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-03-09 07:19:04,439 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 101 statements into 47 equivalence classes. [2025-03-09 07:19:04,477 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 101 of 101 statements. [2025-03-09 07:19:04,477 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-03-09 07:19:04,477 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:19:04,479 INFO L256 TraceCheckSpWp]: Trace formula consists of 350 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-03-09 07:19:04,481 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:19:04,607 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:19:04,607 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:19:06,395 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:19:06,395 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1993703046] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:19:06,395 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:19:06,395 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2025-03-09 07:19:06,395 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [374723840] [2025-03-09 07:19:06,395 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:19:06,396 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:19:06,396 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:19:06,396 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 12 times [2025-03-09 07:19:06,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:19:06,396 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261025282] [2025-03-09 07:19:06,396 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:19:06,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:19:06,397 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:19:06,397 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:19:06,397 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-09 07:19:06,397 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:06,397 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:19:06,397 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:19:06,397 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:19:06,398 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:06,398 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:06,398 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:19:06,404 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:19:06,405 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-03-09 07:19:06,407 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-03-09 07:19:06,407 INFO L87 Difference]: Start difference. First operand 291 states and 387 transitions. cyclomatic complexity: 99 Second operand has 96 states, 95 states have (on average 2.0736842105263156) internal successors, (197), 96 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:19:06,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:19:06,519 INFO L93 Difference]: Finished difference Result 484 states and 580 transitions. [2025-03-09 07:19:06,519 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 484 states and 580 transitions. [2025-03-09 07:19:06,521 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:19:06,522 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 484 states to 388 states and 484 transitions. [2025-03-09 07:19:06,522 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-03-09 07:19:06,522 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-03-09 07:19:06,522 INFO L73 IsDeterministic]: Start isDeterministic. Operand 388 states and 484 transitions. [2025-03-09 07:19:06,522 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:19:06,522 INFO L218 hiAutomatonCegarLoop]: Abstraction has 388 states and 484 transitions. [2025-03-09 07:19:06,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 388 states and 484 transitions. [2025-03-09 07:19:06,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 388 to 387. [2025-03-09 07:19:06,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 387 states, 387 states have (on average 1.248062015503876) internal successors, (483), 386 states have internal predecessors, (483), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:19:06,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 387 states to 387 states and 483 transitions. [2025-03-09 07:19:06,526 INFO L240 hiAutomatonCegarLoop]: Abstraction has 387 states and 483 transitions. [2025-03-09 07:19:06,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-03-09 07:19:06,528 INFO L432 stractBuchiCegarLoop]: Abstraction has 387 states and 483 transitions. [2025-03-09 07:19:06,528 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-03-09 07:19:06,528 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 387 states and 483 transitions. [2025-03-09 07:19:06,530 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:19:06,530 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:19:06,530 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:19:06,533 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 1, 1, 1, 1, 1] [2025-03-09 07:19:06,534 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:19:06,534 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-09 07:19:06,534 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:19:06,534 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:19:06,534 INFO L85 PathProgramCache]: Analyzing trace with hash 1836444631, now seen corresponding path program 6 times [2025-03-09 07:19:06,534 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:19:06,534 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119569297] [2025-03-09 07:19:06,534 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:19:06,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:19:06,541 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 194 statements into 95 equivalence classes. [2025-03-09 07:19:06,591 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 194 of 194 statements. [2025-03-09 07:19:06,591 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-09 07:19:06,591 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:19:09,665 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:19:09,666 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:19:09,666 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1119569297] [2025-03-09 07:19:09,666 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1119569297] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:19:09,666 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1597674435] [2025-03-09 07:19:09,666 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:19:09,666 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:19:09,666 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:19:09,668 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:19:09,669 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-03-09 07:19:09,708 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 194 statements into 95 equivalence classes. [2025-03-09 07:19:09,768 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 194 of 194 statements. [2025-03-09 07:19:09,768 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-09 07:19:09,768 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:19:09,769 INFO L256 TraceCheckSpWp]: Trace formula consists of 493 conjuncts, 96 conjuncts are in the unsatisfiable core [2025-03-09 07:19:09,772 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:19:09,969 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:19:09,970 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:19:12,755 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:19:12,755 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1597674435] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:19:12,755 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:19:12,755 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 102 [2025-03-09 07:19:12,755 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [782844032] [2025-03-09 07:19:12,755 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:19:12,756 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:19:12,756 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:19:12,756 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 13 times [2025-03-09 07:19:12,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:19:12,756 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [629570077] [2025-03-09 07:19:12,756 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-09 07:19:12,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:19:12,757 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:19:12,757 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:19:12,757 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:12,757 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:12,757 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:19:12,757 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:19:12,757 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:19:12,757 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:12,758 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:12,758 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:19:12,759 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:19:12,760 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2025-03-09 07:19:12,761 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5253, Invalid=5253, Unknown=0, NotChecked=0, Total=10506 [2025-03-09 07:19:12,762 INFO L87 Difference]: Start difference. First operand 387 states and 483 transitions. cyclomatic complexity: 99 Second operand has 103 states, 102 states have (on average 2.0588235294117645) internal successors, (210), 103 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:19:13,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:19:13,948 INFO L93 Difference]: Finished difference Result 10592 states and 10701 transitions. [2025-03-09 07:19:13,948 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10592 states and 10701 transitions. [2025-03-09 07:19:13,976 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 7 [2025-03-09 07:19:14,009 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10592 states to 10580 states and 10689 transitions. [2025-03-09 07:19:14,009 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2025-03-09 07:19:14,009 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2025-03-09 07:19:14,009 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10580 states and 10689 transitions. [2025-03-09 07:19:14,017 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:19:14,017 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10580 states and 10689 transitions. [2025-03-09 07:19:14,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10580 states and 10689 transitions. [2025-03-09 07:19:14,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10580 to 399. [2025-03-09 07:19:14,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 399 states, 399 states have (on average 1.255639097744361) internal successors, (501), 398 states have internal predecessors, (501), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:19:14,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 399 states to 399 states and 501 transitions. [2025-03-09 07:19:14,058 INFO L240 hiAutomatonCegarLoop]: Abstraction has 399 states and 501 transitions. [2025-03-09 07:19:14,058 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2025-03-09 07:19:14,058 INFO L432 stractBuchiCegarLoop]: Abstraction has 399 states and 501 transitions. [2025-03-09 07:19:14,058 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-03-09 07:19:14,059 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 399 states and 501 transitions. [2025-03-09 07:19:14,059 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:19:14,059 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:19:14,059 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:19:14,060 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:19:14,060 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:19:14,061 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-03-09 07:19:14,061 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:19:14,061 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:19:14,061 INFO L85 PathProgramCache]: Analyzing trace with hash 883348273, now seen corresponding path program 6 times [2025-03-09 07:19:14,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:19:14,061 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1193693722] [2025-03-09 07:19:14,061 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:19:14,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:19:14,067 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 197 statements into 95 equivalence classes. [2025-03-09 07:19:14,123 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 197 of 197 statements. [2025-03-09 07:19:14,123 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-09 07:19:14,123 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:19:17,349 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:19:17,349 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:19:17,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1193693722] [2025-03-09 07:19:17,349 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1193693722] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-09 07:19:17,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [647478157] [2025-03-09 07:19:17,349 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:19:17,349 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-09 07:19:17,349 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:19:17,351 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-09 07:19:17,352 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2025-03-09 07:19:17,394 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 197 statements into 95 equivalence classes. [2025-03-09 07:19:17,470 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 197 of 197 statements. [2025-03-09 07:19:17,470 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-03-09 07:19:17,470 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:19:17,473 INFO L256 TraceCheckSpWp]: Trace formula consists of 686 conjuncts, 96 conjuncts are in the unsatisfiable core [2025-03-09 07:19:17,476 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-09 07:19:17,689 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:19:17,689 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-09 07:19:20,433 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:19:20,434 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [647478157] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-09 07:19:20,434 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-09 07:19:20,434 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 102 [2025-03-09 07:19:20,434 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1987881157] [2025-03-09 07:19:20,434 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-09 07:19:20,435 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-03-09 07:19:20,435 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:19:20,435 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 14 times [2025-03-09 07:19:20,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:19:20,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1840000596] [2025-03-09 07:19:20,435 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:19:20,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:19:20,436 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:19:20,438 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:19:20,438 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:19:20,438 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:20,438 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:19:20,438 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:19:20,438 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:19:20,438 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:20,439 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:20,439 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:19:20,442 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:19:20,442 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2025-03-09 07:19:20,444 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5253, Invalid=5253, Unknown=0, NotChecked=0, Total=10506 [2025-03-09 07:19:20,444 INFO L87 Difference]: Start difference. First operand 399 states and 501 transitions. cyclomatic complexity: 105 Second operand has 103 states, 102 states have (on average 2.088235294117647) internal successors, (213), 103 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:19:20,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:19:20,520 INFO L93 Difference]: Finished difference Result 424 states and 526 transitions. [2025-03-09 07:19:20,520 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 424 states and 526 transitions. [2025-03-09 07:19:20,521 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:19:20,522 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 424 states to 412 states and 514 transitions. [2025-03-09 07:19:20,522 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-03-09 07:19:20,522 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-03-09 07:19:20,522 INFO L73 IsDeterministic]: Start isDeterministic. Operand 412 states and 514 transitions. [2025-03-09 07:19:20,523 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-03-09 07:19:20,523 INFO L218 hiAutomatonCegarLoop]: Abstraction has 412 states and 514 transitions. [2025-03-09 07:19:20,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 412 states and 514 transitions. [2025-03-09 07:19:20,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 412 to 411. [2025-03-09 07:19:20,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 411 states, 411 states have (on average 1.2481751824817517) internal successors, (513), 410 states have internal predecessors, (513), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:19:20,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 411 states to 411 states and 513 transitions. [2025-03-09 07:19:20,526 INFO L240 hiAutomatonCegarLoop]: Abstraction has 411 states and 513 transitions. [2025-03-09 07:19:20,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2025-03-09 07:19:20,529 INFO L432 stractBuchiCegarLoop]: Abstraction has 411 states and 513 transitions. [2025-03-09 07:19:20,529 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-03-09 07:19:20,529 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 411 states and 513 transitions. [2025-03-09 07:19:20,530 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-03-09 07:19:20,530 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:19:20,530 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:19:20,531 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [101, 100, 1, 1, 1, 1, 1] [2025-03-09 07:19:20,531 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-03-09 07:19:20,531 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-03-09 07:19:20,532 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-03-09 07:19:20,532 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:19:20,532 INFO L85 PathProgramCache]: Analyzing trace with hash 1834765917, now seen corresponding path program 7 times [2025-03-09 07:19:20,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:19:20,533 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626310907] [2025-03-09 07:19:20,533 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-09 07:19:20,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:19:20,538 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-09 07:19:20,559 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-09 07:19:20,559 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:20,559 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:20,560 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:19:20,562 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-09 07:19:20,584 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-09 07:19:20,584 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:20,584 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:20,593 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:19:20,593 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:19:20,593 INFO L85 PathProgramCache]: Analyzing trace with hash 67, now seen corresponding path program 15 times [2025-03-09 07:19:20,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:19:20,593 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2132041729] [2025-03-09 07:19:20,593 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:19:20,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:19:20,596 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:19:20,596 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:19:20,596 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-09 07:19:20,596 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:20,597 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:19:20,597 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-03-09 07:19:20,597 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-03-09 07:19:20,597 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:20,597 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:20,597 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:19:20,597 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:19:20,597 INFO L85 PathProgramCache]: Analyzing trace with hash 1043168615, now seen corresponding path program 1 times [2025-03-09 07:19:20,597 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:19:20,597 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106568396] [2025-03-09 07:19:20,597 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:19:20,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:19:20,603 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-03-09 07:19:20,625 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-03-09 07:19:20,625 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:20,625 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:20,625 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:19:20,628 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-03-09 07:19:20,646 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-03-09 07:19:20,646 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:20,646 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:20,657 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:19:27,225 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-09 07:19:27,245 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-09 07:19:27,245 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:27,245 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:27,245 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:19:27,265 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 206 statements into 1 equivalence classes. [2025-03-09 07:19:27,284 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 206 of 206 statements. [2025-03-09 07:19:27,284 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:19:27,284 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:19:27,396 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 09.03 07:19:27 BoogieIcfgContainer [2025-03-09 07:19:27,396 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-09 07:19:27,397 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-09 07:19:27,397 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-09 07:19:27,397 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-09 07:19:27,398 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:18:53" (3/4) ... [2025-03-09 07:19:27,400 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-03-09 07:19:27,449 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-09 07:19:27,450 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-09 07:19:27,450 INFO L158 Benchmark]: Toolchain (without parser) took 34199.36ms. Allocated memory was 167.8MB in the beginning and 872.4MB in the end (delta: 704.6MB). Free memory was 123.2MB in the beginning and 511.7MB in the end (delta: -388.6MB). Peak memory consumption was 310.1MB. Max. memory is 16.1GB. [2025-03-09 07:19:27,450 INFO L158 Benchmark]: CDTParser took 0.15ms. Allocated memory is still 201.3MB. Free memory is still 119.8MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:19:27,450 INFO L158 Benchmark]: CACSL2BoogieTranslator took 156.11ms. Allocated memory is still 167.8MB. Free memory was 123.2MB in the beginning and 112.4MB in the end (delta: 10.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-09 07:19:27,451 INFO L158 Benchmark]: Boogie Procedure Inliner took 23.27ms. Allocated memory is still 167.8MB. Free memory was 112.4MB in the beginning and 111.2MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:19:27,451 INFO L158 Benchmark]: Boogie Preprocessor took 24.86ms. Allocated memory is still 167.8MB. Free memory was 111.2MB in the beginning and 110.3MB in the end (delta: 880.0kB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:19:27,452 INFO L158 Benchmark]: IcfgBuilder took 192.85ms. Allocated memory is still 167.8MB. Free memory was 110.3MB in the beginning and 99.6MB in the end (delta: 10.7MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-09 07:19:27,454 INFO L158 Benchmark]: BuchiAutomizer took 33745.40ms. Allocated memory was 167.8MB in the beginning and 872.4MB in the end (delta: 704.6MB). Free memory was 99.2MB in the beginning and 520.1MB in the end (delta: -421.0MB). Peak memory consumption was 276.5MB. Max. memory is 16.1GB. [2025-03-09 07:19:27,454 INFO L158 Benchmark]: Witness Printer took 52.64ms. Allocated memory is still 872.4MB. Free memory was 520.1MB in the beginning and 511.7MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-09 07:19:27,455 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15ms. Allocated memory is still 201.3MB. Free memory is still 119.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 156.11ms. Allocated memory is still 167.8MB. Free memory was 123.2MB in the beginning and 112.4MB in the end (delta: 10.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 23.27ms. Allocated memory is still 167.8MB. Free memory was 112.4MB in the beginning and 111.2MB in the end (delta: 1.2MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 24.86ms. Allocated memory is still 167.8MB. Free memory was 111.2MB in the beginning and 110.3MB in the end (delta: 880.0kB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 192.85ms. Allocated memory is still 167.8MB. Free memory was 110.3MB in the beginning and 99.6MB in the end (delta: 10.7MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 33745.40ms. Allocated memory was 167.8MB in the beginning and 872.4MB in the end (delta: 704.6MB). Free memory was 99.2MB in the beginning and 520.1MB in the end (delta: -421.0MB). Peak memory consumption was 276.5MB. Max. memory is 16.1GB. * Witness Printer took 52.64ms. Allocated memory is still 872.4MB. Free memory was 520.1MB in the beginning and 511.7MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 15 terminating modules (14 trivial, 1 deterministic, 0 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function (((long long) -2 * i) + 1999999) and consists of 4 locations. 14 modules have a trivial ranking function, the largest among these consists of 103 locations. The remainder module has 411 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 33.6s and 16 iterations. TraceHistogramMax:101. Analysis of lassos took 29.7s. Construction of modules took 1.1s. Büchi inclusion checks took 2.6s. Highest rank in rank-based complementation 3. Minimization of det autom 0. Minimization of nondet autom 15. Automata minimization 0.1s AutomataMinimizationTime, 15 MinimizatonAttempts, 19320 StatesRemovedByMinimization, 15 NontrivialMinimizations. Non-live state removal took 0.1s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [1, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 3676 SdHoareTripleChecker+Valid, 1.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3675 mSDsluCounter, 1578 SdHoareTripleChecker+Invalid, 1.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1430 mSDsCounter, 1095 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1700 IncrementalHoareTripleChecker+Invalid, 2795 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1095 mSolverCounterUnsat, 148 mSDtfsCounter, 1700 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT1 conc0 concLT0 SILN14 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: Lassos: inital10 mio100 ax100 hnf100 lsp100 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq160 hnf93 smp100 dnf100 smp100 tf113 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: sat Degree: 0 Time: 42ms VariablesStem: 0 VariablesLoop: 2 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 0 MotzkinApplications: 2 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 1 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 24]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L25] int i, j; [L27] i = 0 VAL [i=0] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=1] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=2] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=3] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=4] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=5] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=6] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=7] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=8] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=9] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=10] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=11] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=12] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=13] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=14] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=15] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=16] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=17] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=18] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=19] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=20] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=21] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=22] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=23] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=24] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=25] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=26] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=27] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=28] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=29] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=30] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=31] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=32] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=33] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=34] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=35] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=36] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=37] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=38] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=39] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=40] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=41] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=42] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=43] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=44] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=45] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=46] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=47] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=48] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=49] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=50] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=51] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=52] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=53] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=54] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=55] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=56] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=57] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=58] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=59] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=60] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=61] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=62] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=63] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=64] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=65] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=66] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=67] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=68] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=69] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=70] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=71] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=72] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=73] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=74] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=75] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=76] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=77] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=78] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=79] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=80] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=81] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=82] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=83] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=84] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=85] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=86] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=87] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=88] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=89] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=90] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=91] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=92] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=93] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=94] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=95] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=96] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=97] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=98] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=99] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=100] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND FALSE !(__VERIFIER_nondet_int() && i < 1000000) [L32] COND TRUE i >= 100 Loop: [L39] goto STUCK; End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 24]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L25] int i, j; [L27] i = 0 VAL [i=0] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=1] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=2] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=3] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=4] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=5] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=6] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=7] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=8] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=9] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=10] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=11] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=12] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=13] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=14] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=15] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=16] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=17] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=18] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=19] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=20] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=21] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=22] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=23] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=24] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=25] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=26] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=27] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=28] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=29] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=30] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=31] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=32] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=33] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=34] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=35] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=36] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=37] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=38] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=39] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=40] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=41] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=42] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=43] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=44] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=45] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=46] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=47] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=48] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=49] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=50] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=51] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=52] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=53] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=54] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=55] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=56] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=57] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=58] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=59] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=60] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=61] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=62] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=63] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=64] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=65] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=66] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=67] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=68] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=69] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=70] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=71] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=72] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=73] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=74] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=75] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=76] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=77] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=78] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=79] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=80] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=81] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=82] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=83] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=84] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=85] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=86] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=87] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=88] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=89] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=90] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=91] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=92] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=93] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=94] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=95] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=96] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=97] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=98] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=99] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=100] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND FALSE !(__VERIFIER_nondet_int() && i < 1000000) [L32] COND TRUE i >= 100 Loop: [L39] goto STUCK; End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-03-09 07:19:27,473 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2025-03-09 07:19:27,674 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2025-03-09 07:19:27,874 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2025-03-09 07:19:28,074 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2025-03-09 07:19:28,274 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2025-03-09 07:19:28,474 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2025-03-09 07:19:28,674 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2025-03-09 07:19:28,874 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2025-03-09 07:19:29,074 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2025-03-09 07:19:29,275 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2025-03-09 07:19:29,475 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2025-03-09 07:19:29,675 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2025-03-09 07:19:29,877 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)