./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_13.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e2fb8bed Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_13.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8fd6142dd23f608c3bc9ae24389b4aee583128e9e6b549483298584de0c08ecd --- Real Ultimate output --- This is Ultimate 0.3.0-?-e2fb8be-m [2025-03-09 07:00:32,570 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-09 07:00:32,620 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-09 07:00:32,628 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-09 07:00:32,628 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-09 07:00:32,628 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-09 07:00:32,645 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-09 07:00:32,646 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-09 07:00:32,647 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-09 07:00:32,647 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-09 07:00:32,647 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-09 07:00:32,648 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-09 07:00:32,648 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-09 07:00:32,648 INFO L153 SettingsManager]: * Use SBE=true [2025-03-09 07:00:32,648 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-09 07:00:32,649 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-09 07:00:32,649 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-09 07:00:32,649 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-09 07:00:32,649 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-09 07:00:32,649 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-09 07:00:32,650 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-09 07:00:32,650 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-09 07:00:32,651 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-09 07:00:32,651 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-09 07:00:32,651 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-09 07:00:32,651 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-09 07:00:32,651 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-09 07:00:32,651 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-09 07:00:32,651 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-09 07:00:32,652 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8fd6142dd23f608c3bc9ae24389b4aee583128e9e6b549483298584de0c08ecd [2025-03-09 07:00:32,869 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-09 07:00:32,875 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-09 07:00:32,877 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-09 07:00:32,878 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-09 07:00:32,878 INFO L274 PluginConnector]: CDTParser initialized [2025-03-09 07:00:32,879 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_13.c [2025-03-09 07:00:34,026 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3bdd58045/bfc17a45b17447cbb0de691d52faab6f/FLAG91c5559e3 [2025-03-09 07:00:34,248 INFO L384 CDTParser]: Found 1 translation units. [2025-03-09 07:00:34,252 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/locks/test_locks_13.c [2025-03-09 07:00:34,261 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3bdd58045/bfc17a45b17447cbb0de691d52faab6f/FLAG91c5559e3 [2025-03-09 07:00:34,276 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3bdd58045/bfc17a45b17447cbb0de691d52faab6f [2025-03-09 07:00:34,278 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-09 07:00:34,279 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-09 07:00:34,281 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-09 07:00:34,281 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-09 07:00:34,285 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-09 07:00:34,286 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,287 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@36b5c4c8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34, skipping insertion in model container [2025-03-09 07:00:34,287 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,301 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-09 07:00:34,427 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-09 07:00:34,438 INFO L200 MainTranslator]: Completed pre-run [2025-03-09 07:00:34,456 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-09 07:00:34,470 INFO L204 MainTranslator]: Completed translation [2025-03-09 07:00:34,470 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34 WrapperNode [2025-03-09 07:00:34,470 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-09 07:00:34,471 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-09 07:00:34,471 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-09 07:00:34,471 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-09 07:00:34,475 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,480 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,497 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 168 [2025-03-09 07:00:34,498 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-09 07:00:34,498 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-09 07:00:34,499 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-09 07:00:34,499 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-09 07:00:34,503 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,504 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,505 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,520 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-09 07:00:34,520 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,520 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,522 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,525 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,526 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,526 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,527 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-09 07:00:34,528 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-09 07:00:34,528 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-09 07:00:34,528 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-09 07:00:34,529 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,533 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 07:00:34,541 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:00:34,552 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 07:00:34,557 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-09 07:00:34,573 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-09 07:00:34,573 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-09 07:00:34,573 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-09 07:00:34,574 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-09 07:00:34,622 INFO L256 CfgBuilder]: Building ICFG [2025-03-09 07:00:34,623 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-09 07:00:34,847 INFO L? ?]: Removed 30 outVars from TransFormulas that were not future-live. [2025-03-09 07:00:34,848 INFO L307 CfgBuilder]: Performing block encoding [2025-03-09 07:00:34,859 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-09 07:00:34,862 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-09 07:00:34,862 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:00:34 BoogieIcfgContainer [2025-03-09 07:00:34,862 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-09 07:00:34,863 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-09 07:00:34,863 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-09 07:00:34,867 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-09 07:00:34,868 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:00:34,868 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.03 07:00:34" (1/3) ... [2025-03-09 07:00:34,870 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@685623e3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.03 07:00:34, skipping insertion in model container [2025-03-09 07:00:34,870 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:00:34,870 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (2/3) ... [2025-03-09 07:00:34,871 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@685623e3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.03 07:00:34, skipping insertion in model container [2025-03-09 07:00:34,871 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:00:34,871 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:00:34" (3/3) ... [2025-03-09 07:00:34,872 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_13.c [2025-03-09 07:00:34,906 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-09 07:00:34,907 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-09 07:00:34,907 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-09 07:00:34,907 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-09 07:00:34,907 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-09 07:00:34,907 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-09 07:00:34,907 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-09 07:00:34,907 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-09 07:00:34,910 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:34,924 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2025-03-09 07:00:34,925 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:34,925 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:34,928 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:34,928 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:34,928 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-09 07:00:34,929 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:34,930 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2025-03-09 07:00:34,930 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:34,930 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:34,931 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:34,931 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:34,935 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:34,936 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:34,939 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:34,939 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 1 times [2025-03-09 07:00:34,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:34,944 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1469616754] [2025-03-09 07:00:34,944 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:34,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:34,985 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:34,992 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:34,992 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:34,992 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:34,992 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:34,998 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,003 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,003 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,003 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,017 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,020 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,020 INFO L85 PathProgramCache]: Analyzing trace with hash -1267993302, now seen corresponding path program 1 times [2025-03-09 07:00:35,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [393677042] [2025-03-09 07:00:35,021 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,029 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:35,040 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:35,041 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,041 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:35,125 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:35,125 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:35,125 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [393677042] [2025-03-09 07:00:35,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [393677042] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:35,127 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:35,127 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:35,128 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1848969409] [2025-03-09 07:00:35,128 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:35,130 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:35,131 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:35,148 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:35,149 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:35,151 INFO L87 Difference]: Start difference. First operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:35,195 INFO L93 Difference]: Finished difference Result 91 states and 165 transitions. [2025-03-09 07:00:35,196 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 91 states and 165 transitions. [2025-03-09 07:00:35,199 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 81 [2025-03-09 07:00:35,204 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 91 states to 83 states and 133 transitions. [2025-03-09 07:00:35,205 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 83 [2025-03-09 07:00:35,205 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 83 [2025-03-09 07:00:35,205 INFO L73 IsDeterministic]: Start isDeterministic. Operand 83 states and 133 transitions. [2025-03-09 07:00:35,206 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:35,206 INFO L218 hiAutomatonCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-03-09 07:00:35,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states and 133 transitions. [2025-03-09 07:00:35,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2025-03-09 07:00:35,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.6024096385542168) internal successors, (133), 82 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 133 transitions. [2025-03-09 07:00:35,232 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-03-09 07:00:35,233 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:35,236 INFO L432 stractBuchiCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-03-09 07:00:35,236 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-09 07:00:35,236 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 133 transitions. [2025-03-09 07:00:35,240 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 81 [2025-03-09 07:00:35,240 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,240 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,241 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,241 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,241 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,241 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:35,241 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,242 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 2 times [2025-03-09 07:00:35,242 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,242 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397175821] [2025-03-09 07:00:35,242 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:00:35,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,246 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,249 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,249 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:35,249 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,249 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:35,251 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,252 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,252 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,252 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,253 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,254 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,254 INFO L85 PathProgramCache]: Analyzing trace with hash -1236973495, now seen corresponding path program 1 times [2025-03-09 07:00:35,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195352570] [2025-03-09 07:00:35,254 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,260 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:35,265 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:35,265 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,265 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:35,313 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:35,314 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:35,314 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1195352570] [2025-03-09 07:00:35,314 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1195352570] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:35,315 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:35,315 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:35,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [374268737] [2025-03-09 07:00:35,316 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:35,316 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:35,316 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:35,316 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:35,316 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:35,316 INFO L87 Difference]: Start difference. First operand 83 states and 133 transitions. cyclomatic complexity: 52 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:35,332 INFO L93 Difference]: Finished difference Result 162 states and 258 transitions. [2025-03-09 07:00:35,332 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 162 states and 258 transitions. [2025-03-09 07:00:35,333 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 160 [2025-03-09 07:00:35,335 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 162 states to 162 states and 258 transitions. [2025-03-09 07:00:35,335 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 162 [2025-03-09 07:00:35,335 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 162 [2025-03-09 07:00:35,335 INFO L73 IsDeterministic]: Start isDeterministic. Operand 162 states and 258 transitions. [2025-03-09 07:00:35,335 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:35,335 INFO L218 hiAutomatonCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-03-09 07:00:35,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states and 258 transitions. [2025-03-09 07:00:35,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2025-03-09 07:00:35,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 162 states, 162 states have (on average 1.5925925925925926) internal successors, (258), 161 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 258 transitions. [2025-03-09 07:00:35,344 INFO L240 hiAutomatonCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-03-09 07:00:35,345 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:35,345 INFO L432 stractBuchiCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-03-09 07:00:35,345 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-09 07:00:35,345 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 162 states and 258 transitions. [2025-03-09 07:00:35,347 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 160 [2025-03-09 07:00:35,347 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,347 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,347 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,347 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,347 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,347 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:35,348 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,348 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 3 times [2025-03-09 07:00:35,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,349 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [491031411] [2025-03-09 07:00:35,349 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:00:35,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,355 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,357 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,358 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-09 07:00:35,358 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,358 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:35,361 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,362 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,362 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,362 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,364 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,364 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,364 INFO L85 PathProgramCache]: Analyzing trace with hash 980784458, now seen corresponding path program 1 times [2025-03-09 07:00:35,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,365 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762185880] [2025-03-09 07:00:35,365 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,371 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:35,376 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:35,376 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,376 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:35,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:35,415 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:35,416 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1762185880] [2025-03-09 07:00:35,416 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1762185880] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:35,416 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:35,416 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:35,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241031226] [2025-03-09 07:00:35,416 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:35,416 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:35,416 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:35,416 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:35,416 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:35,417 INFO L87 Difference]: Start difference. First operand 162 states and 258 transitions. cyclomatic complexity: 100 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:35,434 INFO L93 Difference]: Finished difference Result 318 states and 502 transitions. [2025-03-09 07:00:35,434 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 318 states and 502 transitions. [2025-03-09 07:00:35,437 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 316 [2025-03-09 07:00:35,440 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 318 states to 318 states and 502 transitions. [2025-03-09 07:00:35,440 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 318 [2025-03-09 07:00:35,441 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 318 [2025-03-09 07:00:35,441 INFO L73 IsDeterministic]: Start isDeterministic. Operand 318 states and 502 transitions. [2025-03-09 07:00:35,442 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:35,442 INFO L218 hiAutomatonCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-03-09 07:00:35,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 318 states and 502 transitions. [2025-03-09 07:00:35,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 318 to 318. [2025-03-09 07:00:35,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 318 states, 318 states have (on average 1.578616352201258) internal successors, (502), 317 states have internal predecessors, (502), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 318 states to 318 states and 502 transitions. [2025-03-09 07:00:35,455 INFO L240 hiAutomatonCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-03-09 07:00:35,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:35,456 INFO L432 stractBuchiCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-03-09 07:00:35,456 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-09 07:00:35,456 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 318 states and 502 transitions. [2025-03-09 07:00:35,458 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 316 [2025-03-09 07:00:35,458 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,458 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,458 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,458 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,458 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,459 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:35,459 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,459 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 4 times [2025-03-09 07:00:35,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,459 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1822714804] [2025-03-09 07:00:35,459 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:00:35,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,463 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-09 07:00:35,465 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,467 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:00:35,467 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,468 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:35,479 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,480 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,480 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,480 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,485 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,486 INFO L85 PathProgramCache]: Analyzing trace with hash 913777705, now seen corresponding path program 1 times [2025-03-09 07:00:35,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1795271540] [2025-03-09 07:00:35,487 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,493 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:35,500 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:35,503 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,503 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:35,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:35,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:35,529 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1795271540] [2025-03-09 07:00:35,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1795271540] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:35,529 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:35,529 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:35,529 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1088431233] [2025-03-09 07:00:35,529 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:35,529 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:35,529 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:35,530 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:35,530 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:35,532 INFO L87 Difference]: Start difference. First operand 318 states and 502 transitions. cyclomatic complexity: 192 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:35,554 INFO L93 Difference]: Finished difference Result 626 states and 978 transitions. [2025-03-09 07:00:35,554 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 626 states and 978 transitions. [2025-03-09 07:00:35,558 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 624 [2025-03-09 07:00:35,561 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 626 states to 626 states and 978 transitions. [2025-03-09 07:00:35,562 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 626 [2025-03-09 07:00:35,563 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 626 [2025-03-09 07:00:35,565 INFO L73 IsDeterministic]: Start isDeterministic. Operand 626 states and 978 transitions. [2025-03-09 07:00:35,568 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:35,568 INFO L218 hiAutomatonCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-03-09 07:00:35,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 626 states and 978 transitions. [2025-03-09 07:00:35,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 626 to 626. [2025-03-09 07:00:35,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 626 states, 626 states have (on average 1.5623003194888179) internal successors, (978), 625 states have internal predecessors, (978), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 626 states to 626 states and 978 transitions. [2025-03-09 07:00:35,597 INFO L240 hiAutomatonCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-03-09 07:00:35,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:35,599 INFO L432 stractBuchiCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-03-09 07:00:35,599 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-09 07:00:35,599 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 626 states and 978 transitions. [2025-03-09 07:00:35,602 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 624 [2025-03-09 07:00:35,602 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,602 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,602 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,602 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,602 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,602 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:35,603 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,603 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 5 times [2025-03-09 07:00:35,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,603 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2054913390] [2025-03-09 07:00:35,603 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:00:35,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,610 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,613 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,613 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:35,613 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,613 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:35,614 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,616 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,616 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,616 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,618 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,618 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,618 INFO L85 PathProgramCache]: Analyzing trace with hash -2136425110, now seen corresponding path program 1 times [2025-03-09 07:00:35,619 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,619 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [477334259] [2025-03-09 07:00:35,619 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,623 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:35,628 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:35,628 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,628 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:35,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:35,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:35,649 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [477334259] [2025-03-09 07:00:35,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [477334259] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:35,649 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:35,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:35,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1481390997] [2025-03-09 07:00:35,649 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:35,650 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:35,650 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:35,651 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:35,651 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:35,651 INFO L87 Difference]: Start difference. First operand 626 states and 978 transitions. cyclomatic complexity: 368 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:35,672 INFO L93 Difference]: Finished difference Result 1234 states and 1906 transitions. [2025-03-09 07:00:35,672 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1234 states and 1906 transitions. [2025-03-09 07:00:35,687 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1232 [2025-03-09 07:00:35,695 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1234 states to 1234 states and 1906 transitions. [2025-03-09 07:00:35,695 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1234 [2025-03-09 07:00:35,698 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1234 [2025-03-09 07:00:35,699 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1234 states and 1906 transitions. [2025-03-09 07:00:35,700 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:35,701 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-03-09 07:00:35,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1234 states and 1906 transitions. [2025-03-09 07:00:35,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1234 to 1234. [2025-03-09 07:00:35,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1234 states, 1234 states have (on average 1.5445705024311183) internal successors, (1906), 1233 states have internal predecessors, (1906), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1234 states to 1234 states and 1906 transitions. [2025-03-09 07:00:35,725 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-03-09 07:00:35,726 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:35,727 INFO L432 stractBuchiCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-03-09 07:00:35,727 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-09 07:00:35,727 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1234 states and 1906 transitions. [2025-03-09 07:00:35,733 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1232 [2025-03-09 07:00:35,733 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,733 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,735 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,735 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,735 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,736 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:35,736 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,736 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 6 times [2025-03-09 07:00:35,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821818132] [2025-03-09 07:00:35,736 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:00:35,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,740 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,743 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,744 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-09 07:00:35,744 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,744 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:35,746 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,747 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,747 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,747 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,749 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,749 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,749 INFO L85 PathProgramCache]: Analyzing trace with hash 120485897, now seen corresponding path program 1 times [2025-03-09 07:00:35,749 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,749 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [325695964] [2025-03-09 07:00:35,749 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,756 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:35,757 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:35,758 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,758 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:35,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:35,773 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:35,773 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [325695964] [2025-03-09 07:00:35,773 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [325695964] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:35,773 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:35,773 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:35,773 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041904717] [2025-03-09 07:00:35,773 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:35,773 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:35,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:35,774 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:35,774 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:35,774 INFO L87 Difference]: Start difference. First operand 1234 states and 1906 transitions. cyclomatic complexity: 704 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:35,803 INFO L93 Difference]: Finished difference Result 2434 states and 3714 transitions. [2025-03-09 07:00:35,804 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2434 states and 3714 transitions. [2025-03-09 07:00:35,825 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2432 [2025-03-09 07:00:35,852 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2434 states to 2434 states and 3714 transitions. [2025-03-09 07:00:35,852 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2434 [2025-03-09 07:00:35,854 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2434 [2025-03-09 07:00:35,854 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2434 states and 3714 transitions. [2025-03-09 07:00:35,861 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:35,861 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-03-09 07:00:35,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2434 states and 3714 transitions. [2025-03-09 07:00:35,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2434 to 2434. [2025-03-09 07:00:35,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2434 states, 2434 states have (on average 1.5258833196384551) internal successors, (3714), 2433 states have internal predecessors, (3714), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2434 states to 2434 states and 3714 transitions. [2025-03-09 07:00:35,904 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-03-09 07:00:35,904 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:35,906 INFO L432 stractBuchiCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-03-09 07:00:35,906 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-09 07:00:35,906 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2434 states and 3714 transitions. [2025-03-09 07:00:35,939 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2432 [2025-03-09 07:00:35,939 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,939 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,939 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,939 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,940 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,940 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:35,940 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,940 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 7 times [2025-03-09 07:00:35,940 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,940 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720202995] [2025-03-09 07:00:35,941 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-09 07:00:35,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,943 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,944 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,944 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,944 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,944 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:35,945 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,945 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,946 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,946 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,947 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,947 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,947 INFO L85 PathProgramCache]: Analyzing trace with hash -288338328, now seen corresponding path program 1 times [2025-03-09 07:00:35,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,947 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998639399] [2025-03-09 07:00:35,947 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,950 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:35,951 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:35,952 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,952 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:35,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:35,968 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:35,968 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [998639399] [2025-03-09 07:00:35,968 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [998639399] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:35,968 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:35,968 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:35,968 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019613134] [2025-03-09 07:00:35,968 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:35,969 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:35,969 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:35,969 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:35,969 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:35,969 INFO L87 Difference]: Start difference. First operand 2434 states and 3714 transitions. cyclomatic complexity: 1344 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:35,992 INFO L93 Difference]: Finished difference Result 4802 states and 7234 transitions. [2025-03-09 07:00:35,993 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4802 states and 7234 transitions. [2025-03-09 07:00:36,016 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 4800 [2025-03-09 07:00:36,034 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4802 states to 4802 states and 7234 transitions. [2025-03-09 07:00:36,034 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4802 [2025-03-09 07:00:36,038 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4802 [2025-03-09 07:00:36,038 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4802 states and 7234 transitions. [2025-03-09 07:00:36,043 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,044 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-03-09 07:00:36,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4802 states and 7234 transitions. [2025-03-09 07:00:36,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4802 to 4802. [2025-03-09 07:00:36,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4802 states, 4802 states have (on average 1.5064556434818825) internal successors, (7234), 4801 states have internal predecessors, (7234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4802 states to 4802 states and 7234 transitions. [2025-03-09 07:00:36,125 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-03-09 07:00:36,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,126 INFO L432 stractBuchiCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-03-09 07:00:36,126 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-09 07:00:36,126 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4802 states and 7234 transitions. [2025-03-09 07:00:36,154 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 4800 [2025-03-09 07:00:36,154 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,154 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,155 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,155 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,155 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,155 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:36,155 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,155 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 8 times [2025-03-09 07:00:36,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,156 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098978005] [2025-03-09 07:00:36,156 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:00:36,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,158 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,159 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,159 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:36,159 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,159 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,160 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,161 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,161 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,161 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,162 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,163 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,163 INFO L85 PathProgramCache]: Analyzing trace with hash -1132810199, now seen corresponding path program 1 times [2025-03-09 07:00:36,163 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,163 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1391199974] [2025-03-09 07:00:36,163 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,166 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:36,167 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:36,168 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,168 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,182 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,182 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1391199974] [2025-03-09 07:00:36,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1391199974] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,182 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,182 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021762992] [2025-03-09 07:00:36,182 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,182 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,183 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,183 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,183 INFO L87 Difference]: Start difference. First operand 4802 states and 7234 transitions. cyclomatic complexity: 2560 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,223 INFO L93 Difference]: Finished difference Result 9474 states and 14082 transitions. [2025-03-09 07:00:36,223 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9474 states and 14082 transitions. [2025-03-09 07:00:36,265 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 9472 [2025-03-09 07:00:36,306 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9474 states to 9474 states and 14082 transitions. [2025-03-09 07:00:36,307 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9474 [2025-03-09 07:00:36,314 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9474 [2025-03-09 07:00:36,314 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9474 states and 14082 transitions. [2025-03-09 07:00:36,327 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,328 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-03-09 07:00:36,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9474 states and 14082 transitions. [2025-03-09 07:00:36,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9474 to 9474. [2025-03-09 07:00:36,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9474 states, 9474 states have (on average 1.486383787207093) internal successors, (14082), 9473 states have internal predecessors, (14082), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9474 states to 9474 states and 14082 transitions. [2025-03-09 07:00:36,501 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-03-09 07:00:36,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,502 INFO L432 stractBuchiCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-03-09 07:00:36,502 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-09 07:00:36,502 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9474 states and 14082 transitions. [2025-03-09 07:00:36,534 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 9472 [2025-03-09 07:00:36,534 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,534 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,534 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,534 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,535 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,535 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:36,535 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,535 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 9 times [2025-03-09 07:00:36,535 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,536 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935986309] [2025-03-09 07:00:36,536 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:00:36,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,538 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,539 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,539 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-09 07:00:36,539 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,539 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,540 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,541 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,541 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,541 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,543 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,543 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,543 INFO L85 PathProgramCache]: Analyzing trace with hash -2129882552, now seen corresponding path program 1 times [2025-03-09 07:00:36,543 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,543 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [243840402] [2025-03-09 07:00:36,543 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,546 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:36,548 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:36,548 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,548 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,562 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,562 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [243840402] [2025-03-09 07:00:36,562 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [243840402] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,562 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,562 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,562 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [579778108] [2025-03-09 07:00:36,563 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,563 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,563 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,563 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,563 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,563 INFO L87 Difference]: Start difference. First operand 9474 states and 14082 transitions. cyclomatic complexity: 4864 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,636 INFO L93 Difference]: Finished difference Result 18690 states and 27394 transitions. [2025-03-09 07:00:36,636 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18690 states and 27394 transitions. [2025-03-09 07:00:36,723 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 18688 [2025-03-09 07:00:36,786 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18690 states to 18690 states and 27394 transitions. [2025-03-09 07:00:36,786 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18690 [2025-03-09 07:00:36,800 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18690 [2025-03-09 07:00:36,801 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18690 states and 27394 transitions. [2025-03-09 07:00:36,825 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,825 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-03-09 07:00:36,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18690 states and 27394 transitions. [2025-03-09 07:00:37,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18690 to 18690. [2025-03-09 07:00:37,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18690 states, 18690 states have (on average 1.4657035848047084) internal successors, (27394), 18689 states have internal predecessors, (27394), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:37,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18690 states to 18690 states and 27394 transitions. [2025-03-09 07:00:37,145 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-03-09 07:00:37,146 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:37,147 INFO L432 stractBuchiCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-03-09 07:00:37,147 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-09 07:00:37,147 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18690 states and 27394 transitions. [2025-03-09 07:00:37,247 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 18688 [2025-03-09 07:00:37,247 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:37,247 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:37,248 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:37,248 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:37,248 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:37,248 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:37,248 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:37,248 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 10 times [2025-03-09 07:00:37,249 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:37,249 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [324090053] [2025-03-09 07:00:37,249 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:00:37,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:37,251 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-09 07:00:37,251 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:37,251 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:00:37,251 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:37,252 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:37,252 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:37,253 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:37,253 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:37,253 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:37,254 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:37,254 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:37,254 INFO L85 PathProgramCache]: Analyzing trace with hash -776572855, now seen corresponding path program 1 times [2025-03-09 07:00:37,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:37,255 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [547514205] [2025-03-09 07:00:37,255 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:37,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:37,258 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:37,259 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:37,259 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:37,259 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:37,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:37,274 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:37,274 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [547514205] [2025-03-09 07:00:37,274 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [547514205] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:37,275 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:37,275 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:37,275 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1851880182] [2025-03-09 07:00:37,275 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:37,275 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:37,276 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:37,277 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:37,277 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:37,277 INFO L87 Difference]: Start difference. First operand 18690 states and 27394 transitions. cyclomatic complexity: 9216 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:37,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:37,343 INFO L93 Difference]: Finished difference Result 36866 states and 53250 transitions. [2025-03-09 07:00:37,343 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 36866 states and 53250 transitions. [2025-03-09 07:00:37,483 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 36864 [2025-03-09 07:00:37,723 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 36866 states to 36866 states and 53250 transitions. [2025-03-09 07:00:37,723 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36866 [2025-03-09 07:00:37,746 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36866 [2025-03-09 07:00:37,746 INFO L73 IsDeterministic]: Start isDeterministic. Operand 36866 states and 53250 transitions. [2025-03-09 07:00:37,759 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:37,759 INFO L218 hiAutomatonCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-03-09 07:00:37,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36866 states and 53250 transitions. [2025-03-09 07:00:38,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36866 to 36866. [2025-03-09 07:00:38,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36866 states, 36866 states have (on average 1.4444203330982477) internal successors, (53250), 36865 states have internal predecessors, (53250), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:38,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36866 states to 36866 states and 53250 transitions. [2025-03-09 07:00:38,270 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-03-09 07:00:38,270 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:38,271 INFO L432 stractBuchiCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-03-09 07:00:38,271 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-09 07:00:38,272 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36866 states and 53250 transitions. [2025-03-09 07:00:38,387 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 36864 [2025-03-09 07:00:38,388 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:38,388 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:38,388 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:38,388 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:38,389 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:38,389 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:38,389 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:38,389 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 11 times [2025-03-09 07:00:38,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:38,390 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1064295246] [2025-03-09 07:00:38,390 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:00:38,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:38,393 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:38,395 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:38,396 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:38,397 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:38,397 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:38,398 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:38,399 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:38,399 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:38,400 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:38,401 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:38,401 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:38,401 INFO L85 PathProgramCache]: Analyzing trace with hash -1287107032, now seen corresponding path program 1 times [2025-03-09 07:00:38,401 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:38,401 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1416320279] [2025-03-09 07:00:38,401 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:38,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:38,405 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:38,406 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:38,406 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:38,406 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:38,424 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:38,425 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:38,425 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1416320279] [2025-03-09 07:00:38,425 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1416320279] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:38,425 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:38,425 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:38,425 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1120319761] [2025-03-09 07:00:38,425 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:38,425 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:38,425 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:38,425 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:38,425 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:38,426 INFO L87 Difference]: Start difference. First operand 36866 states and 53250 transitions. cyclomatic complexity: 17408 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:38,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:38,616 INFO L93 Difference]: Finished difference Result 72706 states and 103426 transitions. [2025-03-09 07:00:38,616 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 72706 states and 103426 transitions. [2025-03-09 07:00:39,175 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 72704 [2025-03-09 07:00:39,321 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 72706 states to 72706 states and 103426 transitions. [2025-03-09 07:00:39,321 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 72706 [2025-03-09 07:00:39,358 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 72706 [2025-03-09 07:00:39,358 INFO L73 IsDeterministic]: Start isDeterministic. Operand 72706 states and 103426 transitions. [2025-03-09 07:00:39,396 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:39,397 INFO L218 hiAutomatonCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-03-09 07:00:39,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72706 states and 103426 transitions. [2025-03-09 07:00:39,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72706 to 72706. [2025-03-09 07:00:39,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72706 states, 72706 states have (on average 1.4225235881495337) internal successors, (103426), 72705 states have internal predecessors, (103426), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:40,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72706 states to 72706 states and 103426 transitions. [2025-03-09 07:00:40,241 INFO L240 hiAutomatonCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-03-09 07:00:40,241 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:40,242 INFO L432 stractBuchiCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-03-09 07:00:40,242 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-09 07:00:40,242 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 72706 states and 103426 transitions. [2025-03-09 07:00:40,409 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 72704 [2025-03-09 07:00:40,410 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:40,410 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:40,411 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:40,411 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:40,411 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:40,411 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:40,411 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:40,412 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 12 times [2025-03-09 07:00:40,412 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:40,412 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1363309934] [2025-03-09 07:00:40,412 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:00:40,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:40,414 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:40,415 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:40,415 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-09 07:00:40,415 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:40,415 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:40,416 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:40,416 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:40,417 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:40,417 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:40,418 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:40,497 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:40,497 INFO L85 PathProgramCache]: Analyzing trace with hash 220444777, now seen corresponding path program 1 times [2025-03-09 07:00:40,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:40,497 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [908184454] [2025-03-09 07:00:40,497 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:40,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:40,501 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:40,502 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:40,502 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:40,502 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:40,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:40,513 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:40,513 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [908184454] [2025-03-09 07:00:40,513 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [908184454] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:40,513 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:40,513 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-09 07:00:40,513 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [484571655] [2025-03-09 07:00:40,513 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:40,513 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:40,513 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:40,514 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:40,514 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:40,514 INFO L87 Difference]: Start difference. First operand 72706 states and 103426 transitions. cyclomatic complexity: 32768 Second operand has 3 states, 2 states have (on average 14.0) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:40,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:40,852 INFO L93 Difference]: Finished difference Result 143362 states and 200706 transitions. [2025-03-09 07:00:40,852 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 143362 states and 200706 transitions. [2025-03-09 07:00:41,713 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 143360 [2025-03-09 07:00:42,033 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 143362 states to 143362 states and 200706 transitions. [2025-03-09 07:00:42,034 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 143362 [2025-03-09 07:00:42,111 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 143362 [2025-03-09 07:00:42,111 INFO L73 IsDeterministic]: Start isDeterministic. Operand 143362 states and 200706 transitions. [2025-03-09 07:00:42,192 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:42,192 INFO L218 hiAutomatonCegarLoop]: Abstraction has 143362 states and 200706 transitions. [2025-03-09 07:00:42,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143362 states and 200706 transitions. [2025-03-09 07:00:43,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143362 to 143362. [2025-03-09 07:00:43,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143362 states, 143362 states have (on average 1.399994419720707) internal successors, (200706), 143361 states have internal predecessors, (200706), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:43,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143362 states to 143362 states and 200706 transitions. [2025-03-09 07:00:43,878 INFO L240 hiAutomatonCegarLoop]: Abstraction has 143362 states and 200706 transitions. [2025-03-09 07:00:43,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:43,879 INFO L432 stractBuchiCegarLoop]: Abstraction has 143362 states and 200706 transitions. [2025-03-09 07:00:43,879 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-09 07:00:43,879 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 143362 states and 200706 transitions. [2025-03-09 07:00:44,527 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 143360 [2025-03-09 07:00:44,528 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:44,528 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:44,529 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:44,529 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:44,529 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:44,530 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-03-09 07:00:44,530 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:44,530 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 13 times [2025-03-09 07:00:44,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:44,530 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [129547583] [2025-03-09 07:00:44,530 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-09 07:00:44,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:44,532 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:44,533 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:44,533 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:44,533 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:44,533 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:44,533 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:44,534 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:44,534 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:44,534 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:44,535 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:44,536 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:44,536 INFO L85 PathProgramCache]: Analyzing trace with hash -285113848, now seen corresponding path program 1 times [2025-03-09 07:00:44,536 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:44,536 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326690335] [2025-03-09 07:00:44,536 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:44,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:44,537 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:44,538 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:44,538 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:44,538 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:44,539 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:44,539 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-03-09 07:00:44,541 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-03-09 07:00:44,541 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:44,541 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:44,545 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:44,546 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:44,546 INFO L85 PathProgramCache]: Analyzing trace with hash 763904423, now seen corresponding path program 1 times [2025-03-09 07:00:44,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:44,546 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112085460] [2025-03-09 07:00:44,547 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:44,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:44,549 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:44,554 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:44,554 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:44,554 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:44,554 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:44,555 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:44,556 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:44,558 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:44,558 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:44,561 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:44,942 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:44,943 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:44,943 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:44,943 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:44,944 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:44,947 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:44,948 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:44,948 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:44,948 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:44,970 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 09.03 07:00:44 BoogieIcfgContainer [2025-03-09 07:00:44,970 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-09 07:00:44,970 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-09 07:00:44,970 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-09 07:00:44,971 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-09 07:00:44,971 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:00:34" (3/4) ... [2025-03-09 07:00:44,972 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-03-09 07:00:44,994 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-09 07:00:44,994 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-09 07:00:44,995 INFO L158 Benchmark]: Toolchain (without parser) took 10715.79ms. Allocated memory was 142.6MB in the beginning and 7.8GB in the end (delta: 7.6GB). Free memory was 112.2MB in the beginning and 6.5GB in the end (delta: -6.4GB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. [2025-03-09 07:00:44,995 INFO L158 Benchmark]: CDTParser took 0.21ms. Allocated memory is still 201.3MB. Free memory is still 125.5MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:00:44,995 INFO L158 Benchmark]: CACSL2BoogieTranslator took 189.72ms. Allocated memory is still 142.6MB. Free memory was 111.7MB in the beginning and 100.3MB in the end (delta: 11.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-09 07:00:44,995 INFO L158 Benchmark]: Boogie Procedure Inliner took 26.89ms. Allocated memory is still 142.6MB. Free memory was 100.3MB in the beginning and 98.8MB in the end (delta: 1.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-09 07:00:44,996 INFO L158 Benchmark]: Boogie Preprocessor took 28.99ms. Allocated memory is still 142.6MB. Free memory was 98.8MB in the beginning and 97.4MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:00:44,996 INFO L158 Benchmark]: IcfgBuilder took 334.21ms. Allocated memory is still 142.6MB. Free memory was 97.4MB in the beginning and 82.0MB in the end (delta: 15.4MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-09 07:00:44,996 INFO L158 Benchmark]: BuchiAutomizer took 10106.93ms. Allocated memory was 142.6MB in the beginning and 7.8GB in the end (delta: 7.6GB). Free memory was 82.0MB in the beginning and 6.5GB in the end (delta: -6.5GB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. [2025-03-09 07:00:44,996 INFO L158 Benchmark]: Witness Printer took 24.18ms. Allocated memory is still 7.8GB. Free memory was 6.5GB in the beginning and 6.5GB in the end (delta: 4.3MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:00:44,999 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21ms. Allocated memory is still 201.3MB. Free memory is still 125.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 189.72ms. Allocated memory is still 142.6MB. Free memory was 111.7MB in the beginning and 100.3MB in the end (delta: 11.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 26.89ms. Allocated memory is still 142.6MB. Free memory was 100.3MB in the beginning and 98.8MB in the end (delta: 1.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 28.99ms. Allocated memory is still 142.6MB. Free memory was 98.8MB in the beginning and 97.4MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 334.21ms. Allocated memory is still 142.6MB. Free memory was 97.4MB in the beginning and 82.0MB in the end (delta: 15.4MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 10106.93ms. Allocated memory was 142.6MB in the beginning and 7.8GB in the end (delta: 7.6GB). Free memory was 82.0MB in the beginning and 6.5GB in the end (delta: -6.5GB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. * Witness Printer took 24.18ms. Allocated memory is still 7.8GB. Free memory was 6.5GB in the beginning and 6.5GB in the end (delta: 4.3MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 12 terminating modules (12 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.12 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 143362 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 10.0s and 13 iterations. TraceHistogramMax:1. Analysis of lassos took 1.1s. Construction of modules took 0.1s. Büchi inclusion checks took 7.5s. Highest rank in rank-based complementation 0. Minimization of det autom 12. Minimization of nondet autom 0. Automata minimization 3.7s AutomataMinimizationTime, 12 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 2.6s Buchi closure took 0.1s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 639 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 639 mSDsluCounter, 2002 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 771 mSDsCounter, 24 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 62 IncrementalHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 24 mSolverCounterUnsat, 1231 mSDtfsCounter, 62 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI12 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 50]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L48] int cond; Loop: [L50] COND TRUE 1 [L51] cond = __VERIFIER_nondet_int() [L52] COND FALSE !(cond == 0) [L55] lk1 = 0 [L57] lk2 = 0 [L59] lk3 = 0 [L61] lk4 = 0 [L63] lk5 = 0 [L65] lk6 = 0 [L67] lk7 = 0 [L69] lk8 = 0 [L71] lk9 = 0 [L73] lk10 = 0 [L75] lk11 = 0 [L77] lk12 = 0 [L79] lk13 = 0 [L83] COND FALSE !(p1 != 0) [L87] COND FALSE !(p2 != 0) [L91] COND FALSE !(p3 != 0) [L95] COND FALSE !(p4 != 0) [L99] COND FALSE !(p5 != 0) [L103] COND FALSE !(p6 != 0) [L107] COND FALSE !(p7 != 0) [L111] COND FALSE !(p8 != 0) [L115] COND FALSE !(p9 != 0) [L119] COND FALSE !(p10 != 0) [L123] COND FALSE !(p11 != 0) [L127] COND FALSE !(p12 != 0) [L131] COND FALSE !(p13 != 0) [L137] COND FALSE !(p1 != 0) [L142] COND FALSE !(p2 != 0) [L147] COND FALSE !(p3 != 0) [L152] COND FALSE !(p4 != 0) [L157] COND FALSE !(p5 != 0) [L162] COND FALSE !(p6 != 0) [L167] COND FALSE !(p7 != 0) [L172] COND FALSE !(p8 != 0) [L177] COND FALSE !(p9 != 0) [L182] COND FALSE !(p10 != 0) [L187] COND FALSE !(p11 != 0) [L192] COND FALSE !(p12 != 0) [L197] COND FALSE !(p13 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 50]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L48] int cond; Loop: [L50] COND TRUE 1 [L51] cond = __VERIFIER_nondet_int() [L52] COND FALSE !(cond == 0) [L55] lk1 = 0 [L57] lk2 = 0 [L59] lk3 = 0 [L61] lk4 = 0 [L63] lk5 = 0 [L65] lk6 = 0 [L67] lk7 = 0 [L69] lk8 = 0 [L71] lk9 = 0 [L73] lk10 = 0 [L75] lk11 = 0 [L77] lk12 = 0 [L79] lk13 = 0 [L83] COND FALSE !(p1 != 0) [L87] COND FALSE !(p2 != 0) [L91] COND FALSE !(p3 != 0) [L95] COND FALSE !(p4 != 0) [L99] COND FALSE !(p5 != 0) [L103] COND FALSE !(p6 != 0) [L107] COND FALSE !(p7 != 0) [L111] COND FALSE !(p8 != 0) [L115] COND FALSE !(p9 != 0) [L119] COND FALSE !(p10 != 0) [L123] COND FALSE !(p11 != 0) [L127] COND FALSE !(p12 != 0) [L131] COND FALSE !(p13 != 0) [L137] COND FALSE !(p1 != 0) [L142] COND FALSE !(p2 != 0) [L147] COND FALSE !(p3 != 0) [L152] COND FALSE !(p4 != 0) [L157] COND FALSE !(p5 != 0) [L162] COND FALSE !(p6 != 0) [L167] COND FALSE !(p7 != 0) [L172] COND FALSE !(p8 != 0) [L177] COND FALSE !(p9 != 0) [L182] COND FALSE !(p10 != 0) [L187] COND FALSE !(p11 != 0) [L192] COND FALSE !(p12 != 0) [L197] COND FALSE !(p13 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-03-09 07:00:45,017 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)