./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_14-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e2fb8bed Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_14-1.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1e1f6c8a80d54f6d4b7b413368cc99af6eca243b930331d178961d851b56afbd --- Real Ultimate output --- This is Ultimate 0.3.0-?-e2fb8be-m [2025-03-09 07:00:32,776 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-09 07:00:32,831 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-09 07:00:32,836 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-09 07:00:32,837 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-09 07:00:32,837 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-09 07:00:32,855 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-09 07:00:32,857 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-09 07:00:32,857 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-09 07:00:32,858 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-09 07:00:32,858 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-09 07:00:32,859 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-09 07:00:32,859 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-09 07:00:32,859 INFO L153 SettingsManager]: * Use SBE=true [2025-03-09 07:00:32,859 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-09 07:00:32,859 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-09 07:00:32,859 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-09 07:00:32,859 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-09 07:00:32,860 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-09 07:00:32,860 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-09 07:00:32,860 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-09 07:00:32,860 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-09 07:00:32,860 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-09 07:00:32,860 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-09 07:00:32,860 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-09 07:00:32,860 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-09 07:00:32,860 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-09 07:00:32,860 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-09 07:00:32,860 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-09 07:00:32,860 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-09 07:00:32,861 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-09 07:00:32,861 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-09 07:00:32,861 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-09 07:00:32,861 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-09 07:00:32,861 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-09 07:00:32,861 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-09 07:00:32,861 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-09 07:00:32,861 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-09 07:00:32,861 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-09 07:00:32,862 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-09 07:00:32,862 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1e1f6c8a80d54f6d4b7b413368cc99af6eca243b930331d178961d851b56afbd [2025-03-09 07:00:33,089 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-09 07:00:33,097 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-09 07:00:33,099 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-09 07:00:33,100 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-09 07:00:33,101 INFO L274 PluginConnector]: CDTParser initialized [2025-03-09 07:00:33,102 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_14-1.c [2025-03-09 07:00:34,344 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e09936bc4/56de8b4f602c43feaeabc5e7777e8553/FLAG447f56753 [2025-03-09 07:00:34,578 INFO L384 CDTParser]: Found 1 translation units. [2025-03-09 07:00:34,578 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/locks/test_locks_14-1.c [2025-03-09 07:00:34,590 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e09936bc4/56de8b4f602c43feaeabc5e7777e8553/FLAG447f56753 [2025-03-09 07:00:34,642 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e09936bc4/56de8b4f602c43feaeabc5e7777e8553 [2025-03-09 07:00:34,645 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-09 07:00:34,646 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-09 07:00:34,648 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-09 07:00:34,648 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-09 07:00:34,652 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-09 07:00:34,652 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,653 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@31dfaa8c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34, skipping insertion in model container [2025-03-09 07:00:34,653 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,669 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-09 07:00:34,791 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-09 07:00:34,803 INFO L200 MainTranslator]: Completed pre-run [2025-03-09 07:00:34,827 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-09 07:00:34,836 INFO L204 MainTranslator]: Completed translation [2025-03-09 07:00:34,837 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34 WrapperNode [2025-03-09 07:00:34,837 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-09 07:00:34,838 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-09 07:00:34,838 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-09 07:00:34,838 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-09 07:00:34,841 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,846 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,865 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 179 [2025-03-09 07:00:34,866 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-09 07:00:34,867 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-09 07:00:34,867 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-09 07:00:34,868 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-09 07:00:34,875 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,876 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,877 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,895 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-09 07:00:34,895 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,895 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,897 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,898 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,898 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,899 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,900 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-09 07:00:34,900 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-09 07:00:34,900 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-09 07:00:34,900 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-09 07:00:34,907 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,912 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 07:00:34,922 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:00:34,939 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 07:00:34,953 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-09 07:00:34,972 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-09 07:00:34,973 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-09 07:00:34,973 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-09 07:00:34,973 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-09 07:00:35,038 INFO L256 CfgBuilder]: Building ICFG [2025-03-09 07:00:35,040 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-09 07:00:35,244 INFO L? ?]: Removed 32 outVars from TransFormulas that were not future-live. [2025-03-09 07:00:35,244 INFO L307 CfgBuilder]: Performing block encoding [2025-03-09 07:00:35,252 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-09 07:00:35,252 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-09 07:00:35,252 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:00:35 BoogieIcfgContainer [2025-03-09 07:00:35,253 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-09 07:00:35,253 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-09 07:00:35,253 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-09 07:00:35,259 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-09 07:00:35,260 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:00:35,260 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.03 07:00:34" (1/3) ... [2025-03-09 07:00:35,261 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@977dd4a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.03 07:00:35, skipping insertion in model container [2025-03-09 07:00:35,261 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:00:35,261 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34" (2/3) ... [2025-03-09 07:00:35,261 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@977dd4a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.03 07:00:35, skipping insertion in model container [2025-03-09 07:00:35,261 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:00:35,262 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:00:35" (3/3) ... [2025-03-09 07:00:35,263 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_14-1.c [2025-03-09 07:00:35,302 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-09 07:00:35,302 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-09 07:00:35,302 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-09 07:00:35,302 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-09 07:00:35,303 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-09 07:00:35,303 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-09 07:00:35,303 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-09 07:00:35,303 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-09 07:00:35,307 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 52 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,322 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 44 [2025-03-09 07:00:35,323 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,323 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,327 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,327 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,328 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-09 07:00:35,328 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 52 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,332 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 44 [2025-03-09 07:00:35,332 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,332 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,333 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,334 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,340 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,341 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:35,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,346 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 1 times [2025-03-09 07:00:35,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,360 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1536291470] [2025-03-09 07:00:35,360 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,411 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,421 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,422 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,422 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,423 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:35,426 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,434 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,434 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,434 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,453 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,457 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,457 INFO L85 PathProgramCache]: Analyzing trace with hash 1123980545, now seen corresponding path program 1 times [2025-03-09 07:00:35,457 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,457 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904270531] [2025-03-09 07:00:35,458 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,465 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:35,477 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:35,478 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,478 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:35,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:35,567 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:35,567 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904270531] [2025-03-09 07:00:35,568 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1904270531] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:35,568 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:35,569 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:35,569 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1342093059] [2025-03-09 07:00:35,570 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:35,572 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:35,573 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:35,591 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:35,592 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:35,593 INFO L87 Difference]: Start difference. First operand has 52 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:35,633 INFO L93 Difference]: Finished difference Result 97 states and 177 transitions. [2025-03-09 07:00:35,634 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 97 states and 177 transitions. [2025-03-09 07:00:35,638 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 87 [2025-03-09 07:00:35,645 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 97 states to 89 states and 143 transitions. [2025-03-09 07:00:35,646 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 89 [2025-03-09 07:00:35,646 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 89 [2025-03-09 07:00:35,647 INFO L73 IsDeterministic]: Start isDeterministic. Operand 89 states and 143 transitions. [2025-03-09 07:00:35,647 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:35,647 INFO L218 hiAutomatonCegarLoop]: Abstraction has 89 states and 143 transitions. [2025-03-09 07:00:35,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states and 143 transitions. [2025-03-09 07:00:35,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2025-03-09 07:00:35,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 89 states have (on average 1.6067415730337078) internal successors, (143), 88 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 143 transitions. [2025-03-09 07:00:35,675 INFO L240 hiAutomatonCegarLoop]: Abstraction has 89 states and 143 transitions. [2025-03-09 07:00:35,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:35,678 INFO L432 stractBuchiCegarLoop]: Abstraction has 89 states and 143 transitions. [2025-03-09 07:00:35,681 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-09 07:00:35,682 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 89 states and 143 transitions. [2025-03-09 07:00:35,683 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 87 [2025-03-09 07:00:35,683 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,683 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,684 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,687 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,688 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,688 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:35,688 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,689 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 2 times [2025-03-09 07:00:35,689 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,689 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1828111831] [2025-03-09 07:00:35,689 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:00:35,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,695 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,701 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,702 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:35,702 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,702 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:35,704 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,709 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,709 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,709 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,712 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,713 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,713 INFO L85 PathProgramCache]: Analyzing trace with hash 869244000, now seen corresponding path program 1 times [2025-03-09 07:00:35,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [317949273] [2025-03-09 07:00:35,713 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,723 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:35,737 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:35,738 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,738 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:35,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:35,792 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:35,792 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [317949273] [2025-03-09 07:00:35,792 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [317949273] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:35,793 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:35,793 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:35,793 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1246877917] [2025-03-09 07:00:35,793 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:35,793 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:35,793 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:35,794 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:35,794 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:35,794 INFO L87 Difference]: Start difference. First operand 89 states and 143 transitions. cyclomatic complexity: 56 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:35,816 INFO L93 Difference]: Finished difference Result 174 states and 278 transitions. [2025-03-09 07:00:35,816 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 174 states and 278 transitions. [2025-03-09 07:00:35,818 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 172 [2025-03-09 07:00:35,820 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 174 states to 174 states and 278 transitions. [2025-03-09 07:00:35,820 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 174 [2025-03-09 07:00:35,820 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 174 [2025-03-09 07:00:35,820 INFO L73 IsDeterministic]: Start isDeterministic. Operand 174 states and 278 transitions. [2025-03-09 07:00:35,821 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:35,821 INFO L218 hiAutomatonCegarLoop]: Abstraction has 174 states and 278 transitions. [2025-03-09 07:00:35,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states and 278 transitions. [2025-03-09 07:00:35,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 174. [2025-03-09 07:00:35,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 174 states, 174 states have (on average 1.5977011494252873) internal successors, (278), 173 states have internal predecessors, (278), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 278 transitions. [2025-03-09 07:00:35,827 INFO L240 hiAutomatonCegarLoop]: Abstraction has 174 states and 278 transitions. [2025-03-09 07:00:35,827 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:35,828 INFO L432 stractBuchiCegarLoop]: Abstraction has 174 states and 278 transitions. [2025-03-09 07:00:35,828 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-09 07:00:35,828 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 174 states and 278 transitions. [2025-03-09 07:00:35,829 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 172 [2025-03-09 07:00:35,830 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,830 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,830 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,830 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,830 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,830 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:35,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,831 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 3 times [2025-03-09 07:00:35,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,831 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [888065085] [2025-03-09 07:00:35,831 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:00:35,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,835 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,838 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,838 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-09 07:00:35,839 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,839 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:35,840 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,843 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,845 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,845 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,846 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,848 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,849 INFO L85 PathProgramCache]: Analyzing trace with hash 1830858017, now seen corresponding path program 1 times [2025-03-09 07:00:35,849 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,849 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [972844005] [2025-03-09 07:00:35,849 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,855 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:35,860 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:35,860 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,860 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:35,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:35,899 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:35,900 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [972844005] [2025-03-09 07:00:35,900 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [972844005] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:35,900 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:35,900 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:35,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212318885] [2025-03-09 07:00:35,900 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:35,900 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:35,900 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:35,901 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:35,901 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:35,901 INFO L87 Difference]: Start difference. First operand 174 states and 278 transitions. cyclomatic complexity: 108 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:35,918 INFO L93 Difference]: Finished difference Result 342 states and 542 transitions. [2025-03-09 07:00:35,919 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 342 states and 542 transitions. [2025-03-09 07:00:35,922 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 340 [2025-03-09 07:00:35,924 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 342 states to 342 states and 542 transitions. [2025-03-09 07:00:35,925 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 342 [2025-03-09 07:00:35,925 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 342 [2025-03-09 07:00:35,925 INFO L73 IsDeterministic]: Start isDeterministic. Operand 342 states and 542 transitions. [2025-03-09 07:00:35,926 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:35,926 INFO L218 hiAutomatonCegarLoop]: Abstraction has 342 states and 542 transitions. [2025-03-09 07:00:35,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 342 states and 542 transitions. [2025-03-09 07:00:35,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 342 to 342. [2025-03-09 07:00:35,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 342 states, 342 states have (on average 1.5847953216374269) internal successors, (542), 341 states have internal predecessors, (542), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 342 states to 342 states and 542 transitions. [2025-03-09 07:00:35,943 INFO L240 hiAutomatonCegarLoop]: Abstraction has 342 states and 542 transitions. [2025-03-09 07:00:35,944 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:35,944 INFO L432 stractBuchiCegarLoop]: Abstraction has 342 states and 542 transitions. [2025-03-09 07:00:35,944 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-09 07:00:35,944 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 342 states and 542 transitions. [2025-03-09 07:00:35,961 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 340 [2025-03-09 07:00:35,962 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,962 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,963 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,963 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,963 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,963 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:35,964 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,964 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 4 times [2025-03-09 07:00:35,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,964 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [980871394] [2025-03-09 07:00:35,964 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:00:35,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,971 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-09 07:00:35,973 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,974 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:00:35,974 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,974 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:35,975 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,977 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,977 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,977 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,979 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,979 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,979 INFO L85 PathProgramCache]: Analyzing trace with hash 1861877824, now seen corresponding path program 1 times [2025-03-09 07:00:35,979 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,979 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [899569692] [2025-03-09 07:00:35,979 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,986 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:35,992 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:35,992 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,992 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,010 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [899569692] [2025-03-09 07:00:36,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [899569692] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,010 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,010 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,010 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [759678348] [2025-03-09 07:00:36,010 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,010 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,011 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,011 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,011 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,011 INFO L87 Difference]: Start difference. First operand 342 states and 542 transitions. cyclomatic complexity: 208 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,027 INFO L93 Difference]: Finished difference Result 674 states and 1058 transitions. [2025-03-09 07:00:36,027 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 674 states and 1058 transitions. [2025-03-09 07:00:36,035 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 672 [2025-03-09 07:00:36,038 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 674 states to 674 states and 1058 transitions. [2025-03-09 07:00:36,039 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 674 [2025-03-09 07:00:36,039 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 674 [2025-03-09 07:00:36,040 INFO L73 IsDeterministic]: Start isDeterministic. Operand 674 states and 1058 transitions. [2025-03-09 07:00:36,041 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,041 INFO L218 hiAutomatonCegarLoop]: Abstraction has 674 states and 1058 transitions. [2025-03-09 07:00:36,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 674 states and 1058 transitions. [2025-03-09 07:00:36,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 674 to 674. [2025-03-09 07:00:36,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 674 states, 674 states have (on average 1.5697329376854599) internal successors, (1058), 673 states have internal predecessors, (1058), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 674 states to 674 states and 1058 transitions. [2025-03-09 07:00:36,072 INFO L240 hiAutomatonCegarLoop]: Abstraction has 674 states and 1058 transitions. [2025-03-09 07:00:36,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,075 INFO L432 stractBuchiCegarLoop]: Abstraction has 674 states and 1058 transitions. [2025-03-09 07:00:36,076 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-09 07:00:36,076 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 674 states and 1058 transitions. [2025-03-09 07:00:36,079 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 672 [2025-03-09 07:00:36,079 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,079 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,079 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,079 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,080 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,080 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:36,080 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,080 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 5 times [2025-03-09 07:00:36,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,081 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262545536] [2025-03-09 07:00:36,081 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:00:36,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,085 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,087 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,087 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:36,087 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,087 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,088 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,089 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,089 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,089 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,090 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,091 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,091 INFO L85 PathProgramCache]: Analyzing trace with hash -215331519, now seen corresponding path program 1 times [2025-03-09 07:00:36,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,091 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [128236504] [2025-03-09 07:00:36,091 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,095 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:36,097 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:36,097 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,097 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,115 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,115 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [128236504] [2025-03-09 07:00:36,115 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [128236504] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,115 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,115 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,115 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1881334982] [2025-03-09 07:00:36,115 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,115 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,115 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,116 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,116 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,116 INFO L87 Difference]: Start difference. First operand 674 states and 1058 transitions. cyclomatic complexity: 400 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,143 INFO L93 Difference]: Finished difference Result 1330 states and 2066 transitions. [2025-03-09 07:00:36,143 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1330 states and 2066 transitions. [2025-03-09 07:00:36,153 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1328 [2025-03-09 07:00:36,162 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1330 states to 1330 states and 2066 transitions. [2025-03-09 07:00:36,162 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1330 [2025-03-09 07:00:36,163 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1330 [2025-03-09 07:00:36,163 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1330 states and 2066 transitions. [2025-03-09 07:00:36,167 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,170 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1330 states and 2066 transitions. [2025-03-09 07:00:36,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1330 states and 2066 transitions. [2025-03-09 07:00:36,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1330 to 1330. [2025-03-09 07:00:36,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1330 states, 1330 states have (on average 1.5533834586466166) internal successors, (2066), 1329 states have internal predecessors, (2066), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1330 states to 1330 states and 2066 transitions. [2025-03-09 07:00:36,202 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1330 states and 2066 transitions. [2025-03-09 07:00:36,206 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,206 INFO L432 stractBuchiCegarLoop]: Abstraction has 1330 states and 2066 transitions. [2025-03-09 07:00:36,206 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-09 07:00:36,206 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1330 states and 2066 transitions. [2025-03-09 07:00:36,212 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1328 [2025-03-09 07:00:36,213 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,213 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,213 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,213 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,213 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,214 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:36,214 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,214 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 6 times [2025-03-09 07:00:36,214 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,214 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [900389618] [2025-03-09 07:00:36,214 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:00:36,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,217 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,222 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,222 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-09 07:00:36,222 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,222 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,223 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,224 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,224 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,224 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,225 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,226 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,226 INFO L85 PathProgramCache]: Analyzing trace with hash -282338272, now seen corresponding path program 1 times [2025-03-09 07:00:36,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,226 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446418285] [2025-03-09 07:00:36,226 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,230 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:36,231 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:36,232 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,232 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,259 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,259 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [446418285] [2025-03-09 07:00:36,259 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [446418285] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,259 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,259 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522804442] [2025-03-09 07:00:36,259 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,260 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,260 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,260 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,260 INFO L87 Difference]: Start difference. First operand 1330 states and 2066 transitions. cyclomatic complexity: 768 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,285 INFO L93 Difference]: Finished difference Result 2626 states and 4034 transitions. [2025-03-09 07:00:36,285 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2626 states and 4034 transitions. [2025-03-09 07:00:36,300 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2624 [2025-03-09 07:00:36,312 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2626 states to 2626 states and 4034 transitions. [2025-03-09 07:00:36,313 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2626 [2025-03-09 07:00:36,316 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2626 [2025-03-09 07:00:36,316 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2626 states and 4034 transitions. [2025-03-09 07:00:36,322 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,323 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2626 states and 4034 transitions. [2025-03-09 07:00:36,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2626 states and 4034 transitions. [2025-03-09 07:00:36,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2626 to 2626. [2025-03-09 07:00:36,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2626 states, 2626 states have (on average 1.5361766945925361) internal successors, (4034), 2625 states have internal predecessors, (4034), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2626 states to 2626 states and 4034 transitions. [2025-03-09 07:00:36,399 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2626 states and 4034 transitions. [2025-03-09 07:00:36,399 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,400 INFO L432 stractBuchiCegarLoop]: Abstraction has 2626 states and 4034 transitions. [2025-03-09 07:00:36,401 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-09 07:00:36,402 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2626 states and 4034 transitions. [2025-03-09 07:00:36,412 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2624 [2025-03-09 07:00:36,412 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,412 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,413 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,413 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,414 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,414 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:36,414 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,414 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 7 times [2025-03-09 07:00:36,414 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,414 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [71556166] [2025-03-09 07:00:36,414 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-09 07:00:36,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,418 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,420 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,420 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,421 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,421 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,423 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,425 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,426 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,426 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,427 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,428 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,429 INFO L85 PathProgramCache]: Analyzing trace with hash 962426209, now seen corresponding path program 1 times [2025-03-09 07:00:36,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,429 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1652240638] [2025-03-09 07:00:36,429 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,433 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:36,436 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:36,437 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,437 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,462 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,462 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1652240638] [2025-03-09 07:00:36,463 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1652240638] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,463 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,463 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [569720079] [2025-03-09 07:00:36,463 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,463 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,463 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,464 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,464 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,464 INFO L87 Difference]: Start difference. First operand 2626 states and 4034 transitions. cyclomatic complexity: 1472 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,494 INFO L93 Difference]: Finished difference Result 5186 states and 7874 transitions. [2025-03-09 07:00:36,494 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5186 states and 7874 transitions. [2025-03-09 07:00:36,522 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5184 [2025-03-09 07:00:36,541 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5186 states to 5186 states and 7874 transitions. [2025-03-09 07:00:36,542 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5186 [2025-03-09 07:00:36,545 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5186 [2025-03-09 07:00:36,545 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5186 states and 7874 transitions. [2025-03-09 07:00:36,549 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,549 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5186 states and 7874 transitions. [2025-03-09 07:00:36,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5186 states and 7874 transitions. [2025-03-09 07:00:36,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5186 to 5186. [2025-03-09 07:00:36,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5186 states, 5186 states have (on average 1.5183185499421519) internal successors, (7874), 5185 states have internal predecessors, (7874), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5186 states to 5186 states and 7874 transitions. [2025-03-09 07:00:36,662 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5186 states and 7874 transitions. [2025-03-09 07:00:36,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,664 INFO L432 stractBuchiCegarLoop]: Abstraction has 5186 states and 7874 transitions. [2025-03-09 07:00:36,664 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-09 07:00:36,664 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5186 states and 7874 transitions. [2025-03-09 07:00:36,681 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5184 [2025-03-09 07:00:36,681 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,681 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,682 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,682 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,683 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,683 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:36,683 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,684 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 8 times [2025-03-09 07:00:36,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,684 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1774484998] [2025-03-09 07:00:36,684 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:00:36,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,687 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,689 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,689 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:36,689 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,689 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,690 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,691 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,692 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,692 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,694 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,695 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,695 INFO L85 PathProgramCache]: Analyzing trace with hash -1075630080, now seen corresponding path program 1 times [2025-03-09 07:00:36,696 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,696 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1811022336] [2025-03-09 07:00:36,696 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,703 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:36,705 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:36,706 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,706 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,723 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,723 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1811022336] [2025-03-09 07:00:36,723 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1811022336] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,723 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,723 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1578388244] [2025-03-09 07:00:36,723 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,723 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,724 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,724 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,724 INFO L87 Difference]: Start difference. First operand 5186 states and 7874 transitions. cyclomatic complexity: 2816 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,759 INFO L93 Difference]: Finished difference Result 10242 states and 15362 transitions. [2025-03-09 07:00:36,760 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10242 states and 15362 transitions. [2025-03-09 07:00:36,807 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 10240 [2025-03-09 07:00:36,885 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10242 states to 10242 states and 15362 transitions. [2025-03-09 07:00:36,886 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10242 [2025-03-09 07:00:36,892 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10242 [2025-03-09 07:00:36,892 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10242 states and 15362 transitions. [2025-03-09 07:00:36,899 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,900 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10242 states and 15362 transitions. [2025-03-09 07:00:36,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10242 states and 15362 transitions. [2025-03-09 07:00:37,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10242 to 10242. [2025-03-09 07:00:37,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10242 states, 10242 states have (on average 1.4999023628197619) internal successors, (15362), 10241 states have internal predecessors, (15362), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:37,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10242 states to 10242 states and 15362 transitions. [2025-03-09 07:00:37,108 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10242 states and 15362 transitions. [2025-03-09 07:00:37,109 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:37,112 INFO L432 stractBuchiCegarLoop]: Abstraction has 10242 states and 15362 transitions. [2025-03-09 07:00:37,112 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-09 07:00:37,112 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10242 states and 15362 transitions. [2025-03-09 07:00:37,151 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 10240 [2025-03-09 07:00:37,152 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:37,152 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:37,152 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:37,152 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:37,152 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:37,153 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:37,153 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:37,153 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 9 times [2025-03-09 07:00:37,153 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:37,153 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1055219831] [2025-03-09 07:00:37,153 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:00:37,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:37,158 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:37,160 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:37,160 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-09 07:00:37,160 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:37,160 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:37,161 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:37,162 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:37,162 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:37,162 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:37,163 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:37,163 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:37,166 INFO L85 PathProgramCache]: Analyzing trace with hash -864279167, now seen corresponding path program 1 times [2025-03-09 07:00:37,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:37,166 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [179631898] [2025-03-09 07:00:37,166 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:37,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:37,171 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:37,174 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:37,175 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:37,175 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:37,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:37,199 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:37,199 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [179631898] [2025-03-09 07:00:37,199 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [179631898] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:37,199 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:37,199 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:37,199 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493925196] [2025-03-09 07:00:37,199 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:37,199 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:37,200 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:37,200 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:37,200 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:37,200 INFO L87 Difference]: Start difference. First operand 10242 states and 15362 transitions. cyclomatic complexity: 5376 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:37,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:37,266 INFO L93 Difference]: Finished difference Result 20226 states and 29954 transitions. [2025-03-09 07:00:37,267 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20226 states and 29954 transitions. [2025-03-09 07:00:37,369 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 20224 [2025-03-09 07:00:37,445 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20226 states to 20226 states and 29954 transitions. [2025-03-09 07:00:37,445 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20226 [2025-03-09 07:00:37,462 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20226 [2025-03-09 07:00:37,462 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20226 states and 29954 transitions. [2025-03-09 07:00:37,483 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:37,483 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20226 states and 29954 transitions. [2025-03-09 07:00:37,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20226 states and 29954 transitions. [2025-03-09 07:00:37,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20226 to 20226. [2025-03-09 07:00:37,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20226 states, 20226 states have (on average 1.4809650944329082) internal successors, (29954), 20225 states have internal predecessors, (29954), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:37,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20226 states to 20226 states and 29954 transitions. [2025-03-09 07:00:37,905 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20226 states and 29954 transitions. [2025-03-09 07:00:37,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:37,907 INFO L432 stractBuchiCegarLoop]: Abstraction has 20226 states and 29954 transitions. [2025-03-09 07:00:37,907 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-09 07:00:37,907 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20226 states and 29954 transitions. [2025-03-09 07:00:37,959 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 20224 [2025-03-09 07:00:37,959 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:37,959 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:37,960 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:37,960 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:37,960 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:37,960 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:37,961 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:37,961 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 10 times [2025-03-09 07:00:37,961 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:37,961 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [19566112] [2025-03-09 07:00:37,961 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:00:37,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:37,964 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-09 07:00:37,965 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:37,965 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:00:37,965 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:37,966 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:37,966 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:37,967 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:37,967 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:37,967 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:37,970 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:37,970 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:37,970 INFO L85 PathProgramCache]: Analyzing trace with hash -1273103392, now seen corresponding path program 1 times [2025-03-09 07:00:37,970 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:37,970 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634843706] [2025-03-09 07:00:37,970 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:37,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:37,973 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:37,974 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:37,975 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:37,975 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:37,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:37,990 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:37,990 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [634843706] [2025-03-09 07:00:37,990 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [634843706] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:37,990 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:37,990 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:37,992 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [855504409] [2025-03-09 07:00:37,993 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:37,993 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:37,993 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:37,993 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:37,993 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:37,994 INFO L87 Difference]: Start difference. First operand 20226 states and 29954 transitions. cyclomatic complexity: 10240 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:38,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:38,110 INFO L93 Difference]: Finished difference Result 39938 states and 58370 transitions. [2025-03-09 07:00:38,110 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39938 states and 58370 transitions. [2025-03-09 07:00:38,376 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 39936 [2025-03-09 07:00:38,521 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39938 states to 39938 states and 58370 transitions. [2025-03-09 07:00:38,522 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 39938 [2025-03-09 07:00:38,554 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 39938 [2025-03-09 07:00:38,554 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39938 states and 58370 transitions. [2025-03-09 07:00:38,584 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:38,585 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39938 states and 58370 transitions. [2025-03-09 07:00:38,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39938 states and 58370 transitions. [2025-03-09 07:00:38,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39938 to 39938. [2025-03-09 07:00:39,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39938 states, 39938 states have (on average 1.4615153487906254) internal successors, (58370), 39937 states have internal predecessors, (58370), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:39,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39938 states to 39938 states and 58370 transitions. [2025-03-09 07:00:39,112 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39938 states and 58370 transitions. [2025-03-09 07:00:39,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:39,114 INFO L432 stractBuchiCegarLoop]: Abstraction has 39938 states and 58370 transitions. [2025-03-09 07:00:39,114 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-09 07:00:39,114 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39938 states and 58370 transitions. [2025-03-09 07:00:39,237 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 39936 [2025-03-09 07:00:39,237 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:39,237 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:39,238 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:39,238 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:39,239 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:39,239 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:39,239 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:39,239 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 11 times [2025-03-09 07:00:39,240 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:39,240 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506856524] [2025-03-09 07:00:39,240 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:00:39,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:39,243 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:39,244 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:39,244 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:39,245 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:39,245 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:39,246 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:39,246 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:39,246 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:39,246 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:39,249 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:39,249 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:39,249 INFO L85 PathProgramCache]: Analyzing trace with hash -2117575263, now seen corresponding path program 1 times [2025-03-09 07:00:39,250 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:39,250 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [668841941] [2025-03-09 07:00:39,250 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:39,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:39,254 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:39,255 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:39,255 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:39,255 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:39,275 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:39,276 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:39,277 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [668841941] [2025-03-09 07:00:39,277 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [668841941] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:39,277 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:39,277 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:39,277 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1327568313] [2025-03-09 07:00:39,277 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:39,278 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:39,278 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:39,278 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:39,278 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:39,278 INFO L87 Difference]: Start difference. First operand 39938 states and 58370 transitions. cyclomatic complexity: 19456 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:39,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:39,554 INFO L93 Difference]: Finished difference Result 78850 states and 113666 transitions. [2025-03-09 07:00:39,555 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 78850 states and 113666 transitions. [2025-03-09 07:00:39,951 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 78848 [2025-03-09 07:00:40,240 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 78850 states to 78850 states and 113666 transitions. [2025-03-09 07:00:40,244 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 78850 [2025-03-09 07:00:40,341 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 78850 [2025-03-09 07:00:40,342 INFO L73 IsDeterministic]: Start isDeterministic. Operand 78850 states and 113666 transitions. [2025-03-09 07:00:40,405 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:40,405 INFO L218 hiAutomatonCegarLoop]: Abstraction has 78850 states and 113666 transitions. [2025-03-09 07:00:40,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78850 states and 113666 transitions. [2025-03-09 07:00:41,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78850 to 78850. [2025-03-09 07:00:41,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78850 states, 78850 states have (on average 1.4415472415979709) internal successors, (113666), 78849 states have internal predecessors, (113666), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:41,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78850 states to 78850 states and 113666 transitions. [2025-03-09 07:00:41,454 INFO L240 hiAutomatonCegarLoop]: Abstraction has 78850 states and 113666 transitions. [2025-03-09 07:00:41,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:41,456 INFO L432 stractBuchiCegarLoop]: Abstraction has 78850 states and 113666 transitions. [2025-03-09 07:00:41,456 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-09 07:00:41,456 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78850 states and 113666 transitions. [2025-03-09 07:00:41,755 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 78848 [2025-03-09 07:00:41,755 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:41,755 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:41,756 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:41,756 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:41,756 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:41,757 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:41,757 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:41,758 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 12 times [2025-03-09 07:00:41,758 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:41,758 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [650444634] [2025-03-09 07:00:41,758 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:00:41,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:41,761 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:41,764 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:41,764 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-09 07:00:41,764 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:41,765 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:41,766 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:41,766 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:41,766 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:41,766 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:41,768 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:41,768 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:41,768 INFO L85 PathProgramCache]: Analyzing trace with hash 1180319680, now seen corresponding path program 1 times [2025-03-09 07:00:41,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:41,768 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [656133320] [2025-03-09 07:00:41,769 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:41,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:41,772 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:41,773 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:41,773 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:41,773 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:41,798 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:41,799 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:41,799 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [656133320] [2025-03-09 07:00:41,800 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [656133320] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:41,800 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:41,800 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:41,800 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1121592997] [2025-03-09 07:00:41,800 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:41,801 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:41,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:41,801 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:41,801 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:41,801 INFO L87 Difference]: Start difference. First operand 78850 states and 113666 transitions. cyclomatic complexity: 36864 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:42,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:42,317 INFO L93 Difference]: Finished difference Result 155650 states and 221186 transitions. [2025-03-09 07:00:42,317 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 155650 states and 221186 transitions. [2025-03-09 07:00:43,192 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 155648 [2025-03-09 07:00:43,513 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 155650 states to 155650 states and 221186 transitions. [2025-03-09 07:00:43,514 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 155650 [2025-03-09 07:00:43,580 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 155650 [2025-03-09 07:00:43,580 INFO L73 IsDeterministic]: Start isDeterministic. Operand 155650 states and 221186 transitions. [2025-03-09 07:00:43,664 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:43,664 INFO L218 hiAutomatonCegarLoop]: Abstraction has 155650 states and 221186 transitions. [2025-03-09 07:00:43,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155650 states and 221186 transitions. [2025-03-09 07:00:45,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155650 to 155650. [2025-03-09 07:00:45,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155650 states, 155650 states have (on average 1.4210472213299068) internal successors, (221186), 155649 states have internal predecessors, (221186), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:45,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155650 states to 155650 states and 221186 transitions. [2025-03-09 07:00:45,839 INFO L240 hiAutomatonCegarLoop]: Abstraction has 155650 states and 221186 transitions. [2025-03-09 07:00:45,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:45,840 INFO L432 stractBuchiCegarLoop]: Abstraction has 155650 states and 221186 transitions. [2025-03-09 07:00:45,840 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-09 07:00:45,840 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 155650 states and 221186 transitions. [2025-03-09 07:00:46,135 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 155648 [2025-03-09 07:00:46,135 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:46,135 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:46,138 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:46,138 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:46,138 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:46,138 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:46,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:46,139 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 13 times [2025-03-09 07:00:46,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:46,139 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1602839770] [2025-03-09 07:00:46,139 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-09 07:00:46,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:46,141 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:46,142 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:46,142 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:46,142 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:46,142 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:46,143 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:46,143 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:46,144 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:46,144 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:46,145 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:46,145 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:46,145 INFO L85 PathProgramCache]: Analyzing trace with hash -1761337919, now seen corresponding path program 1 times [2025-03-09 07:00:46,145 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:46,146 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [17187932] [2025-03-09 07:00:46,146 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:46,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:46,258 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:46,262 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:46,262 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:46,262 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:46,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:46,283 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:46,284 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [17187932] [2025-03-09 07:00:46,284 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [17187932] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:46,284 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:46,284 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:46,284 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [932217990] [2025-03-09 07:00:46,284 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:46,284 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:46,284 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:46,284 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:46,285 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:46,285 INFO L87 Difference]: Start difference. First operand 155650 states and 221186 transitions. cyclomatic complexity: 69632 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:47,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:47,041 INFO L93 Difference]: Finished difference Result 307202 states and 430082 transitions. [2025-03-09 07:00:47,041 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 307202 states and 430082 transitions. [2025-03-09 07:00:48,446 INFO L131 ngComponentsAnalysis]: Automaton has 8192 accepting balls. 307200 [2025-03-09 07:00:49,229 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 307202 states to 307202 states and 430082 transitions. [2025-03-09 07:00:49,230 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 307202 [2025-03-09 07:00:49,336 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 307202 [2025-03-09 07:00:49,336 INFO L73 IsDeterministic]: Start isDeterministic. Operand 307202 states and 430082 transitions. [2025-03-09 07:00:49,438 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:49,438 INFO L218 hiAutomatonCegarLoop]: Abstraction has 307202 states and 430082 transitions. [2025-03-09 07:00:49,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307202 states and 430082 transitions. [2025-03-09 07:00:52,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307202 to 307202. [2025-03-09 07:00:52,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 307202 states, 307202 states have (on average 1.3999973958502874) internal successors, (430082), 307201 states have internal predecessors, (430082), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:53,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307202 states to 307202 states and 430082 transitions. [2025-03-09 07:00:53,181 INFO L240 hiAutomatonCegarLoop]: Abstraction has 307202 states and 430082 transitions. [2025-03-09 07:00:53,182 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:53,183 INFO L432 stractBuchiCegarLoop]: Abstraction has 307202 states and 430082 transitions. [2025-03-09 07:00:53,183 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-03-09 07:00:53,183 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 307202 states and 430082 transitions. [2025-03-09 07:00:54,344 INFO L131 ngComponentsAnalysis]: Automaton has 8192 accepting balls. 307200 [2025-03-09 07:00:54,344 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:54,344 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:54,348 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:54,348 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:54,348 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:54,348 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:00:54,348 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:54,348 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 14 times [2025-03-09 07:00:54,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:54,349 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1010645022] [2025-03-09 07:00:54,349 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:00:54,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:54,351 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:54,351 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:54,351 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:54,351 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:54,351 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:54,352 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:54,352 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:54,352 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:54,352 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:54,358 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:54,358 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:54,358 INFO L85 PathProgramCache]: Analyzing trace with hash 2023095200, now seen corresponding path program 1 times [2025-03-09 07:00:54,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:54,358 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870428649] [2025-03-09 07:00:54,359 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:54,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:54,361 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:00:54,365 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:00:54,365 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:54,365 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:54,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:54,381 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:54,381 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [870428649] [2025-03-09 07:00:54,381 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [870428649] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:54,381 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:54,381 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-09 07:00:54,381 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324968226] [2025-03-09 07:00:54,381 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:54,382 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:54,382 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:54,382 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:54,382 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:54,382 INFO L87 Difference]: Start difference. First operand 307202 states and 430082 transitions. cyclomatic complexity: 131072 Second operand has 3 states, 2 states have (on average 15.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:56,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:56,071 INFO L93 Difference]: Finished difference Result 606210 states and 835586 transitions. [2025-03-09 07:00:56,071 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 606210 states and 835586 transitions. [2025-03-09 07:00:59,292 INFO L131 ngComponentsAnalysis]: Automaton has 16384 accepting balls. 606208 [2025-03-09 07:01:00,828 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 606210 states to 606210 states and 835586 transitions. [2025-03-09 07:01:00,828 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 606210 [2025-03-09 07:01:01,109 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 606210 [2025-03-09 07:01:01,109 INFO L73 IsDeterministic]: Start isDeterministic. Operand 606210 states and 835586 transitions. [2025-03-09 07:01:01,345 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:01:01,346 INFO L218 hiAutomatonCegarLoop]: Abstraction has 606210 states and 835586 transitions. [2025-03-09 07:01:01,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 606210 states and 835586 transitions. [2025-03-09 07:01:06,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 606210 to 606210. [2025-03-09 07:01:06,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 606210 states, 606210 states have (on average 1.3783771300374457) internal successors, (835586), 606209 states have internal predecessors, (835586), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:01:08,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606210 states to 606210 states and 835586 transitions. [2025-03-09 07:01:08,957 INFO L240 hiAutomatonCegarLoop]: Abstraction has 606210 states and 835586 transitions. [2025-03-09 07:01:08,960 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:01:08,961 INFO L432 stractBuchiCegarLoop]: Abstraction has 606210 states and 835586 transitions. [2025-03-09 07:01:08,961 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-03-09 07:01:08,961 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 606210 states and 835586 transitions. [2025-03-09 07:01:10,862 INFO L131 ngComponentsAnalysis]: Automaton has 16384 accepting balls. 606208 [2025-03-09 07:01:10,862 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:01:10,862 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:01:10,870 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:01:10,870 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:01:10,870 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-03-09 07:01:10,870 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-03-09 07:01:10,870 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:01:10,870 INFO L85 PathProgramCache]: Analyzing trace with hash 5440, now seen corresponding path program 15 times [2025-03-09 07:01:10,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:01:10,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [852640832] [2025-03-09 07:01:10,871 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:01:10,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:01:10,873 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:01:10,874 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:01:10,874 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-09 07:01:10,874 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:01:10,874 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:01:10,875 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:01:10,875 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:01:10,875 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:01:10,875 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:01:10,876 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:01:10,877 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:01:10,877 INFO L85 PathProgramCache]: Analyzing trace with hash -764320287, now seen corresponding path program 1 times [2025-03-09 07:01:10,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:01:10,877 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262135292] [2025-03-09 07:01:10,877 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:01:10,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:01:10,879 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:01:10,880 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:01:10,880 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:01:10,880 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:01:10,880 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:01:10,881 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-03-09 07:01:10,885 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-03-09 07:01:10,885 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:01:10,885 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:01:10,890 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:01:10,893 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:01:10,894 INFO L85 PathProgramCache]: Analyzing trace with hash 271057632, now seen corresponding path program 1 times [2025-03-09 07:01:10,894 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:01:10,894 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217355197] [2025-03-09 07:01:10,894 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:01:10,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:01:10,900 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-09 07:01:10,901 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-09 07:01:10,902 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:01:10,902 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:01:10,902 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:01:10,903 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-03-09 07:01:10,905 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-03-09 07:01:10,907 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:01:10,907 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:01:10,912 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:01:11,375 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:01:11,377 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:01:11,377 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:01:11,377 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:01:11,377 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:01:11,382 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:01:11,384 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:01:11,384 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:01:11,384 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:01:11,416 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 09.03 07:01:11 BoogieIcfgContainer [2025-03-09 07:01:11,417 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-09 07:01:11,417 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-09 07:01:11,417 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-09 07:01:11,418 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-09 07:01:11,418 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:00:35" (3/4) ... [2025-03-09 07:01:11,420 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-03-09 07:01:11,444 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-09 07:01:11,444 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-09 07:01:11,445 INFO L158 Benchmark]: Toolchain (without parser) took 36798.63ms. Allocated memory was 142.6MB in the beginning and 13.5GB in the end (delta: 13.4GB). Free memory was 107.0MB in the beginning and 8.4GB in the end (delta: -8.3GB). Peak memory consumption was 5.1GB. Max. memory is 16.1GB. [2025-03-09 07:01:11,445 INFO L158 Benchmark]: CDTParser took 0.27ms. Allocated memory is still 201.3MB. Free memory is still 116.5MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:01:11,445 INFO L158 Benchmark]: CACSL2BoogieTranslator took 189.44ms. Allocated memory is still 142.6MB. Free memory was 107.0MB in the beginning and 95.5MB in the end (delta: 11.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-09 07:01:11,445 INFO L158 Benchmark]: Boogie Procedure Inliner took 28.61ms. Allocated memory is still 142.6MB. Free memory was 95.5MB in the beginning and 93.9MB in the end (delta: 1.6MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:01:11,445 INFO L158 Benchmark]: Boogie Preprocessor took 32.92ms. Allocated memory is still 142.6MB. Free memory was 93.9MB in the beginning and 92.3MB in the end (delta: 1.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-09 07:01:11,446 INFO L158 Benchmark]: IcfgBuilder took 352.51ms. Allocated memory is still 142.6MB. Free memory was 92.3MB in the beginning and 76.5MB in the end (delta: 15.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-09 07:01:11,446 INFO L158 Benchmark]: BuchiAutomizer took 36163.39ms. Allocated memory was 142.6MB in the beginning and 13.5GB in the end (delta: 13.4GB). Free memory was 76.5MB in the beginning and 8.4GB in the end (delta: -8.3GB). Peak memory consumption was 5.1GB. Max. memory is 16.1GB. [2025-03-09 07:01:11,446 INFO L158 Benchmark]: Witness Printer took 26.85ms. Allocated memory is still 13.5GB. Free memory was 8.4GB in the beginning and 8.4GB in the end (delta: 4.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:01:11,447 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.27ms. Allocated memory is still 201.3MB. Free memory is still 116.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 189.44ms. Allocated memory is still 142.6MB. Free memory was 107.0MB in the beginning and 95.5MB in the end (delta: 11.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 28.61ms. Allocated memory is still 142.6MB. Free memory was 95.5MB in the beginning and 93.9MB in the end (delta: 1.6MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 32.92ms. Allocated memory is still 142.6MB. Free memory was 93.9MB in the beginning and 92.3MB in the end (delta: 1.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * IcfgBuilder took 352.51ms. Allocated memory is still 142.6MB. Free memory was 92.3MB in the beginning and 76.5MB in the end (delta: 15.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * BuchiAutomizer took 36163.39ms. Allocated memory was 142.6MB in the beginning and 13.5GB in the end (delta: 13.4GB). Free memory was 76.5MB in the beginning and 8.4GB in the end (delta: -8.3GB). Peak memory consumption was 5.1GB. Max. memory is 16.1GB. * Witness Printer took 26.85ms. Allocated memory is still 13.5GB. Free memory was 8.4GB in the beginning and 8.4GB in the end (delta: 4.4MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 14 terminating modules (14 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.14 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 606210 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 36.1s and 15 iterations. TraceHistogramMax:1. Analysis of lassos took 1.5s. Construction of modules took 0.1s. Büchi inclusion checks took 30.4s. Highest rank in rank-based complementation 0. Minimization of det autom 14. Minimization of nondet autom 0. Automata minimization 16.0s AutomataMinimizationTime, 14 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 9.6s Buchi closure took 0.6s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 800 SdHoareTripleChecker+Valid, 0.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 800 mSDsluCounter, 2507 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 968 mSDsCounter, 28 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 72 IncrementalHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 28 mSolverCounterUnsat, 1539 mSDtfsCounter, 72 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI14 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 53]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L51] int cond; Loop: [L53] COND TRUE 1 [L54] cond = __VERIFIER_nondet_int() [L55] COND FALSE !(cond == 0) [L58] lk1 = 0 [L60] lk2 = 0 [L62] lk3 = 0 [L64] lk4 = 0 [L66] lk5 = 0 [L68] lk6 = 0 [L70] lk7 = 0 [L72] lk8 = 0 [L74] lk9 = 0 [L76] lk10 = 0 [L78] lk11 = 0 [L80] lk12 = 0 [L82] lk13 = 0 [L84] lk14 = 0 [L88] COND FALSE !(p1 != 0) [L92] COND FALSE !(p2 != 0) [L96] COND FALSE !(p3 != 0) [L100] COND FALSE !(p4 != 0) [L104] COND FALSE !(p5 != 0) [L108] COND FALSE !(p6 != 0) [L112] COND FALSE !(p7 != 0) [L116] COND FALSE !(p8 != 0) [L120] COND FALSE !(p9 != 0) [L124] COND FALSE !(p10 != 0) [L128] COND FALSE !(p11 != 0) [L132] COND FALSE !(p12 != 0) [L136] COND FALSE !(p13 != 0) [L140] COND FALSE !(p14 != 0) [L146] COND FALSE !(p1 != 0) [L151] COND FALSE !(p2 != 0) [L156] COND FALSE !(p3 != 0) [L161] COND FALSE !(p4 != 0) [L166] COND FALSE !(p5 != 0) [L171] COND FALSE !(p6 != 0) [L176] COND FALSE !(p7 != 0) [L181] COND FALSE !(p8 != 0) [L186] COND FALSE !(p9 != 0) [L191] COND FALSE !(p10 != 0) [L196] COND FALSE !(p11 != 0) [L201] COND FALSE !(p12 != 0) [L206] COND FALSE !(p13 != 0) [L211] COND FALSE !(p14 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 53]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L51] int cond; Loop: [L53] COND TRUE 1 [L54] cond = __VERIFIER_nondet_int() [L55] COND FALSE !(cond == 0) [L58] lk1 = 0 [L60] lk2 = 0 [L62] lk3 = 0 [L64] lk4 = 0 [L66] lk5 = 0 [L68] lk6 = 0 [L70] lk7 = 0 [L72] lk8 = 0 [L74] lk9 = 0 [L76] lk10 = 0 [L78] lk11 = 0 [L80] lk12 = 0 [L82] lk13 = 0 [L84] lk14 = 0 [L88] COND FALSE !(p1 != 0) [L92] COND FALSE !(p2 != 0) [L96] COND FALSE !(p3 != 0) [L100] COND FALSE !(p4 != 0) [L104] COND FALSE !(p5 != 0) [L108] COND FALSE !(p6 != 0) [L112] COND FALSE !(p7 != 0) [L116] COND FALSE !(p8 != 0) [L120] COND FALSE !(p9 != 0) [L124] COND FALSE !(p10 != 0) [L128] COND FALSE !(p11 != 0) [L132] COND FALSE !(p12 != 0) [L136] COND FALSE !(p13 != 0) [L140] COND FALSE !(p14 != 0) [L146] COND FALSE !(p1 != 0) [L151] COND FALSE !(p2 != 0) [L156] COND FALSE !(p3 != 0) [L161] COND FALSE !(p4 != 0) [L166] COND FALSE !(p5 != 0) [L171] COND FALSE !(p6 != 0) [L176] COND FALSE !(p7 != 0) [L181] COND FALSE !(p8 != 0) [L186] COND FALSE !(p9 != 0) [L191] COND FALSE !(p10 != 0) [L196] COND FALSE !(p11 != 0) [L201] COND FALSE !(p12 != 0) [L206] COND FALSE !(p13 != 0) [L211] COND FALSE !(p14 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-03-09 07:01:11,474 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)