./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_15-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version e2fb8bed Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_15-1.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 11a9c91fdf6b42598924d9a4ae5a3db9994a05118a3b564c2bd29b9bad4177b0 --- Real Ultimate output --- This is Ultimate 0.3.0-?-e2fb8be-m [2025-03-09 07:00:32,886 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-09 07:00:32,932 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-03-09 07:00:32,935 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-09 07:00:32,936 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-09 07:00:32,936 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-03-09 07:00:32,961 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-09 07:00:32,961 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-09 07:00:32,962 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-09 07:00:32,962 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-09 07:00:32,963 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-09 07:00:32,963 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-09 07:00:32,963 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-09 07:00:32,963 INFO L153 SettingsManager]: * Use SBE=true [2025-03-09 07:00:32,964 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-03-09 07:00:32,964 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-03-09 07:00:32,964 INFO L153 SettingsManager]: * Use old map elimination=false [2025-03-09 07:00:32,964 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-03-09 07:00:32,964 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-03-09 07:00:32,964 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-03-09 07:00:32,964 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-09 07:00:32,964 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-03-09 07:00:32,964 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-09 07:00:32,964 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-09 07:00:32,965 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-09 07:00:32,965 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-09 07:00:32,965 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-03-09 07:00:32,965 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-03-09 07:00:32,965 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-03-09 07:00:32,965 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-09 07:00:32,965 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-09 07:00:32,965 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-09 07:00:32,965 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-03-09 07:00:32,965 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-09 07:00:32,966 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-09 07:00:32,966 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-09 07:00:32,966 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-09 07:00:32,966 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-09 07:00:32,966 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-09 07:00:32,967 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-03-09 07:00:32,967 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 11a9c91fdf6b42598924d9a4ae5a3db9994a05118a3b564c2bd29b9bad4177b0 [2025-03-09 07:00:33,196 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-09 07:00:33,204 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-09 07:00:33,206 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-09 07:00:33,207 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-09 07:00:33,207 INFO L274 PluginConnector]: CDTParser initialized [2025-03-09 07:00:33,208 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_15-1.c [2025-03-09 07:00:34,375 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9df0e4845/0145b680f23c4cadbf831583c0b1aca9/FLAG04578518d [2025-03-09 07:00:34,605 INFO L384 CDTParser]: Found 1 translation units. [2025-03-09 07:00:34,606 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/locks/test_locks_15-1.c [2025-03-09 07:00:34,618 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9df0e4845/0145b680f23c4cadbf831583c0b1aca9/FLAG04578518d [2025-03-09 07:00:34,950 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9df0e4845/0145b680f23c4cadbf831583c0b1aca9 [2025-03-09 07:00:34,952 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-09 07:00:34,955 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-09 07:00:34,957 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-09 07:00:34,957 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-09 07:00:34,961 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-09 07:00:34,962 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,962 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@139279b1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:34, skipping insertion in model container [2025-03-09 07:00:34,962 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.03 07:00:34" (1/1) ... [2025-03-09 07:00:34,978 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-09 07:00:35,107 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-09 07:00:35,118 INFO L200 MainTranslator]: Completed pre-run [2025-03-09 07:00:35,141 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-09 07:00:35,149 INFO L204 MainTranslator]: Completed translation [2025-03-09 07:00:35,151 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35 WrapperNode [2025-03-09 07:00:35,151 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-09 07:00:35,152 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-09 07:00:35,152 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-09 07:00:35,152 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-09 07:00:35,156 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,161 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,172 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 192 [2025-03-09 07:00:35,172 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-09 07:00:35,172 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-09 07:00:35,172 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-09 07:00:35,172 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-09 07:00:35,178 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,178 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,179 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,186 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-09 07:00:35,186 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,186 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,189 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,189 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,190 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,191 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,192 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-09 07:00:35,192 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-09 07:00:35,192 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-09 07:00:35,192 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-09 07:00:35,193 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (1/1) ... [2025-03-09 07:00:35,197 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-03-09 07:00:35,206 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-09 07:00:35,221 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-03-09 07:00:35,225 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-03-09 07:00:35,243 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-09 07:00:35,243 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-09 07:00:35,243 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-09 07:00:35,243 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-09 07:00:35,296 INFO L256 CfgBuilder]: Building ICFG [2025-03-09 07:00:35,297 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-09 07:00:35,547 INFO L? ?]: Removed 36 outVars from TransFormulas that were not future-live. [2025-03-09 07:00:35,547 INFO L307 CfgBuilder]: Performing block encoding [2025-03-09 07:00:35,554 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-09 07:00:35,555 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-09 07:00:35,555 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:00:35 BoogieIcfgContainer [2025-03-09 07:00:35,555 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-09 07:00:35,556 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-03-09 07:00:35,556 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-03-09 07:00:35,560 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-03-09 07:00:35,561 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:00:35,561 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.03 07:00:34" (1/3) ... [2025-03-09 07:00:35,562 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@28220f4a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.03 07:00:35, skipping insertion in model container [2025-03-09 07:00:35,562 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:00:35,562 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.03 07:00:35" (2/3) ... [2025-03-09 07:00:35,562 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@28220f4a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.03 07:00:35, skipping insertion in model container [2025-03-09 07:00:35,562 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-03-09 07:00:35,562 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:00:35" (3/3) ... [2025-03-09 07:00:35,563 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_15-1.c [2025-03-09 07:00:35,599 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-03-09 07:00:35,599 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-03-09 07:00:35,599 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-03-09 07:00:35,599 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-03-09 07:00:35,599 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-03-09 07:00:35,599 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-03-09 07:00:35,599 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-03-09 07:00:35,599 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-03-09 07:00:35,605 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,618 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2025-03-09 07:00:35,618 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,618 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,625 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,625 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,625 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-03-09 07:00:35,626 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,630 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2025-03-09 07:00:35,630 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,630 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,631 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,631 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,637 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,637 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:35,641 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,641 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 1 times [2025-03-09 07:00:35,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,647 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [716194704] [2025-03-09 07:00:35,647 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,704 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,714 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,715 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,715 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,715 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:35,718 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,723 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,723 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,723 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,738 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:35,742 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,742 INFO L85 PathProgramCache]: Analyzing trace with hash 1132856352, now seen corresponding path program 1 times [2025-03-09 07:00:35,742 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,743 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560034184] [2025-03-09 07:00:35,743 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:35,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,760 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:35,775 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:35,777 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:35,777 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:35,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:35,869 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:35,869 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1560034184] [2025-03-09 07:00:35,870 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1560034184] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:35,871 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:35,871 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:35,871 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [637036280] [2025-03-09 07:00:35,872 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:35,874 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:35,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:35,895 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:35,895 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:35,898 INFO L87 Difference]: Start difference. First operand has 55 states, 54 states have (on average 1.8703703703703705) internal successors, (101), 54 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:35,939 INFO L93 Difference]: Finished difference Result 103 states and 189 transitions. [2025-03-09 07:00:35,940 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 103 states and 189 transitions. [2025-03-09 07:00:35,944 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 93 [2025-03-09 07:00:35,950 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 103 states to 95 states and 149 transitions. [2025-03-09 07:00:35,951 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2025-03-09 07:00:35,952 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2025-03-09 07:00:35,953 INFO L73 IsDeterministic]: Start isDeterministic. Operand 95 states and 149 transitions. [2025-03-09 07:00:35,954 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:35,954 INFO L218 hiAutomatonCegarLoop]: Abstraction has 95 states and 149 transitions. [2025-03-09 07:00:35,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states and 149 transitions. [2025-03-09 07:00:35,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 95. [2025-03-09 07:00:35,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.568421052631579) internal successors, (149), 94 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:35,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 149 transitions. [2025-03-09 07:00:35,981 INFO L240 hiAutomatonCegarLoop]: Abstraction has 95 states and 149 transitions. [2025-03-09 07:00:35,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:35,984 INFO L432 stractBuchiCegarLoop]: Abstraction has 95 states and 149 transitions. [2025-03-09 07:00:35,985 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-03-09 07:00:35,986 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 149 transitions. [2025-03-09 07:00:35,989 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 93 [2025-03-09 07:00:35,989 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:35,989 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:35,989 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:35,989 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:35,989 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:35,989 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:35,990 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:35,990 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 2 times [2025-03-09 07:00:35,990 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:35,990 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [7732333] [2025-03-09 07:00:35,990 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:00:35,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:35,994 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:35,997 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:35,997 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:35,998 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:35,998 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,000 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,003 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,004 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,004 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,005 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,008 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,008 INFO L85 PathProgramCache]: Analyzing trace with hash -877247489, now seen corresponding path program 1 times [2025-03-09 07:00:36,009 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,009 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1279663781] [2025-03-09 07:00:36,009 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,015 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:36,020 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:36,020 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,020 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,056 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1279663781] [2025-03-09 07:00:36,056 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1279663781] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,056 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,056 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,056 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [370203438] [2025-03-09 07:00:36,057 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,057 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,057 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,057 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,057 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,058 INFO L87 Difference]: Start difference. First operand 95 states and 149 transitions. cyclomatic complexity: 56 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,072 INFO L93 Difference]: Finished difference Result 186 states and 290 transitions. [2025-03-09 07:00:36,073 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 186 states and 290 transitions. [2025-03-09 07:00:36,075 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 184 [2025-03-09 07:00:36,079 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 186 states to 186 states and 290 transitions. [2025-03-09 07:00:36,080 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 186 [2025-03-09 07:00:36,080 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 186 [2025-03-09 07:00:36,080 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 290 transitions. [2025-03-09 07:00:36,081 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,081 INFO L218 hiAutomatonCegarLoop]: Abstraction has 186 states and 290 transitions. [2025-03-09 07:00:36,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 290 transitions. [2025-03-09 07:00:36,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2025-03-09 07:00:36,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 186 states, 186 states have (on average 1.5591397849462365) internal successors, (290), 185 states have internal predecessors, (290), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 290 transitions. [2025-03-09 07:00:36,094 INFO L240 hiAutomatonCegarLoop]: Abstraction has 186 states and 290 transitions. [2025-03-09 07:00:36,095 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,095 INFO L432 stractBuchiCegarLoop]: Abstraction has 186 states and 290 transitions. [2025-03-09 07:00:36,095 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-03-09 07:00:36,095 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 186 states and 290 transitions. [2025-03-09 07:00:36,097 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 184 [2025-03-09 07:00:36,097 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,097 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,098 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,098 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,098 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,098 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:36,099 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,099 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 3 times [2025-03-09 07:00:36,099 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,099 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1420455584] [2025-03-09 07:00:36,099 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:00:36,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,104 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,106 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,106 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-09 07:00:36,106 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,107 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,108 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,112 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,113 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,113 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,115 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,116 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,116 INFO L85 PathProgramCache]: Analyzing trace with hash -865931362, now seen corresponding path program 1 times [2025-03-09 07:00:36,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,116 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1500439161] [2025-03-09 07:00:36,116 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,124 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:36,132 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:36,132 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,132 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,155 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,155 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,155 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1500439161] [2025-03-09 07:00:36,155 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1500439161] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,155 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,155 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,156 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2054448316] [2025-03-09 07:00:36,156 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,156 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,156 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,156 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,156 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,157 INFO L87 Difference]: Start difference. First operand 186 states and 290 transitions. cyclomatic complexity: 108 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,171 INFO L93 Difference]: Finished difference Result 366 states and 566 transitions. [2025-03-09 07:00:36,171 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 366 states and 566 transitions. [2025-03-09 07:00:36,175 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 364 [2025-03-09 07:00:36,182 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 366 states to 366 states and 566 transitions. [2025-03-09 07:00:36,183 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 366 [2025-03-09 07:00:36,183 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 366 [2025-03-09 07:00:36,186 INFO L73 IsDeterministic]: Start isDeterministic. Operand 366 states and 566 transitions. [2025-03-09 07:00:36,188 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,188 INFO L218 hiAutomatonCegarLoop]: Abstraction has 366 states and 566 transitions. [2025-03-09 07:00:36,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states and 566 transitions. [2025-03-09 07:00:36,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 366. [2025-03-09 07:00:36,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 366 states, 366 states have (on average 1.546448087431694) internal successors, (566), 365 states have internal predecessors, (566), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 566 transitions. [2025-03-09 07:00:36,205 INFO L240 hiAutomatonCegarLoop]: Abstraction has 366 states and 566 transitions. [2025-03-09 07:00:36,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,206 INFO L432 stractBuchiCegarLoop]: Abstraction has 366 states and 566 transitions. [2025-03-09 07:00:36,206 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-03-09 07:00:36,206 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 366 states and 566 transitions. [2025-03-09 07:00:36,213 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 364 [2025-03-09 07:00:36,213 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,213 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,214 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,214 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,214 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,214 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:36,214 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,214 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 4 times [2025-03-09 07:00:36,214 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,214 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [271068169] [2025-03-09 07:00:36,214 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:00:36,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,219 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-09 07:00:36,221 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,221 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:00:36,221 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,221 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,222 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,223 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,224 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,224 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,225 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,226 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,226 INFO L85 PathProgramCache]: Analyzing trace with hash -172829665, now seen corresponding path program 1 times [2025-03-09 07:00:36,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,226 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [777811798] [2025-03-09 07:00:36,226 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,233 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:36,236 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:36,236 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,236 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [777811798] [2025-03-09 07:00:36,261 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [777811798] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,261 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,261 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,261 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [857289499] [2025-03-09 07:00:36,261 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,262 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,262 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,262 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,262 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,262 INFO L87 Difference]: Start difference. First operand 366 states and 566 transitions. cyclomatic complexity: 208 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,278 INFO L93 Difference]: Finished difference Result 722 states and 1106 transitions. [2025-03-09 07:00:36,278 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 722 states and 1106 transitions. [2025-03-09 07:00:36,282 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 720 [2025-03-09 07:00:36,288 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 722 states to 722 states and 1106 transitions. [2025-03-09 07:00:36,288 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 722 [2025-03-09 07:00:36,289 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 722 [2025-03-09 07:00:36,289 INFO L73 IsDeterministic]: Start isDeterministic. Operand 722 states and 1106 transitions. [2025-03-09 07:00:36,291 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,293 INFO L218 hiAutomatonCegarLoop]: Abstraction has 722 states and 1106 transitions. [2025-03-09 07:00:36,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 722 states and 1106 transitions. [2025-03-09 07:00:36,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 722 to 722. [2025-03-09 07:00:36,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 722 states, 722 states have (on average 1.5318559556786704) internal successors, (1106), 721 states have internal predecessors, (1106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 722 states to 722 states and 1106 transitions. [2025-03-09 07:00:36,332 INFO L240 hiAutomatonCegarLoop]: Abstraction has 722 states and 1106 transitions. [2025-03-09 07:00:36,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,332 INFO L432 stractBuchiCegarLoop]: Abstraction has 722 states and 1106 transitions. [2025-03-09 07:00:36,332 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-03-09 07:00:36,333 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 722 states and 1106 transitions. [2025-03-09 07:00:36,335 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 720 [2025-03-09 07:00:36,335 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,335 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,336 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,336 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,336 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,336 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:36,336 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,336 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 5 times [2025-03-09 07:00:36,337 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,337 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535931203] [2025-03-09 07:00:36,337 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:00:36,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,340 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,341 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,341 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:36,341 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,341 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,342 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,343 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,343 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,343 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,349 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,350 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,350 INFO L85 PathProgramCache]: Analyzing trace with hash -427566210, now seen corresponding path program 1 times [2025-03-09 07:00:36,350 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,350 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050576505] [2025-03-09 07:00:36,350 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,357 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:36,360 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:36,363 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,363 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,393 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,393 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050576505] [2025-03-09 07:00:36,393 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1050576505] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,393 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,393 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,393 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005862480] [2025-03-09 07:00:36,393 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,393 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,394 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,394 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,394 INFO L87 Difference]: Start difference. First operand 722 states and 1106 transitions. cyclomatic complexity: 400 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,419 INFO L93 Difference]: Finished difference Result 1426 states and 2162 transitions. [2025-03-09 07:00:36,419 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1426 states and 2162 transitions. [2025-03-09 07:00:36,437 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1424 [2025-03-09 07:00:36,446 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1426 states to 1426 states and 2162 transitions. [2025-03-09 07:00:36,447 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1426 [2025-03-09 07:00:36,448 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1426 [2025-03-09 07:00:36,449 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1426 states and 2162 transitions. [2025-03-09 07:00:36,450 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,450 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1426 states and 2162 transitions. [2025-03-09 07:00:36,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1426 states and 2162 transitions. [2025-03-09 07:00:36,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1426 to 1426. [2025-03-09 07:00:36,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1426 states, 1426 states have (on average 1.5161290322580645) internal successors, (2162), 1425 states have internal predecessors, (2162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1426 states to 1426 states and 2162 transitions. [2025-03-09 07:00:36,475 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1426 states and 2162 transitions. [2025-03-09 07:00:36,475 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,476 INFO L432 stractBuchiCegarLoop]: Abstraction has 1426 states and 2162 transitions. [2025-03-09 07:00:36,477 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-03-09 07:00:36,477 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1426 states and 2162 transitions. [2025-03-09 07:00:36,483 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1424 [2025-03-09 07:00:36,483 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,484 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,485 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,485 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,485 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,485 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:36,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,486 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 6 times [2025-03-09 07:00:36,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103104972] [2025-03-09 07:00:36,486 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:00:36,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,490 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,492 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,495 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-09 07:00:36,496 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,496 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,497 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,498 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,498 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,498 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,499 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,501 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,501 INFO L85 PathProgramCache]: Analyzing trace with hash 534047807, now seen corresponding path program 1 times [2025-03-09 07:00:36,501 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,502 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [131594846] [2025-03-09 07:00:36,502 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,509 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:36,512 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:36,513 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,513 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,530 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [131594846] [2025-03-09 07:00:36,530 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [131594846] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,530 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,530 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,530 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1850071291] [2025-03-09 07:00:36,530 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,530 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,530 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,531 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,531 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,531 INFO L87 Difference]: Start difference. First operand 1426 states and 2162 transitions. cyclomatic complexity: 768 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,559 INFO L93 Difference]: Finished difference Result 2818 states and 4226 transitions. [2025-03-09 07:00:36,559 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2818 states and 4226 transitions. [2025-03-09 07:00:36,575 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2816 [2025-03-09 07:00:36,586 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2818 states to 2818 states and 4226 transitions. [2025-03-09 07:00:36,587 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2818 [2025-03-09 07:00:36,589 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2818 [2025-03-09 07:00:36,589 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2818 states and 4226 transitions. [2025-03-09 07:00:36,592 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,592 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2818 states and 4226 transitions. [2025-03-09 07:00:36,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2818 states and 4226 transitions. [2025-03-09 07:00:36,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2818 to 2818. [2025-03-09 07:00:36,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2818 states, 2818 states have (on average 1.4996451383960256) internal successors, (4226), 2817 states have internal predecessors, (4226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2818 states to 2818 states and 4226 transitions. [2025-03-09 07:00:36,636 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2818 states and 4226 transitions. [2025-03-09 07:00:36,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,637 INFO L432 stractBuchiCegarLoop]: Abstraction has 2818 states and 4226 transitions. [2025-03-09 07:00:36,637 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-03-09 07:00:36,637 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2818 states and 4226 transitions. [2025-03-09 07:00:36,648 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2816 [2025-03-09 07:00:36,648 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,648 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,649 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,649 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,649 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,649 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:36,650 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,650 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 7 times [2025-03-09 07:00:36,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,650 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700607121] [2025-03-09 07:00:36,650 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-09 07:00:36,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,652 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,654 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,654 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,654 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,654 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,655 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,656 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,656 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,656 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,657 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,657 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,657 INFO L85 PathProgramCache]: Analyzing trace with hash 565067614, now seen corresponding path program 1 times [2025-03-09 07:00:36,657 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,658 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2032934012] [2025-03-09 07:00:36,658 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,666 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:36,669 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:36,669 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,670 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,728 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2032934012] [2025-03-09 07:00:36,728 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2032934012] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,728 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,728 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,728 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1598521245] [2025-03-09 07:00:36,728 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,728 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,728 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,729 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,729 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,729 INFO L87 Difference]: Start difference. First operand 2818 states and 4226 transitions. cyclomatic complexity: 1472 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:36,760 INFO L93 Difference]: Finished difference Result 5570 states and 8258 transitions. [2025-03-09 07:00:36,760 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5570 states and 8258 transitions. [2025-03-09 07:00:36,789 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5568 [2025-03-09 07:00:36,809 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5570 states to 5570 states and 8258 transitions. [2025-03-09 07:00:36,810 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5570 [2025-03-09 07:00:36,814 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5570 [2025-03-09 07:00:36,814 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5570 states and 8258 transitions. [2025-03-09 07:00:36,821 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:36,821 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5570 states and 8258 transitions. [2025-03-09 07:00:36,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5570 states and 8258 transitions. [2025-03-09 07:00:36,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5570 to 5570. [2025-03-09 07:00:36,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5570 states, 5570 states have (on average 1.4825852782764812) internal successors, (8258), 5569 states have internal predecessors, (8258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:36,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5570 states to 5570 states and 8258 transitions. [2025-03-09 07:00:36,904 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5570 states and 8258 transitions. [2025-03-09 07:00:36,904 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:36,905 INFO L432 stractBuchiCegarLoop]: Abstraction has 5570 states and 8258 transitions. [2025-03-09 07:00:36,905 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-03-09 07:00:36,905 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5570 states and 8258 transitions. [2025-03-09 07:00:36,925 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5568 [2025-03-09 07:00:36,925 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:36,925 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:36,926 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:36,927 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:36,927 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:36,927 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:36,927 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,928 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 8 times [2025-03-09 07:00:36,928 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,928 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267086235] [2025-03-09 07:00:36,928 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-09 07:00:36,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,931 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,932 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,933 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:36,933 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,933 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:36,934 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:36,935 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:36,935 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,935 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:36,937 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:36,938 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:36,938 INFO L85 PathProgramCache]: Analyzing trace with hash 498060861, now seen corresponding path program 1 times [2025-03-09 07:00:36,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:36,938 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676633762] [2025-03-09 07:00:36,938 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:36,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:36,944 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:36,946 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:36,946 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:36,946 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:36,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:36,971 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:36,971 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676633762] [2025-03-09 07:00:36,971 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1676633762] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:36,971 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:36,971 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:36,972 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1184082700] [2025-03-09 07:00:36,972 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:36,972 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:36,975 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:36,975 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:36,975 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:36,976 INFO L87 Difference]: Start difference. First operand 5570 states and 8258 transitions. cyclomatic complexity: 2816 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:37,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:37,040 INFO L93 Difference]: Finished difference Result 11010 states and 16130 transitions. [2025-03-09 07:00:37,040 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11010 states and 16130 transitions. [2025-03-09 07:00:37,088 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 11008 [2025-03-09 07:00:37,124 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11010 states to 11010 states and 16130 transitions. [2025-03-09 07:00:37,124 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11010 [2025-03-09 07:00:37,130 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11010 [2025-03-09 07:00:37,131 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11010 states and 16130 transitions. [2025-03-09 07:00:37,143 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:37,143 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11010 states and 16130 transitions. [2025-03-09 07:00:37,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11010 states and 16130 transitions. [2025-03-09 07:00:37,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11010 to 11010. [2025-03-09 07:00:37,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11010 states, 11010 states have (on average 1.4650317892824705) internal successors, (16130), 11009 states have internal predecessors, (16130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:37,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11010 states to 11010 states and 16130 transitions. [2025-03-09 07:00:37,326 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11010 states and 16130 transitions. [2025-03-09 07:00:37,327 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:37,328 INFO L432 stractBuchiCegarLoop]: Abstraction has 11010 states and 16130 transitions. [2025-03-09 07:00:37,328 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-03-09 07:00:37,329 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11010 states and 16130 transitions. [2025-03-09 07:00:37,359 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 11008 [2025-03-09 07:00:37,360 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:37,360 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:37,360 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:37,360 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:37,360 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:37,360 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:37,361 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:37,361 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 9 times [2025-03-09 07:00:37,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:37,361 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048671794] [2025-03-09 07:00:37,361 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-03-09 07:00:37,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:37,365 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:37,367 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:37,368 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-03-09 07:00:37,368 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:37,368 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:37,369 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:37,371 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:37,371 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:37,371 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:37,372 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:37,373 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:37,373 INFO L85 PathProgramCache]: Analyzing trace with hash 1742825342, now seen corresponding path program 1 times [2025-03-09 07:00:37,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:37,373 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863193028] [2025-03-09 07:00:37,373 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:37,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:37,378 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:37,384 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:37,384 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:37,384 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:37,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:37,399 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:37,399 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [863193028] [2025-03-09 07:00:37,399 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [863193028] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:37,399 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:37,399 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:37,399 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869572215] [2025-03-09 07:00:37,399 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:37,457 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:37,457 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:37,457 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:37,457 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:37,457 INFO L87 Difference]: Start difference. First operand 11010 states and 16130 transitions. cyclomatic complexity: 5376 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:37,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:37,508 INFO L93 Difference]: Finished difference Result 21762 states and 31490 transitions. [2025-03-09 07:00:37,508 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21762 states and 31490 transitions. [2025-03-09 07:00:37,617 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 21760 [2025-03-09 07:00:37,706 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21762 states to 21762 states and 31490 transitions. [2025-03-09 07:00:37,707 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21762 [2025-03-09 07:00:37,725 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21762 [2025-03-09 07:00:37,726 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21762 states and 31490 transitions. [2025-03-09 07:00:37,756 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:37,756 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21762 states and 31490 transitions. [2025-03-09 07:00:37,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21762 states and 31490 transitions. [2025-03-09 07:00:38,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21762 to 21762. [2025-03-09 07:00:38,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21762 states, 21762 states have (on average 1.447017737340318) internal successors, (31490), 21761 states have internal predecessors, (31490), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:38,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21762 states to 21762 states and 31490 transitions. [2025-03-09 07:00:38,234 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21762 states and 31490 transitions. [2025-03-09 07:00:38,234 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:38,236 INFO L432 stractBuchiCegarLoop]: Abstraction has 21762 states and 31490 transitions. [2025-03-09 07:00:38,236 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-03-09 07:00:38,236 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21762 states and 31490 transitions. [2025-03-09 07:00:38,320 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 21760 [2025-03-09 07:00:38,320 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:38,320 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:38,321 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:38,321 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:38,321 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:38,321 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:38,321 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:38,321 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 10 times [2025-03-09 07:00:38,322 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:38,322 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1510906138] [2025-03-09 07:00:38,322 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-03-09 07:00:38,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:38,325 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-03-09 07:00:38,328 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:38,328 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-03-09 07:00:38,328 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:38,328 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:38,329 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:38,331 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:38,332 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:38,332 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:38,333 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:38,333 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:38,333 INFO L85 PathProgramCache]: Analyzing trace with hash -295230947, now seen corresponding path program 1 times [2025-03-09 07:00:38,333 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:38,333 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390366793] [2025-03-09 07:00:38,333 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:38,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:38,338 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:38,339 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:38,339 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:38,339 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:38,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:38,351 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:38,351 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1390366793] [2025-03-09 07:00:38,351 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1390366793] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:38,351 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:38,351 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:38,351 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1746503536] [2025-03-09 07:00:38,351 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:38,352 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:38,352 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:38,352 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:38,352 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:38,352 INFO L87 Difference]: Start difference. First operand 21762 states and 31490 transitions. cyclomatic complexity: 10240 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:38,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:38,431 INFO L93 Difference]: Finished difference Result 43010 states and 61442 transitions. [2025-03-09 07:00:38,431 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43010 states and 61442 transitions. [2025-03-09 07:00:38,666 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 43008 [2025-03-09 07:00:38,787 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43010 states to 43010 states and 61442 transitions. [2025-03-09 07:00:38,787 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43010 [2025-03-09 07:00:38,820 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43010 [2025-03-09 07:00:38,821 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43010 states and 61442 transitions. [2025-03-09 07:00:38,851 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:38,851 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43010 states and 61442 transitions. [2025-03-09 07:00:38,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43010 states and 61442 transitions. [2025-03-09 07:00:39,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43010 to 43010. [2025-03-09 07:00:39,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43010 states, 43010 states have (on average 1.4285514996512438) internal successors, (61442), 43009 states have internal predecessors, (61442), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:39,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43010 states to 43010 states and 61442 transitions. [2025-03-09 07:00:39,499 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43010 states and 61442 transitions. [2025-03-09 07:00:39,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:39,500 INFO L432 stractBuchiCegarLoop]: Abstraction has 43010 states and 61442 transitions. [2025-03-09 07:00:39,500 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-03-09 07:00:39,500 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43010 states and 61442 transitions. [2025-03-09 07:00:39,624 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 43008 [2025-03-09 07:00:39,625 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:39,625 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:39,626 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:39,626 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:39,626 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:39,627 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:39,627 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:39,627 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 11 times [2025-03-09 07:00:39,627 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:39,627 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1026448618] [2025-03-09 07:00:39,627 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-03-09 07:00:39,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:39,631 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:39,632 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:39,633 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-03-09 07:00:39,633 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:39,633 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:39,634 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:39,636 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:39,637 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:39,637 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:39,639 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:39,641 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:39,641 INFO L85 PathProgramCache]: Analyzing trace with hash -83880034, now seen corresponding path program 1 times [2025-03-09 07:00:39,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:39,641 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057773489] [2025-03-09 07:00:39,642 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:39,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:39,645 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:39,647 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:39,647 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:39,647 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:39,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:39,664 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:39,664 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1057773489] [2025-03-09 07:00:39,664 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1057773489] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:39,664 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:39,664 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-09 07:00:39,664 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231123716] [2025-03-09 07:00:39,664 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:39,664 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:39,664 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:39,665 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:39,665 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:39,665 INFO L87 Difference]: Start difference. First operand 43010 states and 61442 transitions. cyclomatic complexity: 19456 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:40,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:40,056 INFO L93 Difference]: Finished difference Result 84994 states and 119810 transitions. [2025-03-09 07:00:40,056 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 84994 states and 119810 transitions. [2025-03-09 07:00:40,316 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 84992 [2025-03-09 07:00:40,600 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 84994 states to 84994 states and 119810 transitions. [2025-03-09 07:00:40,600 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84994 [2025-03-09 07:00:40,627 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84994 [2025-03-09 07:00:40,627 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84994 states and 119810 transitions. [2025-03-09 07:00:40,657 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:40,657 INFO L218 hiAutomatonCegarLoop]: Abstraction has 84994 states and 119810 transitions. [2025-03-09 07:00:40,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84994 states and 119810 transitions. [2025-03-09 07:00:41,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84994 to 84994. [2025-03-09 07:00:41,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84994 states, 84994 states have (on average 1.409628914982234) internal successors, (119810), 84993 states have internal predecessors, (119810), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:41,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84994 states to 84994 states and 119810 transitions. [2025-03-09 07:00:41,721 INFO L240 hiAutomatonCegarLoop]: Abstraction has 84994 states and 119810 transitions. [2025-03-09 07:00:41,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:41,722 INFO L432 stractBuchiCegarLoop]: Abstraction has 84994 states and 119810 transitions. [2025-03-09 07:00:41,722 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-03-09 07:00:41,722 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 84994 states and 119810 transitions. [2025-03-09 07:00:42,058 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 84992 [2025-03-09 07:00:42,059 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:42,059 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:42,060 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:42,060 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:42,060 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:42,060 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:42,060 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:42,061 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 12 times [2025-03-09 07:00:42,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:42,061 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017578555] [2025-03-09 07:00:42,061 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-03-09 07:00:42,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:42,063 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:42,063 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:42,064 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-03-09 07:00:42,064 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:42,064 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:42,064 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:42,065 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:42,065 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:42,065 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:42,066 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:42,066 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:42,066 INFO L85 PathProgramCache]: Analyzing trace with hash -492704259, now seen corresponding path program 1 times [2025-03-09 07:00:42,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:42,066 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1178400211] [2025-03-09 07:00:42,066 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:42,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:42,069 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:42,071 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:42,071 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:42,071 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-09 07:00:42,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-09 07:00:42,083 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-09 07:00:42,083 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1178400211] [2025-03-09 07:00:42,083 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1178400211] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-09 07:00:42,083 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-09 07:00:42,083 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-09 07:00:42,083 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [889478952] [2025-03-09 07:00:42,083 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-09 07:00:42,087 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-03-09 07:00:42,087 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-09 07:00:42,087 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-09 07:00:42,087 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-09 07:00:42,087 INFO L87 Difference]: Start difference. First operand 84994 states and 119810 transitions. cyclomatic complexity: 36864 Second operand has 3 states, 2 states have (on average 17.0) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:42,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-09 07:00:42,550 INFO L93 Difference]: Finished difference Result 167938 states and 233474 transitions. [2025-03-09 07:00:42,550 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167938 states and 233474 transitions. [2025-03-09 07:00:43,336 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 167936 [2025-03-09 07:00:43,676 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167938 states to 167938 states and 233474 transitions. [2025-03-09 07:00:43,676 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 167938 [2025-03-09 07:00:43,752 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 167938 [2025-03-09 07:00:43,753 INFO L73 IsDeterministic]: Start isDeterministic. Operand 167938 states and 233474 transitions. [2025-03-09 07:00:43,847 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-03-09 07:00:43,847 INFO L218 hiAutomatonCegarLoop]: Abstraction has 167938 states and 233474 transitions. [2025-03-09 07:00:43,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167938 states and 233474 transitions. [2025-03-09 07:00:45,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167938 to 167938. [2025-03-09 07:00:45,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 167938 states, 167938 states have (on average 1.3902392549631413) internal successors, (233474), 167937 states have internal predecessors, (233474), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-09 07:00:45,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167938 states to 167938 states and 233474 transitions. [2025-03-09 07:00:45,734 INFO L240 hiAutomatonCegarLoop]: Abstraction has 167938 states and 233474 transitions. [2025-03-09 07:00:45,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-09 07:00:45,737 INFO L432 stractBuchiCegarLoop]: Abstraction has 167938 states and 233474 transitions. [2025-03-09 07:00:45,737 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-03-09 07:00:45,737 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 167938 states and 233474 transitions. [2025-03-09 07:00:46,387 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 167936 [2025-03-09 07:00:46,387 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-03-09 07:00:46,387 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-03-09 07:00:46,389 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-03-09 07:00:46,389 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-09 07:00:46,389 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-03-09 07:00:46,389 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-03-09 07:00:46,390 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:46,390 INFO L85 PathProgramCache]: Analyzing trace with hash 5792, now seen corresponding path program 13 times [2025-03-09 07:00:46,391 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:46,391 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295130689] [2025-03-09 07:00:46,391 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-03-09 07:00:46,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:46,393 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:46,394 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:46,394 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:46,394 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:46,394 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:46,395 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:46,396 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:46,396 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:46,396 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:46,397 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:46,397 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:46,397 INFO L85 PathProgramCache]: Analyzing trace with hash -1489776612, now seen corresponding path program 1 times [2025-03-09 07:00:46,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:46,397 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1944710933] [2025-03-09 07:00:46,398 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:46,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:46,401 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:46,402 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:46,402 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:46,403 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:46,403 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:46,404 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-03-09 07:00:46,405 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-03-09 07:00:46,405 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:46,405 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:46,411 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:46,412 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-09 07:00:46,412 INFO L85 PathProgramCache]: Analyzing trace with hash 676167419, now seen corresponding path program 1 times [2025-03-09 07:00:46,412 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-09 07:00:46,412 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [955189158] [2025-03-09 07:00:46,412 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-09 07:00:46,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-09 07:00:46,416 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 36 statements into 1 equivalence classes. [2025-03-09 07:00:46,418 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 36 of 36 statements. [2025-03-09 07:00:46,418 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:46,418 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:46,418 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:46,421 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 36 statements into 1 equivalence classes. [2025-03-09 07:00:46,423 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 36 of 36 statements. [2025-03-09 07:00:46,425 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:46,425 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:46,429 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-09 07:00:46,989 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:46,990 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:46,990 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:46,990 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:46,990 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-09 07:00:46,994 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-03-09 07:00:46,995 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-03-09 07:00:46,995 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-09 07:00:46,995 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-09 07:00:47,026 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 09.03 07:00:47 BoogieIcfgContainer [2025-03-09 07:00:47,027 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-03-09 07:00:47,027 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-09 07:00:47,027 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-09 07:00:47,027 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-09 07:00:47,028 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 09.03 07:00:35" (3/4) ... [2025-03-09 07:00:47,029 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-03-09 07:00:47,058 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-09 07:00:47,058 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-09 07:00:47,059 INFO L158 Benchmark]: Toolchain (without parser) took 12103.53ms. Allocated memory was 167.8MB in the beginning and 9.9GB in the end (delta: 9.7GB). Free memory was 124.8MB in the beginning and 8.5GB in the end (delta: -8.4GB). Peak memory consumption was 1.4GB. Max. memory is 16.1GB. [2025-03-09 07:00:47,059 INFO L158 Benchmark]: CDTParser took 0.22ms. Allocated memory is still 201.3MB. Free memory is still 116.8MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:00:47,059 INFO L158 Benchmark]: CACSL2BoogieTranslator took 194.68ms. Allocated memory is still 167.8MB. Free memory was 124.8MB in the beginning and 112.8MB in the end (delta: 12.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-09 07:00:47,059 INFO L158 Benchmark]: Boogie Procedure Inliner took 19.85ms. Allocated memory is still 167.8MB. Free memory was 112.8MB in the beginning and 111.4MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:00:47,059 INFO L158 Benchmark]: Boogie Preprocessor took 19.46ms. Allocated memory is still 167.8MB. Free memory was 111.4MB in the beginning and 110.3MB in the end (delta: 1.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-03-09 07:00:47,059 INFO L158 Benchmark]: IcfgBuilder took 362.79ms. Allocated memory is still 167.8MB. Free memory was 110.3MB in the beginning and 92.8MB in the end (delta: 17.5MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-09 07:00:47,060 INFO L158 Benchmark]: BuchiAutomizer took 11470.84ms. Allocated memory was 167.8MB in the beginning and 9.9GB in the end (delta: 9.7GB). Free memory was 92.8MB in the beginning and 8.5GB in the end (delta: -8.4GB). Peak memory consumption was 1.4GB. Max. memory is 16.1GB. [2025-03-09 07:00:47,060 INFO L158 Benchmark]: Witness Printer took 30.87ms. Allocated memory is still 9.9GB. Free memory was 8.5GB in the beginning and 8.5GB in the end (delta: 4.3MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-09 07:00:47,062 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22ms. Allocated memory is still 201.3MB. Free memory is still 116.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 194.68ms. Allocated memory is still 167.8MB. Free memory was 124.8MB in the beginning and 112.8MB in the end (delta: 12.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 19.85ms. Allocated memory is still 167.8MB. Free memory was 112.8MB in the beginning and 111.4MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 19.46ms. Allocated memory is still 167.8MB. Free memory was 111.4MB in the beginning and 110.3MB in the end (delta: 1.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * IcfgBuilder took 362.79ms. Allocated memory is still 167.8MB. Free memory was 110.3MB in the beginning and 92.8MB in the end (delta: 17.5MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 11470.84ms. Allocated memory was 167.8MB in the beginning and 9.9GB in the end (delta: 9.7GB). Free memory was 92.8MB in the beginning and 8.5GB in the end (delta: -8.4GB). Peak memory consumption was 1.4GB. Max. memory is 16.1GB. * Witness Printer took 30.87ms. Allocated memory is still 9.9GB. Free memory was 8.5GB in the beginning and 8.5GB in the end (delta: 4.3MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 12 terminating modules (12 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.12 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 167938 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 11.4s and 13 iterations. TraceHistogramMax:1. Analysis of lassos took 1.4s. Construction of modules took 0.0s. Büchi inclusion checks took 8.5s. Highest rank in rank-based complementation 0. Minimization of det autom 12. Minimization of nondet autom 0. Automata minimization 4.5s AutomataMinimizationTime, 12 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 2.4s Buchi closure took 0.1s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 703 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 703 mSDsluCounter, 2255 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 871 mSDsCounter, 24 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 62 IncrementalHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 24 mSolverCounterUnsat, 1384 mSDtfsCounter, 62 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI12 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 56]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L50] int p15 = __VERIFIER_nondet_int(); [L51] int lk15; [L54] int cond; Loop: [L56] COND TRUE 1 [L57] cond = __VERIFIER_nondet_int() [L58] COND FALSE !(cond == 0) [L61] lk1 = 0 [L63] lk2 = 0 [L65] lk3 = 0 [L67] lk4 = 0 [L69] lk5 = 0 [L71] lk6 = 0 [L73] lk7 = 0 [L75] lk8 = 0 [L77] lk9 = 0 [L79] lk10 = 0 [L81] lk11 = 0 [L83] lk12 = 0 [L85] lk13 = 0 [L87] lk14 = 0 [L89] lk15 = 0 [L93] COND FALSE !(p1 != 0) [L97] COND TRUE p2 != 0 [L98] lk2 = 1 [L101] COND FALSE !(p3 != 0) [L105] COND FALSE !(p4 != 0) [L109] COND FALSE !(p5 != 0) [L113] COND FALSE !(p6 != 0) [L117] COND FALSE !(p7 != 0) [L121] COND FALSE !(p8 != 0) [L125] COND FALSE !(p9 != 0) [L129] COND FALSE !(p10 != 0) [L133] COND FALSE !(p11 != 0) [L137] COND FALSE !(p12 != 0) [L141] COND FALSE !(p13 != 0) [L145] COND TRUE p14 != 0 [L146] lk14 = 1 [L149] COND FALSE !(p15 != 0) [L155] COND FALSE !(p1 != 0) [L160] COND TRUE p2 != 0 [L161] COND FALSE !(lk2 != 1) [L162] lk2 = 0 [L165] COND FALSE !(p3 != 0) [L170] COND FALSE !(p4 != 0) [L175] COND FALSE !(p5 != 0) [L180] COND FALSE !(p6 != 0) [L185] COND FALSE !(p7 != 0) [L190] COND FALSE !(p8 != 0) [L195] COND FALSE !(p9 != 0) [L200] COND FALSE !(p10 != 0) [L205] COND FALSE !(p11 != 0) [L210] COND FALSE !(p12 != 0) [L215] COND FALSE !(p13 != 0) [L220] COND TRUE p14 != 0 [L221] COND FALSE !(lk14 != 1) [L222] lk14 = 0 [L225] COND FALSE !(p15 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 56]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L50] int p15 = __VERIFIER_nondet_int(); [L51] int lk15; [L54] int cond; Loop: [L56] COND TRUE 1 [L57] cond = __VERIFIER_nondet_int() [L58] COND FALSE !(cond == 0) [L61] lk1 = 0 [L63] lk2 = 0 [L65] lk3 = 0 [L67] lk4 = 0 [L69] lk5 = 0 [L71] lk6 = 0 [L73] lk7 = 0 [L75] lk8 = 0 [L77] lk9 = 0 [L79] lk10 = 0 [L81] lk11 = 0 [L83] lk12 = 0 [L85] lk13 = 0 [L87] lk14 = 0 [L89] lk15 = 0 [L93] COND FALSE !(p1 != 0) [L97] COND TRUE p2 != 0 [L98] lk2 = 1 [L101] COND FALSE !(p3 != 0) [L105] COND FALSE !(p4 != 0) [L109] COND FALSE !(p5 != 0) [L113] COND FALSE !(p6 != 0) [L117] COND FALSE !(p7 != 0) [L121] COND FALSE !(p8 != 0) [L125] COND FALSE !(p9 != 0) [L129] COND FALSE !(p10 != 0) [L133] COND FALSE !(p11 != 0) [L137] COND FALSE !(p12 != 0) [L141] COND FALSE !(p13 != 0) [L145] COND TRUE p14 != 0 [L146] lk14 = 1 [L149] COND FALSE !(p15 != 0) [L155] COND FALSE !(p1 != 0) [L160] COND TRUE p2 != 0 [L161] COND FALSE !(lk2 != 1) [L162] lk2 = 0 [L165] COND FALSE !(p3 != 0) [L170] COND FALSE !(p4 != 0) [L175] COND FALSE !(p5 != 0) [L180] COND FALSE !(p6 != 0) [L185] COND FALSE !(p7 != 0) [L190] COND FALSE !(p8 != 0) [L195] COND FALSE !(p9 != 0) [L200] COND FALSE !(p10 != 0) [L205] COND FALSE !(p11 != 0) [L210] COND FALSE !(p12 != 0) [L215] COND FALSE !(p13 != 0) [L220] COND TRUE p14 != 0 [L221] COND FALSE !(lk14 != 1) [L222] lk14 = 0 [L225] COND FALSE !(p15 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-03-09 07:00:47,076 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)