./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/systemc/toy2.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version e2fb8bed Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/systemc/toy2.cil.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a77d6f304c19846fdc8cd5bba9216d69953659ded966cffbf7faa285e2d864a4 --- Real Ultimate output --- This is Ultimate 0.3.0-?-e2fb8be-m [2025-03-08 05:54:54,743 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-08 05:54:54,788 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-03-08 05:54:54,792 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-08 05:54:54,796 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-08 05:54:54,809 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-08 05:54:54,810 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-08 05:54:54,810 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-08 05:54:54,810 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-08 05:54:54,810 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-08 05:54:54,810 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-08 05:54:54,810 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-08 05:54:54,810 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-08 05:54:54,810 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-08 05:54:54,810 INFO L153 SettingsManager]: * Use SBE=true [2025-03-08 05:54:54,810 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-08 05:54:54,810 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-08 05:54:54,811 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-08 05:54:54,811 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-08 05:54:54,811 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-08 05:54:54,812 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-03-08 05:54:54,812 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-03-08 05:54:54,812 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-08 05:54:54,812 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-08 05:54:54,812 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-08 05:54:54,812 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-08 05:54:54,812 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-08 05:54:54,812 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-08 05:54:54,812 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a77d6f304c19846fdc8cd5bba9216d69953659ded966cffbf7faa285e2d864a4 [2025-03-08 05:54:55,042 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-08 05:54:55,052 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-08 05:54:55,055 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-08 05:54:55,056 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-08 05:54:55,056 INFO L274 PluginConnector]: CDTParser initialized [2025-03-08 05:54:55,058 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/toy2.cil.c [2025-03-08 05:54:56,279 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fb31f26e0/31d4f48dce094b0eadf0011a4f41d77e/FLAG6d4fbbf82 [2025-03-08 05:54:56,496 INFO L384 CDTParser]: Found 1 translation units. [2025-03-08 05:54:56,497 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/toy2.cil.c [2025-03-08 05:54:56,527 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fb31f26e0/31d4f48dce094b0eadf0011a4f41d77e/FLAG6d4fbbf82 [2025-03-08 05:54:56,545 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fb31f26e0/31d4f48dce094b0eadf0011a4f41d77e [2025-03-08 05:54:56,548 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-08 05:54:56,550 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-08 05:54:56,552 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-08 05:54:56,552 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-08 05:54:56,557 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-08 05:54:56,558 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,559 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@537209f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56, skipping insertion in model container [2025-03-08 05:54:56,559 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,577 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-08 05:54:56,693 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/toy2.cil.c[698,711] [2025-03-08 05:54:56,762 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-08 05:54:56,772 INFO L200 MainTranslator]: Completed pre-run [2025-03-08 05:54:56,781 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/systemc/toy2.cil.c[698,711] [2025-03-08 05:54:56,802 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-08 05:54:56,816 INFO L204 MainTranslator]: Completed translation [2025-03-08 05:54:56,817 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56 WrapperNode [2025-03-08 05:54:56,817 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-08 05:54:56,818 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-08 05:54:56,818 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-08 05:54:56,818 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-08 05:54:56,823 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,830 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,852 INFO L138 Inliner]: procedures = 20, calls = 15, calls flagged for inlining = 10, calls inlined = 10, statements flattened = 347 [2025-03-08 05:54:56,855 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-08 05:54:56,856 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-08 05:54:56,856 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-08 05:54:56,856 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-08 05:54:56,862 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,863 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,864 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,881 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-03-08 05:54:56,881 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,881 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,885 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,892 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,893 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,894 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,899 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-08 05:54:56,900 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-08 05:54:56,900 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-08 05:54:56,900 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-08 05:54:56,901 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (1/1) ... [2025-03-08 05:54:56,906 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-08 05:54:56,916 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-08 05:54:56,931 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-08 05:54:56,938 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-08 05:54:56,957 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-08 05:54:56,957 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-08 05:54:56,957 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-08 05:54:56,958 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-08 05:54:57,023 INFO L256 CfgBuilder]: Building ICFG [2025-03-08 05:54:57,025 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-08 05:54:57,376 INFO L? ?]: Removed 20 outVars from TransFormulas that were not future-live. [2025-03-08 05:54:57,377 INFO L307 CfgBuilder]: Performing block encoding [2025-03-08 05:54:57,385 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-08 05:54:57,386 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-08 05:54:57,386 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.03 05:54:57 BoogieIcfgContainer [2025-03-08 05:54:57,386 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-08 05:54:57,388 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-08 05:54:57,388 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-08 05:54:57,392 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-08 05:54:57,392 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.03 05:54:56" (1/3) ... [2025-03-08 05:54:57,393 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5b1a776e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.03 05:54:57, skipping insertion in model container [2025-03-08 05:54:57,393 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.03 05:54:56" (2/3) ... [2025-03-08 05:54:57,393 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5b1a776e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.03 05:54:57, skipping insertion in model container [2025-03-08 05:54:57,394 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.03 05:54:57" (3/3) ... [2025-03-08 05:54:57,395 INFO L128 eAbstractionObserver]: Analyzing ICFG toy2.cil.c [2025-03-08 05:54:57,406 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-08 05:54:57,408 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG toy2.cil.c that has 1 procedures, 125 locations, 1 initial locations, 6 loop locations, and 1 error locations. [2025-03-08 05:54:57,454 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-08 05:54:57,466 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@37e3dba1, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-08 05:54:57,466 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-03-08 05:54:57,471 INFO L276 IsEmpty]: Start isEmpty. Operand has 125 states, 123 states have (on average 1.829268292682927) internal successors, (225), 124 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:57,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:57,479 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:57,480 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:57,481 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:57,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:57,487 INFO L85 PathProgramCache]: Analyzing trace with hash -1260856900, now seen corresponding path program 1 times [2025-03-08 05:54:57,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:57,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079575157] [2025-03-08 05:54:57,496 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:57,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:57,560 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:57,584 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:57,585 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:57,585 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:57,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:57,736 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:57,736 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079575157] [2025-03-08 05:54:57,737 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1079575157] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:57,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:57,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:54:57,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392730968] [2025-03-08 05:54:57,741 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:57,743 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:54:57,744 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:57,758 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:54:57,759 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:57,761 INFO L87 Difference]: Start difference. First operand has 125 states, 123 states have (on average 1.829268292682927) internal successors, (225), 124 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:57,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:57,801 INFO L93 Difference]: Finished difference Result 241 states and 436 transitions. [2025-03-08 05:54:57,802 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:54:57,803 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:57,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:57,810 INFO L225 Difference]: With dead ends: 241 [2025-03-08 05:54:57,810 INFO L226 Difference]: Without dead ends: 120 [2025-03-08 05:54:57,813 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:57,814 INFO L435 NwaCegarLoop]: 215 mSDtfsCounter, 211 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 211 SdHoareTripleChecker+Valid, 215 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:57,816 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [211 Valid, 215 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:57,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2025-03-08 05:54:57,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2025-03-08 05:54:57,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 120 states, 119 states have (on average 1.781512605042017) internal successors, (212), 119 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:57,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 212 transitions. [2025-03-08 05:54:57,850 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 212 transitions. Word has length 33 [2025-03-08 05:54:57,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:57,850 INFO L471 AbstractCegarLoop]: Abstraction has 120 states and 212 transitions. [2025-03-08 05:54:57,850 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:57,850 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 212 transitions. [2025-03-08 05:54:57,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:57,851 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:57,851 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:57,852 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-08 05:54:57,852 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:57,852 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:57,853 INFO L85 PathProgramCache]: Analyzing trace with hash -1006120355, now seen corresponding path program 1 times [2025-03-08 05:54:57,853 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:57,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96108287] [2025-03-08 05:54:57,853 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:57,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:57,880 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:57,891 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:57,891 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:57,891 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:58,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:58,013 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:58,013 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96108287] [2025-03-08 05:54:58,013 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [96108287] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:58,013 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:58,013 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:54:58,014 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1999528243] [2025-03-08 05:54:58,014 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:58,015 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:54:58,015 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:58,015 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:54:58,015 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:54:58,016 INFO L87 Difference]: Start difference. First operand 120 states and 212 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:58,074 INFO L93 Difference]: Finished difference Result 322 states and 568 transitions. [2025-03-08 05:54:58,074 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-08 05:54:58,074 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:58,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:58,076 INFO L225 Difference]: With dead ends: 322 [2025-03-08 05:54:58,076 INFO L226 Difference]: Without dead ends: 205 [2025-03-08 05:54:58,076 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:54:58,077 INFO L435 NwaCegarLoop]: 204 mSDtfsCounter, 550 mSDsluCounter, 150 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 550 SdHoareTripleChecker+Valid, 354 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:58,077 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [550 Valid, 354 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:58,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2025-03-08 05:54:58,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 202. [2025-03-08 05:54:58,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 202 states, 201 states have (on average 1.7661691542288558) internal successors, (355), 201 states have internal predecessors, (355), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 355 transitions. [2025-03-08 05:54:58,094 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 355 transitions. Word has length 33 [2025-03-08 05:54:58,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:58,094 INFO L471 AbstractCegarLoop]: Abstraction has 202 states and 355 transitions. [2025-03-08 05:54:58,094 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,094 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 355 transitions. [2025-03-08 05:54:58,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:58,095 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:58,095 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:58,095 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-08 05:54:58,095 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:58,095 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:58,095 INFO L85 PathProgramCache]: Analyzing trace with hash -975100548, now seen corresponding path program 1 times [2025-03-08 05:54:58,096 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:58,096 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [718878605] [2025-03-08 05:54:58,096 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:58,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:58,105 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:58,111 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:58,111 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:58,111 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:58,198 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:58,198 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:58,198 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [718878605] [2025-03-08 05:54:58,198 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [718878605] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:58,199 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:58,199 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:54:58,199 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1823235452] [2025-03-08 05:54:58,199 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:58,199 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:54:58,199 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:58,199 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:54:58,199 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:58,200 INFO L87 Difference]: Start difference. First operand 202 states and 355 transitions. Second operand has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:58,238 INFO L93 Difference]: Finished difference Result 395 states and 697 transitions. [2025-03-08 05:54:58,238 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:54:58,238 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:58,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:58,240 INFO L225 Difference]: With dead ends: 395 [2025-03-08 05:54:58,242 INFO L226 Difference]: Without dead ends: 202 [2025-03-08 05:54:58,242 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:58,243 INFO L435 NwaCegarLoop]: 191 mSDtfsCounter, 181 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 181 SdHoareTripleChecker+Valid, 195 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:58,243 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [181 Valid, 195 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:58,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2025-03-08 05:54:58,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 202. [2025-03-08 05:54:58,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 202 states, 201 states have (on average 1.7064676616915422) internal successors, (343), 201 states have internal predecessors, (343), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 343 transitions. [2025-03-08 05:54:58,264 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 343 transitions. Word has length 33 [2025-03-08 05:54:58,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:58,264 INFO L471 AbstractCegarLoop]: Abstraction has 202 states and 343 transitions. [2025-03-08 05:54:58,265 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,265 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 343 transitions. [2025-03-08 05:54:58,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:58,265 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:58,266 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:58,266 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-08 05:54:58,266 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:58,267 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:58,267 INFO L85 PathProgramCache]: Analyzing trace with hash 949254398, now seen corresponding path program 1 times [2025-03-08 05:54:58,267 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:58,267 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [850768927] [2025-03-08 05:54:58,267 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:58,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:58,277 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:58,281 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:58,281 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:58,281 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:58,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:58,323 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:58,323 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [850768927] [2025-03-08 05:54:58,324 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [850768927] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:58,324 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:58,324 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:54:58,324 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [461076347] [2025-03-08 05:54:58,324 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:58,324 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:54:58,324 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:58,324 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:54:58,324 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:54:58,325 INFO L87 Difference]: Start difference. First operand 202 states and 343 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:58,404 INFO L93 Difference]: Finished difference Result 547 states and 932 transitions. [2025-03-08 05:54:58,405 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-08 05:54:58,405 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:58,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:58,408 INFO L225 Difference]: With dead ends: 547 [2025-03-08 05:54:58,409 INFO L226 Difference]: Without dead ends: 355 [2025-03-08 05:54:58,409 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:54:58,410 INFO L435 NwaCegarLoop]: 304 mSDtfsCounter, 353 mSDsluCounter, 130 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 353 SdHoareTripleChecker+Valid, 434 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:58,411 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [353 Valid, 434 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-08 05:54:58,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2025-03-08 05:54:58,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 202. [2025-03-08 05:54:58,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 202 states, 201 states have (on average 1.691542288557214) internal successors, (340), 201 states have internal predecessors, (340), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 340 transitions. [2025-03-08 05:54:58,423 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 340 transitions. Word has length 33 [2025-03-08 05:54:58,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:58,424 INFO L471 AbstractCegarLoop]: Abstraction has 202 states and 340 transitions. [2025-03-08 05:54:58,424 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,424 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 340 transitions. [2025-03-08 05:54:58,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:58,425 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:58,425 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:58,425 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-08 05:54:58,425 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:58,425 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:58,425 INFO L85 PathProgramCache]: Analyzing trace with hash 882247645, now seen corresponding path program 1 times [2025-03-08 05:54:58,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:58,426 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737680942] [2025-03-08 05:54:58,426 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:58,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:58,432 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:58,440 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:58,440 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:58,440 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:58,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:58,470 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:58,470 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [737680942] [2025-03-08 05:54:58,470 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [737680942] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:58,470 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:58,471 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:54:58,471 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [421505068] [2025-03-08 05:54:58,471 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:58,471 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:54:58,471 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:58,471 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:54:58,472 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:54:58,472 INFO L87 Difference]: Start difference. First operand 202 states and 340 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:58,559 INFO L93 Difference]: Finished difference Result 548 states and 926 transitions. [2025-03-08 05:54:58,559 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-08 05:54:58,560 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:58,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:58,561 INFO L225 Difference]: With dead ends: 548 [2025-03-08 05:54:58,561 INFO L226 Difference]: Without dead ends: 357 [2025-03-08 05:54:58,562 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:54:58,564 INFO L435 NwaCegarLoop]: 306 mSDtfsCounter, 351 mSDsluCounter, 135 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 351 SdHoareTripleChecker+Valid, 441 SdHoareTripleChecker+Invalid, 57 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:58,564 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [351 Valid, 441 Invalid, 57 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-08 05:54:58,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2025-03-08 05:54:58,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 202. [2025-03-08 05:54:58,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 202 states, 201 states have (on average 1.6766169154228856) internal successors, (337), 201 states have internal predecessors, (337), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 337 transitions. [2025-03-08 05:54:58,582 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 337 transitions. Word has length 33 [2025-03-08 05:54:58,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:58,582 INFO L471 AbstractCegarLoop]: Abstraction has 202 states and 337 transitions. [2025-03-08 05:54:58,582 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,582 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 337 transitions. [2025-03-08 05:54:58,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:58,583 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:58,583 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:58,583 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-08 05:54:58,583 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:58,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:58,583 INFO L85 PathProgramCache]: Analyzing trace with hash 2127012126, now seen corresponding path program 1 times [2025-03-08 05:54:58,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:58,585 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1932320457] [2025-03-08 05:54:58,586 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:58,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:58,591 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:58,595 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:58,595 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:58,598 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:58,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:58,641 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:58,641 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1932320457] [2025-03-08 05:54:58,641 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1932320457] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:58,641 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:58,642 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:54:58,642 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222264713] [2025-03-08 05:54:58,642 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:58,642 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:54:58,642 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:58,643 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:54:58,643 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:54:58,643 INFO L87 Difference]: Start difference. First operand 202 states and 337 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:58,707 INFO L93 Difference]: Finished difference Result 562 states and 939 transitions. [2025-03-08 05:54:58,707 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-08 05:54:58,707 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:58,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:58,709 INFO L225 Difference]: With dead ends: 562 [2025-03-08 05:54:58,709 INFO L226 Difference]: Without dead ends: 372 [2025-03-08 05:54:58,710 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:54:58,711 INFO L435 NwaCegarLoop]: 312 mSDtfsCounter, 357 mSDsluCounter, 139 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 357 SdHoareTripleChecker+Valid, 451 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:58,711 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [357 Valid, 451 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:58,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 372 states. [2025-03-08 05:54:58,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 372 to 208. [2025-03-08 05:54:58,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 208 states, 207 states have (on average 1.6473429951690821) internal successors, (341), 207 states have internal predecessors, (341), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 341 transitions. [2025-03-08 05:54:58,726 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 341 transitions. Word has length 33 [2025-03-08 05:54:58,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:58,726 INFO L471 AbstractCegarLoop]: Abstraction has 208 states and 341 transitions. [2025-03-08 05:54:58,727 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,727 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 341 transitions. [2025-03-08 05:54:58,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:58,729 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:58,729 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:58,729 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-03-08 05:54:58,730 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:58,730 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:58,730 INFO L85 PathProgramCache]: Analyzing trace with hash 88955837, now seen corresponding path program 1 times [2025-03-08 05:54:58,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:58,730 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [255205098] [2025-03-08 05:54:58,730 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:58,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:58,735 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:58,739 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:58,739 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:58,739 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:58,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:58,776 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:58,776 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [255205098] [2025-03-08 05:54:58,776 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [255205098] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:58,776 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:58,776 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:54:58,776 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2079081233] [2025-03-08 05:54:58,777 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:58,777 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:54:58,777 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:58,777 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:54:58,777 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:54:58,777 INFO L87 Difference]: Start difference. First operand 208 states and 341 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:58,852 INFO L93 Difference]: Finished difference Result 705 states and 1157 transitions. [2025-03-08 05:54:58,854 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-08 05:54:58,854 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:58,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:58,856 INFO L225 Difference]: With dead ends: 705 [2025-03-08 05:54:58,856 INFO L226 Difference]: Without dead ends: 510 [2025-03-08 05:54:58,857 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:54:58,857 INFO L435 NwaCegarLoop]: 304 mSDtfsCounter, 353 mSDsluCounter, 234 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 353 SdHoareTripleChecker+Valid, 538 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:58,857 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [353 Valid, 538 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:58,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 510 states. [2025-03-08 05:54:58,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 510 to 339. [2025-03-08 05:54:58,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 339 states, 338 states have (on average 1.6331360946745561) internal successors, (552), 338 states have internal predecessors, (552), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 339 states to 339 states and 552 transitions. [2025-03-08 05:54:58,882 INFO L78 Accepts]: Start accepts. Automaton has 339 states and 552 transitions. Word has length 33 [2025-03-08 05:54:58,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:58,882 INFO L471 AbstractCegarLoop]: Abstraction has 339 states and 552 transitions. [2025-03-08 05:54:58,882 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,882 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 552 transitions. [2025-03-08 05:54:58,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:58,883 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:58,883 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:58,884 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-03-08 05:54:58,884 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:58,884 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:58,884 INFO L85 PathProgramCache]: Analyzing trace with hash 300306750, now seen corresponding path program 1 times [2025-03-08 05:54:58,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:58,884 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351809346] [2025-03-08 05:54:58,884 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:58,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:58,891 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:58,893 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:58,893 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:58,894 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:58,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:58,936 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:58,936 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [351809346] [2025-03-08 05:54:58,936 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [351809346] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:58,936 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:58,936 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:54:58,936 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444229224] [2025-03-08 05:54:58,936 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:58,937 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:54:58,938 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:58,938 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:54:58,938 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:58,938 INFO L87 Difference]: Start difference. First operand 339 states and 552 transitions. Second operand has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:58,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:58,975 INFO L93 Difference]: Finished difference Result 807 states and 1320 transitions. [2025-03-08 05:54:58,975 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:54:58,975 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:58,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:58,978 INFO L225 Difference]: With dead ends: 807 [2025-03-08 05:54:58,978 INFO L226 Difference]: Without dead ends: 492 [2025-03-08 05:54:58,979 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:58,980 INFO L435 NwaCegarLoop]: 186 mSDtfsCounter, 169 mSDsluCounter, 141 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 169 SdHoareTripleChecker+Valid, 327 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:58,980 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [169 Valid, 327 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:58,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2025-03-08 05:54:59,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 490. [2025-03-08 05:54:59,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 490 states, 489 states have (on average 1.6298568507157465) internal successors, (797), 489 states have internal predecessors, (797), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 490 states to 490 states and 797 transitions. [2025-03-08 05:54:59,007 INFO L78 Accepts]: Start accepts. Automaton has 490 states and 797 transitions. Word has length 33 [2025-03-08 05:54:59,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:59,007 INFO L471 AbstractCegarLoop]: Abstraction has 490 states and 797 transitions. [2025-03-08 05:54:59,007 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,007 INFO L276 IsEmpty]: Start isEmpty. Operand 490 states and 797 transitions. [2025-03-08 05:54:59,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:59,008 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:59,008 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:59,008 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-03-08 05:54:59,008 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:59,008 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:59,008 INFO L85 PathProgramCache]: Analyzing trace with hash 10907200, now seen corresponding path program 1 times [2025-03-08 05:54:59,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:59,008 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980657103] [2025-03-08 05:54:59,008 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:59,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:59,016 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:59,020 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:59,020 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:59,020 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:59,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:59,058 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:59,058 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980657103] [2025-03-08 05:54:59,058 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1980657103] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:59,058 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:59,058 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:54:59,058 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762168095] [2025-03-08 05:54:59,058 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:59,058 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:54:59,058 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:59,059 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:54:59,059 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:54:59,059 INFO L87 Difference]: Start difference. First operand 490 states and 797 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:59,122 INFO L93 Difference]: Finished difference Result 1243 states and 2025 transitions. [2025-03-08 05:54:59,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-08 05:54:59,123 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:59,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:59,125 INFO L225 Difference]: With dead ends: 1243 [2025-03-08 05:54:59,125 INFO L226 Difference]: Without dead ends: 770 [2025-03-08 05:54:59,126 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:54:59,126 INFO L435 NwaCegarLoop]: 177 mSDtfsCounter, 459 mSDsluCounter, 138 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 459 SdHoareTripleChecker+Valid, 315 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:59,127 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [459 Valid, 315 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:59,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 770 states. [2025-03-08 05:54:59,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 770 to 490. [2025-03-08 05:54:59,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 490 states, 489 states have (on average 1.6134969325153374) internal successors, (789), 489 states have internal predecessors, (789), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 490 states to 490 states and 789 transitions. [2025-03-08 05:54:59,149 INFO L78 Accepts]: Start accepts. Automaton has 490 states and 789 transitions. Word has length 33 [2025-03-08 05:54:59,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:59,149 INFO L471 AbstractCegarLoop]: Abstraction has 490 states and 789 transitions. [2025-03-08 05:54:59,150 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,150 INFO L276 IsEmpty]: Start isEmpty. Operand 490 states and 789 transitions. [2025-03-08 05:54:59,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:59,150 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:59,150 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:59,150 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-03-08 05:54:59,150 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:59,152 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:59,152 INFO L85 PathProgramCache]: Analyzing trace with hash -494651425, now seen corresponding path program 1 times [2025-03-08 05:54:59,152 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:59,152 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700378510] [2025-03-08 05:54:59,152 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:59,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:59,157 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:59,161 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:59,161 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:59,161 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:59,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:59,183 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:59,183 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1700378510] [2025-03-08 05:54:59,183 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1700378510] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:59,183 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:59,183 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:54:59,183 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [975511845] [2025-03-08 05:54:59,183 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:59,184 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:54:59,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:59,184 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:54:59,184 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:54:59,184 INFO L87 Difference]: Start difference. First operand 490 states and 789 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:59,271 INFO L93 Difference]: Finished difference Result 1243 states and 2002 transitions. [2025-03-08 05:54:59,271 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-08 05:54:59,271 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:59,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:59,274 INFO L225 Difference]: With dead ends: 1243 [2025-03-08 05:54:59,274 INFO L226 Difference]: Without dead ends: 776 [2025-03-08 05:54:59,276 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:54:59,276 INFO L435 NwaCegarLoop]: 174 mSDtfsCounter, 443 mSDsluCounter, 130 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 443 SdHoareTripleChecker+Valid, 304 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:59,276 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [443 Valid, 304 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:59,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 776 states. [2025-03-08 05:54:59,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 776 to 490. [2025-03-08 05:54:59,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 490 states, 489 states have (on average 1.5971370143149284) internal successors, (781), 489 states have internal predecessors, (781), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 490 states to 490 states and 781 transitions. [2025-03-08 05:54:59,303 INFO L78 Accepts]: Start accepts. Automaton has 490 states and 781 transitions. Word has length 33 [2025-03-08 05:54:59,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:59,304 INFO L471 AbstractCegarLoop]: Abstraction has 490 states and 781 transitions. [2025-03-08 05:54:59,304 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,304 INFO L276 IsEmpty]: Start isEmpty. Operand 490 states and 781 transitions. [2025-03-08 05:54:59,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:59,304 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:59,304 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:59,304 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-03-08 05:54:59,304 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:59,305 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:59,305 INFO L85 PathProgramCache]: Analyzing trace with hash -365568706, now seen corresponding path program 1 times [2025-03-08 05:54:59,305 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:59,305 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [983659989] [2025-03-08 05:54:59,305 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:59,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:59,310 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:59,314 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:59,315 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:59,316 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:59,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:59,363 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:59,363 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [983659989] [2025-03-08 05:54:59,364 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [983659989] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:59,364 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:59,364 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:54:59,364 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [719697383] [2025-03-08 05:54:59,364 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:59,364 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:54:59,364 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:59,364 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:54:59,364 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:54:59,364 INFO L87 Difference]: Start difference. First operand 490 states and 781 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:59,442 INFO L93 Difference]: Finished difference Result 1184 states and 1884 transitions. [2025-03-08 05:54:59,442 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-08 05:54:59,443 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:59,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:59,445 INFO L225 Difference]: With dead ends: 1184 [2025-03-08 05:54:59,445 INFO L226 Difference]: Without dead ends: 711 [2025-03-08 05:54:59,446 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:54:59,446 INFO L435 NwaCegarLoop]: 168 mSDtfsCounter, 455 mSDsluCounter, 166 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 455 SdHoareTripleChecker+Valid, 334 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:59,446 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [455 Valid, 334 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:59,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2025-03-08 05:54:59,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 538. [2025-03-08 05:54:59,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 538 states, 537 states have (on average 1.5605214152700186) internal successors, (838), 537 states have internal predecessors, (838), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 538 states to 538 states and 838 transitions. [2025-03-08 05:54:59,472 INFO L78 Accepts]: Start accepts. Automaton has 538 states and 838 transitions. Word has length 33 [2025-03-08 05:54:59,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:59,472 INFO L471 AbstractCegarLoop]: Abstraction has 538 states and 838 transitions. [2025-03-08 05:54:59,472 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,472 INFO L276 IsEmpty]: Start isEmpty. Operand 538 states and 838 transitions. [2025-03-08 05:54:59,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2025-03-08 05:54:59,473 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:59,473 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:59,473 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-08 05:54:59,473 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:59,474 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:59,474 INFO L85 PathProgramCache]: Analyzing trace with hash -562082211, now seen corresponding path program 1 times [2025-03-08 05:54:59,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:59,474 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1614480867] [2025-03-08 05:54:59,474 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:59,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:59,483 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-03-08 05:54:59,486 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-03-08 05:54:59,487 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:59,487 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:59,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:59,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:59,528 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1614480867] [2025-03-08 05:54:59,528 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1614480867] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:59,528 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:59,528 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:54:59,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410099274] [2025-03-08 05:54:59,529 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:59,529 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:54:59,529 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:59,529 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:54:59,530 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:59,530 INFO L87 Difference]: Start difference. First operand 538 states and 838 transitions. Second operand has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:59,581 INFO L93 Difference]: Finished difference Result 1279 states and 1999 transitions. [2025-03-08 05:54:59,581 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:54:59,581 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2025-03-08 05:54:59,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:59,584 INFO L225 Difference]: With dead ends: 1279 [2025-03-08 05:54:59,584 INFO L226 Difference]: Without dead ends: 755 [2025-03-08 05:54:59,585 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:59,585 INFO L435 NwaCegarLoop]: 169 mSDtfsCounter, 115 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 115 SdHoareTripleChecker+Valid, 296 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:59,585 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [115 Valid, 296 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:59,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 755 states. [2025-03-08 05:54:59,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 755 to 752. [2025-03-08 05:54:59,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 752 states, 751 states have (on average 1.5432756324900132) internal successors, (1159), 751 states have internal predecessors, (1159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 752 states to 752 states and 1159 transitions. [2025-03-08 05:54:59,628 INFO L78 Accepts]: Start accepts. Automaton has 752 states and 1159 transitions. Word has length 33 [2025-03-08 05:54:59,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:59,629 INFO L471 AbstractCegarLoop]: Abstraction has 752 states and 1159 transitions. [2025-03-08 05:54:59,629 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,629 INFO L276 IsEmpty]: Start isEmpty. Operand 752 states and 1159 transitions. [2025-03-08 05:54:59,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2025-03-08 05:54:59,629 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:59,629 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:59,630 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-08 05:54:59,630 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:59,630 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:59,630 INFO L85 PathProgramCache]: Analyzing trace with hash 625311220, now seen corresponding path program 1 times [2025-03-08 05:54:59,630 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:59,630 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658496134] [2025-03-08 05:54:59,630 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:59,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:59,637 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 43 statements into 1 equivalence classes. [2025-03-08 05:54:59,640 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 43 of 43 statements. [2025-03-08 05:54:59,641 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:59,641 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:59,669 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:54:59,669 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:59,669 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658496134] [2025-03-08 05:54:59,669 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1658496134] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:59,669 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:59,669 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:54:59,669 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2056576910] [2025-03-08 05:54:59,670 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:59,670 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:54:59,670 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:59,671 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:54:59,671 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:59,671 INFO L87 Difference]: Start difference. First operand 752 states and 1159 transitions. Second operand has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:59,739 INFO L93 Difference]: Finished difference Result 1846 states and 2885 transitions. [2025-03-08 05:54:59,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:54:59,739 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 43 [2025-03-08 05:54:59,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:59,743 INFO L225 Difference]: With dead ends: 1846 [2025-03-08 05:54:59,743 INFO L226 Difference]: Without dead ends: 1121 [2025-03-08 05:54:59,745 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:59,746 INFO L435 NwaCegarLoop]: 234 mSDtfsCounter, 76 mSDsluCounter, 159 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 76 SdHoareTripleChecker+Valid, 393 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:59,747 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [76 Valid, 393 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:59,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1121 states. [2025-03-08 05:54:59,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1121 to 1119. [2025-03-08 05:54:59,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1119 states, 1118 states have (on average 1.556350626118068) internal successors, (1740), 1118 states have internal predecessors, (1740), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1119 states to 1119 states and 1740 transitions. [2025-03-08 05:54:59,814 INFO L78 Accepts]: Start accepts. Automaton has 1119 states and 1740 transitions. Word has length 43 [2025-03-08 05:54:59,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:59,815 INFO L471 AbstractCegarLoop]: Abstraction has 1119 states and 1740 transitions. [2025-03-08 05:54:59,815 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,815 INFO L276 IsEmpty]: Start isEmpty. Operand 1119 states and 1740 transitions. [2025-03-08 05:54:59,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2025-03-08 05:54:59,816 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:54:59,816 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:54:59,816 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-08 05:54:59,816 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:54:59,816 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:54:59,816 INFO L85 PathProgramCache]: Analyzing trace with hash -297372363, now seen corresponding path program 1 times [2025-03-08 05:54:59,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:54:59,817 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [380372830] [2025-03-08 05:54:59,817 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:54:59,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:54:59,823 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 43 statements into 1 equivalence classes. [2025-03-08 05:54:59,826 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 43 of 43 statements. [2025-03-08 05:54:59,826 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:54:59,827 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:54:59,865 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-08 05:54:59,865 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:54:59,865 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [380372830] [2025-03-08 05:54:59,866 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [380372830] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:54:59,866 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:54:59,866 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:54:59,866 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [981942094] [2025-03-08 05:54:59,866 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:54:59,866 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:54:59,866 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:54:59,866 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:54:59,867 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:59,867 INFO L87 Difference]: Start difference. First operand 1119 states and 1740 transitions. Second operand has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:54:59,925 INFO L93 Difference]: Finished difference Result 2189 states and 3421 transitions. [2025-03-08 05:54:59,925 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:54:59,926 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 43 [2025-03-08 05:54:59,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:54:59,931 INFO L225 Difference]: With dead ends: 2189 [2025-03-08 05:54:59,931 INFO L226 Difference]: Without dead ends: 1097 [2025-03-08 05:54:59,933 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:54:59,933 INFO L435 NwaCegarLoop]: 174 mSDtfsCounter, 171 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 171 SdHoareTripleChecker+Valid, 174 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:54:59,933 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [171 Valid, 174 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:54:59,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1097 states. [2025-03-08 05:54:59,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1097 to 1097. [2025-03-08 05:54:59,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1097 states, 1096 states have (on average 1.562956204379562) internal successors, (1713), 1096 states have internal predecessors, (1713), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:54:59,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1097 states to 1097 states and 1713 transitions. [2025-03-08 05:54:59,999 INFO L78 Accepts]: Start accepts. Automaton has 1097 states and 1713 transitions. Word has length 43 [2025-03-08 05:54:59,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:54:59,999 INFO L471 AbstractCegarLoop]: Abstraction has 1097 states and 1713 transitions. [2025-03-08 05:54:59,999 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:00,000 INFO L276 IsEmpty]: Start isEmpty. Operand 1097 states and 1713 transitions. [2025-03-08 05:55:00,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2025-03-08 05:55:00,000 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:00,000 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:00,001 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-08 05:55:00,001 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:00,001 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:00,001 INFO L85 PathProgramCache]: Analyzing trace with hash -1122877332, now seen corresponding path program 1 times [2025-03-08 05:55:00,001 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:00,001 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699487264] [2025-03-08 05:55:00,001 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:00,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:00,008 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-08 05:55:00,014 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-08 05:55:00,016 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:00,016 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:00,036 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:55:00,036 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:00,036 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1699487264] [2025-03-08 05:55:00,036 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1699487264] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:00,036 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:00,036 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:00,036 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [369345454] [2025-03-08 05:55:00,036 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:00,037 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:00,037 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:00,037 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:00,037 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:00,037 INFO L87 Difference]: Start difference. First operand 1097 states and 1713 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:00,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:00,128 INFO L93 Difference]: Finished difference Result 2782 states and 4401 transitions. [2025-03-08 05:55:00,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:00,129 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2025-03-08 05:55:00,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:00,135 INFO L225 Difference]: With dead ends: 2782 [2025-03-08 05:55:00,135 INFO L226 Difference]: Without dead ends: 1712 [2025-03-08 05:55:00,136 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:00,137 INFO L435 NwaCegarLoop]: 173 mSDtfsCounter, 77 mSDsluCounter, 133 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 77 SdHoareTripleChecker+Valid, 306 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:00,137 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [77 Valid, 306 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:00,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1712 states. [2025-03-08 05:55:00,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1712 to 1710. [2025-03-08 05:55:00,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1710 states, 1709 states have (on average 1.5751901696898771) internal successors, (2692), 1709 states have internal predecessors, (2692), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:00,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1710 states to 1710 states and 2692 transitions. [2025-03-08 05:55:00,211 INFO L78 Accepts]: Start accepts. Automaton has 1710 states and 2692 transitions. Word has length 44 [2025-03-08 05:55:00,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:00,211 INFO L471 AbstractCegarLoop]: Abstraction has 1710 states and 2692 transitions. [2025-03-08 05:55:00,212 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:00,212 INFO L276 IsEmpty]: Start isEmpty. Operand 1710 states and 2692 transitions. [2025-03-08 05:55:00,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2025-03-08 05:55:00,212 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:00,212 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:00,213 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-08 05:55:00,213 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:00,213 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:00,213 INFO L85 PathProgramCache]: Analyzing trace with hash 1107615016, now seen corresponding path program 1 times [2025-03-08 05:55:00,213 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:00,213 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411200290] [2025-03-08 05:55:00,213 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:00,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:00,217 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 45 statements into 1 equivalence classes. [2025-03-08 05:55:00,220 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 45 of 45 statements. [2025-03-08 05:55:00,220 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:00,220 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:00,236 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:55:00,236 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:00,236 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1411200290] [2025-03-08 05:55:00,236 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1411200290] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:00,236 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:00,236 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:00,237 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [61536760] [2025-03-08 05:55:00,237 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:00,237 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:00,237 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:00,237 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:00,237 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:00,237 INFO L87 Difference]: Start difference. First operand 1710 states and 2692 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:00,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:00,357 INFO L93 Difference]: Finished difference Result 4600 states and 7329 transitions. [2025-03-08 05:55:00,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:00,357 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 45 [2025-03-08 05:55:00,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:00,367 INFO L225 Difference]: With dead ends: 4600 [2025-03-08 05:55:00,367 INFO L226 Difference]: Without dead ends: 2918 [2025-03-08 05:55:00,369 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:00,370 INFO L435 NwaCegarLoop]: 211 mSDtfsCounter, 81 mSDsluCounter, 155 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 81 SdHoareTripleChecker+Valid, 366 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:00,370 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [81 Valid, 366 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:00,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2918 states. [2025-03-08 05:55:00,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2918 to 2916. [2025-03-08 05:55:00,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2916 states, 2915 states have (on average 1.586277873070326) internal successors, (4624), 2915 states have internal predecessors, (4624), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:00,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2916 states to 2916 states and 4624 transitions. [2025-03-08 05:55:00,481 INFO L78 Accepts]: Start accepts. Automaton has 2916 states and 4624 transitions. Word has length 45 [2025-03-08 05:55:00,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:00,482 INFO L471 AbstractCegarLoop]: Abstraction has 2916 states and 4624 transitions. [2025-03-08 05:55:00,482 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:00,482 INFO L276 IsEmpty]: Start isEmpty. Operand 2916 states and 4624 transitions. [2025-03-08 05:55:00,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2025-03-08 05:55:00,485 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:00,485 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:00,485 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-03-08 05:55:00,486 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:00,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:00,486 INFO L85 PathProgramCache]: Analyzing trace with hash 184931433, now seen corresponding path program 1 times [2025-03-08 05:55:00,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:00,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046325614] [2025-03-08 05:55:00,486 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:00,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:00,492 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 45 statements into 1 equivalence classes. [2025-03-08 05:55:00,494 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 45 of 45 statements. [2025-03-08 05:55:00,494 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:00,494 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:00,509 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-03-08 05:55:00,509 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:00,509 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2046325614] [2025-03-08 05:55:00,509 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2046325614] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:00,509 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:00,509 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:00,509 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1586300775] [2025-03-08 05:55:00,509 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:00,509 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:00,509 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:00,510 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:00,510 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:00,510 INFO L87 Difference]: Start difference. First operand 2916 states and 4624 transitions. Second operand has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:00,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:00,606 INFO L93 Difference]: Finished difference Result 5783 states and 9191 transitions. [2025-03-08 05:55:00,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:00,606 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 45 [2025-03-08 05:55:00,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:00,616 INFO L225 Difference]: With dead ends: 5783 [2025-03-08 05:55:00,616 INFO L226 Difference]: Without dead ends: 2895 [2025-03-08 05:55:00,619 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:00,619 INFO L435 NwaCegarLoop]: 173 mSDtfsCounter, 168 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 168 SdHoareTripleChecker+Valid, 173 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:00,619 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [168 Valid, 173 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:00,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2895 states. [2025-03-08 05:55:00,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2895 to 2895. [2025-03-08 05:55:00,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2895 states, 2894 states have (on average 1.58914996544575) internal successors, (4599), 2894 states have internal predecessors, (4599), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:00,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2895 states to 2895 states and 4599 transitions. [2025-03-08 05:55:00,712 INFO L78 Accepts]: Start accepts. Automaton has 2895 states and 4599 transitions. Word has length 45 [2025-03-08 05:55:00,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:00,712 INFO L471 AbstractCegarLoop]: Abstraction has 2895 states and 4599 transitions. [2025-03-08 05:55:00,712 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:00,712 INFO L276 IsEmpty]: Start isEmpty. Operand 2895 states and 4599 transitions. [2025-03-08 05:55:00,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2025-03-08 05:55:00,713 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:00,713 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:00,713 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-08 05:55:00,713 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:00,714 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:00,714 INFO L85 PathProgramCache]: Analyzing trace with hash 1136783672, now seen corresponding path program 1 times [2025-03-08 05:55:00,714 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:00,714 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [715567695] [2025-03-08 05:55:00,714 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:00,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:00,718 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 46 statements into 1 equivalence classes. [2025-03-08 05:55:00,721 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 46 of 46 statements. [2025-03-08 05:55:00,721 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:00,721 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:00,754 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:55:00,754 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:00,754 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [715567695] [2025-03-08 05:55:00,754 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [715567695] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:00,754 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:00,754 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:55:00,754 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [537778508] [2025-03-08 05:55:00,754 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:00,754 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:55:00,754 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:00,755 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:55:00,755 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:55:00,755 INFO L87 Difference]: Start difference. First operand 2895 states and 4599 transitions. Second operand has 4 states, 4 states have (on average 11.5) internal successors, (46), 4 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:00,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:00,972 INFO L93 Difference]: Finished difference Result 7368 states and 11760 transitions. [2025-03-08 05:55:00,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-08 05:55:00,973 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.5) internal successors, (46), 4 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2025-03-08 05:55:00,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:00,986 INFO L225 Difference]: With dead ends: 7368 [2025-03-08 05:55:00,987 INFO L226 Difference]: Without dead ends: 3781 [2025-03-08 05:55:00,991 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:55:00,992 INFO L435 NwaCegarLoop]: 189 mSDtfsCounter, 382 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 382 SdHoareTripleChecker+Valid, 291 SdHoareTripleChecker+Invalid, 44 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:00,992 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [382 Valid, 291 Invalid, 44 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-08 05:55:00,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3781 states. [2025-03-08 05:55:01,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3781 to 3781. [2025-03-08 05:55:01,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3781 states, 3780 states have (on average 1.5804232804232805) internal successors, (5974), 3780 states have internal predecessors, (5974), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:01,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3781 states to 3781 states and 5974 transitions. [2025-03-08 05:55:01,161 INFO L78 Accepts]: Start accepts. Automaton has 3781 states and 5974 transitions. Word has length 46 [2025-03-08 05:55:01,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:01,161 INFO L471 AbstractCegarLoop]: Abstraction has 3781 states and 5974 transitions. [2025-03-08 05:55:01,161 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.5) internal successors, (46), 4 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:01,162 INFO L276 IsEmpty]: Start isEmpty. Operand 3781 states and 5974 transitions. [2025-03-08 05:55:01,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2025-03-08 05:55:01,163 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:01,163 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:01,163 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-08 05:55:01,164 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:01,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:01,164 INFO L85 PathProgramCache]: Analyzing trace with hash -2047018574, now seen corresponding path program 1 times [2025-03-08 05:55:01,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:01,164 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120803804] [2025-03-08 05:55:01,164 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:01,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:01,169 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 52 statements into 1 equivalence classes. [2025-03-08 05:55:01,172 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 52 of 52 statements. [2025-03-08 05:55:01,172 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:01,172 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:01,231 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:55:01,231 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:01,231 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [120803804] [2025-03-08 05:55:01,231 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [120803804] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:01,231 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:01,231 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-08 05:55:01,231 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [464446282] [2025-03-08 05:55:01,232 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:01,232 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-08 05:55:01,232 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:01,232 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-08 05:55:01,232 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:55:01,232 INFO L87 Difference]: Start difference. First operand 3781 states and 5974 transitions. Second operand has 5 states, 5 states have (on average 10.4) internal successors, (52), 5 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:01,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:01,481 INFO L93 Difference]: Finished difference Result 9523 states and 15009 transitions. [2025-03-08 05:55:01,481 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-08 05:55:01,481 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.4) internal successors, (52), 5 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 52 [2025-03-08 05:55:01,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:01,502 INFO L225 Difference]: With dead ends: 9523 [2025-03-08 05:55:01,502 INFO L226 Difference]: Without dead ends: 5764 [2025-03-08 05:55:01,509 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-03-08 05:55:01,510 INFO L435 NwaCegarLoop]: 164 mSDtfsCounter, 648 mSDsluCounter, 318 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 648 SdHoareTripleChecker+Valid, 482 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:01,510 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [648 Valid, 482 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:01,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5764 states. [2025-03-08 05:55:01,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5764 to 4353. [2025-03-08 05:55:01,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4353 states, 4352 states have (on average 1.5533088235294117) internal successors, (6760), 4352 states have internal predecessors, (6760), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:01,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4353 states to 4353 states and 6760 transitions. [2025-03-08 05:55:01,707 INFO L78 Accepts]: Start accepts. Automaton has 4353 states and 6760 transitions. Word has length 52 [2025-03-08 05:55:01,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:01,707 INFO L471 AbstractCegarLoop]: Abstraction has 4353 states and 6760 transitions. [2025-03-08 05:55:01,707 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.4) internal successors, (52), 5 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:01,707 INFO L276 IsEmpty]: Start isEmpty. Operand 4353 states and 6760 transitions. [2025-03-08 05:55:01,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2025-03-08 05:55:01,711 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:01,711 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:01,711 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-08 05:55:01,712 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:01,712 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:01,712 INFO L85 PathProgramCache]: Analyzing trace with hash 1675769534, now seen corresponding path program 1 times [2025-03-08 05:55:01,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:01,712 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [420344744] [2025-03-08 05:55:01,713 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:01,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:01,718 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-03-08 05:55:01,721 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-03-08 05:55:01,722 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:01,722 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:01,739 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:55:01,740 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:01,740 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [420344744] [2025-03-08 05:55:01,740 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [420344744] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:01,740 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:01,740 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:01,740 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [424622153] [2025-03-08 05:55:01,740 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:01,741 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:01,741 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:01,741 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:01,741 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:01,741 INFO L87 Difference]: Start difference. First operand 4353 states and 6760 transitions. Second operand has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:01,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:01,890 INFO L93 Difference]: Finished difference Result 9005 states and 13962 transitions. [2025-03-08 05:55:01,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:01,891 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 81 [2025-03-08 05:55:01,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:01,902 INFO L225 Difference]: With dead ends: 9005 [2025-03-08 05:55:01,902 INFO L226 Difference]: Without dead ends: 4680 [2025-03-08 05:55:01,907 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:01,908 INFO L435 NwaCegarLoop]: 225 mSDtfsCounter, 123 mSDsluCounter, 68 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 123 SdHoareTripleChecker+Valid, 293 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:01,908 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [123 Valid, 293 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:01,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4680 states. [2025-03-08 05:55:02,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4680 to 4664. [2025-03-08 05:55:02,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4664 states, 4663 states have (on average 1.5011794981771391) internal successors, (7000), 4663 states have internal predecessors, (7000), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:02,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4664 states to 4664 states and 7000 transitions. [2025-03-08 05:55:02,071 INFO L78 Accepts]: Start accepts. Automaton has 4664 states and 7000 transitions. Word has length 81 [2025-03-08 05:55:02,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:02,072 INFO L471 AbstractCegarLoop]: Abstraction has 4664 states and 7000 transitions. [2025-03-08 05:55:02,072 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.0) internal successors, (81), 3 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:02,072 INFO L276 IsEmpty]: Start isEmpty. Operand 4664 states and 7000 transitions. [2025-03-08 05:55:02,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2025-03-08 05:55:02,075 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:02,075 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:02,075 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-03-08 05:55:02,075 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:02,075 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:02,075 INFO L85 PathProgramCache]: Analyzing trace with hash -1088693357, now seen corresponding path program 1 times [2025-03-08 05:55:02,075 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:02,075 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451628318] [2025-03-08 05:55:02,075 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:02,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:02,080 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-03-08 05:55:02,083 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-03-08 05:55:02,084 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:02,084 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:02,126 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:55:02,126 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:02,126 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451628318] [2025-03-08 05:55:02,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1451628318] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:02,127 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:02,127 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:02,127 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2039094004] [2025-03-08 05:55:02,127 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:02,128 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:02,128 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:02,128 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:02,128 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:02,129 INFO L87 Difference]: Start difference. First operand 4664 states and 7000 transitions. Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:02,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:02,390 INFO L93 Difference]: Finished difference Result 9773 states and 14642 transitions. [2025-03-08 05:55:02,390 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:02,390 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2025-03-08 05:55:02,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:02,403 INFO L225 Difference]: With dead ends: 9773 [2025-03-08 05:55:02,403 INFO L226 Difference]: Without dead ends: 5148 [2025-03-08 05:55:02,410 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:02,411 INFO L435 NwaCegarLoop]: 222 mSDtfsCounter, 121 mSDsluCounter, 70 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 121 SdHoareTripleChecker+Valid, 292 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:02,411 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [121 Valid, 292 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:02,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5148 states. [2025-03-08 05:55:02,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5148 to 5124. [2025-03-08 05:55:02,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5124 states, 5123 states have (on average 1.4501268787819637) internal successors, (7429), 5123 states have internal predecessors, (7429), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:02,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5124 states to 5124 states and 7429 transitions. [2025-03-08 05:55:02,678 INFO L78 Accepts]: Start accepts. Automaton has 5124 states and 7429 transitions. Word has length 82 [2025-03-08 05:55:02,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:02,679 INFO L471 AbstractCegarLoop]: Abstraction has 5124 states and 7429 transitions. [2025-03-08 05:55:02,679 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:02,680 INFO L276 IsEmpty]: Start isEmpty. Operand 5124 states and 7429 transitions. [2025-03-08 05:55:02,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2025-03-08 05:55:02,683 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:02,683 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:02,683 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-03-08 05:55:02,684 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:02,685 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:02,685 INFO L85 PathProgramCache]: Analyzing trace with hash -1063928260, now seen corresponding path program 1 times [2025-03-08 05:55:02,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:02,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766032050] [2025-03-08 05:55:02,686 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:02,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:02,692 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 83 statements into 1 equivalence classes. [2025-03-08 05:55:02,695 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 83 of 83 statements. [2025-03-08 05:55:02,695 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:02,695 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:02,715 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-08 05:55:02,716 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:02,716 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1766032050] [2025-03-08 05:55:02,716 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1766032050] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:02,716 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:02,716 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:02,716 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [284167708] [2025-03-08 05:55:02,716 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:02,716 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:02,716 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:02,717 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:02,717 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:02,717 INFO L87 Difference]: Start difference. First operand 5124 states and 7429 transitions. Second operand has 3 states, 3 states have (on average 27.666666666666668) internal successors, (83), 3 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:02,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:02,877 INFO L93 Difference]: Finished difference Result 10546 states and 15300 transitions. [2025-03-08 05:55:02,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:02,878 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.666666666666668) internal successors, (83), 3 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 83 [2025-03-08 05:55:02,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:02,891 INFO L225 Difference]: With dead ends: 10546 [2025-03-08 05:55:02,891 INFO L226 Difference]: Without dead ends: 5479 [2025-03-08 05:55:02,898 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:02,901 INFO L435 NwaCegarLoop]: 219 mSDtfsCounter, 116 mSDsluCounter, 70 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 116 SdHoareTripleChecker+Valid, 289 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:02,901 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [116 Valid, 289 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:02,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5479 states. [2025-03-08 05:55:03,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5479 to 4919. [2025-03-08 05:55:03,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4919 states, 4918 states have (on average 1.3851159007726719) internal successors, (6812), 4918 states have internal predecessors, (6812), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:03,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4919 states to 4919 states and 6812 transitions. [2025-03-08 05:55:03,104 INFO L78 Accepts]: Start accepts. Automaton has 4919 states and 6812 transitions. Word has length 83 [2025-03-08 05:55:03,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:03,105 INFO L471 AbstractCegarLoop]: Abstraction has 4919 states and 6812 transitions. [2025-03-08 05:55:03,105 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.666666666666668) internal successors, (83), 3 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:03,105 INFO L276 IsEmpty]: Start isEmpty. Operand 4919 states and 6812 transitions. [2025-03-08 05:55:03,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2025-03-08 05:55:03,108 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:03,108 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:03,109 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-08 05:55:03,109 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:03,109 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:03,109 INFO L85 PathProgramCache]: Analyzing trace with hash -856084459, now seen corresponding path program 1 times [2025-03-08 05:55:03,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:03,110 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1312009145] [2025-03-08 05:55:03,110 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:03,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:03,115 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 84 statements into 1 equivalence classes. [2025-03-08 05:55:03,121 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 84 of 84 statements. [2025-03-08 05:55:03,122 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:03,122 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:03,147 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-03-08 05:55:03,148 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:03,148 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1312009145] [2025-03-08 05:55:03,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1312009145] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:03,148 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:03,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:03,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1116209420] [2025-03-08 05:55:03,148 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:03,149 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:03,149 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:03,149 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:03,149 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:03,149 INFO L87 Difference]: Start difference. First operand 4919 states and 6812 transitions. Second operand has 3 states, 3 states have (on average 28.0) internal successors, (84), 3 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:03,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:03,284 INFO L93 Difference]: Finished difference Result 8612 states and 11964 transitions. [2025-03-08 05:55:03,285 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:03,285 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 28.0) internal successors, (84), 3 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 84 [2025-03-08 05:55:03,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:03,296 INFO L225 Difference]: With dead ends: 8612 [2025-03-08 05:55:03,296 INFO L226 Difference]: Without dead ends: 4919 [2025-03-08 05:55:03,301 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:03,301 INFO L435 NwaCegarLoop]: 166 mSDtfsCounter, 6 mSDsluCounter, 156 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 322 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:03,302 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 322 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:03,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4919 states. [2025-03-08 05:55:03,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4919 to 4919. [2025-03-08 05:55:03,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4919 states, 4918 states have (on average 1.3824725498169987) internal successors, (6799), 4918 states have internal predecessors, (6799), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:03,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4919 states to 4919 states and 6799 transitions. [2025-03-08 05:55:03,495 INFO L78 Accepts]: Start accepts. Automaton has 4919 states and 6799 transitions. Word has length 84 [2025-03-08 05:55:03,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:03,495 INFO L471 AbstractCegarLoop]: Abstraction has 4919 states and 6799 transitions. [2025-03-08 05:55:03,495 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 28.0) internal successors, (84), 3 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:03,495 INFO L276 IsEmpty]: Start isEmpty. Operand 4919 states and 6799 transitions. [2025-03-08 05:55:03,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2025-03-08 05:55:03,498 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:03,498 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:03,499 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-03-08 05:55:03,499 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:03,499 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:03,499 INFO L85 PathProgramCache]: Analyzing trace with hash 940866900, now seen corresponding path program 1 times [2025-03-08 05:55:03,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:03,499 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [911464159] [2025-03-08 05:55:03,499 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:03,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:03,505 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 84 statements into 1 equivalence classes. [2025-03-08 05:55:03,512 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 84 of 84 statements. [2025-03-08 05:55:03,513 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:03,513 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:03,561 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-03-08 05:55:03,562 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:03,562 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [911464159] [2025-03-08 05:55:03,562 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [911464159] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:03,562 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:03,562 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:55:03,563 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1903646085] [2025-03-08 05:55:03,563 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:03,563 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:55:03,563 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:03,564 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:55:03,564 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:55:03,564 INFO L87 Difference]: Start difference. First operand 4919 states and 6799 transitions. Second operand has 4 states, 4 states have (on average 21.0) internal successors, (84), 4 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:03,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:03,787 INFO L93 Difference]: Finished difference Result 9215 states and 12688 transitions. [2025-03-08 05:55:03,787 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-08 05:55:03,787 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 21.0) internal successors, (84), 4 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 84 [2025-03-08 05:55:03,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:03,798 INFO L225 Difference]: With dead ends: 9215 [2025-03-08 05:55:03,798 INFO L226 Difference]: Without dead ends: 4734 [2025-03-08 05:55:03,803 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:55:03,804 INFO L435 NwaCegarLoop]: 150 mSDtfsCounter, 424 mSDsluCounter, 218 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 424 SdHoareTripleChecker+Valid, 368 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:03,804 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [424 Valid, 368 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-08 05:55:03,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4734 states. [2025-03-08 05:55:04,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4734 to 4636. [2025-03-08 05:55:04,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4636 states, 4635 states have (on average 1.3387270765911543) internal successors, (6205), 4635 states have internal predecessors, (6205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:04,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4636 states to 4636 states and 6205 transitions. [2025-03-08 05:55:04,065 INFO L78 Accepts]: Start accepts. Automaton has 4636 states and 6205 transitions. Word has length 84 [2025-03-08 05:55:04,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:04,065 INFO L471 AbstractCegarLoop]: Abstraction has 4636 states and 6205 transitions. [2025-03-08 05:55:04,066 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 21.0) internal successors, (84), 4 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:04,066 INFO L276 IsEmpty]: Start isEmpty. Operand 4636 states and 6205 transitions. [2025-03-08 05:55:04,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2025-03-08 05:55:04,073 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:04,073 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:04,074 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2025-03-08 05:55:04,074 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:04,074 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:04,074 INFO L85 PathProgramCache]: Analyzing trace with hash -241578810, now seen corresponding path program 1 times [2025-03-08 05:55:04,074 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:04,074 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [824319515] [2025-03-08 05:55:04,074 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:04,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:04,081 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 111 statements into 1 equivalence classes. [2025-03-08 05:55:04,084 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 111 of 111 statements. [2025-03-08 05:55:04,084 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:04,084 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:04,109 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-03-08 05:55:04,109 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:04,109 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [824319515] [2025-03-08 05:55:04,109 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [824319515] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:04,109 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:04,109 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:04,110 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1425909213] [2025-03-08 05:55:04,110 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:04,110 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:04,110 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:04,110 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:04,110 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:04,110 INFO L87 Difference]: Start difference. First operand 4636 states and 6205 transitions. Second operand has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:04,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:04,358 INFO L93 Difference]: Finished difference Result 8844 states and 11824 transitions. [2025-03-08 05:55:04,358 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:04,358 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 111 [2025-03-08 05:55:04,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:04,369 INFO L225 Difference]: With dead ends: 8844 [2025-03-08 05:55:04,369 INFO L226 Difference]: Without dead ends: 4586 [2025-03-08 05:55:04,374 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:04,375 INFO L435 NwaCegarLoop]: 159 mSDtfsCounter, 33 mSDsluCounter, 126 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 285 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:04,375 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [33 Valid, 285 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:04,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4586 states. [2025-03-08 05:55:04,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4586 to 4586. [2025-03-08 05:55:04,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4586 states, 4585 states have (on average 1.3310796074154854) internal successors, (6103), 4585 states have internal predecessors, (6103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:04,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4586 states to 4586 states and 6103 transitions. [2025-03-08 05:55:04,621 INFO L78 Accepts]: Start accepts. Automaton has 4586 states and 6103 transitions. Word has length 111 [2025-03-08 05:55:04,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:04,622 INFO L471 AbstractCegarLoop]: Abstraction has 4586 states and 6103 transitions. [2025-03-08 05:55:04,622 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:04,622 INFO L276 IsEmpty]: Start isEmpty. Operand 4586 states and 6103 transitions. [2025-03-08 05:55:04,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2025-03-08 05:55:04,628 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:04,628 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:04,629 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-03-08 05:55:04,629 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:04,629 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:04,630 INFO L85 PathProgramCache]: Analyzing trace with hash -1893234875, now seen corresponding path program 1 times [2025-03-08 05:55:04,630 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:04,630 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1545291437] [2025-03-08 05:55:04,630 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:04,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:04,635 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 122 statements into 1 equivalence classes. [2025-03-08 05:55:04,638 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 122 of 122 statements. [2025-03-08 05:55:04,639 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:04,639 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:04,693 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-03-08 05:55:04,693 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:04,693 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1545291437] [2025-03-08 05:55:04,693 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1545291437] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:04,693 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:04,693 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:55:04,693 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [107437565] [2025-03-08 05:55:04,693 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:04,694 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:55:04,694 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:04,694 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:55:04,694 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:55:04,694 INFO L87 Difference]: Start difference. First operand 4586 states and 6103 transitions. Second operand has 4 states, 4 states have (on average 29.5) internal successors, (118), 4 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:04,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:04,871 INFO L93 Difference]: Finished difference Result 8162 states and 10877 transitions. [2025-03-08 05:55:04,871 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-08 05:55:04,871 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.5) internal successors, (118), 4 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 122 [2025-03-08 05:55:04,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:04,880 INFO L225 Difference]: With dead ends: 8162 [2025-03-08 05:55:04,880 INFO L226 Difference]: Without dead ends: 4512 [2025-03-08 05:55:04,884 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:55:04,884 INFO L435 NwaCegarLoop]: 192 mSDtfsCounter, 288 mSDsluCounter, 101 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 288 SdHoareTripleChecker+Valid, 293 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:04,884 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [288 Valid, 293 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:04,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4512 states. [2025-03-08 05:55:05,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4512 to 4510. [2025-03-08 05:55:05,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4510 states, 4509 states have (on average 1.305832778886671) internal successors, (5888), 4509 states have internal predecessors, (5888), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:05,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4510 states to 4510 states and 5888 transitions. [2025-03-08 05:55:05,029 INFO L78 Accepts]: Start accepts. Automaton has 4510 states and 5888 transitions. Word has length 122 [2025-03-08 05:55:05,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:05,030 INFO L471 AbstractCegarLoop]: Abstraction has 4510 states and 5888 transitions. [2025-03-08 05:55:05,030 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.5) internal successors, (118), 4 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:05,030 INFO L276 IsEmpty]: Start isEmpty. Operand 4510 states and 5888 transitions. [2025-03-08 05:55:05,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2025-03-08 05:55:05,036 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:05,036 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:05,037 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2025-03-08 05:55:05,037 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:05,037 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:05,037 INFO L85 PathProgramCache]: Analyzing trace with hash 61530845, now seen corresponding path program 1 times [2025-03-08 05:55:05,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:05,037 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256689868] [2025-03-08 05:55:05,037 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:05,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:05,043 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 128 statements into 1 equivalence classes. [2025-03-08 05:55:05,046 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 128 of 128 statements. [2025-03-08 05:55:05,046 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:05,047 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:05,070 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2025-03-08 05:55:05,070 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:05,070 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256689868] [2025-03-08 05:55:05,071 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1256689868] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:05,071 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:05,071 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:05,071 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [79437253] [2025-03-08 05:55:05,071 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:05,071 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:05,071 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:05,071 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:05,071 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:05,071 INFO L87 Difference]: Start difference. First operand 4510 states and 5888 transitions. Second operand has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:05,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:05,212 INFO L93 Difference]: Finished difference Result 8627 states and 11258 transitions. [2025-03-08 05:55:05,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:05,212 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 128 [2025-03-08 05:55:05,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:05,222 INFO L225 Difference]: With dead ends: 8627 [2025-03-08 05:55:05,222 INFO L226 Difference]: Without dead ends: 4491 [2025-03-08 05:55:05,226 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:05,227 INFO L435 NwaCegarLoop]: 157 mSDtfsCounter, 21 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 284 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:05,227 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 284 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:05,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4491 states. [2025-03-08 05:55:05,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4491 to 4471. [2025-03-08 05:55:05,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4471 states, 4470 states have (on average 1.2991051454138702) internal successors, (5807), 4470 states have internal predecessors, (5807), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:05,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4471 states to 4471 states and 5807 transitions. [2025-03-08 05:55:05,424 INFO L78 Accepts]: Start accepts. Automaton has 4471 states and 5807 transitions. Word has length 128 [2025-03-08 05:55:05,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:05,424 INFO L471 AbstractCegarLoop]: Abstraction has 4471 states and 5807 transitions. [2025-03-08 05:55:05,424 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:05,424 INFO L276 IsEmpty]: Start isEmpty. Operand 4471 states and 5807 transitions. [2025-03-08 05:55:05,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2025-03-08 05:55:05,429 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:05,429 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:05,429 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2025-03-08 05:55:05,429 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:05,430 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:05,430 INFO L85 PathProgramCache]: Analyzing trace with hash -1359396763, now seen corresponding path program 1 times [2025-03-08 05:55:05,430 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:05,430 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [764712495] [2025-03-08 05:55:05,430 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:05,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:05,437 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 128 statements into 1 equivalence classes. [2025-03-08 05:55:05,440 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 128 of 128 statements. [2025-03-08 05:55:05,440 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:05,440 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:05,465 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2025-03-08 05:55:05,465 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:05,465 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [764712495] [2025-03-08 05:55:05,465 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [764712495] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:05,465 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:05,465 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:05,465 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1204045221] [2025-03-08 05:55:05,465 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:05,466 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:05,466 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:05,466 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:05,466 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:05,466 INFO L87 Difference]: Start difference. First operand 4471 states and 5807 transitions. Second operand has 3 states, 3 states have (on average 40.333333333333336) internal successors, (121), 3 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:05,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:05,604 INFO L93 Difference]: Finished difference Result 8568 states and 11121 transitions. [2025-03-08 05:55:05,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:05,605 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 40.333333333333336) internal successors, (121), 3 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 128 [2025-03-08 05:55:05,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:05,614 INFO L225 Difference]: With dead ends: 8568 [2025-03-08 05:55:05,614 INFO L226 Difference]: Without dead ends: 4462 [2025-03-08 05:55:05,618 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:05,618 INFO L435 NwaCegarLoop]: 154 mSDtfsCounter, 21 mSDsluCounter, 126 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 280 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:05,618 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 280 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:05,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4462 states. [2025-03-08 05:55:05,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4462 to 4442. [2025-03-08 05:55:05,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4442 states, 4441 states have (on average 1.2918261652780905) internal successors, (5737), 4441 states have internal predecessors, (5737), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:05,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4442 states to 4442 states and 5737 transitions. [2025-03-08 05:55:05,781 INFO L78 Accepts]: Start accepts. Automaton has 4442 states and 5737 transitions. Word has length 128 [2025-03-08 05:55:05,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:05,781 INFO L471 AbstractCegarLoop]: Abstraction has 4442 states and 5737 transitions. [2025-03-08 05:55:05,782 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 40.333333333333336) internal successors, (121), 3 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:05,782 INFO L276 IsEmpty]: Start isEmpty. Operand 4442 states and 5737 transitions. [2025-03-08 05:55:05,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2025-03-08 05:55:05,787 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:05,787 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:05,787 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2025-03-08 05:55:05,788 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:05,788 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:05,788 INFO L85 PathProgramCache]: Analyzing trace with hash 732142738, now seen corresponding path program 1 times [2025-03-08 05:55:05,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:05,788 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [732629894] [2025-03-08 05:55:05,788 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:05,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:05,794 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 131 statements into 1 equivalence classes. [2025-03-08 05:55:05,797 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 131 of 131 statements. [2025-03-08 05:55:05,797 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:05,797 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:05,856 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-03-08 05:55:05,856 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:05,856 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [732629894] [2025-03-08 05:55:05,856 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [732629894] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:05,856 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:05,856 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:55:05,856 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1660104232] [2025-03-08 05:55:05,856 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:05,857 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:55:05,857 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:05,857 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:55:05,857 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:55:05,857 INFO L87 Difference]: Start difference. First operand 4442 states and 5737 transitions. Second operand has 4 states, 4 states have (on average 31.5) internal successors, (126), 4 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:05,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:05,979 INFO L93 Difference]: Finished difference Result 7245 states and 9394 transitions. [2025-03-08 05:55:05,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-08 05:55:05,979 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 31.5) internal successors, (126), 4 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2025-03-08 05:55:05,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:05,986 INFO L225 Difference]: With dead ends: 7245 [2025-03-08 05:55:05,987 INFO L226 Difference]: Without dead ends: 3164 [2025-03-08 05:55:05,990 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:55:05,991 INFO L435 NwaCegarLoop]: 186 mSDtfsCounter, 267 mSDsluCounter, 86 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 267 SdHoareTripleChecker+Valid, 272 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:05,991 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [267 Valid, 272 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:05,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3164 states. [2025-03-08 05:55:06,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3164 to 3162. [2025-03-08 05:55:06,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3162 states, 3161 states have (on average 1.255931667193926) internal successors, (3970), 3161 states have internal predecessors, (3970), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:06,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3162 states to 3162 states and 3970 transitions. [2025-03-08 05:55:06,125 INFO L78 Accepts]: Start accepts. Automaton has 3162 states and 3970 transitions. Word has length 131 [2025-03-08 05:55:06,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:06,125 INFO L471 AbstractCegarLoop]: Abstraction has 3162 states and 3970 transitions. [2025-03-08 05:55:06,125 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 31.5) internal successors, (126), 4 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:06,126 INFO L276 IsEmpty]: Start isEmpty. Operand 3162 states and 3970 transitions. [2025-03-08 05:55:06,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2025-03-08 05:55:06,130 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:06,130 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:06,130 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2025-03-08 05:55:06,130 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:06,131 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:06,131 INFO L85 PathProgramCache]: Analyzing trace with hash -266897950, now seen corresponding path program 1 times [2025-03-08 05:55:06,131 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:06,131 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64450866] [2025-03-08 05:55:06,131 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:06,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:06,138 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 131 statements into 1 equivalence classes. [2025-03-08 05:55:06,144 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 131 of 131 statements. [2025-03-08 05:55:06,145 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:06,145 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:06,206 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-03-08 05:55:06,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:06,206 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64450866] [2025-03-08 05:55:06,206 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [64450866] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:06,206 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:06,206 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-08 05:55:06,207 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962296649] [2025-03-08 05:55:06,207 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:06,207 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-08 05:55:06,207 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:06,207 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-08 05:55:06,207 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-08 05:55:06,208 INFO L87 Difference]: Start difference. First operand 3162 states and 3970 transitions. Second operand has 4 states, 4 states have (on average 31.75) internal successors, (127), 4 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:06,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:06,296 INFO L93 Difference]: Finished difference Result 5112 states and 6416 transitions. [2025-03-08 05:55:06,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-08 05:55:06,297 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 31.75) internal successors, (127), 4 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2025-03-08 05:55:06,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:06,302 INFO L225 Difference]: With dead ends: 5112 [2025-03-08 05:55:06,302 INFO L226 Difference]: Without dead ends: 2017 [2025-03-08 05:55:06,306 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-08 05:55:06,307 INFO L435 NwaCegarLoop]: 179 mSDtfsCounter, 265 mSDsluCounter, 86 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 265 SdHoareTripleChecker+Valid, 265 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:06,307 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [265 Valid, 265 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:06,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2017 states. [2025-03-08 05:55:06,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2017 to 2015. [2025-03-08 05:55:06,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2015 states, 2014 states have (on average 1.2189672293942404) internal successors, (2455), 2014 states have internal predecessors, (2455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:06,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2015 states to 2015 states and 2455 transitions. [2025-03-08 05:55:06,378 INFO L78 Accepts]: Start accepts. Automaton has 2015 states and 2455 transitions. Word has length 131 [2025-03-08 05:55:06,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:06,379 INFO L471 AbstractCegarLoop]: Abstraction has 2015 states and 2455 transitions. [2025-03-08 05:55:06,379 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 31.75) internal successors, (127), 4 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:06,379 INFO L276 IsEmpty]: Start isEmpty. Operand 2015 states and 2455 transitions. [2025-03-08 05:55:06,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2025-03-08 05:55:06,380 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:06,380 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:06,381 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2025-03-08 05:55:06,381 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:06,381 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:06,381 INFO L85 PathProgramCache]: Analyzing trace with hash -694502705, now seen corresponding path program 1 times [2025-03-08 05:55:06,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:06,382 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [496821477] [2025-03-08 05:55:06,382 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:06,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:06,389 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-03-08 05:55:06,394 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-03-08 05:55:06,394 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:06,394 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:06,421 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 67 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2025-03-08 05:55:06,422 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:06,423 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [496821477] [2025-03-08 05:55:06,423 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [496821477] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:06,423 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:06,423 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:06,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766405931] [2025-03-08 05:55:06,423 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:06,423 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:06,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:06,424 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:06,424 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:06,424 INFO L87 Difference]: Start difference. First operand 2015 states and 2455 transitions. Second operand has 3 states, 3 states have (on average 53.0) internal successors, (159), 3 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:06,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:06,491 INFO L93 Difference]: Finished difference Result 3639 states and 4466 transitions. [2025-03-08 05:55:06,491 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:06,491 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 53.0) internal successors, (159), 3 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 168 [2025-03-08 05:55:06,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:06,497 INFO L225 Difference]: With dead ends: 3639 [2025-03-08 05:55:06,497 INFO L226 Difference]: Without dead ends: 1953 [2025-03-08 05:55:06,498 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:06,499 INFO L435 NwaCegarLoop]: 148 mSDtfsCounter, 1 mSDsluCounter, 136 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 284 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:06,499 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 284 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:06,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1953 states. [2025-03-08 05:55:06,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1953 to 1895. [2025-03-08 05:55:06,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1895 states, 1894 states have (on average 1.2074973600844774) internal successors, (2287), 1894 states have internal predecessors, (2287), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:06,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1895 states to 1895 states and 2287 transitions. [2025-03-08 05:55:06,563 INFO L78 Accepts]: Start accepts. Automaton has 1895 states and 2287 transitions. Word has length 168 [2025-03-08 05:55:06,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:06,563 INFO L471 AbstractCegarLoop]: Abstraction has 1895 states and 2287 transitions. [2025-03-08 05:55:06,563 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 53.0) internal successors, (159), 3 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:06,564 INFO L276 IsEmpty]: Start isEmpty. Operand 1895 states and 2287 transitions. [2025-03-08 05:55:06,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2025-03-08 05:55:06,566 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:06,566 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:06,566 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2025-03-08 05:55:06,566 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:06,567 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:06,567 INFO L85 PathProgramCache]: Analyzing trace with hash -1039629424, now seen corresponding path program 1 times [2025-03-08 05:55:06,567 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:06,567 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502203513] [2025-03-08 05:55:06,567 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:06,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:06,577 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 174 statements into 1 equivalence classes. [2025-03-08 05:55:06,581 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 174 of 174 statements. [2025-03-08 05:55:06,581 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:06,581 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-08 05:55:06,602 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 72 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2025-03-08 05:55:06,602 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-08 05:55:06,602 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502203513] [2025-03-08 05:55:06,602 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [502203513] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-08 05:55:06,602 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-08 05:55:06,602 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-08 05:55:06,602 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706677875] [2025-03-08 05:55:06,602 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-08 05:55:06,603 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-08 05:55:06,603 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-08 05:55:06,603 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-08 05:55:06,603 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:06,603 INFO L87 Difference]: Start difference. First operand 1895 states and 2287 transitions. Second operand has 3 states, 3 states have (on average 55.333333333333336) internal successors, (166), 3 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:06,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-08 05:55:06,684 INFO L93 Difference]: Finished difference Result 4076 states and 4952 transitions. [2025-03-08 05:55:06,685 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-08 05:55:06,685 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 55.333333333333336) internal successors, (166), 3 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 174 [2025-03-08 05:55:06,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-08 05:55:06,691 INFO L225 Difference]: With dead ends: 4076 [2025-03-08 05:55:06,691 INFO L226 Difference]: Without dead ends: 2506 [2025-03-08 05:55:06,692 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-08 05:55:06,693 INFO L435 NwaCegarLoop]: 183 mSDtfsCounter, 135 mSDsluCounter, 98 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 135 SdHoareTripleChecker+Valid, 281 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-08 05:55:06,693 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [135 Valid, 281 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-08 05:55:06,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2506 states. [2025-03-08 05:55:06,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2506 to 2167. [2025-03-08 05:55:06,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2167 states, 2166 states have (on average 1.1915974145891044) internal successors, (2581), 2166 states have internal predecessors, (2581), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:06,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2167 states to 2167 states and 2581 transitions. [2025-03-08 05:55:06,783 INFO L78 Accepts]: Start accepts. Automaton has 2167 states and 2581 transitions. Word has length 174 [2025-03-08 05:55:06,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-08 05:55:06,784 INFO L471 AbstractCegarLoop]: Abstraction has 2167 states and 2581 transitions. [2025-03-08 05:55:06,784 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 55.333333333333336) internal successors, (166), 3 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-08 05:55:06,784 INFO L276 IsEmpty]: Start isEmpty. Operand 2167 states and 2581 transitions. [2025-03-08 05:55:06,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2025-03-08 05:55:06,785 INFO L210 NwaCegarLoop]: Found error trace [2025-03-08 05:55:06,785 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:06,785 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2025-03-08 05:55:06,785 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-03-08 05:55:06,786 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-08 05:55:06,786 INFO L85 PathProgramCache]: Analyzing trace with hash 1583723037, now seen corresponding path program 1 times [2025-03-08 05:55:06,786 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-08 05:55:06,786 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023103280] [2025-03-08 05:55:06,786 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-08 05:55:06,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-08 05:55:06,794 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 177 statements into 1 equivalence classes. [2025-03-08 05:55:06,801 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 177 of 177 statements. [2025-03-08 05:55:06,801 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:06,801 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-08 05:55:06,801 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-03-08 05:55:06,807 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 177 statements into 1 equivalence classes. [2025-03-08 05:55:06,816 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 177 of 177 statements. [2025-03-08 05:55:06,816 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-08 05:55:06,816 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-03-08 05:55:06,861 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-03-08 05:55:06,861 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-03-08 05:55:06,862 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-03-08 05:55:06,863 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2025-03-08 05:55:06,865 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-08 05:55:07,023 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-03-08 05:55:07,026 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.03 05:55:07 BoogieIcfgContainer [2025-03-08 05:55:07,027 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-03-08 05:55:07,027 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-03-08 05:55:07,027 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-03-08 05:55:07,028 INFO L274 PluginConnector]: Witness Printer initialized [2025-03-08 05:55:07,028 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.03 05:54:57" (3/4) ... [2025-03-08 05:55:07,029 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-03-08 05:55:07,176 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 170. [2025-03-08 05:55:07,282 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-03-08 05:55:07,282 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.yml [2025-03-08 05:55:07,282 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-03-08 05:55:07,283 INFO L158 Benchmark]: Toolchain (without parser) took 10733.17ms. Allocated memory was 142.6MB in the beginning and 1.7GB in the end (delta: 1.6GB). Free memory was 106.0MB in the beginning and 1.6GB in the end (delta: -1.5GB). Peak memory consumption was 90.0MB. Max. memory is 16.1GB. [2025-03-08 05:55:07,283 INFO L158 Benchmark]: CDTParser took 0.20ms. Allocated memory is still 201.3MB. Free memory is still 125.7MB. There was no memory consumed. Max. memory is 16.1GB. [2025-03-08 05:55:07,283 INFO L158 Benchmark]: CACSL2BoogieTranslator took 265.95ms. Allocated memory is still 142.6MB. Free memory was 106.0MB in the beginning and 91.1MB in the end (delta: 14.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-03-08 05:55:07,283 INFO L158 Benchmark]: Boogie Procedure Inliner took 37.31ms. Allocated memory is still 142.6MB. Free memory was 91.1MB in the beginning and 89.1MB in the end (delta: 2.0MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-08 05:55:07,283 INFO L158 Benchmark]: Boogie Preprocessor took 43.39ms. Allocated memory is still 142.6MB. Free memory was 89.1MB in the beginning and 87.1MB in the end (delta: 2.0MB). There was no memory consumed. Max. memory is 16.1GB. [2025-03-08 05:55:07,283 INFO L158 Benchmark]: IcfgBuilder took 486.08ms. Allocated memory is still 142.6MB. Free memory was 87.1MB in the beginning and 62.0MB in the end (delta: 25.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2025-03-08 05:55:07,284 INFO L158 Benchmark]: TraceAbstraction took 9638.76ms. Allocated memory was 142.6MB in the beginning and 1.7GB in the end (delta: 1.6GB). Free memory was 62.0MB in the beginning and 1.6GB in the end (delta: -1.6GB). Peak memory consumption was 14.5MB. Max. memory is 16.1GB. [2025-03-08 05:55:07,284 INFO L158 Benchmark]: Witness Printer took 254.93ms. Allocated memory is still 1.7GB. Free memory was 1.6GB in the beginning and 1.6GB in the end (delta: 33.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2025-03-08 05:55:07,284 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20ms. Allocated memory is still 201.3MB. Free memory is still 125.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 265.95ms. Allocated memory is still 142.6MB. Free memory was 106.0MB in the beginning and 91.1MB in the end (delta: 14.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 37.31ms. Allocated memory is still 142.6MB. Free memory was 91.1MB in the beginning and 89.1MB in the end (delta: 2.0MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 43.39ms. Allocated memory is still 142.6MB. Free memory was 89.1MB in the beginning and 87.1MB in the end (delta: 2.0MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 486.08ms. Allocated memory is still 142.6MB. Free memory was 87.1MB in the beginning and 62.0MB in the end (delta: 25.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * TraceAbstraction took 9638.76ms. Allocated memory was 142.6MB in the beginning and 1.7GB in the end (delta: 1.6GB). Free memory was 62.0MB in the beginning and 1.6GB in the end (delta: -1.6GB). Peak memory consumption was 14.5MB. Max. memory is 16.1GB. * Witness Printer took 254.93ms. Allocated memory is still 1.7GB. Free memory was 1.6GB in the beginning and 1.6GB in the end (delta: 33.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 23]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L28] int c ; [L29] int c_t ; [L30] int c_req_up ; [L31] int p_in ; [L32] int p_out ; [L33] int wl_st ; [L34] int c1_st ; [L35] int c2_st ; [L36] int wb_st ; [L37] int r_st ; [L38] int wl_i ; [L39] int c1_i ; [L40] int c2_i ; [L41] int wb_i ; [L42] int r_i ; [L43] int wl_pc ; [L44] int c1_pc ; [L45] int c2_pc ; [L46] int wb_pc ; [L47] int e_e ; [L48] int e_f ; [L49] int e_g ; [L50] int e_c ; [L51] int e_p_in ; [L52] int e_wl ; [L58] int d ; [L59] int data ; [L60] int processed ; [L61] static int t_b ; VAL [c1_i=0, c1_pc=0, c1_st=0, c2_i=0, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=0, e_e=0, e_f=0, e_g=0, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=0, wb_pc=0, wb_st=0, wl_i=0, wl_pc=0, wl_st=0] [L689] int __retres1 ; [L693] e_wl = 2 [L694] e_c = e_wl [L695] e_g = e_c [L696] e_f = e_g [L697] e_e = e_f [L698] wl_pc = 0 [L699] c1_pc = 0 [L700] c2_pc = 0 [L701] wb_pc = 0 [L702] wb_i = 1 [L703] c2_i = wb_i [L704] c1_i = c2_i [L705] wl_i = c1_i [L706] r_i = 0 [L707] c_req_up = 0 [L708] d = 0 [L709] c = 0 [L710] CALL start_simulation() [L400] int kernel_st ; [L403] kernel_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L404] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L415] COND TRUE (int )wl_i == 1 [L416] wl_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L420] COND TRUE (int )c1_i == 1 [L421] c1_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L425] COND TRUE (int )c2_i == 1 [L426] c2_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L430] COND TRUE (int )wb_i == 1 [L431] wb_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L435] COND FALSE !((int )r_i == 1) [L438] r_st = 2 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L440] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L445] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L450] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L455] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L460] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L465] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L473] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L483] COND FALSE !((int )c1_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L492] COND FALSE !((int )c2_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L501] COND FALSE !((int )wb_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L510] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L515] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L520] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L525] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L530] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L535] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L544] kernel_st = 1 [L545] CALL eval() [L286] int tmp ; [L287] int tmp___0 ; [L288] int tmp___1 ; [L289] int tmp___2 ; [L290] int tmp___3 ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L296] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L317] COND TRUE (int )wl_st == 0 [L319] tmp = __VERIFIER_nondet_int() [L321] COND TRUE \read(tmp) [L323] wl_st = 1 [L324] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L66] COND TRUE (int )wl_pc == 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L80] wl_st = 2 [L81] wl_pc = 1 [L82] e_wl = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L324] RET write_loop() [L332] COND TRUE (int )c1_st == 0 [L334] tmp___0 = __VERIFIER_nondet_int() [L336] COND TRUE \read(tmp___0) [L338] c1_st = 1 [L339] CALL compute1() [L137] COND TRUE (int )c1_pc == 0 VAL [c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L150] c1_st = 2 [L151] c1_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L339] RET compute1() [L347] COND TRUE (int )c2_st == 0 [L349] tmp___1 = __VERIFIER_nondet_int() [L351] COND TRUE \read(tmp___1) [L353] c2_st = 1 [L354] CALL compute2() [L182] COND TRUE (int )c2_pc == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L195] c2_st = 2 [L196] c2_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L354] RET compute2() [L362] COND TRUE (int )wb_st == 0 [L364] tmp___2 = __VERIFIER_nondet_int() [L366] COND TRUE \read(tmp___2) [L368] wb_st = 1 [L369] CALL write_back() [L227] COND TRUE (int )wb_pc == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L240] wb_st = 2 [L241] wb_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L369] RET write_back() [L377] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L296] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L299] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L302] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L305] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L308] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L545] RET eval() [L547] kernel_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L548] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L559] kernel_st = 3 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L560] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L565] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L570] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L575] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L580] COND TRUE (int )e_wl == 0 [L581] e_wl = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L585] COND TRUE (int )wl_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L586] COND TRUE (int )e_wl == 1 [L587] wl_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L603] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L604] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L612] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L613] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L621] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L622] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L630] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L635] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L640] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L645] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L650] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L655] COND TRUE (int )e_wl == 1 [L656] e_wl = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L660] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L544] kernel_st = 1 [L545] CALL eval() [L286] int tmp ; [L287] int tmp___0 ; [L288] int tmp___1 ; [L289] int tmp___2 ; [L290] int tmp___3 ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L296] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L317] COND TRUE (int )wl_st == 0 [L319] tmp = __VERIFIER_nondet_int() [L321] COND TRUE \read(tmp) [L323] wl_st = 1 [L324] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L66] COND FALSE !((int )wl_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L69] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L72] COND TRUE (int )wl_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L89] t = d [L90] data = d [L91] processed = 0 [L92] e_f = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L93] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L94] COND TRUE (int )e_f == 1 [L95] c1_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L102] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L103] COND TRUE (int )e_f == 1 [L104] c2_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L111] e_f = 2 [L112] wl_st = 2 [L113] wl_pc = 2 [L114] t_b = t VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L324] RET write_loop() [L332] COND TRUE (int )c1_st == 0 [L334] tmp___0 = __VERIFIER_nondet_int() [L336] COND TRUE \read(tmp___0) [L338] c1_st = 1 [L339] CALL compute1() [L137] COND FALSE !((int )c1_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L140] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L155] COND TRUE ! processed [L156] data += 1 [L157] e_g = 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L158] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L159] COND TRUE (int )e_g == 1 [L160] wb_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L167] e_g = 2 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L150] c1_st = 2 [L151] c1_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L339] RET compute1() [L347] COND TRUE (int )c2_st == 0 [L349] tmp___1 = __VERIFIER_nondet_int() [L351] COND TRUE \read(tmp___1) [L353] c2_st = 1 [L354] CALL compute2() [L182] COND FALSE !((int )c2_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L185] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L200] COND TRUE ! processed [L201] data += 1 [L202] e_g = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L203] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L204] COND TRUE (int )e_g == 1 [L205] wb_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L212] e_g = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L195] c2_st = 2 [L196] c2_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L354] RET compute2() [L362] COND TRUE (int )wb_st == 0 [L364] tmp___2 = __VERIFIER_nondet_int() [L366] COND TRUE \read(tmp___2) [L368] wb_st = 1 [L369] CALL write_back() [L227] COND FALSE !((int )wb_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L230] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L245] c_t = data [L246] c_req_up = 1 [L247] processed = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L240] wb_st = 2 [L241] wb_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L369] RET write_back() [L377] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L296] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L299] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L302] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L305] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L308] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L545] RET eval() [L547] kernel_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L548] COND TRUE (int )c_req_up == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L549] COND TRUE c != c_t [L550] c = c_t [L551] e_c = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=1, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L555] c_req_up = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L559] kernel_st = 3 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L560] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L565] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L570] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L575] COND TRUE (int )e_c == 0 [L576] e_c = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L580] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L585] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L593] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L594] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L603] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L604] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L612] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L613] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L621] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L622] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L630] COND TRUE (int )e_c == 1 [L631] r_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L635] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L640] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L645] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L650] COND TRUE (int )e_c == 1 [L651] e_c = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L655] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L660] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L663] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L666] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L669] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L672] COND TRUE (int )r_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L544] kernel_st = 1 [L545] CALL eval() [L286] int tmp ; [L287] int tmp___0 ; [L288] int tmp___1 ; [L289] int tmp___2 ; [L290] int tmp___3 ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L296] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L299] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L302] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L305] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L308] COND TRUE (int )r_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L317] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L332] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L347] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L362] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L377] COND TRUE (int )r_st == 0 [L379] tmp___3 = __VERIFIER_nondet_int() [L381] COND TRUE \read(tmp___3) [L383] r_st = 1 [L384] CALL read() [L259] d = c [L260] e_e = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L261] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L269] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L270] COND TRUE (int )e_e == 1 [L271] wl_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L279] e_e = 2 [L280] r_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L384] RET read() [L296] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L317] COND TRUE (int )wl_st == 0 [L319] tmp = __VERIFIER_nondet_int() [L321] COND TRUE \read(tmp) [L323] wl_st = 1 [L324] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L66] COND FALSE !((int )wl_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L69] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L118] t = t_b VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L119] COND FALSE !(d == t + 1) [L123] CALL error() [L23] reach_error() VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 125 locations, 225 edges, 1 error locations. Started 1 CEGAR loops. OverallTime: 9.4s, OverallIterations: 33, TraceHistogramMax: 4, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 4.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 7421 SdHoareTripleChecker+Valid, 0.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 7421 mSDsluCounter, 10197 SdHoareTripleChecker+Invalid, 0.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 3829 mSDsCounter, 202 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 675 IncrementalHoareTripleChecker+Invalid, 877 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 202 mSolverCounterUnsat, 6368 mSDtfsCounter, 675 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 140 GetRequests, 78 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=5124occurred in iteration=21, InterpolantAutomatonStates: 122, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.2s AutomataMinimizationTime, 32 MinimizatonAttempts, 3948 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 2398 NumberOfCodeBlocks, 2398 NumberOfCodeBlocksAsserted, 33 NumberOfCheckSat, 2189 ConstructedInterpolants, 0 QuantifiedInterpolants, 3692 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 32 InterpolantComputations, 32 PerfectInterpolantSequences, 487/487 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-03-08 05:55:07,305 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE