./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength4.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 551b0097 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength4.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f3d22aeda2fb15b9dd79854281ee0f5e475c0f7ee1551b76594f45703ddc81df --- Real Ultimate output --- This is Ultimate 0.3.0-?-551b009-m [2025-01-10 07:30:11,244 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-01-10 07:30:11,303 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-01-10 07:30:11,306 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-01-10 07:30:11,309 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-01-10 07:30:11,327 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-01-10 07:30:11,328 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-01-10 07:30:11,328 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-01-10 07:30:11,328 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-01-10 07:30:11,329 INFO L153 SettingsManager]: * Use memory slicer=true [2025-01-10 07:30:11,329 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-01-10 07:30:11,329 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-01-10 07:30:11,329 INFO L153 SettingsManager]: * Use SBE=true [2025-01-10 07:30:11,329 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-01-10 07:30:11,329 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-01-10 07:30:11,329 INFO L153 SettingsManager]: * Use old map elimination=false [2025-01-10 07:30:11,330 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-01-10 07:30:11,330 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-01-10 07:30:11,330 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-01-10 07:30:11,330 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-01-10 07:30:11,330 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-01-10 07:30:11,330 INFO L153 SettingsManager]: * sizeof long=4 [2025-01-10 07:30:11,330 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-01-10 07:30:11,330 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-01-10 07:30:11,330 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-01-10 07:30:11,330 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-01-10 07:30:11,330 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-01-10 07:30:11,331 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-01-10 07:30:11,331 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-01-10 07:30:11,331 INFO L153 SettingsManager]: * sizeof long double=12 [2025-01-10 07:30:11,331 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-01-10 07:30:11,331 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-01-10 07:30:11,331 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-01-10 07:30:11,331 INFO L153 SettingsManager]: * Use constant arrays=true [2025-01-10 07:30:11,331 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-01-10 07:30:11,331 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-10 07:30:11,331 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-01-10 07:30:11,331 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-01-10 07:30:11,332 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-01-10 07:30:11,332 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f3d22aeda2fb15b9dd79854281ee0f5e475c0f7ee1551b76594f45703ddc81df [2025-01-10 07:30:11,571 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-01-10 07:30:11,578 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-01-10 07:30:11,580 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-01-10 07:30:11,581 INFO L270 PluginConnector]: Initializing CDTParser... [2025-01-10 07:30:11,581 INFO L274 PluginConnector]: CDTParser initialized [2025-01-10 07:30:11,582 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength4.c [2025-01-10 07:30:12,725 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/0ab0fdc95/5a41f019c1504023be4c024df8fc39a0/FLAG91384d71d [2025-01-10 07:30:12,913 INFO L384 CDTParser]: Found 1 translation units. [2025-01-10 07:30:12,914 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength4.c [2025-01-10 07:30:12,935 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/0ab0fdc95/5a41f019c1504023be4c024df8fc39a0/FLAG91384d71d [2025-01-10 07:30:13,283 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/0ab0fdc95/5a41f019c1504023be4c024df8fc39a0 [2025-01-10 07:30:13,285 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-01-10 07:30:13,286 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-01-10 07:30:13,287 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-01-10 07:30:13,287 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-01-10 07:30:13,290 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-01-10 07:30:13,291 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,292 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@36907917 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13, skipping insertion in model container [2025-01-10 07:30:13,292 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,301 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-01-10 07:30:13,407 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:30:13,416 INFO L200 MainTranslator]: Completed pre-run [2025-01-10 07:30:13,425 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:30:13,434 INFO L204 MainTranslator]: Completed translation [2025-01-10 07:30:13,435 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13 WrapperNode [2025-01-10 07:30:13,435 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-01-10 07:30:13,436 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-01-10 07:30:13,436 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-01-10 07:30:13,436 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-01-10 07:30:13,440 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,444 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,456 INFO L138 Inliner]: procedures = 8, calls = 14, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 57 [2025-01-10 07:30:13,459 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-01-10 07:30:13,459 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-01-10 07:30:13,459 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-01-10 07:30:13,459 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-01-10 07:30:13,465 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,465 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,466 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,474 INFO L175 MemorySlicer]: Split 3 memory accesses to 2 slices as follows [2, 1]. 67 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 1 writes are split as follows [1, 0]. [2025-01-10 07:30:13,474 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,474 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,481 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,482 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,484 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,486 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,486 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,487 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-01-10 07:30:13,487 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-01-10 07:30:13,487 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-01-10 07:30:13,487 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-01-10 07:30:13,491 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (1/1) ... [2025-01-10 07:30:13,496 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:30:13,505 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:30:13,519 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:30:13,521 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-01-10 07:30:13,539 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-01-10 07:30:13,539 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-01-10 07:30:13,539 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-01-10 07:30:13,539 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-01-10 07:30:13,539 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-01-10 07:30:13,540 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-01-10 07:30:13,540 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-01-10 07:30:13,540 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-01-10 07:30:13,588 INFO L234 CfgBuilder]: Building ICFG [2025-01-10 07:30:13,589 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-01-10 07:30:13,696 INFO L? ?]: Removed 9 outVars from TransFormulas that were not future-live. [2025-01-10 07:30:13,696 INFO L283 CfgBuilder]: Performing block encoding [2025-01-10 07:30:13,704 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-01-10 07:30:13,705 INFO L312 CfgBuilder]: Removed 0 assume(true) statements. [2025-01-10 07:30:13,706 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:30:13 BoogieIcfgContainer [2025-01-10 07:30:13,706 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-01-10 07:30:13,707 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-01-10 07:30:13,707 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-01-10 07:30:13,711 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-01-10 07:30:13,711 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:30:13,712 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.01 07:30:13" (1/3) ... [2025-01-10 07:30:13,713 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5bf3b48e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:30:13, skipping insertion in model container [2025-01-10 07:30:13,714 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:30:13,714 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:30:13" (2/3) ... [2025-01-10 07:30:13,714 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5bf3b48e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:30:13, skipping insertion in model container [2025-01-10 07:30:13,714 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:30:13,714 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:30:13" (3/3) ... [2025-01-10 07:30:13,715 INFO L363 chiAutomizerObserver]: Analyzing ICFG ArraysOfVariableLength4.c [2025-01-10 07:30:13,760 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-01-10 07:30:13,761 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-01-10 07:30:13,761 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-01-10 07:30:13,761 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-01-10 07:30:13,761 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-01-10 07:30:13,761 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-01-10 07:30:13,762 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-01-10 07:30:13,762 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-01-10 07:30:13,765 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:13,777 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-01-10 07:30:13,777 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:30:13,777 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:30:13,780 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:30:13,780 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-01-10 07:30:13,780 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-01-10 07:30:13,780 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:13,782 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-01-10 07:30:13,782 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:30:13,782 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:30:13,782 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:30:13,782 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-01-10 07:30:13,788 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0;" [2025-01-10 07:30:13,789 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~1#1 % 4294967296 < 32;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0;" "assume !(foo_~i~0#1 < foo_~size#1);foo_#res#1 := foo_~i~0#1;" "main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" [2025-01-10 07:30:13,793 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:13,794 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2025-01-10 07:30:13,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:13,800 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [952389877] [2025-01-10 07:30:13,800 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:30:13,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:13,847 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:30:13,864 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:13,864 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:13,864 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:13,864 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:30:13,867 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:30:13,871 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:13,871 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:13,871 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:13,881 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:30:13,883 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:13,883 INFO L85 PathProgramCache]: Analyzing trace with hash 35943, now seen corresponding path program 1 times [2025-01-10 07:30:13,883 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:13,883 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581037846] [2025-01-10 07:30:13,884 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:30:13,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:13,891 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:30:13,897 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:30:13,897 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:13,897 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:30:13,980 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:13,980 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:30:13,981 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1581037846] [2025-01-10 07:30:13,981 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1581037846] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:30:13,981 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:30:13,981 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-01-10 07:30:13,982 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [814955653] [2025-01-10 07:30:13,982 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:30:13,984 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:30:13,985 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:30:14,003 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:30:14,004 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:30:14,005 INFO L87 Difference]: Start difference. First operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:14,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:30:14,016 INFO L93 Difference]: Finished difference Result 12 states and 15 transitions. [2025-01-10 07:30:14,017 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12 states and 15 transitions. [2025-01-10 07:30:14,018 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2025-01-10 07:30:14,022 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12 states to 8 states and 10 transitions. [2025-01-10 07:30:14,023 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2025-01-10 07:30:14,023 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2025-01-10 07:30:14,023 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 10 transitions. [2025-01-10 07:30:14,024 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:30:14,024 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2025-01-10 07:30:14,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 10 transitions. [2025-01-10 07:30:14,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2025-01-10 07:30:14,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:14,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 10 transitions. [2025-01-10 07:30:14,043 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2025-01-10 07:30:14,046 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:30:14,048 INFO L432 stractBuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2025-01-10 07:30:14,048 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-01-10 07:30:14,049 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 10 transitions. [2025-01-10 07:30:14,049 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2025-01-10 07:30:14,049 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:30:14,049 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:30:14,049 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:30:14,049 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2025-01-10 07:30:14,049 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0;" [2025-01-10 07:30:14,049 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~1#1 % 4294967296 < 32;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume !(foo_~i~0#1 < foo_~size#1);foo_#res#1 := foo_~i~0#1;" "main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" [2025-01-10 07:30:14,052 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:14,052 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2025-01-10 07:30:14,052 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:14,052 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [493136614] [2025-01-10 07:30:14,053 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:30:14,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:14,061 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:30:14,068 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:14,068 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:30:14,068 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:14,069 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:30:14,071 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:30:14,075 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:14,076 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:14,076 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:14,077 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:30:14,079 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:14,079 INFO L85 PathProgramCache]: Analyzing trace with hash 1112263, now seen corresponding path program 1 times [2025-01-10 07:30:14,079 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:14,079 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [914258080] [2025-01-10 07:30:14,079 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:30:14,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:14,085 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-01-10 07:30:14,089 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-01-10 07:30:14,089 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:14,089 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:30:14,174 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:14,174 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:30:14,174 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [914258080] [2025-01-10 07:30:14,174 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [914258080] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:30:14,174 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1026040380] [2025-01-10 07:30:14,174 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:30:14,175 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:30:14,175 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:30:14,178 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:30:14,179 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-01-10 07:30:14,216 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-01-10 07:30:14,226 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-01-10 07:30:14,227 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:14,227 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:30:14,229 INFO L256 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 5 conjuncts are in the unsatisfiable core [2025-01-10 07:30:14,232 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:30:14,285 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:14,286 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:30:14,325 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:14,326 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1026040380] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:30:14,326 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:30:14,326 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 7 [2025-01-10 07:30:14,326 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [434564062] [2025-01-10 07:30:14,327 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:30:14,327 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:30:14,328 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:30:14,328 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-01-10 07:30:14,328 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=29, Unknown=0, NotChecked=0, Total=56 [2025-01-10 07:30:14,328 INFO L87 Difference]: Start difference. First operand 8 states and 10 transitions. cyclomatic complexity: 4 Second operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:14,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:30:14,351 INFO L93 Difference]: Finished difference Result 11 states and 13 transitions. [2025-01-10 07:30:14,352 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 13 transitions. [2025-01-10 07:30:14,352 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2025-01-10 07:30:14,352 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 13 transitions. [2025-01-10 07:30:14,352 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-01-10 07:30:14,353 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-01-10 07:30:14,353 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 13 transitions. [2025-01-10 07:30:14,353 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:30:14,353 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 13 transitions. [2025-01-10 07:30:14,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 13 transitions. [2025-01-10 07:30:14,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 11. [2025-01-10 07:30:14,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:14,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 13 transitions. [2025-01-10 07:30:14,355 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 13 transitions. [2025-01-10 07:30:14,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-01-10 07:30:14,356 INFO L432 stractBuchiCegarLoop]: Abstraction has 11 states and 13 transitions. [2025-01-10 07:30:14,356 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-01-10 07:30:14,356 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 13 transitions. [2025-01-10 07:30:14,357 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2025-01-10 07:30:14,357 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:30:14,357 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:30:14,358 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:30:14,358 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 1, 1, 1] [2025-01-10 07:30:14,358 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0;" [2025-01-10 07:30:14,358 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~1#1 % 4294967296 < 32;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume !(foo_~i~0#1 < foo_~size#1);foo_#res#1 := foo_~i~0#1;" "main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" [2025-01-10 07:30:14,358 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:14,359 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2025-01-10 07:30:14,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:14,360 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [458777479] [2025-01-10 07:30:14,360 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:30:14,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:14,365 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:30:14,370 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:14,372 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 07:30:14,372 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:14,373 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:30:14,374 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:30:14,377 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:14,379 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:14,379 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:14,382 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:30:14,383 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:14,383 INFO L85 PathProgramCache]: Analyzing trace with hash -1226267545, now seen corresponding path program 2 times [2025-01-10 07:30:14,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:14,383 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64464301] [2025-01-10 07:30:14,383 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:30:14,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:14,393 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 7 statements into 2 equivalence classes. [2025-01-10 07:30:14,401 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 7 of 7 statements. [2025-01-10 07:30:14,401 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-01-10 07:30:14,401 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:30:14,541 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:14,542 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:30:14,542 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64464301] [2025-01-10 07:30:14,542 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [64464301] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:30:14,542 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1555670460] [2025-01-10 07:30:14,542 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:30:14,543 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:30:14,543 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:30:14,546 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:30:14,547 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-01-10 07:30:14,579 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 7 statements into 2 equivalence classes. [2025-01-10 07:30:14,596 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 7 of 7 statements. [2025-01-10 07:30:14,596 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-01-10 07:30:14,596 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:30:14,601 INFO L256 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 8 conjuncts are in the unsatisfiable core [2025-01-10 07:30:14,602 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:30:14,698 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:14,699 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:30:14,792 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:14,792 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1555670460] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:30:14,792 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:30:14,793 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 16 [2025-01-10 07:30:14,793 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1123660945] [2025-01-10 07:30:14,793 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:30:14,793 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:30:14,793 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:30:14,793 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-01-10 07:30:14,794 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=146, Unknown=0, NotChecked=0, Total=272 [2025-01-10 07:30:14,795 INFO L87 Difference]: Start difference. First operand 11 states and 13 transitions. cyclomatic complexity: 4 Second operand has 17 states, 17 states have (on average 1.1176470588235294) internal successors, (19), 16 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:14,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:30:14,823 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2025-01-10 07:30:14,823 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 19 transitions. [2025-01-10 07:30:14,824 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2025-01-10 07:30:14,824 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 17 states and 19 transitions. [2025-01-10 07:30:14,824 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2025-01-10 07:30:14,824 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2025-01-10 07:30:14,824 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17 states and 19 transitions. [2025-01-10 07:30:14,824 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:30:14,824 INFO L218 hiAutomatonCegarLoop]: Abstraction has 17 states and 19 transitions. [2025-01-10 07:30:14,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states and 19 transitions. [2025-01-10 07:30:14,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2025-01-10 07:30:14,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.1176470588235294) internal successors, (19), 16 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:14,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions. [2025-01-10 07:30:14,825 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 19 transitions. [2025-01-10 07:30:14,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-01-10 07:30:14,828 INFO L432 stractBuchiCegarLoop]: Abstraction has 17 states and 19 transitions. [2025-01-10 07:30:14,828 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-01-10 07:30:14,828 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 19 transitions. [2025-01-10 07:30:14,829 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2025-01-10 07:30:14,830 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:30:14,830 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:30:14,830 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:30:14,830 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 1, 1, 1] [2025-01-10 07:30:14,830 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0;" [2025-01-10 07:30:14,831 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~1#1 % 4294967296 < 32;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume !(foo_~i~0#1 < foo_~size#1);foo_#res#1 := foo_~i~0#1;" "main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" [2025-01-10 07:30:14,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:14,831 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2025-01-10 07:30:14,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:14,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409051959] [2025-01-10 07:30:14,833 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:30:14,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:14,838 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-01-10 07:30:14,840 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:14,840 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:30:14,840 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:14,840 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:30:14,841 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:30:14,843 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:14,843 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:14,843 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:14,844 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:30:14,844 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:14,845 INFO L85 PathProgramCache]: Analyzing trace with hash 499533927, now seen corresponding path program 3 times [2025-01-10 07:30:14,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:14,845 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564232391] [2025-01-10 07:30:14,845 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:30:14,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:14,852 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 13 statements into 6 equivalence classes. [2025-01-10 07:30:14,876 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 13 of 13 statements. [2025-01-10 07:30:14,876 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-01-10 07:30:14,876 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:30:15,125 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:15,126 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:30:15,126 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564232391] [2025-01-10 07:30:15,126 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564232391] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:30:15,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1240298125] [2025-01-10 07:30:15,127 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:30:15,127 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:30:15,127 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:30:15,129 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:30:15,131 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-01-10 07:30:15,172 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 13 statements into 6 equivalence classes. [2025-01-10 07:30:15,198 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 13 of 13 statements. [2025-01-10 07:30:15,198 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-01-10 07:30:15,198 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:30:15,200 INFO L256 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 14 conjuncts are in the unsatisfiable core [2025-01-10 07:30:15,202 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:30:15,341 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:15,342 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:30:15,590 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:15,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1240298125] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:30:15,591 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:30:15,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 34 [2025-01-10 07:30:15,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [931713533] [2025-01-10 07:30:15,592 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:30:15,592 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:30:15,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:30:15,592 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2025-01-10 07:30:15,593 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=540, Invalid=650, Unknown=0, NotChecked=0, Total=1190 [2025-01-10 07:30:15,593 INFO L87 Difference]: Start difference. First operand 17 states and 19 transitions. cyclomatic complexity: 4 Second operand has 35 states, 35 states have (on average 1.0571428571428572) internal successors, (37), 34 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:15,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:30:15,644 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2025-01-10 07:30:15,644 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 31 transitions. [2025-01-10 07:30:15,645 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-01-10 07:30:15,645 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 29 states and 31 transitions. [2025-01-10 07:30:15,645 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2025-01-10 07:30:15,645 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2025-01-10 07:30:15,645 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 31 transitions. [2025-01-10 07:30:15,645 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:30:15,645 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 31 transitions. [2025-01-10 07:30:15,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 31 transitions. [2025-01-10 07:30:15,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2025-01-10 07:30:15,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 28 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:15,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 31 transitions. [2025-01-10 07:30:15,647 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 31 transitions. [2025-01-10 07:30:15,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-01-10 07:30:15,648 INFO L432 stractBuchiCegarLoop]: Abstraction has 29 states and 31 transitions. [2025-01-10 07:30:15,648 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-01-10 07:30:15,648 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 31 transitions. [2025-01-10 07:30:15,648 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-01-10 07:30:15,648 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:30:15,648 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:30:15,649 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:30:15,649 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [22, 1, 1, 1] [2025-01-10 07:30:15,649 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0;" [2025-01-10 07:30:15,649 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~1#1 % 4294967296 < 32;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume !(foo_~i~0#1 < foo_~size#1);foo_#res#1 := foo_~i~0#1;" "main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" [2025-01-10 07:30:15,649 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:15,649 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2025-01-10 07:30:15,649 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:15,649 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357807259] [2025-01-10 07:30:15,649 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:30:15,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:15,653 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:30:15,656 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:15,656 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:30:15,656 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:15,656 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:30:15,657 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:30:15,657 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:15,657 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:15,658 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:15,659 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:30:15,659 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:15,659 INFO L85 PathProgramCache]: Analyzing trace with hash -1671393177, now seen corresponding path program 4 times [2025-01-10 07:30:15,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:15,659 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [249888730] [2025-01-10 07:30:15,659 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:30:15,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:15,674 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 25 statements into 2 equivalence classes. [2025-01-10 07:30:15,697 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 25 of 25 statements. [2025-01-10 07:30:15,697 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:30:15,697 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:30:16,256 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:16,257 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:30:16,257 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [249888730] [2025-01-10 07:30:16,257 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [249888730] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:30:16,257 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [663985848] [2025-01-10 07:30:16,257 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:30:16,257 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:30:16,257 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:30:16,259 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:30:16,261 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-01-10 07:30:16,302 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 25 statements into 2 equivalence classes. [2025-01-10 07:30:16,331 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 25 of 25 statements. [2025-01-10 07:30:16,331 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:30:16,331 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:30:16,333 INFO L256 TraceCheckSpWp]: Trace formula consists of 272 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-01-10 07:30:16,334 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:30:16,768 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:16,768 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:30:17,197 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:30:17,197 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [663985848] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:30:17,197 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:30:17,197 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 56 [2025-01-10 07:30:17,198 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1407404760] [2025-01-10 07:30:17,198 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:30:17,198 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:30:17,198 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:30:17,199 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2025-01-10 07:30:17,200 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1343, Invalid=1849, Unknown=0, NotChecked=0, Total=3192 [2025-01-10 07:30:17,200 INFO L87 Difference]: Start difference. First operand 29 states and 31 transitions. cyclomatic complexity: 4 Second operand has 57 states, 57 states have (on average 1.0526315789473684) internal successors, (60), 56 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:17,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:30:17,246 INFO L93 Difference]: Finished difference Result 39 states and 41 transitions. [2025-01-10 07:30:17,247 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 41 transitions. [2025-01-10 07:30:17,247 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 37 [2025-01-10 07:30:17,248 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 39 states and 41 transitions. [2025-01-10 07:30:17,248 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 39 [2025-01-10 07:30:17,248 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 39 [2025-01-10 07:30:17,248 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 41 transitions. [2025-01-10 07:30:17,248 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:30:17,248 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39 states and 41 transitions. [2025-01-10 07:30:17,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 41 transitions. [2025-01-10 07:30:17,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2025-01-10 07:30:17,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.0512820512820513) internal successors, (41), 38 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:30:17,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 41 transitions. [2025-01-10 07:30:17,250 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39 states and 41 transitions. [2025-01-10 07:30:17,250 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-01-10 07:30:17,250 INFO L432 stractBuchiCegarLoop]: Abstraction has 39 states and 41 transitions. [2025-01-10 07:30:17,250 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-01-10 07:30:17,250 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 41 transitions. [2025-01-10 07:30:17,251 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 37 [2025-01-10 07:30:17,251 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:30:17,251 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:30:17,251 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:30:17,251 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [32, 1, 1, 1] [2025-01-10 07:30:17,251 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0;" [2025-01-10 07:30:17,251 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~1#1 % 4294967296 < 32;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume foo_~i~0#1 < foo_~size#1;assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1;" "assume !(foo_~i~0#1 < foo_~size#1);foo_#res#1 := foo_~i~0#1;" "main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1;" [2025-01-10 07:30:17,252 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:17,252 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2025-01-10 07:30:17,252 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:17,252 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778794279] [2025-01-10 07:30:17,252 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:30:17,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:17,255 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:30:17,257 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:17,257 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 07:30:17,257 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:17,257 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:30:17,258 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:30:17,258 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:30:17,258 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:17,258 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:17,259 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:30:17,259 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:17,260 INFO L85 PathProgramCache]: Analyzing trace with hash 1425099879, now seen corresponding path program 5 times [2025-01-10 07:30:17,260 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:17,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [954678711] [2025-01-10 07:30:17,260 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:30:17,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:17,273 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 35 statements into 17 equivalence classes. [2025-01-10 07:30:17,377 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 17 check-sat command(s) and asserted 35 of 35 statements. [2025-01-10 07:30:17,378 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 17 check-sat command(s) [2025-01-10 07:30:17,378 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:17,378 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:30:17,383 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-01-10 07:30:17,422 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-01-10 07:30:17,422 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:17,422 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:17,430 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:30:17,432 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:30:17,432 INFO L85 PathProgramCache]: Analyzing trace with hash 713236837, now seen corresponding path program 1 times [2025-01-10 07:30:17,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:30:17,432 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1221729754] [2025-01-10 07:30:17,432 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:30:17,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:30:17,460 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-01-10 07:30:17,484 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-01-10 07:30:17,484 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:17,484 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:17,485 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:30:17,488 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-01-10 07:30:17,517 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-01-10 07:30:17,517 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:30:17,518 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:30:17,531 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace