./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/loop-invgen/string_concat-noarr.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 551b0097 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/loop-invgen/string_concat-noarr.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 30a4b942034eaa47a8fcc8fdf4549d1d63a9a60d59b585da2a353c9626604750 --- Real Ultimate output --- This is Ultimate 0.3.0-?-551b009-m [2025-01-10 07:34:54,114 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-01-10 07:34:54,181 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-01-10 07:34:54,186 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-01-10 07:34:54,186 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-01-10 07:34:54,211 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-01-10 07:34:54,213 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-01-10 07:34:54,213 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-01-10 07:34:54,213 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-01-10 07:34:54,214 INFO L153 SettingsManager]: * Use memory slicer=true [2025-01-10 07:34:54,214 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-01-10 07:34:54,215 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-01-10 07:34:54,215 INFO L153 SettingsManager]: * Use SBE=true [2025-01-10 07:34:54,215 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * Use old map elimination=false [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-01-10 07:34:54,216 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * sizeof long=4 [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-01-10 07:34:54,216 INFO L153 SettingsManager]: * sizeof long double=12 [2025-01-10 07:34:54,217 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-01-10 07:34:54,217 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-01-10 07:34:54,217 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-01-10 07:34:54,217 INFO L153 SettingsManager]: * Use constant arrays=true [2025-01-10 07:34:54,217 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-01-10 07:34:54,217 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-10 07:34:54,217 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-01-10 07:34:54,217 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-01-10 07:34:54,217 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-01-10 07:34:54,217 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 30a4b942034eaa47a8fcc8fdf4549d1d63a9a60d59b585da2a353c9626604750 [2025-01-10 07:34:54,482 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-01-10 07:34:54,491 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-01-10 07:34:54,493 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-01-10 07:34:54,494 INFO L270 PluginConnector]: Initializing CDTParser... [2025-01-10 07:34:54,494 INFO L274 PluginConnector]: CDTParser initialized [2025-01-10 07:34:54,495 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2025-01-10 07:34:55,766 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/bc9a9bcdc/2ff23d6ed89f4f11942af32dc6f8dc22/FLAG4a64c7f7e [2025-01-10 07:34:56,017 INFO L384 CDTParser]: Found 1 translation units. [2025-01-10 07:34:56,018 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2025-01-10 07:34:56,035 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/bc9a9bcdc/2ff23d6ed89f4f11942af32dc6f8dc22/FLAG4a64c7f7e [2025-01-10 07:34:56,315 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/bc9a9bcdc/2ff23d6ed89f4f11942af32dc6f8dc22 [2025-01-10 07:34:56,317 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-01-10 07:34:56,319 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-01-10 07:34:56,320 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-01-10 07:34:56,320 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-01-10 07:34:56,323 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-01-10 07:34:56,324 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,325 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@322dc6cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56, skipping insertion in model container [2025-01-10 07:34:56,325 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,337 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-01-10 07:34:56,456 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:34:56,464 INFO L200 MainTranslator]: Completed pre-run [2025-01-10 07:34:56,475 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:34:56,491 INFO L204 MainTranslator]: Completed translation [2025-01-10 07:34:56,494 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56 WrapperNode [2025-01-10 07:34:56,494 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-01-10 07:34:56,495 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-01-10 07:34:56,496 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-01-10 07:34:56,496 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-01-10 07:34:56,501 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,507 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,519 INFO L138 Inliner]: procedures = 16, calls = 8, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 52 [2025-01-10 07:34:56,521 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-01-10 07:34:56,522 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-01-10 07:34:56,522 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-01-10 07:34:56,522 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-01-10 07:34:56,529 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,530 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,532 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,539 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-01-10 07:34:56,539 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,539 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,541 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,542 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,545 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,545 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,546 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,547 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-01-10 07:34:56,548 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-01-10 07:34:56,548 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-01-10 07:34:56,548 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-01-10 07:34:56,549 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (1/1) ... [2025-01-10 07:34:56,553 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:34:56,566 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:34:56,577 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:34:56,579 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-01-10 07:34:56,599 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-01-10 07:34:56,599 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-01-10 07:34:56,599 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-01-10 07:34:56,600 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-01-10 07:34:56,642 INFO L234 CfgBuilder]: Building ICFG [2025-01-10 07:34:56,644 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-01-10 07:34:56,729 INFO L? ?]: Removed 9 outVars from TransFormulas that were not future-live. [2025-01-10 07:34:56,729 INFO L283 CfgBuilder]: Performing block encoding [2025-01-10 07:34:56,738 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-01-10 07:34:56,738 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2025-01-10 07:34:56,738 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:34:56 BoogieIcfgContainer [2025-01-10 07:34:56,738 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-01-10 07:34:56,739 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-01-10 07:34:56,739 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-01-10 07:34:56,744 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-01-10 07:34:56,745 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:34:56,745 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.01 07:34:56" (1/3) ... [2025-01-10 07:34:56,745 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@197944f1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:34:56, skipping insertion in model container [2025-01-10 07:34:56,745 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:34:56,746 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:34:56" (2/3) ... [2025-01-10 07:34:56,746 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@197944f1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:34:56, skipping insertion in model container [2025-01-10 07:34:56,746 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:34:56,746 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:34:56" (3/3) ... [2025-01-10 07:34:56,747 INFO L363 chiAutomizerObserver]: Analyzing ICFG string_concat-noarr.i [2025-01-10 07:34:56,782 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-01-10 07:34:56,782 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-01-10 07:34:56,782 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-01-10 07:34:56,782 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-01-10 07:34:56,782 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-01-10 07:34:56,782 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-01-10 07:34:56,782 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-01-10 07:34:56,782 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-01-10 07:34:56,785 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:56,795 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 7 [2025-01-10 07:34:56,795 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:34:56,795 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:34:56,798 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-01-10 07:34:56,798 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-01-10 07:34:56,798 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-01-10 07:34:56,798 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:56,799 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 7 [2025-01-10 07:34:56,799 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:34:56,799 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:34:56,799 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-01-10 07:34:56,799 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-01-10 07:34:56,805 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" [2025-01-10 07:34:56,805 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" [2025-01-10 07:34:56,809 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:56,809 INFO L85 PathProgramCache]: Analyzing trace with hash 29857, now seen corresponding path program 1 times [2025-01-10 07:34:56,817 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:56,817 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [353508974] [2025-01-10 07:34:56,818 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:34:56,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:56,871 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:34:56,882 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:34:56,883 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:56,883 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:56,884 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:34:56,886 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:34:56,890 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:34:56,893 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:56,893 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:56,909 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:34:56,912 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:56,912 INFO L85 PathProgramCache]: Analyzing trace with hash 37835, now seen corresponding path program 1 times [2025-01-10 07:34:56,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:56,913 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1265846237] [2025-01-10 07:34:56,913 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:34:56,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:56,921 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:34:56,927 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:34:56,927 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:56,928 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:56,928 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:34:56,930 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:34:56,933 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:34:56,933 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:56,934 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:56,935 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:34:56,938 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:56,938 INFO L85 PathProgramCache]: Analyzing trace with hash 889477931, now seen corresponding path program 1 times [2025-01-10 07:34:56,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:56,938 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [201934070] [2025-01-10 07:34:56,938 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:34:56,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:56,942 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-01-10 07:34:56,947 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-01-10 07:34:56,948 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:56,949 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:56,950 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:34:56,954 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-01-10 07:34:56,958 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-01-10 07:34:56,958 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:56,959 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:56,962 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:34:57,042 INFO L204 LassoAnalysis]: Preferences: [2025-01-10 07:34:57,046 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-01-10 07:34:57,046 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-01-10 07:34:57,046 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-01-10 07:34:57,046 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-01-10 07:34:57,046 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:34:57,046 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-01-10 07:34:57,046 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-01-10 07:34:57,047 INFO L132 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2025-01-10 07:34:57,047 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-01-10 07:34:57,049 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-01-10 07:34:57,059 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:34:57,075 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:34:57,078 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:34:57,112 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-01-10 07:34:57,113 INFO L365 LassoAnalysis]: Checking for nontermination... [2025-01-10 07:34:57,114 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:34:57,114 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:34:57,118 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:34:57,119 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-01-10 07:34:57,120 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-01-10 07:34:57,120 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-01-10 07:34:57,139 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2025-01-10 07:34:57,139 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:34:57,140 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:34:57,142 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:34:57,143 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-01-10 07:34:57,144 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-01-10 07:34:57,144 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-01-10 07:34:57,168 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2025-01-10 07:34:57,172 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-01-10 07:34:57,172 INFO L204 LassoAnalysis]: Preferences: [2025-01-10 07:34:57,172 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-01-10 07:34:57,173 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-01-10 07:34:57,173 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-01-10 07:34:57,173 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-01-10 07:34:57,173 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:34:57,173 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-01-10 07:34:57,173 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-01-10 07:34:57,173 INFO L132 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2025-01-10 07:34:57,173 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-01-10 07:34:57,173 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-01-10 07:34:57,174 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:34:57,182 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:34:57,185 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:34:57,214 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-01-10 07:34:57,217 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-01-10 07:34:57,218 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:34:57,218 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:34:57,220 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:34:57,223 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-01-10 07:34:57,225 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-01-10 07:34:57,238 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-01-10 07:34:57,238 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-01-10 07:34:57,239 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-01-10 07:34:57,239 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-01-10 07:34:57,239 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-01-10 07:34:57,243 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-01-10 07:34:57,243 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-01-10 07:34:57,246 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-01-10 07:34:57,251 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2025-01-10 07:34:57,254 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2025-01-10 07:34:57,255 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:34:57,256 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:34:57,258 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:34:57,259 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-01-10 07:34:57,260 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-01-10 07:34:57,260 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2025-01-10 07:34:57,261 INFO L474 LassoAnalysis]: Proved termination. [2025-01-10 07:34:57,261 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1) = -2*ULTIMATE.start_main_~i~0#1 + 1999999 Supporting invariants [] [2025-01-10 07:34:57,267 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2025-01-10 07:34:57,270 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2025-01-10 07:34:57,298 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:57,307 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:34:57,312 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:34:57,312 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:57,312 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:57,314 INFO L256 TraceCheckSpWp]: Trace formula consists of 20 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-01-10 07:34:57,314 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:34:57,329 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:34:57,331 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:34:57,331 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:57,331 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:57,333 WARN L254 TraceCheckSpWp]: Trace formula consists of 7 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-01-10 07:34:57,333 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:34:57,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:57,389 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-01-10 07:34:57,390 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:57,453 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 4 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 51 states and 71 transitions. Complement of second has 8 states. [2025-01-10 07:34:57,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2025-01-10 07:34:57,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:57,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 41 transitions. [2025-01-10 07:34:57,469 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 41 transitions. Stem has 3 letters. Loop has 3 letters. [2025-01-10 07:34:57,470 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-01-10 07:34:57,470 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 41 transitions. Stem has 6 letters. Loop has 3 letters. [2025-01-10 07:34:57,470 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-01-10 07:34:57,470 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 41 transitions. Stem has 3 letters. Loop has 6 letters. [2025-01-10 07:34:57,471 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-01-10 07:34:57,471 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 71 transitions. [2025-01-10 07:34:57,477 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2025-01-10 07:34:57,479 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 23 states and 28 transitions. [2025-01-10 07:34:57,481 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2025-01-10 07:34:57,482 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-01-10 07:34:57,482 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 28 transitions. [2025-01-10 07:34:57,482 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:34:57,482 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 28 transitions. [2025-01-10 07:34:57,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 28 transitions. [2025-01-10 07:34:57,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 18. [2025-01-10 07:34:57,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 17 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:57,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 23 transitions. [2025-01-10 07:34:57,504 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 23 transitions. [2025-01-10 07:34:57,504 INFO L432 stractBuchiCegarLoop]: Abstraction has 18 states and 23 transitions. [2025-01-10 07:34:57,504 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-01-10 07:34:57,504 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 23 transitions. [2025-01-10 07:34:57,505 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:34:57,505 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:34:57,505 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:34:57,505 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2025-01-10 07:34:57,505 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:34:57,506 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-01-10 07:34:57,506 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:34:57,506 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:57,506 INFO L85 PathProgramCache]: Analyzing trace with hash 889477999, now seen corresponding path program 1 times [2025-01-10 07:34:57,507 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:57,507 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572228568] [2025-01-10 07:34:57,507 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:34:57,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:57,511 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-01-10 07:34:57,514 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-01-10 07:34:57,514 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:57,515 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:57,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:57,559 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:34:57,559 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572228568] [2025-01-10 07:34:57,560 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1572228568] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:34:57,560 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:34:57,560 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-01-10 07:34:57,560 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062248546] [2025-01-10 07:34:57,561 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:34:57,562 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:34:57,563 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:57,563 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 1 times [2025-01-10 07:34:57,563 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:57,563 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [165660659] [2025-01-10 07:34:57,563 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:34:57,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:57,565 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:57,566 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:57,566 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:57,566 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:57,566 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:34:57,567 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:57,567 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:57,567 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:57,567 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:57,567 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:34:57,570 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:34:57,572 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:34:57,572 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:34:57,573 INFO L87 Difference]: Start difference. First operand 18 states and 23 transitions. cyclomatic complexity: 8 Second operand has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:57,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:34:57,597 INFO L93 Difference]: Finished difference Result 30 states and 36 transitions. [2025-01-10 07:34:57,598 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 36 transitions. [2025-01-10 07:34:57,599 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-01-10 07:34:57,599 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 30 states and 36 transitions. [2025-01-10 07:34:57,599 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2025-01-10 07:34:57,599 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2025-01-10 07:34:57,599 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 36 transitions. [2025-01-10 07:34:57,600 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:34:57,600 INFO L218 hiAutomatonCegarLoop]: Abstraction has 30 states and 36 transitions. [2025-01-10 07:34:57,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 36 transitions. [2025-01-10 07:34:57,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 20. [2025-01-10 07:34:57,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.25) internal successors, (25), 19 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:57,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 25 transitions. [2025-01-10 07:34:57,602 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20 states and 25 transitions. [2025-01-10 07:34:57,603 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:34:57,603 INFO L432 stractBuchiCegarLoop]: Abstraction has 20 states and 25 transitions. [2025-01-10 07:34:57,603 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-01-10 07:34:57,604 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 25 transitions. [2025-01-10 07:34:57,605 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:34:57,605 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:34:57,606 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:34:57,606 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:34:57,606 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:34:57,606 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-01-10 07:34:57,606 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:34:57,607 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:57,607 INFO L85 PathProgramCache]: Analyzing trace with hash -1511165787, now seen corresponding path program 1 times [2025-01-10 07:34:57,607 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:57,607 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1857134723] [2025-01-10 07:34:57,607 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:34:57,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:57,615 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-01-10 07:34:57,619 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-01-10 07:34:57,619 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:57,619 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:57,664 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:57,665 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:34:57,665 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1857134723] [2025-01-10 07:34:57,665 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1857134723] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:34:57,665 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2090138074] [2025-01-10 07:34:57,665 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:34:57,665 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:34:57,665 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:34:57,667 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:34:57,668 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-01-10 07:34:57,695 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-01-10 07:34:57,701 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-01-10 07:34:57,701 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:57,701 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:57,702 INFO L256 TraceCheckSpWp]: Trace formula consists of 28 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-01-10 07:34:57,703 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:34:57,725 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:57,726 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:34:57,757 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:57,758 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2090138074] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:34:57,758 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:34:57,758 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-01-10 07:34:57,759 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201969209] [2025-01-10 07:34:57,759 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:34:57,759 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:34:57,760 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:57,761 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 2 times [2025-01-10 07:34:57,761 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:57,762 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661924635] [2025-01-10 07:34:57,762 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:34:57,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:57,764 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:57,765 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:57,765 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:34:57,765 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:57,765 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:34:57,768 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:57,768 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:57,768 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:57,768 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:57,768 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:34:57,772 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:34:57,772 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-10 07:34:57,773 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-01-10 07:34:57,773 INFO L87 Difference]: Start difference. First operand 20 states and 25 transitions. cyclomatic complexity: 8 Second operand has 7 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 7 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:57,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:34:57,837 INFO L93 Difference]: Finished difference Result 70 states and 85 transitions. [2025-01-10 07:34:57,837 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 85 transitions. [2025-01-10 07:34:57,839 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 5 [2025-01-10 07:34:57,841 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 70 states and 85 transitions. [2025-01-10 07:34:57,841 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 33 [2025-01-10 07:34:57,841 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 33 [2025-01-10 07:34:57,841 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 85 transitions. [2025-01-10 07:34:57,842 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:34:57,842 INFO L218 hiAutomatonCegarLoop]: Abstraction has 70 states and 85 transitions. [2025-01-10 07:34:57,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 85 transitions. [2025-01-10 07:34:57,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 29. [2025-01-10 07:34:57,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 28 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:57,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 40 transitions. [2025-01-10 07:34:57,844 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 40 transitions. [2025-01-10 07:34:57,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-01-10 07:34:57,848 INFO L432 stractBuchiCegarLoop]: Abstraction has 29 states and 40 transitions. [2025-01-10 07:34:57,848 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-01-10 07:34:57,848 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 40 transitions. [2025-01-10 07:34:57,849 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:34:57,849 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:34:57,849 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:34:57,850 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:34:57,850 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:34:57,852 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-01-10 07:34:57,852 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:34:57,853 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:57,853 INFO L85 PathProgramCache]: Analyzing trace with hash -1509030766, now seen corresponding path program 1 times [2025-01-10 07:34:57,853 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:57,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973395446] [2025-01-10 07:34:57,853 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:34:57,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:57,858 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-01-10 07:34:57,862 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-01-10 07:34:57,862 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:57,862 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:57,894 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:57,894 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:34:57,894 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973395446] [2025-01-10 07:34:57,894 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1973395446] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:34:57,894 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:34:57,894 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-01-10 07:34:57,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [995083848] [2025-01-10 07:34:57,894 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:34:57,895 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:34:57,895 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:57,895 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 3 times [2025-01-10 07:34:57,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:57,895 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1358326472] [2025-01-10 07:34:57,895 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:34:57,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:57,900 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:57,901 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:57,901 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 07:34:57,901 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:57,901 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:34:57,902 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:57,902 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:57,902 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:57,902 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:57,902 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:34:57,906 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:34:57,906 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:34:57,907 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:34:57,907 INFO L87 Difference]: Start difference. First operand 29 states and 40 transitions. cyclomatic complexity: 14 Second operand has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:57,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:34:57,913 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2025-01-10 07:34:57,913 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 43 transitions. [2025-01-10 07:34:57,914 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:34:57,915 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 28 states and 34 transitions. [2025-01-10 07:34:57,915 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-01-10 07:34:57,917 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-01-10 07:34:57,918 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 34 transitions. [2025-01-10 07:34:57,918 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:34:57,918 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 34 transitions. [2025-01-10 07:34:57,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 34 transitions. [2025-01-10 07:34:57,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 26. [2025-01-10 07:34:57,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.2307692307692308) internal successors, (32), 25 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:57,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 32 transitions. [2025-01-10 07:34:57,923 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 32 transitions. [2025-01-10 07:34:57,924 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:34:57,925 INFO L432 stractBuchiCegarLoop]: Abstraction has 26 states and 32 transitions. [2025-01-10 07:34:57,925 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-01-10 07:34:57,925 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 32 transitions. [2025-01-10 07:34:57,928 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:34:57,928 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:34:57,929 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:34:57,929 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:34:57,929 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:34:57,929 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-01-10 07:34:57,929 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:34:57,930 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:57,930 INFO L85 PathProgramCache]: Analyzing trace with hash -114860490, now seen corresponding path program 1 times [2025-01-10 07:34:57,930 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:57,930 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103011733] [2025-01-10 07:34:57,930 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:34:57,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:57,933 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-01-10 07:34:57,937 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-01-10 07:34:57,938 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:57,938 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:57,968 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:57,969 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:34:57,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [103011733] [2025-01-10 07:34:57,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [103011733] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:34:57,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [854346475] [2025-01-10 07:34:57,969 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:34:57,969 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:34:57,969 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:34:57,972 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:34:57,973 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-01-10 07:34:57,996 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-01-10 07:34:58,002 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-01-10 07:34:58,002 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:58,002 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:58,003 INFO L256 TraceCheckSpWp]: Trace formula consists of 35 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-01-10 07:34:58,004 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:34:58,030 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2025-01-10 07:34:58,043 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:58,043 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:34:58,069 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:58,069 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [854346475] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:34:58,069 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:34:58,069 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-01-10 07:34:58,070 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1669404727] [2025-01-10 07:34:58,070 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:34:58,070 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:34:58,070 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:58,070 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 4 times [2025-01-10 07:34:58,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:58,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871017918] [2025-01-10 07:34:58,070 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:34:58,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:58,075 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-01-10 07:34:58,076 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:58,076 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:34:58,077 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:58,077 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:34:58,077 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:58,078 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:58,078 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:58,078 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:58,078 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:34:58,082 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:34:58,082 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-10 07:34:58,083 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-01-10 07:34:58,085 INFO L87 Difference]: Start difference. First operand 26 states and 32 transitions. cyclomatic complexity: 9 Second operand has 7 states, 6 states have (on average 3.8333333333333335) internal successors, (23), 7 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:58,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:34:58,106 INFO L93 Difference]: Finished difference Result 43 states and 49 transitions. [2025-01-10 07:34:58,106 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 49 transitions. [2025-01-10 07:34:58,107 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:34:58,109 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 37 states and 43 transitions. [2025-01-10 07:34:58,109 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-01-10 07:34:58,109 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-01-10 07:34:58,109 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37 states and 43 transitions. [2025-01-10 07:34:58,109 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:34:58,110 INFO L218 hiAutomatonCegarLoop]: Abstraction has 37 states and 43 transitions. [2025-01-10 07:34:58,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states and 43 transitions. [2025-01-10 07:34:58,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 35. [2025-01-10 07:34:58,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 1.1714285714285715) internal successors, (41), 34 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:58,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 41 transitions. [2025-01-10 07:34:58,114 INFO L240 hiAutomatonCegarLoop]: Abstraction has 35 states and 41 transitions. [2025-01-10 07:34:58,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-01-10 07:34:58,116 INFO L432 stractBuchiCegarLoop]: Abstraction has 35 states and 41 transitions. [2025-01-10 07:34:58,117 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-01-10 07:34:58,117 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 35 states and 41 transitions. [2025-01-10 07:34:58,118 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:34:58,118 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:34:58,118 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:34:58,119 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 4, 1, 1, 1, 1, 1] [2025-01-10 07:34:58,122 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:34:58,123 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-01-10 07:34:58,123 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:34:58,123 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:58,124 INFO L85 PathProgramCache]: Analyzing trace with hash -1499790353, now seen corresponding path program 2 times [2025-01-10 07:34:58,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:58,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619588418] [2025-01-10 07:34:58,124 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:34:58,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:58,130 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 18 statements into 2 equivalence classes. [2025-01-10 07:34:58,138 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 18 of 18 statements. [2025-01-10 07:34:58,138 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-01-10 07:34:58,138 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:58,247 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:58,247 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:34:58,247 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1619588418] [2025-01-10 07:34:58,248 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1619588418] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:34:58,248 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [573313846] [2025-01-10 07:34:58,248 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:34:58,248 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:34:58,248 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:34:58,250 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:34:58,251 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-01-10 07:34:58,274 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 18 statements into 2 equivalence classes. [2025-01-10 07:34:58,280 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 18 of 18 statements. [2025-01-10 07:34:58,280 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-01-10 07:34:58,280 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:58,281 INFO L256 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-01-10 07:34:58,282 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:34:58,327 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:58,327 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:34:58,413 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:58,414 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [573313846] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:34:58,414 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:34:58,414 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-01-10 07:34:58,414 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1173433133] [2025-01-10 07:34:58,414 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:34:58,414 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:34:58,414 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:58,414 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 5 times [2025-01-10 07:34:58,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:58,415 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518539572] [2025-01-10 07:34:58,415 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:34:58,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:58,418 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:58,418 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:58,419 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:34:58,419 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:58,419 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:34:58,421 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:58,421 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:58,421 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:58,421 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:58,421 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:34:58,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:34:58,429 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-01-10 07:34:58,430 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-01-10 07:34:58,430 INFO L87 Difference]: Start difference. First operand 35 states and 41 transitions. cyclomatic complexity: 9 Second operand has 13 states, 12 states have (on average 3.1666666666666665) internal successors, (38), 13 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:58,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:34:58,559 INFO L93 Difference]: Finished difference Result 200 states and 219 transitions. [2025-01-10 07:34:58,559 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 200 states and 219 transitions. [2025-01-10 07:34:58,561 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 7 [2025-01-10 07:34:58,562 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 200 states to 188 states and 207 transitions. [2025-01-10 07:34:58,563 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2025-01-10 07:34:58,563 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2025-01-10 07:34:58,563 INFO L73 IsDeterministic]: Start isDeterministic. Operand 188 states and 207 transitions. [2025-01-10 07:34:58,563 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:34:58,563 INFO L218 hiAutomatonCegarLoop]: Abstraction has 188 states and 207 transitions. [2025-01-10 07:34:58,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states and 207 transitions. [2025-01-10 07:34:58,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 53. [2025-01-10 07:34:58,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 53 states have (on average 1.2264150943396226) internal successors, (65), 52 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:58,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 65 transitions. [2025-01-10 07:34:58,570 INFO L240 hiAutomatonCegarLoop]: Abstraction has 53 states and 65 transitions. [2025-01-10 07:34:58,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-01-10 07:34:58,571 INFO L432 stractBuchiCegarLoop]: Abstraction has 53 states and 65 transitions. [2025-01-10 07:34:58,571 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-01-10 07:34:58,571 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 53 states and 65 transitions. [2025-01-10 07:34:58,572 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:34:58,572 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:34:58,572 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:34:58,573 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:34:58,573 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:34:58,573 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-01-10 07:34:58,573 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:34:58,573 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:58,573 INFO L85 PathProgramCache]: Analyzing trace with hash 923123602, now seen corresponding path program 2 times [2025-01-10 07:34:58,573 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:58,573 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10499389] [2025-01-10 07:34:58,573 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:34:58,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:58,577 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 21 statements into 2 equivalence classes. [2025-01-10 07:34:58,582 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 21 of 21 statements. [2025-01-10 07:34:58,582 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-01-10 07:34:58,582 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:58,680 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:58,681 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:34:58,681 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10499389] [2025-01-10 07:34:58,681 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [10499389] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:34:58,681 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1442164353] [2025-01-10 07:34:58,681 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:34:58,681 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:34:58,681 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:34:58,685 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:34:58,686 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-01-10 07:34:58,710 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 21 statements into 2 equivalence classes. [2025-01-10 07:34:58,718 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 21 of 21 statements. [2025-01-10 07:34:58,718 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-01-10 07:34:58,718 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:58,719 INFO L256 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-01-10 07:34:58,720 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:34:58,750 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:58,750 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:34:58,840 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:58,840 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1442164353] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:34:58,840 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:34:58,840 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-01-10 07:34:58,840 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1228756651] [2025-01-10 07:34:58,840 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:34:58,840 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:34:58,841 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:58,841 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 6 times [2025-01-10 07:34:58,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:58,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834955435] [2025-01-10 07:34:58,841 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:34:58,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:58,845 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:58,845 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:58,845 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 07:34:58,846 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:58,846 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:34:58,846 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:58,847 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:58,847 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:58,847 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:58,847 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:34:58,850 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:34:58,850 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-01-10 07:34:58,850 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-01-10 07:34:58,851 INFO L87 Difference]: Start difference. First operand 53 states and 65 transitions. cyclomatic complexity: 15 Second operand has 13 states, 12 states have (on average 3.4166666666666665) internal successors, (41), 13 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:58,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:34:58,878 INFO L93 Difference]: Finished difference Result 85 states and 97 transitions. [2025-01-10 07:34:58,878 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 97 transitions. [2025-01-10 07:34:58,879 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:34:58,880 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 73 states and 85 transitions. [2025-01-10 07:34:58,880 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-01-10 07:34:58,880 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-01-10 07:34:58,880 INFO L73 IsDeterministic]: Start isDeterministic. Operand 73 states and 85 transitions. [2025-01-10 07:34:58,880 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:34:58,880 INFO L218 hiAutomatonCegarLoop]: Abstraction has 73 states and 85 transitions. [2025-01-10 07:34:58,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states and 85 transitions. [2025-01-10 07:34:58,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 71. [2025-01-10 07:34:58,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 71 states have (on average 1.1690140845070423) internal successors, (83), 70 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:58,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 83 transitions. [2025-01-10 07:34:58,889 INFO L240 hiAutomatonCegarLoop]: Abstraction has 71 states and 83 transitions. [2025-01-10 07:34:58,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-01-10 07:34:58,890 INFO L432 stractBuchiCegarLoop]: Abstraction has 71 states and 83 transitions. [2025-01-10 07:34:58,890 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-01-10 07:34:58,891 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 71 states and 83 transitions. [2025-01-10 07:34:58,891 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:34:58,891 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:34:58,891 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:34:58,892 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 10, 1, 1, 1, 1, 1] [2025-01-10 07:34:58,893 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:34:58,893 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-01-10 07:34:58,893 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:34:58,893 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:58,894 INFO L85 PathProgramCache]: Analyzing trace with hash 982292655, now seen corresponding path program 3 times [2025-01-10 07:34:58,894 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:58,894 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941456233] [2025-01-10 07:34:58,894 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:34:58,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:58,898 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 36 statements into 11 equivalence classes. [2025-01-10 07:34:58,917 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 36 of 36 statements. [2025-01-10 07:34:58,917 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-01-10 07:34:58,917 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:59,131 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:59,132 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:34:59,132 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941456233] [2025-01-10 07:34:59,132 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [941456233] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:34:59,132 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [717341341] [2025-01-10 07:34:59,132 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:34:59,132 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:34:59,132 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:34:59,135 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:34:59,137 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-01-10 07:34:59,195 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 36 statements into 11 equivalence classes. [2025-01-10 07:34:59,207 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 36 of 36 statements. [2025-01-10 07:34:59,207 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-01-10 07:34:59,207 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:59,208 INFO L256 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-01-10 07:34:59,210 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:34:59,277 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:59,278 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:34:59,531 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:59,532 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [717341341] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:34:59,532 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:34:59,532 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-01-10 07:34:59,532 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1475789012] [2025-01-10 07:34:59,532 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:34:59,533 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:34:59,533 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:59,533 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 7 times [2025-01-10 07:34:59,533 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:59,533 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1938240925] [2025-01-10 07:34:59,533 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-01-10 07:34:59,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:59,535 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:59,535 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:59,535 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:59,535 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:59,535 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:34:59,535 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:34:59,535 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:34:59,536 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:34:59,536 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:34:59,536 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:34:59,539 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:34:59,540 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-01-10 07:34:59,540 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-01-10 07:34:59,540 INFO L87 Difference]: Start difference. First operand 71 states and 83 transitions. cyclomatic complexity: 15 Second operand has 25 states, 24 states have (on average 3.0833333333333335) internal successors, (74), 25 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:59,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:34:59,767 INFO L93 Difference]: Finished difference Result 725 states and 762 transitions. [2025-01-10 07:34:59,767 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 725 states and 762 transitions. [2025-01-10 07:34:59,773 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 13 [2025-01-10 07:34:59,777 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 725 states to 701 states and 738 transitions. [2025-01-10 07:34:59,777 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 45 [2025-01-10 07:34:59,777 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 45 [2025-01-10 07:34:59,777 INFO L73 IsDeterministic]: Start isDeterministic. Operand 701 states and 738 transitions. [2025-01-10 07:34:59,777 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:34:59,777 INFO L218 hiAutomatonCegarLoop]: Abstraction has 701 states and 738 transitions. [2025-01-10 07:34:59,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 701 states and 738 transitions. [2025-01-10 07:34:59,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 701 to 107. [2025-01-10 07:34:59,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 107 states, 107 states have (on average 1.2242990654205608) internal successors, (131), 106 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:34:59,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 131 transitions. [2025-01-10 07:34:59,785 INFO L240 hiAutomatonCegarLoop]: Abstraction has 107 states and 131 transitions. [2025-01-10 07:34:59,786 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-01-10 07:34:59,786 INFO L432 stractBuchiCegarLoop]: Abstraction has 107 states and 131 transitions. [2025-01-10 07:34:59,786 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-01-10 07:34:59,786 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 107 states and 131 transitions. [2025-01-10 07:34:59,787 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:34:59,787 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:34:59,787 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:34:59,788 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:34:59,788 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:34:59,788 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-01-10 07:34:59,788 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:34:59,788 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:34:59,788 INFO L85 PathProgramCache]: Analyzing trace with hash -1949538286, now seen corresponding path program 3 times [2025-01-10 07:34:59,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:34:59,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233997800] [2025-01-10 07:34:59,789 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:34:59,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:34:59,794 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 39 statements into 11 equivalence classes. [2025-01-10 07:34:59,803 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 39 of 39 statements. [2025-01-10 07:34:59,804 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-01-10 07:34:59,804 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:59,956 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:34:59,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:34:59,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233997800] [2025-01-10 07:34:59,957 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1233997800] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:34:59,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2090394029] [2025-01-10 07:34:59,957 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:34:59,957 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:34:59,957 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:34:59,959 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:34:59,960 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-01-10 07:34:59,983 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 39 statements into 11 equivalence classes. [2025-01-10 07:34:59,998 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 39 of 39 statements. [2025-01-10 07:34:59,998 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-01-10 07:34:59,998 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:34:59,999 INFO L256 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-01-10 07:35:00,000 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:35:00,073 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:00,073 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:35:00,304 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:00,305 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2090394029] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:35:00,305 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:35:00,305 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-01-10 07:35:00,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021861163] [2025-01-10 07:35:00,305 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:35:00,305 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:35:00,305 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:00,306 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 8 times [2025-01-10 07:35:00,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:00,306 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [122050194] [2025-01-10 07:35:00,306 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:35:00,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:00,307 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:00,309 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:00,310 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:35:00,310 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:00,310 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:35:00,310 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:00,310 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:00,311 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:00,311 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:00,311 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:35:00,313 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:35:00,314 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-01-10 07:35:00,314 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-01-10 07:35:00,314 INFO L87 Difference]: Start difference. First operand 107 states and 131 transitions. cyclomatic complexity: 27 Second operand has 25 states, 24 states have (on average 3.2083333333333335) internal successors, (77), 25 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:00,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:35:00,391 INFO L93 Difference]: Finished difference Result 169 states and 193 transitions. [2025-01-10 07:35:00,391 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 169 states and 193 transitions. [2025-01-10 07:35:00,392 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:35:00,393 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 169 states to 145 states and 169 transitions. [2025-01-10 07:35:00,393 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-01-10 07:35:00,393 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-01-10 07:35:00,393 INFO L73 IsDeterministic]: Start isDeterministic. Operand 145 states and 169 transitions. [2025-01-10 07:35:00,393 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:35:00,393 INFO L218 hiAutomatonCegarLoop]: Abstraction has 145 states and 169 transitions. [2025-01-10 07:35:00,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states and 169 transitions. [2025-01-10 07:35:00,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 143. [2025-01-10 07:35:00,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 143 states have (on average 1.167832167832168) internal successors, (167), 142 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:00,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 167 transitions. [2025-01-10 07:35:00,402 INFO L240 hiAutomatonCegarLoop]: Abstraction has 143 states and 167 transitions. [2025-01-10 07:35:00,403 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-01-10 07:35:00,403 INFO L432 stractBuchiCegarLoop]: Abstraction has 143 states and 167 transitions. [2025-01-10 07:35:00,404 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-01-10 07:35:00,404 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 143 states and 167 transitions. [2025-01-10 07:35:00,405 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:35:00,405 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:35:00,405 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:35:00,406 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 22, 1, 1, 1, 1, 1] [2025-01-10 07:35:00,408 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:35:00,408 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-01-10 07:35:00,408 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:35:00,409 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:00,409 INFO L85 PathProgramCache]: Analyzing trace with hash -937381329, now seen corresponding path program 4 times [2025-01-10 07:35:00,409 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:00,409 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103020531] [2025-01-10 07:35:00,409 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:35:00,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:00,418 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 72 statements into 2 equivalence classes. [2025-01-10 07:35:00,431 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 72 of 72 statements. [2025-01-10 07:35:00,431 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:35:00,431 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:00,901 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:00,902 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:35:00,902 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [103020531] [2025-01-10 07:35:00,902 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [103020531] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:35:00,902 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1687998643] [2025-01-10 07:35:00,902 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:35:00,902 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:35:00,902 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:35:00,906 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:35:00,908 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-01-10 07:35:00,935 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 72 statements into 2 equivalence classes. [2025-01-10 07:35:00,950 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 72 of 72 statements. [2025-01-10 07:35:00,950 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:35:00,950 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:00,951 INFO L256 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-01-10 07:35:00,954 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:35:01,076 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:01,077 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:35:01,873 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:01,873 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1687998643] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:35:01,873 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:35:01,873 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 47 [2025-01-10 07:35:01,874 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1074717487] [2025-01-10 07:35:01,874 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:35:01,874 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:35:01,875 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:01,875 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 9 times [2025-01-10 07:35:01,875 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:01,875 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1108720341] [2025-01-10 07:35:01,875 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:35:01,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:01,877 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:01,877 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:01,877 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 07:35:01,877 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:01,877 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:35:01,878 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:01,878 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:01,878 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:01,878 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:01,878 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:35:01,881 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:35:01,882 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2025-01-10 07:35:01,883 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2025-01-10 07:35:01,883 INFO L87 Difference]: Start difference. First operand 143 states and 167 transitions. cyclomatic complexity: 27 Second operand has 48 states, 47 states have (on average 3.021276595744681) internal successors, (142), 48 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:02,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:35:02,412 INFO L93 Difference]: Finished difference Result 2747 states and 2820 transitions. [2025-01-10 07:35:02,412 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2747 states and 2820 transitions. [2025-01-10 07:35:02,432 INFO L131 ngComponentsAnalysis]: Automaton has 25 accepting balls. 25 [2025-01-10 07:35:02,445 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2747 states to 2699 states and 2772 transitions. [2025-01-10 07:35:02,445 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 81 [2025-01-10 07:35:02,445 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 81 [2025-01-10 07:35:02,446 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2699 states and 2772 transitions. [2025-01-10 07:35:02,446 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:35:02,446 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2699 states and 2772 transitions. [2025-01-10 07:35:02,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2699 states and 2772 transitions. [2025-01-10 07:35:02,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2699 to 215. [2025-01-10 07:35:02,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 215 states, 215 states have (on average 1.2232558139534884) internal successors, (263), 214 states have internal predecessors, (263), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:02,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 215 states to 215 states and 263 transitions. [2025-01-10 07:35:02,464 INFO L240 hiAutomatonCegarLoop]: Abstraction has 215 states and 263 transitions. [2025-01-10 07:35:02,467 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-01-10 07:35:02,467 INFO L432 stractBuchiCegarLoop]: Abstraction has 215 states and 263 transitions. [2025-01-10 07:35:02,468 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-01-10 07:35:02,469 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 215 states and 263 transitions. [2025-01-10 07:35:02,470 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:35:02,470 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:35:02,470 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:35:02,471 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:35:02,473 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:35:02,473 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-01-10 07:35:02,473 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:35:02,474 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:02,474 INFO L85 PathProgramCache]: Analyzing trace with hash 15096082, now seen corresponding path program 4 times [2025-01-10 07:35:02,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:02,474 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146109301] [2025-01-10 07:35:02,474 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:35:02,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:02,483 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 75 statements into 2 equivalence classes. [2025-01-10 07:35:02,502 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 75 of 75 statements. [2025-01-10 07:35:02,504 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:35:02,504 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:03,039 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:03,040 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:35:03,040 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146109301] [2025-01-10 07:35:03,040 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1146109301] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:35:03,040 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1646416201] [2025-01-10 07:35:03,040 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:35:03,040 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:35:03,040 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:35:03,043 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:35:03,046 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-01-10 07:35:03,078 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 75 statements into 2 equivalence classes. [2025-01-10 07:35:03,102 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 75 of 75 statements. [2025-01-10 07:35:03,103 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:35:03,103 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:03,104 INFO L256 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-01-10 07:35:03,107 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:35:03,221 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:03,221 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:35:04,047 INFO L134 CoverageAnalysis]: Checked inductivity of 737 backedges. 0 proven. 737 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:04,048 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1646416201] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:35:04,048 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:35:04,048 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 47 [2025-01-10 07:35:04,048 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [307007218] [2025-01-10 07:35:04,048 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:35:04,049 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:35:04,049 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:04,049 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 10 times [2025-01-10 07:35:04,049 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:04,049 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1653882347] [2025-01-10 07:35:04,049 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:35:04,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:04,052 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-01-10 07:35:04,052 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:04,052 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:35:04,052 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:04,053 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:35:04,053 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:04,053 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:04,053 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:04,053 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:04,054 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:35:04,056 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:35:04,057 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2025-01-10 07:35:04,058 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2025-01-10 07:35:04,058 INFO L87 Difference]: Start difference. First operand 215 states and 263 transitions. cyclomatic complexity: 51 Second operand has 48 states, 47 states have (on average 3.0851063829787235) internal successors, (145), 48 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:04,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:35:04,129 INFO L93 Difference]: Finished difference Result 337 states and 385 transitions. [2025-01-10 07:35:04,129 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 337 states and 385 transitions. [2025-01-10 07:35:04,131 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:35:04,133 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 337 states to 289 states and 337 transitions. [2025-01-10 07:35:04,133 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-01-10 07:35:04,134 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-01-10 07:35:04,134 INFO L73 IsDeterministic]: Start isDeterministic. Operand 289 states and 337 transitions. [2025-01-10 07:35:04,135 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:35:04,137 INFO L218 hiAutomatonCegarLoop]: Abstraction has 289 states and 337 transitions. [2025-01-10 07:35:04,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289 states and 337 transitions. [2025-01-10 07:35:04,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289 to 287. [2025-01-10 07:35:04,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 287 states, 287 states have (on average 1.1672473867595818) internal successors, (335), 286 states have internal predecessors, (335), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:04,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287 states to 287 states and 335 transitions. [2025-01-10 07:35:04,145 INFO L240 hiAutomatonCegarLoop]: Abstraction has 287 states and 335 transitions. [2025-01-10 07:35:04,145 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-01-10 07:35:04,145 INFO L432 stractBuchiCegarLoop]: Abstraction has 287 states and 335 transitions. [2025-01-10 07:35:04,146 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-01-10 07:35:04,146 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 287 states and 335 transitions. [2025-01-10 07:35:04,147 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:35:04,147 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:35:04,147 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:35:04,149 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 46, 1, 1, 1, 1, 1] [2025-01-10 07:35:04,149 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:35:04,149 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-01-10 07:35:04,152 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:35:04,153 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:04,153 INFO L85 PathProgramCache]: Analyzing trace with hash 475833647, now seen corresponding path program 5 times [2025-01-10 07:35:04,153 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:04,153 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457368515] [2025-01-10 07:35:04,153 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:35:04,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:04,162 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 144 statements into 47 equivalence classes. [2025-01-10 07:35:04,209 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 144 of 144 statements. [2025-01-10 07:35:04,209 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-01-10 07:35:04,209 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:05,718 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:05,718 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:35:05,718 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1457368515] [2025-01-10 07:35:05,718 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1457368515] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:35:05,718 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1173686525] [2025-01-10 07:35:05,718 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:35:05,718 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:35:05,718 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:35:05,722 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:35:05,723 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-01-10 07:35:05,759 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 144 statements into 47 equivalence classes. [2025-01-10 07:35:05,799 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 144 of 144 statements. [2025-01-10 07:35:05,800 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-01-10 07:35:05,800 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:05,803 INFO L256 TraceCheckSpWp]: Trace formula consists of 253 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-01-10 07:35:05,806 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:35:06,003 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:06,003 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:35:08,399 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:08,399 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1173686525] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:35:08,399 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:35:08,399 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2025-01-10 07:35:08,399 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1967720232] [2025-01-10 07:35:08,399 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:35:08,400 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:35:08,400 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:08,400 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 11 times [2025-01-10 07:35:08,400 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:08,400 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [412502940] [2025-01-10 07:35:08,400 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:35:08,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:08,402 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:08,402 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:08,402 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:35:08,402 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:08,402 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:35:08,402 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:08,402 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:08,402 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:08,402 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:08,403 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:35:08,404 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:35:08,405 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-01-10 07:35:08,408 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-01-10 07:35:08,408 INFO L87 Difference]: Start difference. First operand 287 states and 335 transitions. cyclomatic complexity: 51 Second operand has 96 states, 95 states have (on average 3.0105263157894737) internal successors, (286), 96 states have internal predecessors, (286), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:10,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:35:10,517 INFO L93 Difference]: Finished difference Result 10679 states and 10824 transitions. [2025-01-10 07:35:10,517 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10679 states and 10824 transitions. [2025-01-10 07:35:10,579 INFO L131 ngComponentsAnalysis]: Automaton has 49 accepting balls. 49 [2025-01-10 07:35:10,627 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10679 states to 10583 states and 10728 transitions. [2025-01-10 07:35:10,627 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 153 [2025-01-10 07:35:10,627 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 153 [2025-01-10 07:35:10,627 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10583 states and 10728 transitions. [2025-01-10 07:35:10,628 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:35:10,628 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10583 states and 10728 transitions. [2025-01-10 07:35:10,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10583 states and 10728 transitions. [2025-01-10 07:35:10,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10583 to 431. [2025-01-10 07:35:10,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 431 states, 431 states have (on average 1.222737819025522) internal successors, (527), 430 states have internal predecessors, (527), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:10,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 431 states to 431 states and 527 transitions. [2025-01-10 07:35:10,676 INFO L240 hiAutomatonCegarLoop]: Abstraction has 431 states and 527 transitions. [2025-01-10 07:35:10,677 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-01-10 07:35:10,678 INFO L432 stractBuchiCegarLoop]: Abstraction has 431 states and 527 transitions. [2025-01-10 07:35:10,679 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-01-10 07:35:10,679 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 431 states and 527 transitions. [2025-01-10 07:35:10,680 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:35:10,681 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:35:10,681 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:35:10,682 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 46, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:35:10,685 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:35:10,686 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-01-10 07:35:10,686 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:35:10,686 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:10,686 INFO L85 PathProgramCache]: Analyzing trace with hash -735266030, now seen corresponding path program 5 times [2025-01-10 07:35:10,686 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:10,686 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [733530278] [2025-01-10 07:35:10,686 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:35:10,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:10,694 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 147 statements into 47 equivalence classes. [2025-01-10 07:35:10,734 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 147 of 147 statements. [2025-01-10 07:35:10,734 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-01-10 07:35:10,734 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:12,035 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:12,035 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:35:12,035 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [733530278] [2025-01-10 07:35:12,035 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [733530278] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:35:12,036 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [46957404] [2025-01-10 07:35:12,036 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:35:12,036 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:35:12,036 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:35:12,040 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:35:12,041 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-01-10 07:35:12,099 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 147 statements into 47 equivalence classes. [2025-01-10 07:35:12,146 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 147 of 147 statements. [2025-01-10 07:35:12,146 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-01-10 07:35:12,146 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:12,147 INFO L256 TraceCheckSpWp]: Trace formula consists of 350 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-01-10 07:35:12,150 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:35:12,310 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:12,310 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:35:14,602 INFO L134 CoverageAnalysis]: Checked inductivity of 3197 backedges. 0 proven. 3197 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:14,602 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [46957404] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:35:14,602 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:35:14,602 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2025-01-10 07:35:14,602 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [782342065] [2025-01-10 07:35:14,602 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:35:14,603 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:35:14,604 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:14,604 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 12 times [2025-01-10 07:35:14,604 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:14,604 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209087834] [2025-01-10 07:35:14,604 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:35:14,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:14,606 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:14,607 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:14,607 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 07:35:14,607 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:14,607 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:35:14,607 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:14,607 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:14,607 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:14,608 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:14,608 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:35:14,610 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:35:14,612 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-01-10 07:35:14,614 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-01-10 07:35:14,614 INFO L87 Difference]: Start difference. First operand 431 states and 527 transitions. cyclomatic complexity: 99 Second operand has 96 states, 95 states have (on average 3.042105263157895) internal successors, (289), 96 states have internal predecessors, (289), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:14,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:35:14,820 INFO L93 Difference]: Finished difference Result 673 states and 769 transitions. [2025-01-10 07:35:14,820 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 673 states and 769 transitions. [2025-01-10 07:35:14,824 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:35:14,826 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 673 states to 577 states and 673 transitions. [2025-01-10 07:35:14,827 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-01-10 07:35:14,827 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-01-10 07:35:14,827 INFO L73 IsDeterministic]: Start isDeterministic. Operand 577 states and 673 transitions. [2025-01-10 07:35:14,828 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:35:14,828 INFO L218 hiAutomatonCegarLoop]: Abstraction has 577 states and 673 transitions. [2025-01-10 07:35:14,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 577 states and 673 transitions. [2025-01-10 07:35:14,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 577 to 575. [2025-01-10 07:35:14,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 575 states, 575 states have (on average 1.1669565217391304) internal successors, (671), 574 states have internal predecessors, (671), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:14,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 575 states to 575 states and 671 transitions. [2025-01-10 07:35:14,836 INFO L240 hiAutomatonCegarLoop]: Abstraction has 575 states and 671 transitions. [2025-01-10 07:35:14,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-01-10 07:35:14,837 INFO L432 stractBuchiCegarLoop]: Abstraction has 575 states and 671 transitions. [2025-01-10 07:35:14,837 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-01-10 07:35:14,837 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 575 states and 671 transitions. [2025-01-10 07:35:14,840 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:35:14,840 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:35:14,840 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:35:14,843 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 94, 1, 1, 1, 1, 1] [2025-01-10 07:35:14,843 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:35:14,843 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-01-10 07:35:14,844 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:35:14,844 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:14,844 INFO L85 PathProgramCache]: Analyzing trace with hash -1549563089, now seen corresponding path program 6 times [2025-01-10 07:35:14,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:14,844 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858907502] [2025-01-10 07:35:14,845 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:35:14,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:14,857 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 288 statements into 95 equivalence classes. [2025-01-10 07:35:14,960 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 288 of 288 statements. [2025-01-10 07:35:14,960 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-01-10 07:35:14,960 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:19,534 INFO L134 CoverageAnalysis]: Checked inductivity of 13301 backedges. 0 proven. 13301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:19,534 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:35:19,534 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858907502] [2025-01-10 07:35:19,535 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1858907502] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:35:19,535 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [119422154] [2025-01-10 07:35:19,535 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:35:19,535 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:35:19,535 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:35:19,537 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:35:19,538 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-01-10 07:35:19,581 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 288 statements into 95 equivalence classes. [2025-01-10 07:35:19,651 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 288 of 288 statements. [2025-01-10 07:35:19,652 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-01-10 07:35:19,652 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:19,653 INFO L256 TraceCheckSpWp]: Trace formula consists of 493 conjuncts, 96 conjuncts are in the unsatisfiable core [2025-01-10 07:35:19,657 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:35:20,035 INFO L134 CoverageAnalysis]: Checked inductivity of 13301 backedges. 0 proven. 13301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:20,035 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:35:23,954 INFO L134 CoverageAnalysis]: Checked inductivity of 13301 backedges. 0 proven. 13301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:23,955 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [119422154] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:35:23,955 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:35:23,955 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 102 [2025-01-10 07:35:23,955 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2046997347] [2025-01-10 07:35:23,955 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:35:23,956 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:35:23,956 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:23,956 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 13 times [2025-01-10 07:35:23,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:23,956 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202123397] [2025-01-10 07:35:23,956 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-01-10 07:35:23,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:23,958 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:23,958 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:23,958 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:23,958 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:23,958 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:35:23,959 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:23,959 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:23,959 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:23,959 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:23,959 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:35:23,962 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:35:23,963 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2025-01-10 07:35:23,965 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5253, Invalid=5253, Unknown=0, NotChecked=0, Total=10506 [2025-01-10 07:35:23,966 INFO L87 Difference]: Start difference. First operand 575 states and 671 transitions. cyclomatic complexity: 99 Second operand has 103 states, 102 states have (on average 3.0392156862745097) internal successors, (310), 103 states have internal predecessors, (310), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:25,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:35:25,824 INFO L93 Difference]: Finished difference Result 15815 states and 15924 transitions. [2025-01-10 07:35:25,824 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15815 states and 15924 transitions. [2025-01-10 07:35:25,850 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 7 [2025-01-10 07:35:25,906 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15815 states to 15803 states and 15912 transitions. [2025-01-10 07:35:25,906 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2025-01-10 07:35:25,906 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2025-01-10 07:35:25,906 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15803 states and 15912 transitions. [2025-01-10 07:35:25,915 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:35:25,915 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15803 states and 15912 transitions. [2025-01-10 07:35:25,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15803 states and 15912 transitions. [2025-01-10 07:35:25,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15803 to 593. [2025-01-10 07:35:25,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 593 states, 593 states have (on average 1.1720067453625633) internal successors, (695), 592 states have internal predecessors, (695), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:25,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 593 states to 593 states and 695 transitions. [2025-01-10 07:35:25,996 INFO L240 hiAutomatonCegarLoop]: Abstraction has 593 states and 695 transitions. [2025-01-10 07:35:25,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2025-01-10 07:35:25,997 INFO L432 stractBuchiCegarLoop]: Abstraction has 593 states and 695 transitions. [2025-01-10 07:35:25,997 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-01-10 07:35:25,997 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 593 states and 695 transitions. [2025-01-10 07:35:25,999 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:35:25,999 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:35:25,999 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:35:26,001 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 94, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:35:26,001 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:35:26,002 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-01-10 07:35:26,002 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:35:26,002 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:26,002 INFO L85 PathProgramCache]: Analyzing trace with hash -435978478, now seen corresponding path program 6 times [2025-01-10 07:35:26,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:26,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441421946] [2025-01-10 07:35:26,003 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:35:26,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:26,014 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 291 statements into 95 equivalence classes. [2025-01-10 07:35:26,090 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 291 of 291 statements. [2025-01-10 07:35:26,091 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-01-10 07:35:26,091 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:30,584 INFO L134 CoverageAnalysis]: Checked inductivity of 13301 backedges. 0 proven. 13301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:30,584 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:35:30,584 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [441421946] [2025-01-10 07:35:30,584 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [441421946] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:35:30,584 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1735003654] [2025-01-10 07:35:30,585 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:35:30,585 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:35:30,585 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:35:30,587 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:35:30,588 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2025-01-10 07:35:30,643 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 291 statements into 95 equivalence classes. [2025-01-10 07:35:30,764 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 291 of 291 statements. [2025-01-10 07:35:30,764 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-01-10 07:35:30,764 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:35:30,767 INFO L256 TraceCheckSpWp]: Trace formula consists of 686 conjuncts, 96 conjuncts are in the unsatisfiable core [2025-01-10 07:35:30,770 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:35:31,111 INFO L134 CoverageAnalysis]: Checked inductivity of 13301 backedges. 0 proven. 13301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:31,111 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:35:34,616 INFO L134 CoverageAnalysis]: Checked inductivity of 13301 backedges. 0 proven. 13301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:35:34,616 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1735003654] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:35:34,616 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:35:34,617 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 102 [2025-01-10 07:35:34,617 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1137336018] [2025-01-10 07:35:34,617 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:35:34,617 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:35:34,618 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:34,618 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 14 times [2025-01-10 07:35:34,618 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:34,618 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1961321107] [2025-01-10 07:35:34,618 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:35:34,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:34,622 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:34,622 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:34,622 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:35:34,622 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:34,622 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:35:34,622 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:34,622 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:34,623 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:34,623 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:34,623 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:35:34,625 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:35:34,627 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2025-01-10 07:35:34,628 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5253, Invalid=5253, Unknown=0, NotChecked=0, Total=10506 [2025-01-10 07:35:34,629 INFO L87 Difference]: Start difference. First operand 593 states and 695 transitions. cyclomatic complexity: 105 Second operand has 103 states, 102 states have (on average 3.0686274509803924) internal successors, (313), 103 states have internal predecessors, (313), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:34,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:35:34,754 INFO L93 Difference]: Finished difference Result 625 states and 727 transitions. [2025-01-10 07:35:34,754 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 625 states and 727 transitions. [2025-01-10 07:35:34,756 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:35:34,757 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 625 states to 613 states and 715 transitions. [2025-01-10 07:35:34,757 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-01-10 07:35:34,758 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-01-10 07:35:34,758 INFO L73 IsDeterministic]: Start isDeterministic. Operand 613 states and 715 transitions. [2025-01-10 07:35:34,758 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-01-10 07:35:34,758 INFO L218 hiAutomatonCegarLoop]: Abstraction has 613 states and 715 transitions. [2025-01-10 07:35:34,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 613 states and 715 transitions. [2025-01-10 07:35:34,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 613 to 611. [2025-01-10 07:35:34,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 611 states, 611 states have (on average 1.1669394435351883) internal successors, (713), 610 states have internal predecessors, (713), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:35:34,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 611 states to 611 states and 713 transitions. [2025-01-10 07:35:34,768 INFO L240 hiAutomatonCegarLoop]: Abstraction has 611 states and 713 transitions. [2025-01-10 07:35:34,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2025-01-10 07:35:34,771 INFO L432 stractBuchiCegarLoop]: Abstraction has 611 states and 713 transitions. [2025-01-10 07:35:34,771 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-01-10 07:35:34,771 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 611 states and 713 transitions. [2025-01-10 07:35:34,772 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-01-10 07:35:34,772 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:35:34,772 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:35:34,775 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [101, 100, 100, 1, 1, 1, 1, 1] [2025-01-10 07:35:34,775 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:35:34,775 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;" "main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-01-10 07:35:34,776 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-01-10 07:35:34,776 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:34,776 INFO L85 PathProgramCache]: Analyzing trace with hash 1236914159, now seen corresponding path program 7 times [2025-01-10 07:35:34,776 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:34,776 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1744352043] [2025-01-10 07:35:34,776 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-01-10 07:35:34,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:34,787 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 306 statements into 1 equivalence classes. [2025-01-10 07:35:34,817 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 306 of 306 statements. [2025-01-10 07:35:34,818 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:34,818 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:34,818 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:35:34,823 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 306 statements into 1 equivalence classes. [2025-01-10 07:35:34,862 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 306 of 306 statements. [2025-01-10 07:35:34,862 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:34,862 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:34,893 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:35:34,894 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:34,894 INFO L85 PathProgramCache]: Analyzing trace with hash 95, now seen corresponding path program 15 times [2025-01-10 07:35:34,894 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:34,895 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963205739] [2025-01-10 07:35:34,895 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:35:34,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:34,896 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:34,897 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:34,897 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 07:35:34,897 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:34,897 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:35:34,897 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:35:34,897 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:35:34,898 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:34,898 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:34,898 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:35:34,898 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:35:34,898 INFO L85 PathProgramCache]: Analyzing trace with hash -310366671, now seen corresponding path program 1 times [2025-01-10 07:35:34,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:35:34,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1556536756] [2025-01-10 07:35:34,899 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:35:34,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:35:34,907 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 307 statements into 1 equivalence classes. [2025-01-10 07:35:34,934 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 307 of 307 statements. [2025-01-10 07:35:34,934 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:34,935 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:34,935 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:35:34,940 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 307 statements into 1 equivalence classes. [2025-01-10 07:35:34,972 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 307 of 307 statements. [2025-01-10 07:35:34,972 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:34,972 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:34,982 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:35:40,035 WARN L286 SmtUtils]: Spent 5.01s on a formula simplification. DAG size of input: 735 DAG size of output: 630 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2025-01-10 07:35:43,162 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 306 statements into 1 equivalence classes. [2025-01-10 07:35:43,205 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 306 of 306 statements. [2025-01-10 07:35:43,205 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:43,205 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:43,205 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:35:43,234 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 306 statements into 1 equivalence classes. [2025-01-10 07:35:43,269 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 306 of 306 statements. [2025-01-10 07:35:43,270 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:35:43,270 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:35:43,442 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 10.01 07:35:43 BoogieIcfgContainer [2025-01-10 07:35:43,442 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-01-10 07:35:43,443 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-01-10 07:35:43,443 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-01-10 07:35:43,444 INFO L274 PluginConnector]: Witness Printer initialized [2025-01-10 07:35:43,444 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:34:56" (3/4) ... [2025-01-10 07:35:43,446 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-01-10 07:35:43,502 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-01-10 07:35:43,502 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-01-10 07:35:43,503 INFO L158 Benchmark]: Toolchain (without parser) took 47184.17ms. Allocated memory was 167.8MB in the beginning and 1.1GB in the end (delta: 931.1MB). Free memory was 124.5MB in the beginning and 446.8MB in the end (delta: -322.3MB). Peak memory consumption was 603.0MB. Max. memory is 16.1GB. [2025-01-10 07:35:43,504 INFO L158 Benchmark]: CDTParser took 0.23ms. Allocated memory is still 201.3MB. Free memory is still 118.1MB. There was no memory consumed. Max. memory is 16.1GB. [2025-01-10 07:35:43,504 INFO L158 Benchmark]: CACSL2BoogieTranslator took 175.00ms. Allocated memory is still 167.8MB. Free memory was 124.5MB in the beginning and 113.4MB in the end (delta: 11.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-01-10 07:35:43,504 INFO L158 Benchmark]: Boogie Procedure Inliner took 26.38ms. Allocated memory is still 167.8MB. Free memory was 113.4MB in the beginning and 112.8MB in the end (delta: 648.8kB). There was no memory consumed. Max. memory is 16.1GB. [2025-01-10 07:35:43,504 INFO L158 Benchmark]: Boogie Preprocessor took 25.10ms. Allocated memory is still 167.8MB. Free memory was 112.8MB in the beginning and 111.4MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-01-10 07:35:43,505 INFO L158 Benchmark]: RCFGBuilder took 190.68ms. Allocated memory is still 167.8MB. Free memory was 111.4MB in the beginning and 100.6MB in the end (delta: 10.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-01-10 07:35:43,505 INFO L158 Benchmark]: BuchiAutomizer took 46703.50ms. Allocated memory was 167.8MB in the beginning and 1.1GB in the end (delta: 931.1MB). Free memory was 100.6MB in the beginning and 455.2MB in the end (delta: -354.6MB). Peak memory consumption was 569.4MB. Max. memory is 16.1GB. [2025-01-10 07:35:43,505 INFO L158 Benchmark]: Witness Printer took 58.77ms. Allocated memory is still 1.1GB. Free memory was 455.2MB in the beginning and 446.8MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-01-10 07:35:43,506 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23ms. Allocated memory is still 201.3MB. Free memory is still 118.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 175.00ms. Allocated memory is still 167.8MB. Free memory was 124.5MB in the beginning and 113.4MB in the end (delta: 11.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 26.38ms. Allocated memory is still 167.8MB. Free memory was 113.4MB in the beginning and 112.8MB in the end (delta: 648.8kB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 25.10ms. Allocated memory is still 167.8MB. Free memory was 112.8MB in the beginning and 111.4MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 190.68ms. Allocated memory is still 167.8MB. Free memory was 111.4MB in the beginning and 100.6MB in the end (delta: 10.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 46703.50ms. Allocated memory was 167.8MB in the beginning and 1.1GB in the end (delta: 931.1MB). Free memory was 100.6MB in the beginning and 455.2MB in the end (delta: -354.6MB). Peak memory consumption was 569.4MB. Max. memory is 16.1GB. * Witness Printer took 58.77ms. Allocated memory is still 1.1GB. Free memory was 455.2MB in the beginning and 446.8MB in the end (delta: 8.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 15 terminating modules (14 trivial, 1 deterministic, 0 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function (((long long) -2 * i) + 1999999) and consists of 5 locations. 14 modules have a trivial ranking function, the largest among these consists of 103 locations. The remainder module has 611 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 46.5s and 16 iterations. TraceHistogramMax:101. Analysis of lassos took 40.2s. Construction of modules took 1.9s. Büchi inclusion checks took 4.3s. Highest rank in rank-based complementation 3. Minimization of det autom 0. Minimization of nondet autom 15. Automata minimization 0.2s AutomataMinimizationTime, 15 MinimizatonAttempts, 28645 StatesRemovedByMinimization, 15 NontrivialMinimizations. Non-live state removal took 0.2s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [1, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 5826 SdHoareTripleChecker+Valid, 2.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 5825 mSDsluCounter, 1847 SdHoareTripleChecker+Invalid, 1.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1685 mSDsCounter, 1254 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 2243 IncrementalHoareTripleChecker+Invalid, 3497 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1254 mSolverCounterUnsat, 162 mSDtfsCounter, 2243 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT1 conc0 concLT0 SILN14 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: Lassos: inital10 mio100 ax100 hnf100 lsp100 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq160 hnf93 smp100 dnf100 smp100 tf113 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: sat Degree: 0 Time: 42ms VariablesStem: 0 VariablesLoop: 2 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 0 MotzkinApplications: 2 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 1 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 24]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L25] int i, j; [L27] i = 0 VAL [i=0] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=1] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=2] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=3] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=4] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=5] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=6] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=7] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=8] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=9] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=10] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=11] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=12] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=13] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=14] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=15] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=16] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=17] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=18] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=19] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=20] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=21] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=22] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=23] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=24] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=25] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=26] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=27] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=28] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=29] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=30] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=31] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=32] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=33] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=34] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=35] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=36] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=37] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=38] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=39] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=40] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=41] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=42] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=43] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=44] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=45] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=46] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=47] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=48] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=49] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=50] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=51] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=52] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=53] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=54] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=55] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=56] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=57] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=58] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=59] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=60] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=61] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=62] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=63] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=64] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=65] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=66] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=67] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=68] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=69] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=70] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=71] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=72] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=73] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=74] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=75] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=76] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=77] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=78] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=79] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=80] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=81] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=82] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=83] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=84] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=85] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=86] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=87] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=88] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=89] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=90] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=91] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=92] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=93] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=94] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=95] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=96] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=97] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=98] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=99] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=100] [L29] COND FALSE !(__VERIFIER_nondet_int() && i < 1000000) [L32] COND TRUE i >= 100 Loop: [L32] STUCK: goto STUCK; End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 24]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L25] int i, j; [L27] i = 0 VAL [i=0] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=1] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=2] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=3] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=4] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=5] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=6] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=7] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=8] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=9] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=10] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=11] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=12] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=13] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=14] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=15] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=16] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=17] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=18] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=19] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=20] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=21] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=22] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=23] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=24] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=25] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=26] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=27] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=28] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=29] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=30] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=31] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=32] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=33] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=34] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=35] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=36] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=37] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=38] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=39] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=40] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=41] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=42] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=43] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=44] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=45] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=46] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=47] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=48] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=49] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=50] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=51] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=52] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=53] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=54] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=55] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=56] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=57] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=58] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=59] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=60] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=61] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=62] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=63] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=64] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=65] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=66] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=67] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=68] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=69] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=70] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=71] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=72] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=73] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=74] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=75] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=76] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=77] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=78] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=79] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=80] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=81] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=82] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=83] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=84] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=85] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=86] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=87] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=88] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=89] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=90] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=91] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=92] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=93] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=94] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=95] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=96] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=97] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=98] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=99] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=100] [L29] COND FALSE !(__VERIFIER_nondet_int() && i < 1000000) [L32] COND TRUE i >= 100 Loop: [L32] STUCK: goto STUCK; End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-01-10 07:35:43,531 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2025-01-10 07:35:43,726 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2025-01-10 07:35:43,925 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2025-01-10 07:35:44,125 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2025-01-10 07:35:44,325 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2025-01-10 07:35:44,526 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2025-01-10 07:35:44,726 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2025-01-10 07:35:44,926 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2025-01-10 07:35:45,126 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2025-01-10 07:35:45,326 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2025-01-10 07:35:45,527 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2025-01-10 07:35:45,727 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2025-01-10 07:35:45,929 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)